1 /*****************************************************************************/
4 * crt0_ram.S -- startup code for MCF5272 ColdFire based MOTOROLA boards.
6 * (C) Copyright 1999-2002, Greg Ungerer (gerg@snapgear.com).
7 * (C) Copyright 2000, Lineo (www.lineo.com).
10 /*****************************************************************************/
12 #include <linux/config.h>
13 #include <linux/threads.h>
14 #include <linux/linkage.h>
15 #include <asm/segment.h>
16 #include <asm/coldfire.h>
17 #include <asm/mcfsim.h>
19 /*****************************************************************************/
22 * Motorola M5272C3 ColdFire eval board, chip select and memory setup.
25 #define MEM_BASE 0x00000000 /* Memory base at address 0 */
26 #define VBR_BASE MEM_BASE /* Vector address */
28 /*****************************************************************************/
36 /*****************************************************************************/
41 * Set up the usable of RAM stuff. Size of RAM is determined then
42 * an initial stack set up at the end.
53 /*****************************************************************************/
58 * This is the codes first entry point. This is where it all
64 move.w #0x2700, %sr /* No interrupts */
67 * Setup VBR here, otherwise buserror remap will not work.
68 * if dBug was active before (on my SBC with dBug 1.1 of Dec 16 1996)
72 * Note: this is because dBUG points VBR to ROM, making vectors read
73 * only, so the bus trap can't be changed. (RS)
75 move.l #VBR_BASE, %a7 /* Note VBR can't be read */
77 move.l %a7, _ramvec /* Set up vector addr */
78 move.l %a7, _rambase /* Set up base RAM addr */
81 * Determine size of RAM, then set up initial stack.
83 #if defined(CONFIG_RAMAUTO)
84 move.l MCF_MBAR+0x7c,%d0 /* get SDRAM address mask */
85 andi.l #0xfffff000,%d0 /* mask out chip select options */
86 neg.l %d0 /* negate bits */
88 #if defined(CONFIG_RAM16MB)
89 #define MEM_SIZE 0x01000000 /* Memory size 16Mb */
90 #elif defined(CONFIG_RAM8MB)
91 #define MEM_SIZE 0x00800000 /* Memory size 8Mb */
93 #define MEM_SIZE 0x00400000 /* Memory size 4Mb */
101 move.l %d0, %sp /* Set up initial stack ptr */
102 move.l %d0, _ramend /* Set end ram addr */
105 * Enable CPU internal cache.
107 move.l #0x01000000, %d0 /* Invalidate cache cmd */
108 movec %d0, %CACR /* Invalidate cache */
109 move.l #0x80000100, %d0 /* Setup cache mask */
110 movec %d0, %CACR /* Enable cache */
112 #ifdef CONFIG_ROMFS_FS
114 * Move ROM filesystem above bss :-)
116 lea.l _sbss, %a0 /* Get start of bss */
117 lea.l _ebss, %a1 /* Set up destination */
118 move.l %a0, %a2 /* Copy of bss start */
120 move.l 8(%a0), %d0 /* Get size of ROMFS */
121 addq.l #8, %d0 /* Allow for rounding */
122 and.l #0xfffffffc, %d0 /* Whole words */
124 add.l %d0, %a0 /* Copy from end */
125 add.l %d0, %a1 /* Copy from end */
126 move.l %a1, _ramstart /* Set start of ram */
129 move.l -(%a0), %d0 /* Copy dword */
131 cmp.l %a0, %a2 /* Check if at end */
134 #else /* CONFIG_ROMFS_FS */
136 move.l %a1, _ramstart
137 #endif /* CONFIG_ROMFS_FS */
141 * Zero out the bss region.
143 lea.l _sbss, %a0 /* Get start of bss */
144 lea.l _ebss, %a1 /* Get end of bss */
145 clr.l %d0 /* Set value */
147 move.l %d0, (%a0)+ /* Clear each word */
148 cmp.l %a0, %a1 /* Check if at end */
152 * Load the current thread pointer and stack.
154 lea init_thread_union, %a0
158 * Assember start up done, start code proper.
160 jsr start_kernel /* Start Linux kernel */
163 jmp _exit /* Should never get here */
165 /*****************************************************************************/