2 * Copyright 2000 MontaVista Software Inc.
3 * Author: MontaVista Software, Inc.
4 * ppopov@mvista.com or source@mvista.com
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
11 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
12 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
13 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
14 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
15 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
16 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
17 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
18 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
19 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
20 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
22 * You should have received a copy of the GNU General Public License along
23 * with this program; if not, write to the Free Software Foundation, Inc.,
24 * 675 Mass Ave, Cambridge, MA 02139, USA.
26 #include <linux/config.h>
27 #include <linux/init.h>
28 #include <linux/sched.h>
29 #include <linux/ioport.h>
31 #include <linux/delay.h>
32 #include <linux/interrupt.h>
35 #include <asm/bootinfo.h>
37 #include <asm/mipsregs.h>
38 #include <asm/reboot.h>
39 #include <asm/pgtable.h>
40 #include <asm/mach-au1x00/au1000.h>
43 #ifdef CONFIG_BLK_DEV_INITRD
44 extern unsigned long initrd_start, initrd_end;
45 extern void * __rd_start, * __rd_end;
48 extern char * __init prom_getcmdline(void);
49 extern void __init board_setup(void);
50 extern void au1000_restart(char *);
51 extern void au1000_halt(void);
52 extern void au1000_power_off(void);
53 extern struct resource ioport_resource;
54 extern struct resource iomem_resource;
55 extern void (*board_time_init)(void);
56 extern void au1x_time_init(void);
57 extern void (*board_timer_setup)(struct irqaction *irq);
58 extern void au1x_timer_setup(struct irqaction *irq);
59 #if defined(CONFIG_64BIT_PHYS_ADDR) && (defined(CONFIG_SOC_AU1500) || defined(CONFIG_SOC_AU1550))
60 extern phys_t (*fixup_bigphys_addr)(phys_t phys_addr, phys_t size);
61 static phys_t au1500_fixup_bigphys_addr(phys_t phys_addr, phys_t size);
63 extern void au1xxx_time_init(void);
64 extern void au1xxx_timer_setup(struct irqaction *irq);
66 static int __init au1x00_setup(void)
69 unsigned long prid, cpupll, bclk = 1;
71 /* Various early Au1000 Errata corrected by this */
72 set_c0_config(1<<19); /* Config[OD] */
74 board_setup(); /* board specific setup */
76 prid = read_c0_prid();
79 case 0x00030100: printk("Au1000 DA "); bclk = 0; break;
80 case 0x00030201: printk("Au1000 HA "); bclk = 0; break;
81 case 0x00030202: printk("Au1000 HB "); bclk = 0; break;
82 case 0x00030203: printk("Au1000 HC "); break;
83 case 0x00030204: printk("Au1000 HD "); break;
85 case 0x01030200: printk("Au1500 AB "); break;
86 case 0x01030201: printk("Au1500 AC "); break;
87 case 0x01030202: printk("Au1500 AD "); break;
89 case 0x02030200: printk("Au1100 AB "); break;
90 case 0x02030201: printk("Au1100 BA "); break;
91 case 0x02030202: printk("Au1100 BC "); break;
92 case 0x02030203: printk("Au1100 BD "); break;
93 case 0x02030204: printk("Au1100 BE "); break;
95 case 0x03030200: printk("Au1550 AA "); break;
97 default: printk("Unknown Au1x00! "); bclk = 0; break;
99 cpupll = (au_readl(0xB1900060) & 0x3F) * 12;
100 printk("(PRId %08X) @ %dMHZ\n", prid, cpupll);
104 /* Enable BCLK switching */
105 bclk = au_readl(0xB190003C);
106 au_writel(bclk | 0x60, 0xB190003C);
107 printk("BCLK switching enabled!\n");
110 argptr = prom_getcmdline();
112 #ifdef CONFIG_SERIAL_AU1X00_CONSOLE
113 if ((argptr = strstr(argptr, "console=")) == NULL) {
114 argptr = prom_getcmdline();
115 strcat(argptr, " console=ttyS0,115200");
119 #ifdef CONFIG_FB_AU1100
120 if ((argptr = strstr(argptr, "video=")) == NULL) {
121 argptr = prom_getcmdline();
123 /*strcat(argptr, " video=au1100fb:panel:Sharp_320x240_16");*/
124 #ifdef CONFIG_MIPS_HYDROGEN3
125 strcat(argptr, " video=au1100fb:panel:Hydrogen_3_NEC_panel_320x240,nohwcursor");
127 strcat(argptr, " video=au1100fb:panel:s10,nohwcursor");
132 #ifdef CONFIG_FB_E1356
133 if ((argptr = strstr(argptr, "video=")) == NULL) {
134 argptr = prom_getcmdline();
135 #ifdef CONFIG_MIPS_PB1000
136 strcat(argptr, " video=e1356fb:system:pb1000,mmunalign:1");
138 strcat(argptr, " video=e1356fb:system:pb1500");
143 #ifdef CONFIG_FB_XPERT98
144 if ((argptr = strstr(argptr, "video=")) == NULL) {
145 argptr = prom_getcmdline();
146 strcat(argptr, " video=atyfb:1024x768-8@70");
150 #if defined(CONFIG_SOUND_AU1X00) && !defined(CONFIG_SOC_AU1000)
151 /* au1000 does not support vra, au1500 and au1100 do */
152 strcat(argptr, " au1000_audio=vra");
153 argptr = prom_getcmdline();
155 _machine_restart = au1000_restart;
156 _machine_halt = au1000_halt;
157 _machine_power_off = au1000_power_off;
158 board_time_init = au1xxx_time_init;
159 board_timer_setup = au1xxx_timer_setup;
160 #if defined(CONFIG_64BIT_PHYS_ADDR) && (defined(CONFIG_SOC_AU1500) || defined(CONFIG_SOC_AU1550))
161 fixup_bigphys_addr = au1500_fixup_bigphys_addr;
164 /* IO/MEM resources. */
166 ioport_resource.start = IOPORT_RESOURCE_START;
167 ioport_resource.end = IOPORT_RESOURCE_END;
168 iomem_resource.start = IOMEM_RESOURCE_START;
169 iomem_resource.end = IOMEM_RESOURCE_END;
171 #ifdef CONFIG_BLK_DEV_INITRD
172 ROOT_DEV = MKDEV(RAMDISK_MAJOR, 0);
173 initrd_start = (unsigned long)&__rd_start;
174 initrd_end = (unsigned long)&__rd_end;
177 #if defined (CONFIG_USB_OHCI) || defined (CONFIG_AU1X00_USB_DEVICE)
178 #ifdef CONFIG_USB_OHCI
179 if ((argptr = strstr(argptr, "usb_ohci=")) == NULL) {
181 argptr = prom_getcmdline();
182 memset(usb_args, 0, sizeof(usb_args));
183 sprintf(usb_args, " usb_ohci=base:0x%x,len:0x%x,irq:%d",
184 USB_OHCI_BASE, USB_OHCI_LEN, AU1000_USB_HOST_INT);
185 strcat(argptr, usb_args);
189 #ifdef CONFIG_USB_OHCI
190 /* enable host controller and wait for reset done */
191 au_writel(0x08, USB_HOST_CONFIG);
193 au_writel(0x0E, USB_HOST_CONFIG);
195 au_readl(USB_HOST_CONFIG); /* throw away first read */
196 while (!(au_readl(USB_HOST_CONFIG) & 0x10))
197 au_readl(USB_HOST_CONFIG);
199 #endif /* defined (CONFIG_USB_OHCI) || defined (CONFIG_AU1X00_USB_DEVICE) */
201 while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_E0S);
202 au_writel(SYS_CNTRL_E0 | SYS_CNTRL_EN0, SYS_COUNTER_CNTRL);
204 while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_T0S);
205 au_writel(0, SYS_TOYTRIM);
209 early_initcall(au1x00_setup);
211 #if defined(CONFIG_64BIT_PHYS_ADDR) && (defined(CONFIG_SOC_AU1500) || defined(CONFIG_SOC_AU1550))
212 /* This routine should be valid for all Au1500 based boards */
213 static phys_t au1500_fixup_bigphys_addr(phys_t phys_addr, phys_t size)
215 u32 pci_start = (u32)Au1500_PCI_MEM_START;
216 u32 pci_end = (u32)Au1500_PCI_MEM_END;
218 /* Don't fixup 36 bit addresses */
219 if ((phys_addr >> 32) != 0) return phys_addr;
221 /* check for pci memory window */
222 if ((phys_addr >= pci_start) && ((phys_addr + size) < pci_end)) {
223 return (phys_t)((phys_addr - pci_start) +
224 Au1500_PCI_MEM_START);