2 * Copyright 2000 MontaVista Software Inc.
3 * Author: MontaVista Software, Inc.
4 * ppopov@mvista.com or source@mvista.com
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
11 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
12 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
13 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
14 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
15 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
16 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
17 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
18 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
19 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
20 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
22 * You should have received a copy of the GNU General Public License along
23 * with this program; if not, write to the Free Software Foundation, Inc.,
24 * 675 Mass Ave, Cambridge, MA 02139, USA.
26 #include <linux/config.h>
27 #include <linux/init.h>
28 #include <linux/sched.h>
29 #include <linux/ioport.h>
31 #include <linux/console.h>
32 #include <linux/delay.h>
35 #include <asm/bootinfo.h>
37 #include <asm/mipsregs.h>
38 #include <asm/reboot.h>
39 #include <asm/pgtable.h>
40 #include <asm/mach-au1x00/au1000.h>
41 #include <asm/mach-pb1x00/pb1500.h>
43 #ifdef CONFIG_USB_OHCI
44 // Enable the workaround for the OHCI DoneHead
45 // register corruption problem.
46 #define CONFIG_AU1000_OHCI_FIX
47 ^^^^^^^^^^^^^^^^^^^^^^
48 !!! I shall not define symbols starting with CONFIG_ !!!
51 void __init board_setup(void)
54 u32 sys_freqctrl, sys_clksrc;
56 sys_clksrc = sys_freqctrl = pin_func = 0;
57 // set AUX clock to 12MHz * 8 = 96 MHz
58 au_writel(8, SYS_AUXPLL);
59 au_writel(0, SYS_PINSTATERD);
62 #if defined (CONFIG_USB_OHCI) || defined (CONFIG_AU1X00_USB_DEVICE)
64 /* GPIO201 is input for PCMCIA card detect */
65 /* GPIO203 is input for PCMCIA interrupt request */
66 au_writel(au_readl(GPIO2_DIR) & (u32)(~((1<<1)|(1<<3))), GPIO2_DIR);
68 /* zero and disable FREQ2 */
69 sys_freqctrl = au_readl(SYS_FREQCTRL0);
70 sys_freqctrl &= ~0xFFF00000;
71 au_writel(sys_freqctrl, SYS_FREQCTRL0);
73 /* zero and disable USBH/USBD clocks */
74 sys_clksrc = au_readl(SYS_CLKSRC);
75 sys_clksrc &= ~0x00007FE0;
76 au_writel(sys_clksrc, SYS_CLKSRC);
78 sys_freqctrl = au_readl(SYS_FREQCTRL0);
79 sys_freqctrl &= ~0xFFF00000;
81 sys_clksrc = au_readl(SYS_CLKSRC);
82 sys_clksrc &= ~0x00007FE0;
84 // FREQ2 = aux/2 = 48 MHz
85 sys_freqctrl |= ((0<<22) | (1<<21) | (1<<20));
86 au_writel(sys_freqctrl, SYS_FREQCTRL0);
89 * Route 48MHz FREQ2 into USB Host and/or Device
91 #ifdef CONFIG_USB_OHCI
92 sys_clksrc |= ((4<<12) | (0<<11) | (0<<10));
94 #ifdef CONFIG_AU1X00_USB_DEVICE
95 sys_clksrc |= ((4<<7) | (0<<6) | (0<<5));
97 au_writel(sys_clksrc, SYS_CLKSRC);
100 pin_func = au_readl(SYS_PINFUNC) & (u32)(~0x8000);
101 #ifndef CONFIG_AU1X00_USB_DEVICE
102 // 2nd USB port is USB host
105 au_writel(pin_func, SYS_PINFUNC);
106 #endif // defined (CONFIG_USB_OHCI) || defined (CONFIG_AU1X00_USB_DEVICE)
111 // Setup PCI bus controller
112 au_writel(0, Au1500_PCI_CMEM);
113 au_writel(0x00003fff, Au1500_CFG_BASE);
114 #if defined(__MIPSEB__)
115 au_writel(0xf | (2<<6) | (1<<4), Au1500_PCI_CFG);
117 au_writel(0xf, Au1500_PCI_CFG);
119 au_writel(0xf0000000, Au1500_PCI_MWMASK_DEV);
120 au_writel(0, Au1500_PCI_MWBASE_REV_CCL);
121 au_writel(0x02a00356, Au1500_PCI_STATCMD);
122 au_writel(0x00003c04, Au1500_PCI_HDRTYPE);
123 au_writel(0x00000008, Au1500_PCI_MBAR);
127 /* Enable sys bus clock divider when IDLE state or no bus activity. */
128 au_writel(au_readl(SYS_POWERCTRL) | (0x3 << 5), SYS_POWERCTRL);
130 /* Enable the RTC if not already enabled */
131 if (!(au_readl(0xac000028) & 0x20)) {
132 printk("enabling clock ...\n");
133 au_writel((au_readl(0xac000028) | 0x20), 0xac000028);
135 /* Put the clock in BCD mode */
136 if (readl(0xac00002C) & 0x4) { /* reg B */
137 au_writel(au_readl(0xac00002c) & ~0x4, 0xac00002c);