3 #include <asm/mipsregs.h>
4 #include <asm/regdef.h>
5 #include <asm/stackframe.h>
14 # MIPS has 16 exception vectors numbered 0 to 15
15 # vector number 0 is for interrupts and the others are for various exceptions
16 # The following code is installed as the handler for exception 0
17 # There are 8 possible interrupts that can cause this exception.
18 # The cause register indicates which are pending
19 # The status register indicates which are enabled
20 # This code segment basically will decipher which interrup occurred (7 downto 0)
21 # and pass an integer indicating which was the highest priority pending interrupt
22 # to the do_IRQ routine.
24 NESTED(hpIRQ, PT_SIZE, sp)
26 CLI # Important: mark KERNEL mode !
28 * Get pending interrupts
31 mfc0 t0,CP0_CAUSE # get pending interrupts
32 mfc0 t1,CP0_STATUS # get enabled interrupts
33 and t0,t1 # isolate allowed ones
34 andi t0,0xff00 # isolate pending bits
35 sll t0,16 # shift the pending bits down
36 beqz t0,3f # no pending intrs, then spurious
40 * Find irq with highest priority
41 * FIXME: This is slow - use binary search
45 1: bltz t0,2f # found pending irq
60 mfc0 t0,CP0_STATUS # disable interrupts
68 3: j spurious_interrupt