2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
6 * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
7 * Copyright (C) 1997, 1998, 1999, 2000 Ralf Baechle ralf@gnu.org
8 * Carsten Langgaard, carstenl@mips.com
9 * Copyright (C) 2002 MIPS Technologies, Inc. All rights reserved.
11 #include <linux/config.h>
12 #include <linux/init.h>
13 #include <linux/sched.h>
17 #include <asm/bootinfo.h>
18 #include <asm/mmu_context.h>
19 #include <asm/pgtable.h>
20 #include <asm/system.h>
22 extern void except_vec0_generic(void);
23 extern void except_vec1_r8k(void);
25 #define TFP_TLB_SIZE 384
26 #define TFP_TLB_SET_SHIFT 7
28 /* CP0 hazard avoidance. */
29 #define BARRIER __asm__ __volatile__(".set noreorder\n\t" \
30 "nop; nop; nop; nop; nop; nop;\n\t" \
33 void local_flush_tlb_all(void)
36 unsigned long old_ctx;
39 local_irq_save(flags);
40 /* Save old context and create impossible VPN2 value */
41 old_ctx = read_c0_entryhi();
44 for (entry = 0; entry < TFP_TLB_SIZE; entry++) {
45 write_c0_tlbset(entry >> TFP_TLB_SET_SHIFT);
46 write_c0_vaddr(entry << PAGE_SHIFT);
47 write_c0_entryhi(CKSEG0 + (entry << (PAGE_SHIFT + 1)));
52 write_c0_entryhi(old_ctx);
53 local_irq_restore(flags);
56 void local_flush_tlb_mm(struct mm_struct *mm)
58 int cpu = smp_processor_id();
60 if (cpu_context(cpu, mm) != 0)
61 drop_mmu_context(mm,cpu);
64 void local_flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
67 struct mm_struct *mm = vma->vm_mm;
68 int cpu = smp_processor_id();
70 int oldpid, newpid, size;
72 if (!cpu_context(cpu, mm))
75 size = (end - start + (PAGE_SIZE - 1)) >> PAGE_SHIFT;
76 size = (size + 1) >> 1;
78 local_irq_save(flags);
80 if (size > TFP_TLB_SIZE / 2) {
81 drop_mmu_context(mm, cpu);
85 oldpid = read_c0_entryhi();
86 newpid = cpu_asid(cpu, mm);
91 end += (PAGE_SIZE - 1);
96 write_c0_vaddr(start);
97 write_c0_entryhi(start);
100 idx = read_c0_tlbset();
104 write_c0_entryhi(CKSEG0 + (idx << (PAGE_SHIFT + 1)));
107 write_c0_entryhi(oldpid);
110 local_irq_restore(flags);
113 /* Usable for KV1 addresses only! */
114 void local_flush_tlb_kernel_range(unsigned long start, unsigned long end)
119 size = (end - start + (PAGE_SIZE - 1)) >> PAGE_SHIFT;
120 size = (size + 1) >> 1;
122 if (size > TFP_TLB_SIZE / 2) {
123 local_flush_tlb_all();
127 local_irq_save(flags);
132 end += (PAGE_SIZE - 1);
134 while (start < end) {
137 write_c0_vaddr(start);
138 write_c0_entryhi(start);
141 idx = read_c0_tlbset();
145 write_c0_entryhi(CKSEG0 + (idx << (PAGE_SHIFT + 1)));
149 local_irq_restore(flags);
152 void local_flush_tlb_page(struct vm_area_struct *vma, unsigned long page)
154 int cpu = smp_processor_id();
159 if (!cpu_context(cpu, vma->vm_mm))
162 newpid = cpu_asid(cpu, vma->vm_mm);
164 local_irq_save(flags);
165 oldpid = read_c0_entryhi();
166 write_c0_vaddr(page);
167 write_c0_entryhi(newpid);
169 idx = read_c0_tlbset();
174 write_c0_entryhi(CKSEG0 + (idx << (PAGE_SHIFT + 1)));
178 write_c0_entryhi(oldpid);
179 local_irq_restore(flags);
183 * We will need multiple versions of update_mmu_cache(), one that just
184 * updates the TLB with the new pte(s), and another which also checks
185 * for the R4k "end of page" hardware bug and does the needy.
187 void __update_tlb(struct vm_area_struct * vma, unsigned long address, pte_t pte)
196 * Handle debugger faulting in for debugee.
198 if (current->active_mm != vma->vm_mm)
201 pid = read_c0_entryhi() & ASID_MASK;
203 local_irq_save(flags);
204 address &= PAGE_MASK;
205 write_c0_vaddr(address);
206 write_c0_entryhi(pid);
207 pgdp = pgd_offset(vma->vm_mm, address);
208 pmdp = pmd_offset(pgdp, address);
209 ptep = pte_offset_map(pmdp, address);
212 write_c0_entrylo(pte_val(*ptep++) >> 6);
215 write_c0_entryhi(pid);
216 local_irq_restore(flags);
219 static void __init probe_tlb(unsigned long config)
221 struct cpuinfo_mips *c = ¤t_cpu_data;
223 c->tlbsize = 3 * 128; /* 3 sets each 128 entries */
226 void __init tlb_init(void)
228 unsigned int config = read_c0_config();
229 unsigned long status;
233 status = read_c0_status();
234 status &= ~(ST0_UPS | ST0_KPS);
235 #ifdef CONFIG_PAGE_SIZE_4KB
236 status |= (TFP_PAGESIZE_4K << 32) | (TFP_PAGESIZE_4K << 36);
237 #elif defined(CONFIG_PAGE_SIZE_8KB)
238 status |= (TFP_PAGESIZE_8K << 32) | (TFP_PAGESIZE_8K << 36);
239 #elif defined(CONFIG_PAGE_SIZE_16KB)
240 status |= (TFP_PAGESIZE_16K << 32) | (TFP_PAGESIZE_16K << 36);
241 #elif defined(CONFIG_PAGE_SIZE_64KB)
242 status |= (TFP_PAGESIZE_64K << 32) | (TFP_PAGESIZE_64K << 36);
244 write_c0_status(status);
248 local_flush_tlb_all();
250 memcpy((void *)(CKSEG0 + 0x00), &except_vec0_generic, 0x80);
251 memcpy((void *)(CKSEG0 + 0x80), except_vec1_r8k, 0x80);
252 flush_icache_range(CKSEG0 + 0x80, CKSEG0 + 0x100);