2 * Copyright 2002 Momentum Computer Inc.
3 * Author: Matthew Dharm <mdharm@momenco.com>
5 * Louis Hamilton, Red Hat, Inc.
6 * hamilton@redhat.com [MIPS64 modifications]
8 * Based on Ocelot Linux port, which is
9 * Copyright 2001 MontaVista Software Inc.
10 * Author: jsun@mvista.com or jsun@junsun.net
12 * This program is free software; you can redistribute it and/or modify it
13 * under the terms of the GNU General Public License as published by the
14 * Free Software Foundation; either version 2 of the License, or (at your
15 * option) any later version.
17 * Added changes for SMP - Manish Lachwani (lachwani@pmc-sierra.com)
19 #include <linux/config.h>
20 #include <linux/init.h>
22 #include <linux/sched.h>
23 #include <linux/bootmem.h>
25 #include <asm/addrspace.h>
26 #include <asm/bootinfo.h>
27 #include <asm/mv64340.h>
30 #include "jaguar_atx_fpga.h"
32 extern void ja_setup_console(void);
34 struct callvectors *debug_vectors;
36 extern unsigned long mv64340_base;
37 extern unsigned long cpu_clock;
39 const char *get_system_type(void)
41 return "Momentum Jaguar-ATX";
44 #ifdef CONFIG_MV64340_ETH
45 extern unsigned char prom_mac_addr_base[6];
47 static void burn_clocks(void)
51 /* this loop should burn at least 1us -- this should be plenty */
52 for (i = 0; i < 0x10000; i++)
56 static u8 exchange_bit(u8 val, u8 cs)
59 JAGUAR_FPGA_WRITE((val << 2) | cs, EEPROM_MODE);
62 /* turn the clock on */
63 JAGUAR_FPGA_WRITE((val << 2) | cs | 0x2, EEPROM_MODE);
66 /* turn the clock off and read-strobe */
67 JAGUAR_FPGA_WRITE((val << 2) | cs | 0x10, EEPROM_MODE);
70 return ((JAGUAR_FPGA_READ(EEPROM_MODE) >> 3) & 0x1);
73 void get_mac(char dest[6])
75 u8 read_opcode[12] = {1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
78 for (i = 0; i < 12; i++)
79 exchange_bit(read_opcode[i], 1);
81 for (j = 0; j < 6; j++) {
83 for (i = 0; i < 8; i++) {
85 dest[j] |= exchange_bit(0, 1);
96 unsigned long signext(unsigned long addr)
99 return (unsigned long)((int)addr);
102 void *get_arg(unsigned long args, int arc)
105 unsigned char *puc, uc;
108 ul = (unsigned long)signext(args);
109 puc = (unsigned char *)ul;
113 #ifdef CONFIG_CPU_LITTLE_ENDIAN
115 l = (unsigned long)uc;
117 ul |= (((unsigned long)uc) << 8);
119 ul |= (((unsigned long)uc) << 16);
121 ul |= (((unsigned long)uc) << 24);
124 ul = ((unsigned long)uc) << 24;
126 ul |= (((unsigned long)uc) << 16);
128 ul |= (((unsigned long)uc) << 8);
130 ul |= ((unsigned long)uc);
137 char *arg64(unsigned long addrin, int arg_index)
142 args = signext(addrin);
143 p = (char *)get_arg(args, arg_index);
147 #endif /* CONFIG_MIPS64 */
149 /* PMON passes arguments in C main() style */
150 void __init prom_init(void)
153 char **arg = (char **) fw_arg1;
154 char **env = (char **) fw_arg2;
155 struct callvectors *cv = (struct callvectors *) fw_arg3;
158 #ifdef CONFIG_SERIAL_8250_CONSOLE
159 // ja_setup_console(); /* The very first thing. */
165 printk("Mips64 Jaguar-ATX\n");
166 /* save the PROM vectors for debugging use */
167 debug_vectors = (struct callvectors *)signext((unsigned long)cv);
169 /* arg[0] is "g", the rest is boot parameters */
170 arcs_cmdline[0] = '\0';
172 for (i = 1; i < argc; i++) {
173 ptr = (char *)arg64((unsigned long)arg, i);
174 if ((strlen(arcs_cmdline) + strlen(ptr) + 1) >=
175 sizeof(arcs_cmdline))
177 strcat(arcs_cmdline, ptr);
178 strcat(arcs_cmdline, " ");
183 ptr = (char *)arg64((unsigned long)env, i);
187 if (strncmp("gtbase", ptr, strlen("gtbase")) == 0) {
188 mv64340_base = simple_strtol(ptr + strlen("gtbase="),
191 if ((mv64340_base & 0xffffffff00000000) == 0)
192 mv64340_base |= 0xffffffff00000000;
194 printk("mv64340_base set to 0x%016lx\n", mv64340_base);
196 if (strncmp("cpuclock", ptr, strlen("cpuclock")) == 0) {
197 cpu_clock = simple_strtol(ptr + strlen("cpuclock="),
199 printk("cpu_clock set to %d\n", cpu_clock);
203 printk("arcs_cmdline: %s\n", arcs_cmdline);
205 #else /* CONFIG_MIPS64 */
206 /* save the PROM vectors for debugging use */
209 /* arg[0] is "g", the rest is boot parameters */
210 arcs_cmdline[0] = '\0';
211 for (i = 1; i < argc; i++) {
212 if (strlen(arcs_cmdline) + strlen(arg[i] + 1)
213 >= sizeof(arcs_cmdline))
215 strcat(arcs_cmdline, arg[i]);
216 strcat(arcs_cmdline, " ");
220 if (strncmp("gtbase", *env, strlen("gtbase")) == 0) {
221 mv64340_base = simple_strtol(*env + strlen("gtbase="),
224 if (strncmp("cpuclock", *env, strlen("cpuclock")) == 0) {
225 cpu_clock = simple_strtol(*env + strlen("cpuclock="),
230 #endif /* CONFIG_MIPS64 */
231 mips_machgroup = MACH_GROUP_MOMENCO;
232 mips_machtype = MACH_MOMENCO_JAGUAR_ATX;
234 #ifdef CONFIG_MV64340_ETH
235 /* get the base MAC address for on-board ethernet ports */
236 get_mac(prom_mac_addr_base);
240 void __init prom_free_prom_memory(void)
244 void __init prom_fixup_mem_map(unsigned long start, unsigned long end)
251 int prom_setup_smp(void)
256 * We know that the RM9000 on the Jaguar ATX board has 2 cores.
257 * Hence, this can be hardcoded for now.
262 int prom_boot_secondary(int cpu, unsigned long sp, unsigned long gp)
264 /* Clear the semaphore */
265 *(volatile uint32_t *)(0xbb000a68) = 0x80000000;
270 void prom_init_secondary(void)
272 clear_c0_config(CONF_CM_CMASK);
275 clear_c0_status(ST0_IM);
276 set_c0_status(0x1ffff);
279 void prom_smp_finish(void)