arch/mips/pci/fixup-tb0226.c

   1 /*
   2  * FILE NAME
   3  *      arch/mips/vr41xx/tanbac-tb0226/pci_fixup.c
   4  *
   5  * BRIEF MODULE DESCRIPTION
   6  *      The TANBAC TB0226 specific PCI fixups.
   7  *
   8  * Copyright 2002,2003 Yoichi Yuasa
   9  *                yuasa@hh.iij4u.or.jp
  10  *
  11  *  This program is free software; you can redistribute it and/or modify it
  12  *  under the terms of the GNU General Public License as published by the
  13  *  Free Software Foundation; either version 2 of the License, or (at your
  14  *  option) any later version.
  15  */
  16 #include <linux/init.h>
  17 #include <linux/pci.h>
  18
  19 #include <asm/vr41xx/tb0226.h>
  20
  21 void __init pcibios_fixup_irqs(void)
  22 {
  23         struct pci_dev *dev = NULL;
  24         u8 slot, pin;
  25
  26         while ((dev = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) {
  27                 slot = PCI_SLOT(dev->devfn);
  28                 dev->irq = 0;
  29
  30                 switch (slot) {
  31                 case 12:
  32                         vr41xx_set_irq_trigger(GD82559_1_PIN,
  33                                                TRIGGER_LEVEL,
  34                                                SIGNAL_THROUGH);
  35                         vr41xx_set_irq_level(GD82559_1_PIN, LEVEL_LOW);
  36                         dev->irq = GD82559_1_IRQ;
  37                         break;
  38                 case 13:
  39                         vr41xx_set_irq_trigger(GD82559_2_PIN,
  40                                                TRIGGER_LEVEL,
  41                                                SIGNAL_THROUGH);
  42                         vr41xx_set_irq_level(GD82559_2_PIN, LEVEL_LOW);
  43                         dev->irq = GD82559_2_IRQ;
  44                         break;
  45                 case 14:
  46                         pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);
  47                         switch (pin) {
  48                         case 1:
  49                                 vr41xx_set_irq_trigger(UPD720100_INTA_PIN,
  50                                                        TRIGGER_LEVEL,
  51                                                        SIGNAL_THROUGH);
  52                                 vr41xx_set_irq_level(UPD720100_INTA_PIN,
  53                                                      LEVEL_LOW);
  54                                 dev->irq = UPD720100_INTA_IRQ;
  55                                 break;
  56                         case 2:
  57                                 vr41xx_set_irq_trigger(UPD720100_INTB_PIN,
  58                                                        TRIGGER_LEVEL,
  59                                                        SIGNAL_THROUGH);
  60                                 vr41xx_set_irq_level(UPD720100_INTB_PIN,
  61                                                      LEVEL_LOW);
  62                                 dev->irq = UPD720100_INTB_IRQ;
  63                                 break;
  64                         case 3:
  65                                 vr41xx_set_irq_trigger(UPD720100_INTC_PIN,
  66                                                        TRIGGER_LEVEL,
  67                                                        SIGNAL_THROUGH);
  68                                 vr41xx_set_irq_level(UPD720100_INTC_PIN,
  69                                                      LEVEL_LOW);
  70                                 dev->irq = UPD720100_INTC_IRQ;
  71                                 break;
  72                         }
  73                         break;
  74                 }
  75
  76                 pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq);
  77         }
  78 }