arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_setup.c

   1 /*
   2  * Toshiba rbtx4927 specific setup
   3  *
   4  * Author: MontaVista Software, Inc.
   5  *         source@mvista.com
   6  *
   7  * Copyright 2001-2002 MontaVista Software Inc.
   8  *
   9  * Copyright (C) 1996, 1997, 2001  Ralf Baechle
  10  * Copyright (C) 2000 RidgeRun, Inc.
  11  * Author: RidgeRun, Inc.
  12  *   glonnon@ridgerun.com, skranz@ridgerun.com, stevej@ridgerun.com
  13  *
  14  * Copyright 2001 MontaVista Software Inc.
  15  * Author: jsun@mvista.com or jsun@junsun.net
  16  *
  17  * Copyright 2002 MontaVista Software Inc.
  18  * Author: Michael Pruznick, michael_pruznick@mvista.com
  19  *
  20  * Copyright (C) 2000-2001 Toshiba Corporation
  21  *
  22  *  This program is free software; you can redistribute it and/or modify it
  23  *  under the terms of the GNU General Public License as published by the
  24  *  Free Software Foundation; either version 2 of the License, or (at your
  25  *  option) any later version.
  26  *
  27  *  THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
  28  *  WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
  29  *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  30  *  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  31  *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
  32  *  BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
  33  *  OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  34  *  ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
  35  *  TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
  36  *  USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  37  *
  38  *  You should have received a copy of the GNU General Public License along
  39  *  with this program; if not, write to the Free Software Foundation, Inc.,
  40  *  675 Mass Ave, Cambridge, MA 02139, USA.
  41  */
  42 #include <linux/config.h>
  43 #include <linux/init.h>
  44 #include <linux/kernel.h>
  45 #include <linux/types.h>
  46 #include <linux/mm.h>
  47 #include <linux/swap.h>
  48 #include <linux/ioport.h>
  49 #include <linux/sched.h>
  50 #include <linux/interrupt.h>
  51 #include <linux/pci.h>
  52 #include <linux/timex.h>
  53 #include <asm/bootinfo.h>
  54 #include <asm/page.h>
  55 #include <asm/io.h>
  56 #include <asm/irq.h>
  57 #include <asm/processor.h>
  58 #include <asm/ptrace.h>
  59 #include <asm/reboot.h>
  60 #include <asm/time.h>
  61 #include <linux/bootmem.h>
  62 #include <linux/blkdev.h>
  63 #ifdef CONFIG_RTC_DS1742
  64 #include <asm/rtc_ds1742.h>
  65 #endif
  66 #ifdef CONFIG_TOSHIBA_FPCIB0
  67 #include <asm/smsc_fdc37m81x.h>
  68 #endif
  69 #include <asm/tx4927/toshiba_rbtx4927.h>
  70 #ifdef CONFIG_PCI
  71 #include <asm/tx4927/tx4927_pci.h>
  72 #include <asm/pci_channel.h>
  73 #endif
  74 #ifdef CONFIG_BLK_DEV_IDEPCI
  75 #include <linux/hdreg.h>
  76 #include <linux/ide.h>
  77 #endif
  78
  79 #undef TOSHIBA_RBTX4927_SETUP_DEBUG
  80
  81 #ifdef TOSHIBA_RBTX4927_SETUP_DEBUG
  82 #define TOSHIBA_RBTX4927_SETUP_NONE        0x00000000
  83
  84 #define TOSHIBA_RBTX4927_SETUP_INFO        ( 1 <<  0 )
  85 #define TOSHIBA_RBTX4927_SETUP_WARN        ( 1 <<  1 )
  86 #define TOSHIBA_RBTX4927_SETUP_EROR        ( 1 <<  2 )
  87
  88 #define TOSHIBA_RBTX4927_SETUP_EFWFU       ( 1 <<  3 )
  89 #define TOSHIBA_RBTX4927_SETUP_SETUP       ( 1 <<  4 )
  90 #define TOSHIBA_RBTX4927_SETUP_TIME_INIT   ( 1 <<  5 )
  91 #define TOSHIBA_RBTX4927_SETUP_TIMER_SETUP ( 1 <<  6 )
  92 #define TOSHIBA_RBTX4927_SETUP_PCIBIOS     ( 1 <<  7 )
  93 #define TOSHIBA_RBTX4927_SETUP_PCI1        ( 1 <<  8 )
  94 #define TOSHIBA_RBTX4927_SETUP_PCI2        ( 1 <<  9 )
  95 #define TOSHIBA_RBTX4927_SETUP_PCI66       ( 1 << 10 )
  96
  97 #define TOSHIBA_RBTX4927_SETUP_ALL         0xffffffff
  98 #endif
  99
 100 #ifdef TOSHIBA_RBTX4927_SETUP_DEBUG
 101 static const u32 toshiba_rbtx4927_setup_debug_flag =
 102     (TOSHIBA_RBTX4927_SETUP_NONE | TOSHIBA_RBTX4927_SETUP_INFO |
 103      TOSHIBA_RBTX4927_SETUP_WARN | TOSHIBA_RBTX4927_SETUP_EROR |
 104      TOSHIBA_RBTX4927_SETUP_EFWFU | TOSHIBA_RBTX4927_SETUP_SETUP |
 105      TOSHIBA_RBTX4927_SETUP_TIME_INIT | TOSHIBA_RBTX4927_SETUP_TIMER_SETUP
 106      | TOSHIBA_RBTX4927_SETUP_PCIBIOS | TOSHIBA_RBTX4927_SETUP_PCI1 |
 107      TOSHIBA_RBTX4927_SETUP_PCI2 | TOSHIBA_RBTX4927_SETUP_PCI66);
 108 #endif
 109
 110 #ifdef TOSHIBA_RBTX4927_SETUP_DEBUG
 111 #define TOSHIBA_RBTX4927_SETUP_DPRINTK(flag,str...) \
 112         if ( (toshiba_rbtx4927_setup_debug_flag) & (flag) ) \
 113         { \
 114            char tmp[100]; \
 115            sprintf( tmp, str ); \
 116            printk( "%s(%s:%u)::%s", __FUNCTION__, __FILE__, __LINE__, tmp ); \
 117         }
 118 #else
 119 #define TOSHIBA_RBTX4927_SETUP_DPRINTK(flag,str...)
 120 #endif
 121
 122 /* These functions are used for rebooting or halting the machine*/
 123 extern void toshiba_rbtx4927_restart(char *command);
 124 extern void toshiba_rbtx4927_halt(void);
 125 extern void toshiba_rbtx4927_power_off(void);
 126
 127 int tx4927_using_backplane = 0;
 128
 129 extern void gt64120_time_init(void);
 130 extern void toshiba_rbtx4927_irq_setup(void);
 131
 132 #ifdef CONFIG_PCI
 133 #define CONFIG_TX4927BUG_WORKAROUND
 134 #undef TX4927_SUPPORT_COMMAND_IO
 135 #undef  TX4927_SUPPORT_PCI_66
 136 int tx4927_cpu_clock = 100000000;       /* 100MHz */
 137 unsigned long mips_pci_io_base;
 138 unsigned long mips_pci_io_size;
 139 unsigned long mips_pci_mem_base;
 140 unsigned long mips_pci_mem_size;
 141 /* for legacy I/O, PCI I/O PCI Bus address must be 0 */
 142 unsigned long mips_pci_io_pciaddr = 0;
 143 unsigned long mips_memory_upper;
 144 static int tx4927_ccfg_toeon = 1;
 145 static int tx4927_pcic_trdyto = 0;      /* default: disabled */
 146 unsigned long tx4927_ce_base[8];
 147 void tx4927_pci_setup(void);
 148 void tx4927_reset_pci_pcic(void);
 149 #ifdef  TX4927_SUPPORT_PCI_66
 150 void tx4927_pci66_setup(void);
 151 extern int tx4927_pci66_check(void);
 152 #endif
 153 int tx4927_pci66 = 0;           /* 0:auto */
 154 #endif
 155
 156 char *toshiba_name = "";
 157
 158 #ifdef CONFIG_PCI
 159 void tx4927_dump_pcic_settings(void)
 160 {
 161         printk("%s pcic settings:",toshiba_name);
 162         {
 163                 int i;
 164                 unsigned long *preg = (unsigned long *) tx4927_pcicptr;
 165                 for (i = 0; i < sizeof(struct tx4927_pcic_reg); i += 4) {
 166                         if (i % 32 == 0)
 167                                 printk("\n%04x:", i);
 168                         if (preg == &tx4927_pcicptr->g2pintack
 169                             || preg == &tx4927_pcicptr->g2pspc
 170 #ifdef CONFIG_TX4927BUG_WORKAROUND
 171                             || preg == &tx4927_pcicptr->g2pcfgadrs
 172                             || preg == &tx4927_pcicptr->g2pcfgdata
 173 #endif
 174                             ) {
 175                                 printk(" XXXXXXXX");
 176                                 preg++;
 177                                 continue;
 178                         }
 179                         printk(" %08lx", *preg++);
 180                         if (preg == &tx4927_pcicptr->g2pcfgadrs)
 181                                 break;
 182                 }
 183                 printk("\n");
 184         }
 185 }
 186
 187 static void tx4927_pcierr_interrupt(int irq, void *dev_id,
 188                                     struct pt_regs *regs)
 189 {
 190         extern void tx4927_dump_pcic_settings(void);
 191
 192 #ifdef CONFIG_BLK_DEV_IDEPCI
 193         /* ignore MasterAbort for ide probing... */
 194         if (irq == TX4927_IRQ_IRC_PCIERR &&
 195             ((tx4927_pcicptr->pcistatus >> 16) & 0xf900) ==
 196             PCI_STATUS_REC_MASTER_ABORT) {
 197                 tx4927_pcicptr->pcistatus =
 198                     (tx4927_pcicptr->
 199                      pcistatus & 0x0000ffff) | (PCI_STATUS_REC_MASTER_ABORT
 200                                                 << 16);
 201
 202                 return;
 203         }
 204 #endif
 205         printk("PCI error interrupt (irq 0x%x).\n", irq);
 206         printk("pcistat:%04x, g2pstatus:%08lx, pcicstatus:%08lx\n",
 207                (unsigned short) (tx4927_pcicptr->pcistatus >> 16),
 208                tx4927_pcicptr->g2pstatus, tx4927_pcicptr->pcicstatus);
 209         printk("ccfg:%08lx, tear:%02lx_%08lx\n",
 210                (unsigned long) tx4927_ccfgptr->ccfg,
 211                (unsigned long) (tx4927_ccfgptr->tear >> 32),
 212                (unsigned long) tx4927_ccfgptr->tear);
 213         show_regs(regs);
 214         //tx4927_dump_pcic_settings();
 215         panic("PCI error at PC:%08lx.", regs->cp0_epc);
 216 }
 217
 218 static struct irqaction pcic_action = {
 219         tx4927_pcierr_interrupt, 0, 0, "PCI-C", NULL, NULL
 220 };
 221
 222 static struct irqaction pcierr_action = {
 223         tx4927_pcierr_interrupt, 0, 0, "PCI-ERR", NULL, NULL
 224 };
 225
 226
 227 void __init toshiba_rbtx4927_pci_irq_init(void)
 228 {
 229         setup_irq(TX4927_IRQ_IRC_PCIC, &pcic_action);
 230         setup_irq(TX4927_IRQ_IRC_PCIERR, &pcierr_action);
 231         return;
 232 }
 233
 234 void tx4927_reset_pci_pcic(void)
 235 {
 236         /* Reset PCI Bus */
 237         *tx4927_pcireset_ptr = 1;
 238         /* Reset PCIC */
 239         tx4927_ccfgptr->clkctr |= TX4927_CLKCTR_PCIRST;
 240         udelay(10000);
 241         /* clear PCIC reset */
 242         tx4927_ccfgptr->clkctr &= ~TX4927_CLKCTR_PCIRST;
 243         *tx4927_pcireset_ptr = 0;
 244 }
 245 #endif /* CONFIG_PCI */
 246
 247 #ifdef CONFIG_PCI
 248 #ifdef  TX4927_SUPPORT_PCI_66
 249 void tx4927_pci66_setup(void)
 250 {
 251         int pciclk, pciclkin = 1;
 252
 253         TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_PCI66,
 254                                        "-\n");
 255
 256         if (tx4927_ccfgptr->ccfg & TX4927_CCFG_PCI66)
 257                 return;
 258
 259         tx4927_reset_pci_pcic();
 260
 261         /* Assert M66EN */
 262         tx4927_ccfgptr->ccfg |= TX4927_CCFG_PCI66;
 263         /* set PCICLK 66MHz */
 264         if (tx4927_ccfgptr->pcfg & TX4927_PCFG_PCICLKEN_ALL) {
 265                 unsigned int pcidivmode = 0;
 266                 pcidivmode =
 267                     (unsigned long) tx4927_ccfgptr->
 268                     ccfg & TX4927_CCFG_PCIDIVMODE_MASK;
 269                 if (tx4927_cpu_clock >= 170000000) {
 270                         /* CPU 200MHz */
 271                         pcidivmode = TX4927_CCFG_PCIDIVMODE_3;
 272                         pciclk = tx4927_cpu_clock / 3;
 273                 } else {
 274                         /* CPU 166MHz */
 275                         pcidivmode = TX4927_CCFG_PCIDIVMODE_2_5;
 276                         pciclk = tx4927_cpu_clock * 2 / 5;
 277                 }
 278                 tx4927_ccfgptr->ccfg =
 279                     (tx4927_ccfgptr->ccfg & ~TX4927_CCFG_PCIDIVMODE_MASK)
 280                     | pcidivmode;
 281                 TOSHIBA_RBTX4927_SETUP_DPRINTK
 282                     (TOSHIBA_RBTX4927_SETUP_PCI66,
 283                      ":PCICLK: ccfg:0x%08lx\n",
 284                      (unsigned long) tx4927_ccfgptr->ccfg);
 285         } else {
 286                 int pciclk_setting = *tx4927_pci_clk_ptr;
 287                 pciclkin = 0;
 288                 pciclk = 66666666;
 289                 pciclk_setting &= ~TX4927_PCI_CLK_MASK;
 290                 pciclk_setting |= TX4927_PCI_CLK_66;
 291                 *tx4927_pci_clk_ptr = pciclk_setting;
 292                 TOSHIBA_RBTX4927_SETUP_DPRINTK
 293                     (TOSHIBA_RBTX4927_SETUP_PCI66,
 294                      "PCICLK: pci_clk:%02x\n", *tx4927_pci_clk_ptr);
 295         }
 296
 297         udelay(10000);
 298
 299         /* clear PCIC reset */
 300         tx4927_ccfgptr->clkctr &= ~TX4927_CLKCTR_PCIRST;
 301         /* clear PCI reset */
 302         *tx4927_pcireset_ptr = 0;
 303
 304         TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_PCI66,
 305                                        "+\n");
 306         return;
 307 }
 308 #endif                          /* TX4927_SUPPORT_PCI_66 */
 309
 310 void print_pci_status(void)
 311 {
 312         printk("PCI STATUS %lx\n", tx4927_pcicptr->pcistatus);
 313         printk("PCIC STATUS %lx\n", tx4927_pcicptr->pcicstatus);
 314 }
 315
 316 static struct pci_dev *fake_pci_dev(struct pci_controller *hose,
 317                                     int top_bus, int busnr, int devfn)
 318 {
 319         static struct pci_dev dev;
 320         static struct pci_bus bus;
 321
 322         dev.bus = &bus;
 323         dev.sysdata = hose;
 324         dev.devfn = devfn;
 325         bus.number = busnr;
 326         bus.ops = hose->pci_ops;
 327
 328         if (busnr != top_bus)
 329                 /* Fake a parent bus structure. */
 330                 bus.parent = &bus;
 331         else
 332                 bus.parent = NULL;
 333
 334         return &dev;
 335 }
 336
 337 #define EARLY_PCI_OP(rw, size, type)                                    \
 338 static int early_##rw##_config_##size(struct pci_controller *hose,      \
 339         int top_bus, int bus, int devfn, int offset, type value)        \
 340 {                                                                       \
 341         return pci_##rw##_config_##size(                                \
 342                 fake_pci_dev(hose, top_bus, bus, devfn),                \
 343                 offset, value);                                         \
 344 }
 345
 346 EARLY_PCI_OP(read, byte, u8 *)
 347 EARLY_PCI_OP(read, word, u16 *)
 348 EARLY_PCI_OP(read, dword, u32 *)
 349 EARLY_PCI_OP(write, byte, u8)
 350 EARLY_PCI_OP(write, word, u16)
 351 EARLY_PCI_OP(write, dword, u32)
 352
 353 static int __init tx4927_pcibios_init(int busno, struct pci_controller *hose)
 354 {
 355         unsigned int id;
 356         u32 pci_devfn;
 357
 358         TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_PCIBIOS,
 359                                        "-\n");
 360
 361         for (pci_devfn = 0x0; pci_devfn < 0xff; pci_devfn++) {
 362                 early_read_config_dword(hose, busno, busno, pci_devfn,
 363                                         PCI_VENDOR_ID, &id);
 364
 365                 if (id == 0xffffffff) {
 366                         continue;
 367                 }
 368
 369                 if (id == 0x94601055) {
 370                         u8 v08_64;
 371                         u32 v32_b0;
 372                         u8 v08_e1;
 373                         char *s = " sb/isa --";
 374
 375                         TOSHIBA_RBTX4927_SETUP_DPRINTK
 376                             (TOSHIBA_RBTX4927_SETUP_PCIBIOS, ":%s beg\n",
 377                              s);
 378
 379                         early_read_config_byte(hose, busno, busno,
 380                                                pci_devfn, 0x64, &v08_64);
 381                         early_read_config_dword(hose, busno, busno,
 382                                                 pci_devfn, 0xb0, &v32_b0);
 383                         early_read_config_byte(hose, busno, busno,
 384                                                pci_devfn, 0xe1, &v08_e1);
 385
 386                         TOSHIBA_RBTX4927_SETUP_DPRINTK
 387                             (TOSHIBA_RBTX4927_SETUP_PCIBIOS,
 388                              ":%s beg 0x64 = 0x%02x\n", s, v08_64);
 389                         TOSHIBA_RBTX4927_SETUP_DPRINTK
 390                             (TOSHIBA_RBTX4927_SETUP_PCIBIOS,
 391                              ":%s beg 0xb0 = 0x%02x\n", s, v32_b0);
 392                         TOSHIBA_RBTX4927_SETUP_DPRINTK
 393                             (TOSHIBA_RBTX4927_SETUP_PCIBIOS,
 394                              ":%s beg 0xe1 = 0x%02x\n", s, v08_e1);
 395
 396                         /* serial irq control */
 397                         v08_64 = 0xd0;
 398
 399                         /* serial irq pin */
 400                         v32_b0 |= 0x00010000;
 401
 402                         /* ide irq on isa14 */
 403                         v08_e1 &= 0xf0;
 404                         v08_e1 |= 0x0d;
 405
 406                         TOSHIBA_RBTX4927_SETUP_DPRINTK
 407                             (TOSHIBA_RBTX4927_SETUP_PCIBIOS,
 408                              ":%s mid 0x64 = 0x%02x\n", s, v08_64);
 409                         TOSHIBA_RBTX4927_SETUP_DPRINTK
 410                             (TOSHIBA_RBTX4927_SETUP_PCIBIOS,
 411                              ":%s mid 0xb0 = 0x%02x\n", s, v32_b0);
 412                         TOSHIBA_RBTX4927_SETUP_DPRINTK
 413                             (TOSHIBA_RBTX4927_SETUP_PCIBIOS,
 414                              ":%s mid 0xe1 = 0x%02x\n", s, v08_e1);
 415
 416                         early_write_config_byte(hose, busno, busno,
 417                                                 pci_devfn, 0x64, v08_64);
 418                         early_write_config_dword(hose, busno, busno,
 419                                                  pci_devfn, 0xb0, v32_b0);
 420                         early_write_config_byte(hose, busno, busno,
 421                                                 pci_devfn, 0xe1, v08_e1);
 422
 423 #ifdef TOSHIBA_RBTX4927_SETUP_DEBUG
 424                         {
 425                                 early_read_config_byte(hose, busno, busno,
 426                                                        pci_devfn, 0x64,
 427                                                        &v08_64);
 428                                 early_read_config_dword(hose, busno, busno,
 429                                                         pci_devfn, 0xb0,
 430                                                         &v32_b0);
 431                                 early_read_config_byte(hose, busno, busno,
 432                                                        pci_devfn, 0xe1,
 433                                                        &v08_e1);
 434
 435                                 TOSHIBA_RBTX4927_SETUP_DPRINTK
 436                                     (TOSHIBA_RBTX4927_SETUP_PCIBIOS,
 437                                      ":%s end 0x64 = 0x%02x\n", s, v08_64);
 438                                 TOSHIBA_RBTX4927_SETUP_DPRINTK
 439                                     (TOSHIBA_RBTX4927_SETUP_PCIBIOS,
 440                                      ":%s end 0xb0 = 0x%02x\n", s, v32_b0);
 441                                 TOSHIBA_RBTX4927_SETUP_DPRINTK
 442                                     (TOSHIBA_RBTX4927_SETUP_PCIBIOS,
 443                                      ":%s end 0xe1 = 0x%02x\n", s, v08_e1);
 444                         }
 445 #endif
 446
 447                         TOSHIBA_RBTX4927_SETUP_DPRINTK
 448                             (TOSHIBA_RBTX4927_SETUP_PCIBIOS, ":%s end\n",
 449                              s);
 450                 }
 451
 452                 if (id == 0x91301055) {
 453                         u8 v08_04;
 454                         u8 v08_09;
 455                         u8 v08_41;
 456                         u8 v08_43;
 457                         u8 v08_5c;
 458                         char *s = " sb/ide --";
 459
 460                         TOSHIBA_RBTX4927_SETUP_DPRINTK
 461                             (TOSHIBA_RBTX4927_SETUP_PCIBIOS, ":%s beg\n",
 462                              s);
 463
 464                         early_read_config_byte(hose, busno, busno,
 465                                                pci_devfn, 0x04, &v08_04);
 466                         early_read_config_byte(hose, busno, busno,
 467                                                pci_devfn, 0x09, &v08_09);
 468                         early_read_config_byte(hose, busno, busno,
 469                                                pci_devfn, 0x41, &v08_41);
 470                         early_read_config_byte(hose, busno, busno,
 471                                                pci_devfn, 0x43, &v08_43);
 472                         early_read_config_byte(hose, busno, busno,
 473                                                pci_devfn, 0x5c, &v08_5c);
 474
 475                         TOSHIBA_RBTX4927_SETUP_DPRINTK
 476                             (TOSHIBA_RBTX4927_SETUP_PCIBIOS,
 477                              ":%s beg 0x04 = 0x%02x\n", s, v08_04);
 478                         TOSHIBA_RBTX4927_SETUP_DPRINTK
 479                             (TOSHIBA_RBTX4927_SETUP_PCIBIOS,
 480                              ":%s beg 0x09 = 0x%02x\n", s, v08_09);
 481                         TOSHIBA_RBTX4927_SETUP_DPRINTK
 482                             (TOSHIBA_RBTX4927_SETUP_PCIBIOS,
 483                              ":%s beg 0x41 = 0x%02x\n", s, v08_41);
 484                         TOSHIBA_RBTX4927_SETUP_DPRINTK
 485                             (TOSHIBA_RBTX4927_SETUP_PCIBIOS,
 486                              ":%s beg 0x43 = 0x%02x\n", s, v08_43);
 487                         TOSHIBA_RBTX4927_SETUP_DPRINTK
 488                             (TOSHIBA_RBTX4927_SETUP_PCIBIOS,
 489                              ":%s beg 0x5c = 0x%02x\n", s, v08_5c);
 490
 491                         /* enable ide master/io */
 492                         v08_04 |= (PCI_COMMAND_MASTER | PCI_COMMAND_IO);
 493
 494                         /* enable ide native mode */
 495                         v08_09 |= 0x05;
 496
 497                         /* enable primary ide */
 498                         v08_41 |= 0x80;
 499
 500                         /* enable secondary ide */
 501                         v08_43 |= 0x80;
 502
 503                         /*
 504                          * !!! DO NOT REMOVE THIS COMMENT IT IS REQUIRED BY SMSC !!!
 505                          *
 506                          * This line of code is intended to provide the user with a work
 507                          * around solution to the anomalies cited in SMSC's anomaly sheet
 508                          * entitled, "SLC90E66 Functional Rev.J_0.1 Anomalies"".
 509                          *
 510                          * !!! DO NOT REMOVE THIS COMMENT IT IS REQUIRED BY SMSC !!!
 511                          */
 512                         v08_5c |= 0x01;
 513
 514                         TOSHIBA_RBTX4927_SETUP_DPRINTK
 515                             (TOSHIBA_RBTX4927_SETUP_PCIBIOS,
 516                              ":%s mid 0x04 = 0x%02x\n", s, v08_04);
 517                         TOSHIBA_RBTX4927_SETUP_DPRINTK
 518                             (TOSHIBA_RBTX4927_SETUP_PCIBIOS,
 519                              ":%s mid 0x09 = 0x%02x\n", s, v08_09);
 520                         TOSHIBA_RBTX4927_SETUP_DPRINTK
 521                             (TOSHIBA_RBTX4927_SETUP_PCIBIOS,
 522                              ":%s mid 0x41 = 0x%02x\n", s, v08_41);
 523                         TOSHIBA_RBTX4927_SETUP_DPRINTK
 524                             (TOSHIBA_RBTX4927_SETUP_PCIBIOS,
 525                              ":%s mid 0x43 = 0x%02x\n", s, v08_43);
 526                         TOSHIBA_RBTX4927_SETUP_DPRINTK
 527                             (TOSHIBA_RBTX4927_SETUP_PCIBIOS,
 528                              ":%s mid 0x5c = 0x%02x\n", s, v08_5c);
 529
 530                         early_write_config_byte(hose, busno, busno,
 531                                                 pci_devfn, 0x5c, v08_5c);
 532                         early_write_config_byte(hose, busno, busno,
 533                                                 pci_devfn, 0x04, v08_04);
 534                         early_write_config_byte(hose, busno, busno,
 535                                                 pci_devfn, 0x09, v08_09);
 536                         early_write_config_byte(hose, busno, busno,
 537                                                 pci_devfn, 0x41, v08_41);
 538                         early_write_config_byte(hose, busno, busno,
 539                                                 pci_devfn, 0x43, v08_43);
 540
 541 #ifdef TOSHIBA_RBTX4927_SETUP_DEBUG
 542                         {
 543                                 early_read_config_byte(hose, busno, busno,
 544                                                        pci_devfn, 0x04,
 545                                                        &v08_04);
 546                                 early_read_config_byte(hose, busno, busno,
 547                                                        pci_devfn, 0x09,
 548                                                        &v08_09);
 549                                 early_read_config_byte(hose, busno, busno,
 550                                                        pci_devfn, 0x41,
 551                                                        &v08_41);
 552                                 early_read_config_byte(hose, busno, busno,
 553                                                        pci_devfn, 0x43,
 554                                                        &v08_43);
 555                                 early_read_config_byte(hose, busno, busno,
 556                                                        pci_devfn, 0x5c,
 557                                                        &v08_5c);
 558
 559                                 TOSHIBA_RBTX4927_SETUP_DPRINTK
 560                                     (TOSHIBA_RBTX4927_SETUP_PCIBIOS,
 561                                      ":%s end 0x04 = 0x%02x\n", s, v08_04);
 562                                 TOSHIBA_RBTX4927_SETUP_DPRINTK
 563                                     (TOSHIBA_RBTX4927_SETUP_PCIBIOS,
 564                                      ":%s end 0x09 = 0x%02x\n", s, v08_09);
 565                                 TOSHIBA_RBTX4927_SETUP_DPRINTK
 566                                     (TOSHIBA_RBTX4927_SETUP_PCIBIOS,
 567                                      ":%s end 0x41 = 0x%02x\n", s, v08_41);
 568                                 TOSHIBA_RBTX4927_SETUP_DPRINTK
 569                                     (TOSHIBA_RBTX4927_SETUP_PCIBIOS,
 570                                      ":%s end 0x43 = 0x%02x\n", s, v08_43);
 571                                 TOSHIBA_RBTX4927_SETUP_DPRINTK
 572                                     (TOSHIBA_RBTX4927_SETUP_PCIBIOS,
 573                                      ":%s end 0x5c = 0x%02x\n", s, v08_5c);
 574                         }
 575 #endif
 576
 577                         TOSHIBA_RBTX4927_SETUP_DPRINTK
 578                             (TOSHIBA_RBTX4927_SETUP_PCIBIOS, ":%s end\n",
 579                              s);
 580                 }
 581
 582         }
 583
 584         TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_PCIBIOS,
 585                                        "+\n");
 586
 587         return busno;
 588 }
 589
 590 extern struct resource pci_io_resource;
 591 extern struct resource pci_mem_resource;
 592
 593 void tx4927_pci_setup(void)
 594 {
 595         static int called = 0;
 596         extern unsigned int tx4927_get_mem_size(void);
 597
 598         TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_PCI2, "-\n");
 599
 600 #ifndef  TX4927_SUPPORT_PCI_66
 601         if (tx4927_ccfgptr->ccfg & TX4927_CCFG_PCI66)
 602                 printk("PCI 66 current unsupported\n");
 603 #endif
 604
 605         mips_memory_upper = tx4927_get_mem_size() << 20;
 606         mips_memory_upper += KSEG0;
 607         TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_PCI2,
 608                                        "0x%08lx=mips_memory_upper\n",
 609                                        mips_memory_upper);
 610         mips_pci_io_base = TX4927_PCIIO;
 611         mips_pci_io_size = TX4927_PCIIO_SIZE;
 612         mips_pci_mem_base = TX4927_PCIMEM;
 613         mips_pci_mem_size = TX4927_PCIMEM_SIZE;
 614
 615         TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_PCI2,
 616                                        "0x%08lx=mips_pci_io_base\n",
 617                                        mips_pci_io_base);
 618         TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_PCI2,
 619                                        "0x%08lx=mips_pci_io_size\n",
 620                                        mips_pci_io_size);
 621         TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_PCI2,
 622                                        "0x%08lx=mips_pci_mem_base\n",
 623                                        mips_pci_mem_base);
 624         TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_PCI2,
 625                                        "0x%08lx=mips_pci_mem_size\n",
 626                                        mips_pci_mem_size);
 627         TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_PCI2,
 628                                        "0x%08lx=pci_io_resource.start\n",
 629                                        pci_io_resource.start);
 630         TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_PCI2,
 631                                        "0x%08lx=pci_io_resource.end\n",
 632                                        pci_io_resource.end);
 633         TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_PCI2,
 634                                        "0x%08lx=pci_mem_resource.start\n",
 635                                        pci_mem_resource.start);
 636         TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_PCI2,
 637                                        "0x%08lx=pci_mem_resource.end\n",
 638                                        pci_mem_resource.end);
 639         TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_PCI2,
 640                                        "0x%08lx=mips_io_port_base",
 641                                        mips_io_port_base);
 642
 643         TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_PCI2,
 644                                        "setup pci_io_resource  to 0x%08lx 0x%08lx\n",
 645                                        pci_io_resource.start,
 646                                        pci_io_resource.end);
 647         TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_PCI2,
 648                                        "setup pci_mem_resource to 0x%08lx 0x%08lx\n",
 649                                        pci_mem_resource.start,
 650                                        pci_mem_resource.end);
 651
 652         if (!called) {
 653                 printk
 654                     ("TX4927 PCIC -- DID:%04x VID:%04x RID:%02x Arbiter:%s\n",
 655                      (unsigned short) (tx4927_pcicptr->pciid >> 16),
 656                      (unsigned short) (tx4927_pcicptr->pciid & 0xffff),
 657                      (unsigned short) (tx4927_pcicptr->pciccrev & 0xff),
 658                      (!(tx4927_ccfgptr->
 659                         ccfg & TX4927_CCFG_PCIXARB)) ? "External" :
 660                      "Internal");
 661                 called = 1;
 662         }
 663         printk("%s PCIC --%s PCICLK:",toshiba_name,
 664                (tx4927_ccfgptr->ccfg & TX4927_CCFG_PCI66) ? " PCI66" : "");
 665         if (tx4927_ccfgptr->pcfg & TX4927_PCFG_PCICLKEN_ALL) {
 666                 int pciclk = 0;
 667                 switch ((unsigned long) tx4927_ccfgptr->
 668                         ccfg & TX4927_CCFG_PCIDIVMODE_MASK) {
 669                 case TX4927_CCFG_PCIDIVMODE_2_5:
 670                         pciclk = tx4927_cpu_clock * 2 / 5;
 671                         break;
 672                 case TX4927_CCFG_PCIDIVMODE_3:
 673                         pciclk = tx4927_cpu_clock / 3;
 674                         break;
 675                 case TX4927_CCFG_PCIDIVMODE_5:
 676                         pciclk = tx4927_cpu_clock / 5;
 677                         break;
 678                 case TX4927_CCFG_PCIDIVMODE_6:
 679                         pciclk = tx4927_cpu_clock / 6;
 680                         break;
 681                 }
 682                 printk("Internal(%dMHz)", pciclk / 1000000);
 683         } else {
 684                 int pciclk = 0;
 685                 int pciclk_setting = *tx4927_pci_clk_ptr;
 686                 switch (pciclk_setting & TX4927_PCI_CLK_MASK) {
 687                 case TX4927_PCI_CLK_33:
 688                         pciclk = 33333333;
 689                         break;
 690                 case TX4927_PCI_CLK_25:
 691                         pciclk = 25000000;
 692                         break;
 693                 case TX4927_PCI_CLK_66:
 694                         pciclk = 66666666;
 695                         break;
 696                 case TX4927_PCI_CLK_50:
 697                         pciclk = 50000000;
 698                         break;
 699                 }
 700                 printk("External(%dMHz)", pciclk / 1000000);
 701         }
 702         printk("\n");
 703
 704
 705
 706         /* GB->PCI mappings */
 707         tx4927_pcicptr->g2piomask = (mips_pci_io_size - 1) >> 4;
 708         tx4927_pcicptr->g2piogbase = mips_pci_io_base |
 709 #ifdef __BIG_ENDIAN
 710             TX4927_PCIC_G2PIOGBASE_ECHG
 711 #else
 712             TX4927_PCIC_G2PIOGBASE_BSDIS
 713 #endif
 714             ;
 715
 716         tx4927_pcicptr->g2piopbase = 0;
 717
 718         tx4927_pcicptr->g2pmmask[0] = (mips_pci_mem_size - 1) >> 4;
 719         tx4927_pcicptr->g2pmgbase[0] = mips_pci_mem_base |
 720 #ifdef __BIG_ENDIAN
 721             TX4927_PCIC_G2PMnGBASE_ECHG
 722 #else
 723             TX4927_PCIC_G2PMnGBASE_BSDIS
 724 #endif
 725             ;
 726         tx4927_pcicptr->g2pmpbase[0] = mips_pci_mem_base;
 727
 728         tx4927_pcicptr->g2pmmask[1] = 0;
 729         tx4927_pcicptr->g2pmgbase[1] = 0;
 730         tx4927_pcicptr->g2pmpbase[1] = 0;
 731         tx4927_pcicptr->g2pmmask[2] = 0;
 732         tx4927_pcicptr->g2pmgbase[2] = 0;
 733         tx4927_pcicptr->g2pmpbase[2] = 0;
 734
 735
 736         /* PCI->GB mappings (I/O 256B) */
 737         tx4927_pcicptr->p2giopbase = 0; /* 256B */
 738
 739
 740 #ifdef TX4927_SUPPORT_COMMAND_IO
 741         tx4927_pcicptr->p2giogbase = 0 | TX4927_PCIC_P2GIOGBASE_TIOEN |
 742 #ifdef __BIG_ENDIAN
 743             TX4927_PCIC_P2GIOGBASE_TECHG
 744 #else
 745             TX4927_PCIC_P2GIOGBASE_TBSDIS
 746 #endif
 747             ;
 748 #else
 749         tx4927_pcicptr->p2giogbase = 0;
 750 #endif
 751
 752         /* PCI->GB mappings (MEM 512MB) M0 gets all of memory */
 753         tx4927_pcicptr->p2gm0plbase = 0;
 754         tx4927_pcicptr->p2gm0pubase = 0;
 755         tx4927_pcicptr->p2gmgbase[0] = 0 | TX4927_PCIC_P2GMnGBASE_TMEMEN |
 756 #ifdef __BIG_ENDIAN
 757             TX4927_PCIC_P2GMnGBASE_TECHG
 758 #else
 759             TX4927_PCIC_P2GMnGBASE_TBSDIS
 760 #endif
 761             ;
 762
 763         /* PCI->GB mappings (MEM 16MB) -not used */
 764         tx4927_pcicptr->p2gm1plbase = 0xffffffff;
 765 #ifdef CONFIG_TX4927BUG_WORKAROUND
 766         /*
 767          * TX4927-PCIC-BUG: P2GM1PUBASE must be 0
 768          * if P2GM0PUBASE was 0.
 769          */
 770         tx4927_pcicptr->p2gm1pubase = 0;
 771 #else
 772         tx4927_pcicptr->p2gm1pubase = 0xffffffff;
 773 #endif
 774         tx4927_pcicptr->p2gmgbase[1] = 0;
 775
 776         /* PCI->GB mappings (MEM 1MB) -not used */
 777         tx4927_pcicptr->p2gm2pbase = 0xffffffff;
 778         tx4927_pcicptr->p2gmgbase[2] = 0;
 779
 780
 781         /* Enable Initiator Memory 0 Space, I/O Space, Config */
 782         tx4927_pcicptr->pciccfg &= TX4927_PCIC_PCICCFG_LBWC_MASK;
 783         tx4927_pcicptr->pciccfg |=
 784             TX4927_PCIC_PCICCFG_IMSE0 | TX4927_PCIC_PCICCFG_IISE |
 785             TX4927_PCIC_PCICCFG_ICAE | TX4927_PCIC_PCICCFG_ATR;
 786
 787
 788         /* Do not use MEMMUL, MEMINF: YMFPCI card causes M_ABORT. */
 789         tx4927_pcicptr->pcicfg1 = 0;
 790
 791         if (tx4927_pcic_trdyto >= 0) {
 792                 tx4927_pcicptr->g2ptocnt &= ~0xff;
 793                 tx4927_pcicptr->g2ptocnt |= (tx4927_pcic_trdyto & 0xff);
 794                 //printk("%s PCIC -- TRDYTO:%02lx\n",toshiba_name,
 795                 //      tx4927_pcicptr->g2ptocnt & 0xff);
 796         }
 797
 798         /* Clear All Local Bus Status */
 799         tx4927_pcicptr->pcicstatus = TX4927_PCIC_PCICSTATUS_ALL;
 800         /* Enable All Local Bus Interrupts */
 801         tx4927_pcicptr->pcicmask = TX4927_PCIC_PCICSTATUS_ALL;
 802         /* Clear All Initiator Status */
 803         tx4927_pcicptr->g2pstatus = TX4927_PCIC_G2PSTATUS_ALL;
 804         /* Enable All Initiator Interrupts */
 805         tx4927_pcicptr->g2pmask = TX4927_PCIC_G2PSTATUS_ALL;
 806         /* Clear All PCI Status Error */
 807         tx4927_pcicptr->pcistatus =
 808             (tx4927_pcicptr->pcistatus & 0x0000ffff) |
 809             (TX4927_PCIC_PCISTATUS_ALL << 16);
 810         /* Enable All PCI Status Error Interrupts */
 811         tx4927_pcicptr->pcimask = TX4927_PCIC_PCISTATUS_ALL;
 812
 813         /* PCIC Int => IRC IRQ16 */
 814         tx4927_pcicptr->pcicfg2 =
 815             (tx4927_pcicptr->pcicfg2 & 0xffffff00) | TX4927_IR_PCIC;
 816
 817         if (!(tx4927_ccfgptr->ccfg & TX4927_CCFG_PCIXARB)) {
 818                 /* XXX */
 819         } else {
 820                 /* Reset Bus Arbiter */
 821                 tx4927_pcicptr->pbacfg = TX4927_PCIC_PBACFG_RPBA;
 822                 /* Enable Bus Arbiter */
 823                 tx4927_pcicptr->pbacfg = TX4927_PCIC_PBACFG_PBAEN;
 824         }
 825
 826         tx4927_pcicptr->pcistatus = PCI_COMMAND_MASTER |
 827             PCI_COMMAND_MEMORY |
 828 #ifdef TX4927_SUPPORT_COMMAND_IO
 829             PCI_COMMAND_IO |
 830 #endif
 831             PCI_COMMAND_PARITY | PCI_COMMAND_SERR;
 832
 833         TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_PCI2,
 834                                        ":pci setup complete:\n");
 835         //tx4927_dump_pcic_settings();
 836
 837         tx4927_pcibios_init(0, &tx4927_controller);
 838
 839         TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_PCI2, "+\n");
 840 }
 841
 842 #endif /* CONFIG_PCI */
 843
 844 void toshiba_rbtx4927_restart(char *command)
 845 {
 846         printk(KERN_NOTICE "System Rebooting...\n");
 847
 848         /* enable the s/w reset register */
 849         reg_wr08(RBTX4927_SW_RESET_ENABLE, RBTX4927_SW_RESET_ENABLE_SET);
 850
 851         /* wait for enable to be seen */
 852         while ((reg_rd08(RBTX4927_SW_RESET_ENABLE) &
 853                 RBTX4927_SW_RESET_ENABLE_SET) == 0x00);
 854
 855         /* do a s/w reset */
 856         reg_wr08(RBTX4927_SW_RESET_DO, RBTX4927_SW_RESET_DO_SET);
 857
 858         /* do something passive while waiting for reset */
 859         cli();
 860         while (1)
 861                 asm_wait();
 862
 863         /* no return */
 864 }
 865
 866
 867 void toshiba_rbtx4927_halt(void)
 868 {
 869         printk(KERN_NOTICE "System Halted\n");
 870         cli();
 871         while (1) {
 872                 asm_wait();
 873         }
 874         /* no return */
 875 }
 876
 877 void toshiba_rbtx4927_power_off(void)
 878 {
 879         toshiba_rbtx4927_halt();
 880         /* no return */
 881 }
 882
 883 void __init toshiba_rbtx4927_setup(void)
 884 {
 885         vu32 cp0_config;
 886
 887         printk("CPU is %s\n", toshiba_name);
 888
 889         TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_SETUP,
 890                                        "-\n");
 891
 892         /* f/w leaves this on at startup */
 893         TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_SETUP,
 894                                        ":Clearing STO_ERL.\n");
 895         clear_c0_status(ST0_ERL);
 896
 897         /* enable caches -- HCP5 does this, pmon does not */
 898         TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_SETUP,
 899                                        ":Enabling TX49_CONF_IC,TX49_CONF_DC.\n");
 900         cp0_config = read_c0_config();
 901         cp0_config = cp0_config & ~(TX49_CONF_IC | TX49_CONF_DC);
 902         write_c0_config(cp0_config);
 903
 904 #ifdef TOSHIBA_RBTX4927_SETUP_DEBUG
 905         {
 906                 extern void dump_cp0(char *);
 907                 dump_cp0("toshiba_rbtx4927_early_fw_fixup");
 908         }
 909 #endif
 910
 911         /* setup irq stuff */
 912         TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_SETUP,
 913                                        ":Setting up tx4927 pic.\n");
 914         TX4927_WR(0xff1ff604, 0x00000400);      /* irq trigger */
 915         TX4927_WR(0xff1ff608, 0x00000000);      /* irq trigger */
 916
 917         /* setup serial stuff */
 918         TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_SETUP,
 919                                        ":Setting up tx4927 sio.\n");
 920         TX4927_WR(0xff1ff314, 0x00000000);      /* h/w flow control off */
 921         TX4927_WR(0xff1ff414, 0x00000000);      /* h/w flow control off */
 922
 923         TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_SETUP,
 924                                        "+\n");
 925
 926
 927
 928         mips_io_port_base = KSEG1 + TBTX4927_ISA_IO_OFFSET;
 929         TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_SETUP,
 930                                        ":mips_io_port_base=0x%08lx\n",
 931                                        mips_io_port_base);
 932
 933         TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_SETUP,
 934                                        ":Resource\n");
 935         ioport_resource.start = 0;
 936         ioport_resource.end = 0xffffffff;
 937         iomem_resource.start = 0;
 938         iomem_resource.end = 0xffffffff;
 939
 940
 941         TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_SETUP,
 942                                        ":ResetRoutines\n");
 943         _machine_restart = toshiba_rbtx4927_restart;
 944         _machine_halt = toshiba_rbtx4927_halt;
 945         _machine_power_off = toshiba_rbtx4927_power_off;
 946
 947 #ifdef CONFIG_PCI
 948
 949         /* PCIC */
 950         /*
 951            * ASSUMPTION: PCIDIVMODE is configured for PCI 33MHz or 66MHz.
 952            * PCIDIVMODE[12:11]'s initial value are given by S9[4:3] (ON:0, OFF:1).
 953            * CPU 166MHz: PCI 66MHz : PCIDIVMODE: 00 (1/2.5)
 954            * CPU 200MHz: PCI 66MHz : PCIDIVMODE: 01 (1/3)
 955            * CPU 166MHz: PCI 33MHz : PCIDIVMODE: 10 (1/5)
 956            * CPU 200MHz: PCI 33MHz : PCIDIVMODE: 11 (1/6)
 957            * i.e. S9[3]: ON (83MHz), OFF (100MHz)
 958          */
 959         TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_PCI1,
 960                                        "ccfg is %lx, DIV is %x\n",
 961                                        (unsigned long) tx4927_ccfgptr->
 962                                        ccfg, TX4927_CCFG_PCIDIVMODE_MASK);
 963
 964         TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_PCI1,
 965                                        "PCI66 mode is %lx, PCI mode is %lx, pci arb is %lx\n",
 966                                        (unsigned long) tx4927_ccfgptr->
 967                                        ccfg & TX4927_CCFG_PCI66,
 968                                        (unsigned long) tx4927_ccfgptr->
 969                                        ccfg & TX4927_CCFG_PCIMIDE,
 970                                        (unsigned long) tx4927_ccfgptr->
 971                                        ccfg & TX4927_CCFG_PCIXARB);
 972
 973         TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_PCI1,
 974                                        "PCIDIVMODE is %lx\n",
 975                                        (unsigned long) tx4927_ccfgptr->
 976                                        ccfg & TX4927_CCFG_PCIDIVMODE_MASK);
 977
 978         switch ((unsigned long) tx4927_ccfgptr->
 979                 ccfg & TX4927_CCFG_PCIDIVMODE_MASK) {
 980         case TX4927_CCFG_PCIDIVMODE_2_5:
 981         case TX4927_CCFG_PCIDIVMODE_5:
 982                 tx4927_cpu_clock = 166000000;   /* 166MHz */
 983                 break;
 984         default:
 985                 tx4927_cpu_clock = 200000000;   /* 200MHz */
 986         }
 987
 988         /* CCFG */
 989         /* enable Timeout BusError */
 990         if (tx4927_ccfg_toeon)
 991                 tx4927_ccfgptr->ccfg |= TX4927_CCFG_TOE;
 992
 993         /* SDRAMC fixup */
 994 #ifdef CONFIG_TX4927BUG_WORKAROUND
 995         /*
 996          * TX4927-BUG: INF 01-01-18/ BUG 01-01-22
 997          * G-bus timeout error detection is incorrect
 998          */
 999         if (tx4927_ccfg_toeon)
1000                 tx4927_sdramcptr->tr |= 0x02000000;     /* RCD:3tck */
1001 #endif
1002
1003 #ifdef  TX4927_SUPPORT_PCI_66
1004         tx4927_pci66_setup();
1005 #endif
1006
1007         tx4927_pci_setup();
1008 #endif
1009
1010
1011         {
1012                 u32 id = 0;
1013                 early_read_config_dword(&tx4927_controller, 0, 0, 0x90,
1014                                         PCI_VENDOR_ID, &id);
1015                 if (id == 0x94601055) {
1016                         tx4927_using_backplane = 1;
1017                         printk("backplane board IS installed\n");
1018                 } else {
1019                         printk("backplane board NOT installed\n");
1020                 }
1021         }
1022
1023         /* this is on ISA bus behind PCI bus, so need PCI up first */
1024 #ifdef CONFIG_TOSHIBA_FPCIB0
1025         {
1026                 if (tx4927_using_backplane) {
1027                         TOSHIBA_RBTX4927_SETUP_DPRINTK
1028                             (TOSHIBA_RBTX4927_SETUP_SETUP,
1029                              ":fpcibo=yes\n");
1030
1031                         TOSHIBA_RBTX4927_SETUP_DPRINTK
1032                             (TOSHIBA_RBTX4927_SETUP_SETUP,
1033                              ":smsc_fdc37m81x_init()\n");
1034                         smsc_fdc37m81x_init(0x3f0);
1035
1036                         TOSHIBA_RBTX4927_SETUP_DPRINTK
1037                             (TOSHIBA_RBTX4927_SETUP_SETUP,
1038                              ":smsc_fdc37m81x_config_beg()\n");
1039                         smsc_fdc37m81x_config_beg();
1040
1041                         TOSHIBA_RBTX4927_SETUP_DPRINTK
1042                             (TOSHIBA_RBTX4927_SETUP_SETUP,
1043                              ":smsc_fdc37m81x_config_set(KBD)\n");
1044                         smsc_fdc37m81x_config_set(SMSC_FDC37M81X_DNUM,
1045                                                   SMSC_FDC37M81X_KBD);
1046                         smsc_fdc37m81x_config_set(SMSC_FDC37M81X_INT, 1);
1047                         smsc_fdc37m81x_config_set(SMSC_FDC37M81X_INT2, 12);
1048                         smsc_fdc37m81x_config_set(SMSC_FDC37M81X_ACTIVE,
1049                                                   1);
1050
1051                         smsc_fdc37m81x_config_end();
1052                         TOSHIBA_RBTX4927_SETUP_DPRINTK
1053                             (TOSHIBA_RBTX4927_SETUP_SETUP,
1054                              ":smsc_fdc37m81x_config_end()\n");
1055                 } else {
1056                         TOSHIBA_RBTX4927_SETUP_DPRINTK
1057                             (TOSHIBA_RBTX4927_SETUP_SETUP,
1058                              ":fpcibo=not_found\n");
1059                 }
1060         }
1061 #else
1062         {
1063                 TOSHIBA_RBTX4927_SETUP_DPRINTK
1064                     (TOSHIBA_RBTX4927_SETUP_SETUP, ":fpcibo=no\n");
1065         }
1066 #endif
1067
1068
1069         TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_SETUP,
1070                                        "+\n");
1071 }
1072
1073 void __init
1074 toshiba_rbtx4927_time_init(void)
1075 {
1076         u32 c1;
1077         u32 c2;
1078
1079         TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_TIME_INIT, "-\n");
1080
1081 #ifdef CONFIG_RTC_DS1742
1082
1083         rtc_get_time = rtc_ds1742_get_time;
1084         rtc_set_time = rtc_ds1742_set_time;
1085
1086         TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_TIME_INIT,
1087                                        ":rtc_ds1742_init()-\n");
1088         rtc_ds1742_init(0xbc010000);
1089         TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_TIME_INIT,
1090                                        ":rtc_ds1742_init()+\n");
1091
1092         TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_TIME_INIT,
1093                                        ":Calibrate mips_hpt_frequency-\n");
1094         rtc_ds1742_wait();
1095
1096         /* get the count */
1097         c1 = read_c0_count();
1098
1099         /* wait for the seconds to change again */
1100         rtc_ds1742_wait();
1101
1102         /* get the count again */
1103         c2 = read_c0_count();
1104
1105         TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_TIME_INIT,
1106                                        ":Calibrate mips_hpt_frequency+\n");
1107         TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_TIME_INIT,
1108                                        ":c1=%12u\n", c1);
1109         TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_TIME_INIT,
1110                                        ":c2=%12u\n", c2);
1111
1112         /* this diff is as close as we are going to get to counter ticks per sec */
1113         mips_hpt_frequency = abs(c2 - c1);
1114         TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_TIME_INIT,
1115                                        ":f1=%12u\n", mips_hpt_frequency);
1116
1117         /* round to 1/10th of a MHz */
1118         mips_hpt_frequency /= (100 * 1000);
1119         mips_hpt_frequency *= (100 * 1000);
1120         TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_TIME_INIT,
1121                                        ":f2=%12u\n", mips_hpt_frequency);
1122
1123         TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_INFO,
1124                                        ":mips_hpt_frequency=%uHz (%uMHz)\n",
1125                                        mips_hpt_frequency,
1126                                        mips_hpt_frequency / 1000000);
1127 #else
1128         mips_hpt_frequency = 100000000;
1129 #endif
1130
1131         TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_TIME_INIT, "+\n");
1132
1133 }
1134
1135 void __init toshiba_rbtx4927_timer_setup(struct irqaction *irq)
1136 {
1137         TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_TIMER_SETUP,
1138                                        "-\n");
1139         TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_TIMER_SETUP,
1140                                        "+\n");
1141 }