arch/mips/vr41xx/common/bcu.c

   1 /*
   2  * FILE NAME
   3  *      arch/mips/vr41xx/common/bcu.c
   4  *
   5  * BRIEF MODULE DESCRIPTION
   6  *      Bus Control Unit routines for the NEC VR4100 series.
   7  *
   8  * Author: Yoichi Yuasa
   9  *         yyuasa@mvista.com or source@mvista.com
  10  *
  11  * Copyright 2002 MontaVista Software Inc.
  12  *
  13  *  This program is free software; you can redistribute it and/or modify it
  14  *  under the terms of the GNU General Public License as published by the
  15  *  Free Software Foundation; either version 2 of the License, or (at your
  16  *  option) any later version.
  17  *
  18  *  THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
  19  *  WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
  20  *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  21  *  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  22  *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
  23  *  BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
  24  *  OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  25  *  ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
  26  *  TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
  27  *  USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  28  *
  29  *  You should have received a copy of the GNU General Public License along
  30  *  with this program; if not, write to the Free Software Foundation, Inc.,
  31  *  675 Mass Ave, Cambridge, MA 02139, USA.
  32  */
  33 /*
  34  * Changes:
  35  *  MontaVista Software Inc. <yyuasa@mvista.com> or <source@mvista.com>
  36  *  - New creation, NEC VR4122 and VR4131 are supported.
  37  *  - Added support for NEC VR4111 and VR4121.
  38  *
  39  *  Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
  40  *  - Added support for NEC VR4133.
  41  */
  42 #include <linux/init.h>
  43 #include <linux/smp.h>
  44 #include <linux/types.h>
  45
  46 #include <asm/cpu.h>
  47 #include <asm/io.h>
  48
  49 #define CLKSPEEDREG_TYPE1       KSEG1ADDR(0x0b000014)
  50 #define CLKSPEEDREG_TYPE2       KSEG1ADDR(0x0f000014)
  51  #define CLKSP(x)               ((x) & 0x001f)
  52  #define CLKSP_VR4133(x)        ((x) & 0x0007)
  53
  54  #define DIV2B                  0x8000
  55  #define DIV3B                  0x4000
  56  #define DIV4B                  0x2000
  57
  58  #define DIVT(x)                (((x) & 0xf000) >> 12)
  59  #define DIVVT(x)               (((x) & 0x0f00) >> 8)
  60
  61  #define TDIVMODE(x)            (2 << (((x) & 0x1000) >> 12))
  62  #define VTDIVMODE(x)           (((x) & 0x0700) >> 8)
  63
  64 static unsigned long vr41xx_vtclock;
  65 static unsigned long vr41xx_tclock;
  66
  67 unsigned long vr41xx_get_vtclock_frequency(void)
  68 {
  69         return vr41xx_vtclock;
  70 }
  71
  72 unsigned long vr41xx_get_tclock_frequency(void)
  73 {
  74         return vr41xx_tclock;
  75 }
  76
  77 static inline uint16_t read_clkspeed(void)
  78 {
  79         switch (current_cpu_data.cputype) {
  80         case CPU_VR4111:
  81         case CPU_VR4121: return readw(CLKSPEEDREG_TYPE1);
  82         case CPU_VR4122:
  83         case CPU_VR4131:
  84         case CPU_VR4133: return readw(CLKSPEEDREG_TYPE2);
  85         default:
  86                 printk(KERN_INFO "Unexpected CPU of NEC VR4100 series\n");
  87                 break;
  88         }
  89
  90         return 0;
  91 }
  92
  93 static inline unsigned long calculate_pclock(uint16_t clkspeed)
  94 {
  95         unsigned long pclock = 0;
  96
  97         switch (current_cpu_data.cputype) {
  98         case CPU_VR4111:
  99         case CPU_VR4121:
 100                 pclock = 18432000 * 64;
 101                 pclock /= CLKSP(clkspeed);
 102                 break;
 103         case CPU_VR4122:
 104                 pclock = 18432000 * 98;
 105                 pclock /= CLKSP(clkspeed);
 106                 break;
 107         case CPU_VR4131:
 108                 pclock = 18432000 * 108;
 109                 pclock /= CLKSP(clkspeed);
 110                 break;
 111         case CPU_VR4133:
 112                 switch (CLKSP_VR4133(clkspeed)) {
 113                 case 0:
 114                         pclock = 133000000;
 115                         break;
 116                 case 1:
 117                         pclock = 149000000;
 118                         break;
 119                 case 2:
 120                         pclock = 165900000;
 121                         break;
 122                 case 3:
 123                         pclock = 199100000;
 124                         break;
 125                 case 4:
 126                         pclock = 265900000;
 127                         break;
 128                 default:
 129                         printk(KERN_INFO "Unknown PClock speed for NEC VR4133\n");
 130                         break;
 131                 }
 132                 break;
 133         default:
 134                 printk(KERN_INFO "Unexpected CPU of NEC VR4100 series\n");
 135                 break;
 136         }
 137
 138         printk(KERN_INFO "PClock: %ldHz\n", pclock);
 139
 140         return pclock;
 141 }
 142
 143 static inline unsigned long calculate_vtclock(uint16_t clkspeed, unsigned long pclock)
 144 {
 145         unsigned long vtclock = 0;
 146
 147         switch (current_cpu_data.cputype) {
 148         case CPU_VR4111:
 149                 /* The NEC VR4111 doesn't have the VTClock. */
 150                 break;
 151         case CPU_VR4121:
 152                 vtclock = pclock;
 153                 /* DIVVT == 9 Divide by 1.5 . VTClock = (PClock * 6) / 9 */
 154                 if (DIVVT(clkspeed) == 9)
 155                         vtclock = pclock * 6;
 156                 /* DIVVT == 10 Divide by 2.5 . VTClock = (PClock * 4) / 10 */
 157                 else if (DIVVT(clkspeed) == 10)
 158                         vtclock = pclock * 4;
 159                 vtclock /= DIVVT(clkspeed);
 160                 printk(KERN_INFO "VTClock: %ldHz\n", vtclock);
 161                 break;
 162         case CPU_VR4122:
 163                 if(VTDIVMODE(clkspeed) == 7)
 164                         vtclock = pclock / 1;
 165                 else if(VTDIVMODE(clkspeed) == 1)
 166                         vtclock = pclock / 2;
 167                 else
 168                         vtclock = pclock / VTDIVMODE(clkspeed);
 169                 printk(KERN_INFO "VTClock: %ldHz\n", vtclock);
 170                 break;
 171         case CPU_VR4131:
 172         case CPU_VR4133:
 173                 vtclock = pclock / VTDIVMODE(clkspeed);
 174                 printk(KERN_INFO "VTClock: %ldHz\n", vtclock);
 175                 break;
 176         default:
 177                 printk(KERN_INFO "Unexpected CPU of NEC VR4100 series\n");
 178                 break;
 179         }
 180
 181         return vtclock;
 182 }
 183
 184 static inline unsigned long calculate_tclock(uint16_t clkspeed, unsigned long pclock,
 185                                              unsigned long vtclock)
 186 {
 187         unsigned long tclock = 0;
 188
 189         switch (current_cpu_data.cputype) {
 190         case CPU_VR4111:
 191                 if (!(clkspeed & DIV2B))
 192                         tclock = pclock / 2;
 193                 else if (!(clkspeed & DIV3B))
 194                         tclock = pclock / 3;
 195                 else if (!(clkspeed & DIV4B))
 196                         tclock = pclock / 4;
 197                 break;
 198         case CPU_VR4121:
 199                 tclock = pclock / DIVT(clkspeed);
 200                 break;
 201         case CPU_VR4122:
 202         case CPU_VR4131:
 203         case CPU_VR4133:
 204                 tclock = vtclock / TDIVMODE(clkspeed);
 205                 break;
 206         default:
 207                 printk(KERN_INFO "Unexpected CPU of NEC VR4100 series\n");
 208                 break;
 209         }
 210
 211         printk(KERN_INFO "TClock: %ldHz\n", tclock);
 212
 213         return tclock;
 214 }
 215
 216 void __init vr41xx_bcu_init(void)
 217 {
 218         unsigned long pclock;
 219         uint16_t clkspeed;
 220
 221         clkspeed = read_clkspeed();
 222
 223         pclock = calculate_pclock(clkspeed);
 224         vr41xx_vtclock = calculate_vtclock(clkspeed, pclock);
 225         vr41xx_tclock = calculate_tclock(clkspeed, pclock, vr41xx_vtclock);
 226 }