VServer 1.9.2 (patch-2.6.8.1-vs1.9.2.diff)
[linux-2.6.git] / arch / mips / vr41xx / common / bcu.c
1 /*
2  *  bcu.c, Bus Control Unit routines for the NEC VR4100 series.
3  *
4  *  Copyright (C) 2002  MontaVista Software Inc.
5  *    Author: Yoichi Yuasa <yyuasa@mvista.com, or source@mvista.com>
6  *  Copyright (C) 2003-2004  Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
7  *
8  *  This program is free software; you can redistribute it and/or modify
9  *  it under the terms of the GNU General Public License as published by
10  *  the Free Software Foundation; either version 2 of the License, or
11  *  (at your option) any later version.
12  *
13  *  This program is distributed in the hope that it will be useful,
14  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
15  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16  *  GNU General Public License for more details.
17  *
18  *  You should have received a copy of the GNU General Public License
19  *  along with this program; if not, write to the Free Software
20  *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
21  */
22 /*
23  * Changes:
24  *  MontaVista Software Inc. <yyuasa@mvista.com> or <source@mvista.com>
25  *  - New creation, NEC VR4122 and VR4131 are supported.
26  *  - Added support for NEC VR4111 and VR4121.
27  *
28  *  Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
29  *  - Added support for NEC VR4133.
30  */
31 #include <linux/init.h>
32 #include <linux/ioport.h>
33 #include <linux/smp.h>
34 #include <linux/types.h>
35
36 #include <asm/cpu.h>
37 #include <asm/io.h>
38
39 #define IO_MEM_RESOURCE_START   0UL
40 #define IO_MEM_RESOURCE_END     0x1fffffffUL
41
42 #define CLKSPEEDREG_TYPE1       KSEG1ADDR(0x0b000014)
43 #define CLKSPEEDREG_TYPE2       KSEG1ADDR(0x0f000014)
44  #define CLKSP(x)               ((x) & 0x001f)
45  #define CLKSP_VR4133(x)        ((x) & 0x0007)
46
47  #define DIV2B                  0x8000
48  #define DIV3B                  0x4000
49  #define DIV4B                  0x2000
50
51  #define DIVT(x)                (((x) & 0xf000) >> 12)
52  #define DIVVT(x)               (((x) & 0x0f00) >> 8)
53
54  #define TDIVMODE(x)            (2 << (((x) & 0x1000) >> 12))
55  #define VTDIVMODE(x)           (((x) & 0x0700) >> 8)
56
57 static unsigned long vr41xx_vtclock;
58 static unsigned long vr41xx_tclock;
59
60 unsigned long vr41xx_get_vtclock_frequency(void)
61 {
62         return vr41xx_vtclock;
63 }
64
65 unsigned long vr41xx_get_tclock_frequency(void)
66 {
67         return vr41xx_tclock;
68 }
69
70 static inline uint16_t read_clkspeed(void)
71 {
72         switch (current_cpu_data.cputype) {
73         case CPU_VR4111:
74         case CPU_VR4121: return readw(CLKSPEEDREG_TYPE1);
75         case CPU_VR4122:
76         case CPU_VR4131:
77         case CPU_VR4133: return readw(CLKSPEEDREG_TYPE2);
78         default:
79                 printk(KERN_INFO "Unexpected CPU of NEC VR4100 series\n");
80                 break;
81         }
82
83         return 0;
84 }
85
86 static inline unsigned long calculate_pclock(uint16_t clkspeed)
87 {
88         unsigned long pclock = 0;
89
90         switch (current_cpu_data.cputype) {
91         case CPU_VR4111:
92         case CPU_VR4121:
93                 pclock = 18432000 * 64;
94                 pclock /= CLKSP(clkspeed);
95                 break;
96         case CPU_VR4122:
97                 pclock = 18432000 * 98;
98                 pclock /= CLKSP(clkspeed);
99                 break;
100         case CPU_VR4131:
101                 pclock = 18432000 * 108;
102                 pclock /= CLKSP(clkspeed);
103                 break;
104         case CPU_VR4133:
105                 switch (CLKSP_VR4133(clkspeed)) {
106                 case 0:
107                         pclock = 133000000;
108                         break;
109                 case 1:
110                         pclock = 149000000;
111                         break;
112                 case 2:
113                         pclock = 165900000;
114                         break;
115                 case 3:
116                         pclock = 199100000;
117                         break;
118                 case 4:
119                         pclock = 265900000;
120                         break;
121                 default:
122                         printk(KERN_INFO "Unknown PClock speed for NEC VR4133\n");
123                         break;
124                 }
125                 break;
126         default:
127                 printk(KERN_INFO "Unexpected CPU of NEC VR4100 series\n");
128                 break;
129         }
130
131         printk(KERN_INFO "PClock: %ldHz\n", pclock);
132
133         return pclock;
134 }
135
136 static inline unsigned long calculate_vtclock(uint16_t clkspeed, unsigned long pclock)
137 {
138         unsigned long vtclock = 0;
139
140         switch (current_cpu_data.cputype) {
141         case CPU_VR4111:
142                 /* The NEC VR4111 doesn't have the VTClock. */
143                 break;
144         case CPU_VR4121:
145                 vtclock = pclock;
146                 /* DIVVT == 9 Divide by 1.5 . VTClock = (PClock * 6) / 9 */
147                 if (DIVVT(clkspeed) == 9)
148                         vtclock = pclock * 6;
149                 /* DIVVT == 10 Divide by 2.5 . VTClock = (PClock * 4) / 10 */
150                 else if (DIVVT(clkspeed) == 10)
151                         vtclock = pclock * 4;
152                 vtclock /= DIVVT(clkspeed);
153                 printk(KERN_INFO "VTClock: %ldHz\n", vtclock);
154                 break;
155         case CPU_VR4122:
156                 if(VTDIVMODE(clkspeed) == 7)
157                         vtclock = pclock / 1;
158                 else if(VTDIVMODE(clkspeed) == 1)
159                         vtclock = pclock / 2;
160                 else
161                         vtclock = pclock / VTDIVMODE(clkspeed);
162                 printk(KERN_INFO "VTClock: %ldHz\n", vtclock);
163                 break;
164         case CPU_VR4131:
165         case CPU_VR4133:
166                 vtclock = pclock / VTDIVMODE(clkspeed);
167                 printk(KERN_INFO "VTClock: %ldHz\n", vtclock);
168                 break;
169         default:
170                 printk(KERN_INFO "Unexpected CPU of NEC VR4100 series\n");
171                 break;
172         }
173
174         return vtclock;
175 }
176
177 static inline unsigned long calculate_tclock(uint16_t clkspeed, unsigned long pclock,
178                                              unsigned long vtclock)
179 {
180         unsigned long tclock = 0;
181
182         switch (current_cpu_data.cputype) {
183         case CPU_VR4111:
184                 if (!(clkspeed & DIV2B))
185                         tclock = pclock / 2;
186                 else if (!(clkspeed & DIV3B))
187                         tclock = pclock / 3;
188                 else if (!(clkspeed & DIV4B))
189                         tclock = pclock / 4;
190                 break;
191         case CPU_VR4121:
192                 tclock = pclock / DIVT(clkspeed);
193                 break;
194         case CPU_VR4122:
195         case CPU_VR4131:
196         case CPU_VR4133:
197                 tclock = vtclock / TDIVMODE(clkspeed);
198                 break;
199         default:
200                 printk(KERN_INFO "Unexpected CPU of NEC VR4100 series\n");
201                 break;
202         }
203
204         printk(KERN_INFO "TClock: %ldHz\n", tclock);
205
206         return tclock;
207 }
208
209 static int __init vr41xx_bcu_init(void)
210 {
211         unsigned long pclock;
212         uint16_t clkspeed;
213
214         clkspeed = read_clkspeed();
215
216         pclock = calculate_pclock(clkspeed);
217         vr41xx_vtclock = calculate_vtclock(clkspeed, pclock);
218         vr41xx_tclock = calculate_tclock(clkspeed, pclock, vr41xx_vtclock);
219
220         iomem_resource.start = IO_MEM_RESOURCE_START;
221         iomem_resource.end = IO_MEM_RESOURCE_END;
222
223         return 0;
224 }
225
226 early_initcall(vr41xx_bcu_init);