3 * This file is subject to the terms and conditions of the GNU General Public
4 * License. See the file "COPYING" in the main directory of this archive
7 * Copyright (C) 1999 by Helge Deller
8 * Copyright 1999 SuSE GmbH (Philipp Rumpf)
9 * Copyright 1999 Philipp Rumpf (prumpf@tux.org)
10 * Copyright 2000 Hewlett Packard (Paul Bame, bame@puffin.external.hp.com)
11 * Copyright (C) 2001 Grant Grundler (Hewlett Packard)
13 * Initial Version 04-23-1999 by Helge Deller <deller@gmx.de>
17 #include <linux/autoconf.h> /* for CONFIG_SMP */
19 #include <asm/offsets.h>
22 #include <asm/assembly.h>
23 #include <asm/pgtable.h>
24 #include <asm/pdc.h> /* for PDC_PSW defines */
42 .export _stext,data /* Kernel want it this way! */
48 /* Make sure sr4-sr7 are set to zero for the kernel address space */
54 /* Clear BSS (shouldn't the boot loader do this?) */
56 .import __bss_start,data
57 .import __bss_stop,data
59 ldil L%PA(__bss_start),%r3
60 ldo R%PA(__bss_start)(%r3),%r3
61 ldil L%PA(__bss_stop),%r4
62 ldo R%PA(__bss_stop)(%r4),%r4
64 cmpb,<<,n %r3,%r4,$bss_loop
67 /* Save away the arguments the boot loader passed in (32 bit args) */
69 ldil L%PA(boot_args),%r1
70 ldo R%PA(boot_args)(%r1),%r1
76 /* Initialize startup VM. Just map first 8 MB of memory */
79 ldo R%PA(pg0)(%r1),%r1
82 ldo R%PA(pmd0)(%r5),%r5
83 ldo _PAGE_TABLE(%r5),%r3
85 ldil L%PA(swapper_pg_dir),%r4
86 ldo R%PA(swapper_pg_dir)(%r4),%r4
88 mtctl %r4,%cr24 /* Initialize kernel root pointer */
89 mtctl %r4,%cr25 /* Initialize user root pointer */
91 #if (__PAGE_OFFSET != 0x10000000UL)
92 Error! Code below (the next five std's) needs to be changed
95 std %r3,0x00(%r4) /* Hardwired 0x1... kernel Vaddr start*/
97 ldo _PAGE_TABLE(%r1),%r3
98 std %r3,0x400(%r5) /* Hardwired 0x1... kernel Vaddr start*/
106 ldo _PAGE_KERNEL(%r0),%r3 /* Hardwired 0 phys addr start */
110 bb,>= %r3,8,$pgt_fill_loop
113 /* And the RFI Target address too */
114 load32 start_kernel, %r11
116 /* And the stack pointer too */
117 load32 PA(init_thread_union+THREAD_SZ_ALGN),%sp
119 /* And the initial task pointer */
121 load32 init_thread_union,%r6
124 /* And the interrupt stack */
126 load32 interrupt_stack,%r6
129 /* Act like PDC just called us - that's how slave CPUs enter */
130 #define MEM_PDC_LO 0x388
131 #define MEM_PDC_HI 0x35C
132 ldw MEM_PDC_LO(%r0),%r3
133 ldw MEM_PDC_HI(%r0),%r6
134 depd %r6, 31, 32, %r3 /* move to upper word */
137 /* Set the smp rendevous address into page zero.
138 ** It would be safer to do this in init_smp_config() but
139 ** it's just way easier to deal with here because
140 ** of 64-bit function ptrs and the address is local to this file.
142 ldil L%PA(smp_slave_stext),%r10
143 ldo R%PA(smp_slave_stext)(%r10),%r10
144 stw %r10,0x10(%r0) /* MEM_RENDEZ */
145 stw %r0,0x28(%r0) /* MEM_RENDEZ_HI - assume addr < 4GB */
151 ** Code Common to both Monarch and Slave processors.
153 ** %r3 PDCE_PROC address
154 ** %r11 RFI target address.
156 ** Caller must init: SR4-7, %sp, %r10, %cr24/25,
161 #else /* CONFIG_SMP */
162 /* Clear PDC's CPU handoff address - we won't use it */
163 stw %r0,0x10(%r0) /* MEM_RENDEZ */
164 stw %r0,0x28(%r0) /* MEM_RENDEZ_HI */
165 #endif /* CONFIG_SMP */
167 /* Save the rfi target address */
168 ldd TI_TASK-THREAD_SZ_ALGN(%sp), %r10
170 std %r11, TASK_PT_GR11(%r10)
172 #ifndef CONFIG_PDC_NARROW
173 /* Switch to wide mode; Superdome doesn't support narrow PDC
176 1: mfia %rp /* clear upper part of pcoq */
182 #endif /* CONFIG_PDC_NARROW */
184 /* Set Wide mode as the "Default" (eg for traps)
185 ** First trap occurs *right* after (or part of) rfi for slave CPUs.
186 ** Someday, palo might not do this for the Monarch either.
189 ldo PDC_PSW(%r0),%arg0 /* 21 */
190 ldo PDC_PSW_SET_DEFAULTS(%r0),%arg1 /* 2 */
191 ldo PDC_PSW_WIDE_BIT(%r0),%arg2 /* 2 */
193 load32 PA(stext_pdc_ret), %rp
199 /* restore rfi target address*/
200 ldd TI_TASK-THREAD_SZ_ALGN(%sp), %r10
202 ldd TASK_PT_GR11(%r10), %r11
204 /* PARANOID: clear user scratch/user space SR's */
210 /* Initialize Protection Registers */
216 /* Prepare to RFI! Man all the cannons! */
219 /* Initialize the global data pointer */
222 /* Set up our interrupt table. HPMCs might not work after this! */
223 ldil L%PA(fault_vector_20),%r10
224 ldo R%PA(fault_vector_20)(%r10),%r10
230 /* the magic spell */
243 /* turn off troublesome PSW bits */
244 rsm PSW_Q+PSW_I+PSW_D+PSW_P+PSW_R, %r0
247 * - no interruptions except HPMC and TOC (which are handled by PDC)
248 * - Q bit set (IODC / PDC interruptions)
252 load32 KERNEL_PSW,%r10
255 /* Set the space pointers for the post-RFI world
256 ** Clear the two-level IIA Space Queue, effectively setting
259 mtctl %r0,%cr17 /* Clear IIASQ tail */
260 mtctl %r0,%cr17 /* Clear IIASQ head */
262 /* Load RFI target into PC queue */
263 mtctl %r11,%cr18 /* IIAOQ head */
265 mtctl %r11,%cr18 /* IIAOQ tail */
267 /* Jump to hyperspace */
276 .import smp_init_current_idle_task,data
277 .import smp_callin,code
279 /***************************************************************************
281 * smp_slave_stext is executed by all non-monarch Processors when the Monarch
282 * pokes the slave CPUs in smp.c:smp_boot_cpus().
284 * Once here, registers values are initialized in order to branch to virtual
285 * mode. Once all available/eligible CPUs are in virtual mode, all are
286 * released and start out by executing their own idle task.
287 *****************************************************************************/
295 ** Initialize Space registers
302 /* Initialize the SP - monarch sets up smp_init_current_idle_task */
303 load32 PA(smp_init_current_idle_task),%sp
304 ldd 0(%sp),%sp /* load task address */
305 ldd TASK_THREAD_INFO(%sp), %sp
306 mtctl %sp,%cr30 /* store in cr30 */
307 ldo THREAD_SZ_ALGN(%sp),%sp
310 /* point CPU to kernel page tables */
311 load32 PA(swapper_pg_dir),%r4
312 mtctl %r4,%cr24 /* Initialize kernel root pointer */
313 mtctl %r4,%cr25 /* Initialize user root pointer */
315 /* Setup PDCE_PROC entry */
318 /* Load RFI target address. */
319 load32 smp_callin, %r11
321 /* ok...common code can handle the rest */
326 #endif /* CONFIG_SMP */