arch/ppc/kernel/ppc_htab.c

   1 /*
   2  * PowerPC hash table management proc entry.  Will show information
   3  * about the current hash table and will allow changes to it.
   4  *
   5  * Written by Cort Dougan (cort@cs.nmt.edu)
   6  *
   7  * This program is free software; you can redistribute it and/or
   8  * modify it under the terms of the GNU General Public License
   9  * as published by the Free Software Foundation; either version
  10  * 2 of the License, or (at your option) any later version.
  11  */
  12
  13 #include <linux/config.h>
  14 #include <linux/errno.h>
  15 #include <linux/sched.h>
  16 #include <linux/proc_fs.h>
  17 #include <linux/stat.h>
  18 #include <linux/sysctl.h>
  19 #include <linux/ctype.h>
  20 #include <linux/threads.h>
  21 #include <linux/smp_lock.h>
  22 #include <linux/seq_file.h>
  23
  24 #include <asm/uaccess.h>
  25 #include <asm/bitops.h>
  26 #include <asm/mmu.h>
  27 #include <asm/residual.h>
  28 #include <asm/io.h>
  29 #include <asm/pgtable.h>
  30 #include <asm/cputable.h>
  31 #include <asm/system.h>
  32 #include <asm/reg.h>
  33
  34 static int ppc_htab_show(struct seq_file *m, void *v);
  35 static ssize_t ppc_htab_write(struct file * file, const char __user * buffer,
  36                               size_t count, loff_t *ppos);
  37 int proc_dol2crvec(ctl_table *table, int write, struct file *filp,
  38                   void __user *buffer, size_t *lenp, loff_t *ppos);
  39
  40 extern PTE *Hash, *Hash_end;
  41 extern unsigned long Hash_size, Hash_mask;
  42 extern unsigned long _SDR1;
  43 extern unsigned long htab_reloads;
  44 extern unsigned long htab_preloads;
  45 extern unsigned long htab_evicts;
  46 extern unsigned long pte_misses;
  47 extern unsigned long pte_errors;
  48 extern unsigned int primary_pteg_full;
  49 extern unsigned int htab_hash_searches;
  50
  51 static int ppc_htab_open(struct inode *inode, struct file *file)
  52 {
  53         return single_open(file, ppc_htab_show, NULL);
  54 }
  55
  56 struct file_operations ppc_htab_operations = {
  57         .open           = ppc_htab_open,
  58         .read           = seq_read,
  59         .llseek         = seq_lseek,
  60         .write          = ppc_htab_write,
  61         .release        = single_release,
  62 };
  63
  64 static char *pmc1_lookup(unsigned long mmcr0)
  65 {
  66         switch ( mmcr0 & (0x7f<<7) )
  67         {
  68         case 0x0:
  69                 return "none";
  70         case MMCR0_PMC1_CYCLES:
  71                 return "cycles";
  72         case MMCR0_PMC1_ICACHEMISS:
  73                 return "ic miss";
  74         case MMCR0_PMC1_DTLB:
  75                 return "dtlb miss";
  76         default:
  77                 return "unknown";
  78         }
  79 }
  80
  81 static char *pmc2_lookup(unsigned long mmcr0)
  82 {
  83         switch ( mmcr0 & 0x3f )
  84         {
  85         case 0x0:
  86                 return "none";
  87         case MMCR0_PMC2_CYCLES:
  88                 return "cycles";
  89         case MMCR0_PMC2_DCACHEMISS:
  90                 return "dc miss";
  91         case MMCR0_PMC2_ITLB:
  92                 return "itlb miss";
  93         case MMCR0_PMC2_LOADMISSTIME:
  94                 return "load miss time";
  95         default:
  96                 return "unknown";
  97         }
  98 }
  99
 100 /*
 101  * print some useful info about the hash table.  This function
 102  * is _REALLY_ slow (see the nested for loops below) but nothing
 103  * in here should be really timing critical. -- Cort
 104  */
 105 static int ppc_htab_show(struct seq_file *m, void *v)
 106 {
 107         unsigned long mmcr0 = 0, pmc1 = 0, pmc2 = 0;
 108 #if defined(CONFIG_PPC_STD_MMU) && !defined(CONFIG_PPC64BRIDGE)
 109         unsigned int kptes = 0, uptes = 0;
 110         PTE *ptr;
 111 #endif /* CONFIG_PPC_STD_MMU */
 112
 113         if (cur_cpu_spec[0]->cpu_features & CPU_FTR_604_PERF_MON) {
 114                 mmcr0 = mfspr(SPRN_MMCR0);
 115                 pmc1 = mfspr(SPRN_PMC1);
 116                 pmc2 = mfspr(SPRN_PMC2);
 117                 seq_printf(m,
 118                               "604 Performance Monitoring\n"
 119                               "MMCR0\t\t: %08lx %s%s ",
 120                               mmcr0,
 121                               ( mmcr0>>28 & 0x2 ) ? "(user mode counted)" : "",
 122                               ( mmcr0>>28 & 0x4 ) ? "(kernel mode counted)" : "");
 123                 seq_printf(m,
 124                               "\nPMC1\t\t: %08lx (%s)\n"
 125                               "PMC2\t\t: %08lx (%s)\n",
 126                               pmc1, pmc1_lookup(mmcr0),
 127                               pmc2, pmc2_lookup(mmcr0));
 128         }
 129
 130 #ifdef CONFIG_PPC_STD_MMU
 131         /* if we don't have a htab */
 132         if ( Hash_size == 0 ) {
 133                 seq_printf(m, "No Hash Table used\n");
 134                 return 0;
 135         }
 136
 137 #ifndef CONFIG_PPC64BRIDGE
 138         for (ptr = Hash; ptr < Hash_end; ptr++) {
 139                 unsigned int mctx, vsid;
 140
 141                 if (!ptr->v)
 142                         continue;
 143                 /* undo the esid skew */
 144                 vsid = ptr->vsid;
 145                 mctx = ((vsid - (vsid & 0xf) * 0x111) >> 4) & 0xfffff;
 146                 if (mctx == 0)
 147                         kptes++;
 148                 else
 149                         uptes++;
 150         }
 151 #endif
 152
 153         seq_printf(m,
 154                       "PTE Hash Table Information\n"
 155                       "Size\t\t: %luKb\n"
 156                       "Buckets\t\t: %lu\n"
 157                       "Address\t\t: %08lx\n"
 158                       "Entries\t\t: %lu\n"
 159 #ifndef CONFIG_PPC64BRIDGE
 160                       "User ptes\t: %u\n"
 161                       "Kernel ptes\t: %u\n"
 162                       "Percent full\t: %lu%%\n"
 163 #endif
 164                       , (unsigned long)(Hash_size>>10),
 165                       (Hash_size/(sizeof(PTE)*8)),
 166                       (unsigned long)Hash,
 167                       Hash_size/sizeof(PTE)
 168 #ifndef CONFIG_PPC64BRIDGE
 169                       , uptes,
 170                       kptes,
 171                       ((kptes+uptes)*100) / (Hash_size/sizeof(PTE))
 172 #endif
 173                 );
 174
 175         seq_printf(m,
 176                       "Reloads\t\t: %lu\n"
 177                       "Preloads\t: %lu\n"
 178                       "Searches\t: %u\n"
 179                       "Overflows\t: %u\n"
 180                       "Evicts\t\t: %lu\n",
 181                       htab_reloads, htab_preloads, htab_hash_searches,
 182                       primary_pteg_full, htab_evicts);
 183 #endif /* CONFIG_PPC_STD_MMU */
 184
 185         seq_printf(m,
 186                       "Non-error misses: %lu\n"
 187                       "Error misses\t: %lu\n",
 188                       pte_misses, pte_errors);
 189         return 0;
 190 }
 191
 192 /*
 193  * Allow user to define performance counters and resize the hash table
 194  */
 195 static ssize_t ppc_htab_write(struct file * file, const char __user * ubuffer,
 196                               size_t count, loff_t *ppos)
 197 {
 198 #ifdef CONFIG_PPC_STD_MMU
 199         unsigned long tmp;
 200         char buffer[16];
 201
 202         if (!capable(CAP_SYS_ADMIN))
 203                 return -EACCES;
 204         if (strncpy_from_user(buffer, ubuffer, 15))
 205                 return -EFAULT;
 206         buffer[15] = 0;
 207
 208         /* don't set the htab size for now */
 209         if ( !strncmp( buffer, "size ", 5) )
 210                 return -EBUSY;
 211
 212         if ( !strncmp( buffer, "reset", 5) )
 213         {
 214                 if (cur_cpu_spec[0]->cpu_features & CPU_FTR_604_PERF_MON) {
 215                         /* reset PMC1 and PMC2 */
 216                         mtspr(SPRN_PMC1, 0);
 217                         mtspr(SPRN_PMC2, 0);
 218                 }
 219                 htab_reloads = 0;
 220                 htab_evicts = 0;
 221                 pte_misses = 0;
 222                 pte_errors = 0;
 223         }
 224
 225         /* Everything below here requires the performance monitor feature. */
 226         if ( !cur_cpu_spec[0]->cpu_features & CPU_FTR_604_PERF_MON )
 227                 return count;
 228
 229         /* turn off performance monitoring */
 230         if ( !strncmp( buffer, "off", 3) )
 231         {
 232                 mtspr(SPRN_MMCR0, 0);
 233                 mtspr(SPRN_PMC1, 0);
 234                 mtspr(SPRN_PMC2, 0);
 235         }
 236
 237         if ( !strncmp( buffer, "user", 4) )
 238         {
 239                 /* setup mmcr0 and clear the correct pmc */
 240                 tmp = (mfspr(SPRN_MMCR0) & ~(0x60000000)) | 0x20000000;
 241                 mtspr(SPRN_MMCR0, tmp);
 242                 mtspr(SPRN_PMC1, 0);
 243                 mtspr(SPRN_PMC2, 0);
 244         }
 245
 246         if ( !strncmp( buffer, "kernel", 6) )
 247         {
 248                 /* setup mmcr0 and clear the correct pmc */
 249                 tmp = (mfspr(SPRN_MMCR0) & ~(0x60000000)) | 0x40000000;
 250                 mtspr(SPRN_MMCR0, tmp);
 251                 mtspr(SPRN_PMC1, 0);
 252                 mtspr(SPRN_PMC2, 0);
 253         }
 254
 255         /* PMC1 values */
 256         if ( !strncmp( buffer, "dtlb", 4) )
 257         {
 258                 /* setup mmcr0 and clear the correct pmc */
 259                 tmp = (mfspr(SPRN_MMCR0) & ~(0x7F << 7)) | MMCR0_PMC1_DTLB;
 260                 mtspr(SPRN_MMCR0, tmp);
 261                 mtspr(SPRN_PMC1, 0);
 262         }
 263
 264         if ( !strncmp( buffer, "ic miss", 7) )
 265         {
 266                 /* setup mmcr0 and clear the correct pmc */
 267                 tmp = (mfspr(SPRN_MMCR0) & ~(0x7F<<7)) | MMCR0_PMC1_ICACHEMISS;
 268                 mtspr(SPRN_MMCR0, tmp);
 269                 mtspr(SPRN_PMC1, 0);
 270         }
 271
 272         /* PMC2 values */
 273         if ( !strncmp( buffer, "load miss time", 14) )
 274         {
 275                 /* setup mmcr0 and clear the correct pmc */
 276                asm volatile(
 277                        "mfspr %0,%1\n\t"     /* get current mccr0 */
 278                        "rlwinm %0,%0,0,0,31-6\n\t"  /* clear bits [26-31] */
 279                        "ori   %0,%0,%2 \n\t" /* or in mmcr0 settings */
 280                        "mtspr %1,%0 \n\t"    /* set new mccr0 */
 281                        "mtspr %3,%4 \n\t"    /* reset the pmc */
 282                        : "=r" (tmp)
 283                        : "i" (SPRN_MMCR0),
 284                        "i" (MMCR0_PMC2_LOADMISSTIME),
 285                        "i" (SPRN_PMC2),  "r" (0) );
 286         }
 287
 288         if ( !strncmp( buffer, "itlb", 4) )
 289         {
 290                 /* setup mmcr0 and clear the correct pmc */
 291                asm volatile(
 292                        "mfspr %0,%1\n\t"     /* get current mccr0 */
 293                        "rlwinm %0,%0,0,0,31-6\n\t"  /* clear bits [26-31] */
 294                        "ori   %0,%0,%2 \n\t" /* or in mmcr0 settings */
 295                        "mtspr %1,%0 \n\t"    /* set new mccr0 */
 296                        "mtspr %3,%4 \n\t"    /* reset the pmc */
 297                        : "=r" (tmp)
 298                        : "i" (SPRN_MMCR0), "i" (MMCR0_PMC2_ITLB),
 299                        "i" (SPRN_PMC2),  "r" (0) );
 300         }
 301
 302         if ( !strncmp( buffer, "dc miss", 7) )
 303         {
 304                 /* setup mmcr0 and clear the correct pmc */
 305                asm volatile(
 306                        "mfspr %0,%1\n\t"     /* get current mccr0 */
 307                        "rlwinm %0,%0,0,0,31-6\n\t"  /* clear bits [26-31] */
 308                        "ori   %0,%0,%2 \n\t" /* or in mmcr0 settings */
 309                        "mtspr %1,%0 \n\t"    /* set new mccr0 */
 310                        "mtspr %3,%4 \n\t"    /* reset the pmc */
 311                        : "=r" (tmp)
 312                        : "i" (SPRN_MMCR0), "i" (MMCR0_PMC2_DCACHEMISS),
 313                        "i" (SPRN_PMC2),  "r" (0) );
 314         }
 315
 316         return count;
 317 #else /* CONFIG_PPC_STD_MMU */
 318         return 0;
 319 #endif /* CONFIG_PPC_STD_MMU */
 320 }
 321
 322 int proc_dol2crvec(ctl_table *table, int write, struct file *filp,
 323                   void __user *buffer_arg, size_t *lenp, loff_t *ppos)
 324 {
 325         int vleft, first=1, len, left, val;
 326         char __user *buffer = (char __user *) buffer_arg;
 327         #define TMPBUFLEN 256
 328         char buf[TMPBUFLEN], *p;
 329         static const char *sizestrings[4] = {
 330                 "2MB", "256KB", "512KB", "1MB"
 331         };
 332         static const char *clockstrings[8] = {
 333                 "clock disabled", "+1 clock", "+1.5 clock", "reserved(3)",
 334                 "+2 clock", "+2.5 clock", "+3 clock", "reserved(7)"
 335         };
 336         static const char *typestrings[4] = {
 337                 "flow-through burst SRAM", "reserved SRAM",
 338                 "pipelined burst SRAM", "pipelined late-write SRAM"
 339         };
 340         static const char *holdstrings[4] = {
 341                 "0.5", "1.0", "(reserved2)", "(reserved3)"
 342         };
 343
 344         if (!(cur_cpu_spec[0]->cpu_features & CPU_FTR_L2CR))
 345                 return -EFAULT;
 346
 347         if ( /*!table->maxlen ||*/ (*ppos && !write)) {
 348                 *lenp = 0;
 349                 return 0;
 350         }
 351
 352         vleft = table->maxlen / sizeof(int);
 353         left = *lenp;
 354
 355         for (; left /*&& vleft--*/; first=0) {
 356                 if (write) {
 357                         while (left) {
 358                                 char c;
 359                                 if(get_user(c, buffer))
 360                                         return -EFAULT;
 361                                 if (!isspace(c))
 362                                         break;
 363                                 left--;
 364                                 buffer++;
 365                         }
 366                         if (!left)
 367                                 break;
 368                         len = left;
 369                         if (len > TMPBUFLEN-1)
 370                                 len = TMPBUFLEN-1;
 371                         if(copy_from_user(buf, buffer, len))
 372                                 return -EFAULT;
 373                         buf[len] = 0;
 374                         p = buf;
 375                         if (*p < '0' || *p > '9')
 376                                 break;
 377                         val = simple_strtoul(p, &p, 0);
 378                         len = p-buf;
 379                         if ((len < left) && *p && !isspace(*p))
 380                                 break;
 381                         buffer += len;
 382                         left -= len;
 383                         _set_L2CR(val);
 384                 } else {
 385                         p = buf;
 386                         if (!first)
 387                                 *p++ = '\t';
 388                         val = _get_L2CR();
 389                         p += sprintf(p, "0x%08x: ", val);
 390                         p += sprintf(p, " %s", (val >> 31) & 1 ? "enabled" :
 391                                         "disabled");
 392                         p += sprintf(p, ", %sparity", (val>>30)&1 ? "" : "no ");
 393                         p += sprintf(p, ", %s", sizestrings[(val >> 28) & 3]);
 394                         p += sprintf(p, ", %s", clockstrings[(val >> 25) & 7]);
 395                         p += sprintf(p, ", %s", typestrings[(val >> 23) & 2]);
 396                         p += sprintf(p, "%s", (val>>22)&1 ? ", data only" : "");
 397                         p += sprintf(p, "%s", (val>>20)&1 ? ", ZZ enabled": "");
 398                         p += sprintf(p, ", %s", (val>>19)&1 ? "write-through" :
 399                                         "copy-back");
 400                         p += sprintf(p, "%s", (val>>18)&1 ? ", testing" : "");
 401                         p += sprintf(p, ", %sns hold",holdstrings[(val>>16)&3]);
 402                         p += sprintf(p, "%s", (val>>15)&1 ? ", DLL slow" : "");
 403                         p += sprintf(p, "%s", (val>>14)&1 ? ", diff clock" :"");
 404                         p += sprintf(p, "%s", (val>>13)&1 ? ", DLL bypass" :"");
 405
 406                         p += sprintf(p,"\n");
 407
 408                         len = strlen(buf);
 409                         if (len > left)
 410                                 len = left;
 411                         if (copy_to_user(buffer, buf, len))
 412                                 return -EFAULT;
 413                         left -= len;
 414                         buffer += len;
 415                         break;
 416                 }
 417         }
 418
 419         if (!write && !first && left) {
 420                 if(put_user('\n', (char __user *) buffer))
 421                         return -EFAULT;
 422                 left--, buffer++;
 423         }
 424         if (write) {
 425                 char __user *s = (char __user *) buffer;
 426                 while (left) {
 427                         char c;
 428                         if(get_user(c, s++))
 429                                 return -EFAULT;
 430                         if (!isspace(c))
 431                                 break;
 432                         left--;
 433                 }
 434         }
 435         if (write && first)
 436                 return -EINVAL;
 437         *lenp -= left;
 438         *ppos += *lenp;
 439         return 0;
 440 }