2 * arch/ppc/kernel/traps.c
4 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
11 * Modified by Cort Dougan (cort@cs.nmt.edu)
12 * and Paul Mackerras (paulus@cs.anu.edu.au)
16 * This file handles the architecture-dependent parts of hardware exceptions
19 #include <linux/errno.h>
20 #include <linux/sched.h>
21 #include <linux/kernel.h>
23 #include <linux/stddef.h>
24 #include <linux/unistd.h>
25 #include <linux/ptrace.h>
26 #include <linux/slab.h>
27 #include <linux/user.h>
28 #include <linux/a.out.h>
29 #include <linux/interrupt.h>
30 #include <linux/config.h>
31 #include <linux/init.h>
32 #include <linux/module.h>
34 #include <asm/pgtable.h>
35 #include <asm/uaccess.h>
36 #include <asm/system.h>
40 #ifdef CONFIG_PMAC_BACKLIGHT
41 #include <asm/backlight.h>
45 void (*debugger)(struct pt_regs *regs) = xmon;
46 int (*debugger_bpt)(struct pt_regs *regs) = xmon_bpt;
47 int (*debugger_sstep)(struct pt_regs *regs) = xmon_sstep;
48 int (*debugger_iabr_match)(struct pt_regs *regs) = xmon_iabr_match;
49 int (*debugger_dabr_match)(struct pt_regs *regs) = xmon_dabr_match;
50 void (*debugger_fault_handler)(struct pt_regs *regs);
53 void (*debugger)(struct pt_regs *regs);
54 int (*debugger_bpt)(struct pt_regs *regs);
55 int (*debugger_sstep)(struct pt_regs *regs);
56 int (*debugger_iabr_match)(struct pt_regs *regs);
57 int (*debugger_dabr_match)(struct pt_regs *regs);
58 void (*debugger_fault_handler)(struct pt_regs *regs);
60 #define debugger(regs) do { } while (0)
61 #define debugger_bpt(regs) 0
62 #define debugger_sstep(regs) 0
63 #define debugger_iabr_match(regs) 0
64 #define debugger_dabr_match(regs) 0
65 #define debugger_fault_handler ((void (*)(struct pt_regs *))0)
70 * Trap & Exception support
74 spinlock_t die_lock = SPIN_LOCK_UNLOCKED;
76 void die(const char * str, struct pt_regs * fp, long err)
78 static int die_counter;
81 spin_lock_irq(&die_lock);
82 #ifdef CONFIG_PMAC_BACKLIGHT
83 set_backlight_enable(1);
84 set_backlight_level(BACKLIGHT_MAX);
86 printk("Oops: %s, sig: %ld [#%d]\n", str, err, ++die_counter);
92 printk("SMP NR_CPUS=%d ", NR_CPUS);
98 spin_unlock_irq(&die_lock);
99 /* do_exit() should take care of panic'ing from an interrupt
100 * context so we don't handle it here
106 _exception(int signr, struct pt_regs *regs, int code, unsigned long addr)
110 if (!user_mode(regs)) {
112 die("Exception in kernel mode", regs, signr);
114 info.si_signo = signr;
117 info.si_addr = (void *) addr;
118 force_sig_info(signr, &info, current);
122 * I/O accesses can cause machine checks on powermacs.
123 * Check if the NIP corresponds to the address of a sync
124 * instruction for which there is an entry in the exception
126 * Note that the 601 only takes a machine check on TEA
127 * (transfer error ack) signal assertion, and does not
128 * set any of the top 16 bits of SRR1.
131 static inline int check_io_access(struct pt_regs *regs)
133 #ifdef CONFIG_PPC_PMAC
134 unsigned long msr = regs->msr;
135 const struct exception_table_entry *entry;
136 unsigned int *nip = (unsigned int *)regs->nip;
138 if (((msr & 0xffff0000) == 0 || (msr & (0x80000 | 0x40000)))
139 && (entry = search_exception_tables(regs->nip)) != NULL) {
141 * Check that it's a sync instruction, or somewhere
142 * in the twi; isync; nop sequence that inb/inw/inl uses.
143 * As the address is in the exception table
144 * we should be able to read the instr there.
145 * For the debug message, we look at the preceding
148 if (*nip == 0x60000000) /* nop */
150 else if (*nip == 0x4c00012c) /* isync */
152 if (*nip == 0x7c0004ac || (*nip >> 26) == 3) {
157 rb = (*nip >> 11) & 0x1f;
158 printk(KERN_DEBUG "%s bad port %lx at %p\n",
159 (*nip & 0x100)? "OUT to": "IN from",
160 regs->gpr[rb] - _IO_BASE, nip);
162 regs->nip = entry->fixup;
166 #endif /* CONFIG_PPC_PMAC */
170 #if defined(CONFIG_4xx) || defined(CONFIG_BOOKE)
171 /* On 4xx, the reason for the machine check or program exception
173 #define get_reason(regs) ((regs)->dsisr)
175 #define REASON_ILLEGAL ESR_PIL
176 #define REASON_PRIVILEGED ESR_PPR
177 #define REASON_TRAP ESR_PTR
179 /* single-step stuff */
180 #define single_stepping(regs) (current->thread.dbcr0 & DBCR0_IC)
181 #define clear_single_step(regs) (current->thread.dbcr0 &= ~DBCR0_IC)
184 /* On non-4xx, the reason for the machine check or program
185 exception is in the MSR. */
186 #define get_reason(regs) ((regs)->msr)
187 #define REASON_FP 0x100000
188 #define REASON_ILLEGAL 0x80000
189 #define REASON_PRIVILEGED 0x40000
190 #define REASON_TRAP 0x20000
192 #define single_stepping(regs) ((regs)->msr & MSR_SE)
193 #define clear_single_step(regs) ((regs)->msr &= ~MSR_SE)
197 MachineCheckException(struct pt_regs *regs)
199 unsigned long reason = get_reason(regs);
201 if (user_mode(regs)) {
203 _exception(SIGBUS, regs, BUS_ADRERR, regs->nip);
207 #if defined(CONFIG_8xx) && defined(CONFIG_PCI)
208 /* the qspan pci read routines can cause machine checks -- Cort */
209 bad_page_fault(regs, regs->dar, SIGBUS);
213 if (debugger_fault_handler) {
214 debugger_fault_handler(regs);
219 if (check_io_access(regs))
222 #if defined(CONFIG_4xx) && !defined(CONFIG_440A)
223 if (reason & ESR_IMCP) {
224 printk("Instruction");
225 mtspr(SPRN_ESR, reason & ~ESR_IMCP);
228 printk(" machine check in kernel mode.\n");
229 #elif defined(CONFIG_440A)
230 printk("Machine check in kernel mode.\n");
231 if (reason & ESR_IMCP){
232 printk("Instruction Synchronous Machine Check exception\n");
233 mtspr(SPRN_ESR, reason & ~ESR_IMCP);
236 u32 mcsr = mfspr(SPRN_MCSR);
238 printk("Instruction Read PLB Error\n");
240 printk("Data Read PLB Error\n");
242 printk("Data Write PLB Error\n");
243 if (mcsr & MCSR_TLBP)
244 printk("TLB Parity Error\n");
245 if (mcsr & MCSR_ICP){
246 flush_instruction_cache();
247 printk("I-Cache Parity Error\n");
249 if (mcsr & MCSR_DCSP)
250 printk("D-Cache Search Parity Error\n");
251 if (mcsr & MCSR_DCFP)
252 printk("D-Cache Flush Parity Error\n");
253 if (mcsr & MCSR_IMPE)
254 printk("Machine Check exception is imprecise\n");
257 mtspr(SPRN_MCSR, mcsr);
259 #else /* !CONFIG_4xx */
260 printk("Machine check in kernel mode.\n");
261 printk("Caused by (from SRR1=%lx): ", reason);
262 switch (reason & 0x601F0000) {
264 printk("Machine check signal\n");
266 case 0: /* for 601 */
268 case 0x140000: /* 7450 MSS error and TEA */
269 printk("Transfer error ack signal\n");
272 printk("Data parity error signal\n");
275 printk("Address parity error signal\n");
278 printk("L1 Data Cache error\n");
281 printk("L1 Instruction Cache error\n");
284 printk("L2 data cache parity error\n");
287 printk("Unknown values in msr\n");
289 #endif /* CONFIG_4xx */
292 die("machine check", regs, SIGBUS);
296 SMIException(struct pt_regs *regs)
299 #if !(defined(CONFIG_XMON) || defined(CONFIG_KGDB))
301 panic("System Management Interrupt");
306 UnknownException(struct pt_regs *regs)
308 printk("Bad trap at PC: %lx, MSR: %lx, vector=%lx %s\n",
309 regs->nip, regs->msr, regs->trap, print_tainted());
310 _exception(SIGTRAP, regs, 0, 0);
314 InstructionBreakpoint(struct pt_regs *regs)
316 if (debugger_iabr_match(regs))
318 _exception(SIGTRAP, regs, TRAP_BRKPT, 0);
322 RunModeException(struct pt_regs *regs)
324 _exception(SIGTRAP, regs, 0, 0);
327 /* Illegal instruction emulation support. Originally written to
328 * provide the PVR to user applications using the mfspr rd, PVR.
329 * Return non-zero if we can't emulate, or EFAULT if the associated
330 * memory access caused an access fault. Return zero on success.
332 * There are a couple of ways to do this, either "decode" the instruction
333 * or directly match lots of bits. In this case, matching lots of
334 * bits is faster and easier.
337 #define INST_MFSPR_PVR 0x7c1f42a6
338 #define INST_MFSPR_PVR_MASK 0xfc1fffff
341 emulate_instruction(struct pt_regs *regs)
349 if (!user_mode(regs))
351 CHECK_FULL_REGS(regs);
353 if (get_user(instword, (u32 __user *)(regs->nip)))
356 /* Emulate the mfspr rD, PVR.
358 if ((instword & INST_MFSPR_PVR_MASK) == INST_MFSPR_PVR) {
359 rd = (instword >> 21) & 0x1f;
360 regs->gpr[rd] = mfspr(PVR);
368 * After we have successfully emulated an instruction, we have to
369 * check if the instruction was being single-stepped, and if so,
370 * pretend we got a single-step exception. This was pointed out
371 * by Kumar Gala. -- paulus
373 static void emulate_single_step(struct pt_regs *regs)
375 if (single_stepping(regs)) {
376 clear_single_step(regs);
377 _exception(SIGTRAP, regs, TRAP_TRACE, 0);
382 * Look through the list of trap instructions that are used for BUG(),
383 * BUG_ON() and WARN_ON() and see if we hit one. At this point we know
384 * that the exception was caused by a trap instruction of some kind.
385 * Returns 1 if we should continue (i.e. it was a WARN_ON) or 0
388 extern struct bug_entry __start___bug_table[], __stop___bug_table[];
390 #ifndef CONFIG_MODULES
391 #define module_find_bug(x) NULL
394 static struct bug_entry *find_bug(unsigned long bugaddr)
396 struct bug_entry *bug;
398 for (bug = __start___bug_table; bug < __stop___bug_table; ++bug)
399 if (bugaddr == bug->bug_addr)
401 return module_find_bug(bugaddr);
405 check_bug_trap(struct pt_regs *regs)
407 struct bug_entry *bug;
410 if (regs->msr & MSR_PR)
411 return 0; /* not in kernel */
412 addr = regs->nip; /* address of trap instruction */
413 if (addr < PAGE_OFFSET)
415 bug = find_bug(regs->nip);
418 if (bug->line & BUG_WARNING_TRAP) {
419 /* this is a WARN_ON rather than BUG/BUG_ON */
421 xmon_printf(KERN_ERR "Badness in %s at %s:%d\n",
422 bug->function, bug->file,
423 bug->line & ~BUG_WARNING_TRAP);
424 #endif /* CONFIG_XMON */
425 printk(KERN_ERR "Badness in %s at %s:%d\n",
426 bug->function, bug->file,
427 bug->line & ~BUG_WARNING_TRAP);
432 xmon_printf(KERN_CRIT "kernel BUG in %s at %s:%d!\n",
433 bug->function, bug->file, bug->line);
435 #endif /* CONFIG_XMON */
436 printk(KERN_CRIT "kernel BUG in %s at %s:%d!\n",
437 bug->function, bug->file, bug->line);
443 ProgramCheckException(struct pt_regs *regs)
445 unsigned int reason = get_reason(regs);
446 extern int do_mathemu(struct pt_regs *regs);
448 #ifdef CONFIG_MATH_EMULATION
449 /* (reason & REASON_ILLEGAL) would be the obvious thing here,
450 * but there seems to be a hardware bug on the 405GP (RevD)
451 * that means ESR is sometimes set incorrectly - either to
452 * ESR_DST (!?) or 0. In the process of chasing this with the
453 * hardware people - not sure if it can happen on any illegal
454 * instruction or only on FP instructions, whether there is a
455 * pattern to occurences etc. -dgibson 31/Mar/2003 */
456 if (!(reason & REASON_TRAP) && do_mathemu(regs) == 0) {
457 emulate_single_step(regs);
460 #endif /* CONFIG_MATH_EMULATION */
462 if (reason & REASON_FP) {
463 /* IEEE FP exception */
467 /* We must make sure the FP state is consistent with
471 if (regs->msr & MSR_FP)
475 fpscr = current->thread.fpscr;
476 fpscr &= fpscr << 22; /* mask summary bits with enables */
477 if (fpscr & FPSCR_VX)
479 else if (fpscr & FPSCR_OX)
481 else if (fpscr & FPSCR_UX)
483 else if (fpscr & FPSCR_ZX)
485 else if (fpscr & FPSCR_XX)
487 _exception(SIGFPE, regs, code, regs->nip);
491 if (reason & REASON_TRAP) {
493 if (debugger_bpt(regs))
495 if (check_bug_trap(regs)) {
499 _exception(SIGTRAP, regs, TRAP_BRKPT, 0);
503 if (reason & REASON_PRIVILEGED) {
504 /* Try to emulate it if we should. */
505 if (emulate_instruction(regs) == 0) {
506 emulate_single_step(regs);
509 _exception(SIGILL, regs, ILL_PRVOPC, regs->nip);
513 _exception(SIGILL, regs, ILL_ILLOPC, regs->nip);
517 SingleStepException(struct pt_regs *regs)
519 regs->msr &= ~MSR_SE; /* Turn off 'trace' bit */
520 if (debugger_sstep(regs))
522 _exception(SIGTRAP, regs, TRAP_TRACE, 0);
526 AlignmentException(struct pt_regs *regs)
530 fixed = fix_alignment(regs);
532 regs->nip += 4; /* skip over emulated instruction */
535 if (fixed == -EFAULT) {
536 /* fixed == -EFAULT means the operand address was bad */
538 _exception(SIGSEGV, regs, SEGV_ACCERR, regs->dar);
540 bad_page_fault(regs, regs->dar, SIGSEGV);
543 _exception(SIGBUS, regs, BUS_ADRALN, regs->dar);
547 StackOverflow(struct pt_regs *regs)
549 printk(KERN_CRIT "Kernel stack overflow in process %p, r1=%lx\n",
550 current, regs->gpr[1]);
553 panic("kernel stack overflow");
556 void nonrecoverable_exception(struct pt_regs *regs)
558 printk(KERN_ERR "Non-recoverable exception at PC=%lx MSR=%lx\n",
559 regs->nip, regs->msr);
561 die("nonrecoverable exception", regs, SIGKILL);
565 trace_syscall(struct pt_regs *regs)
567 printk("Task: %p(%d), PC: %08lX/%08lX, Syscall: %3ld, Result: %s%ld %s\n",
568 current, current->pid, regs->nip, regs->link, regs->gpr[0],
569 regs->ccr&0x10000000?"Error=":"", regs->gpr[3], print_tainted());
574 SoftwareEmulation(struct pt_regs *regs)
576 extern int do_mathemu(struct pt_regs *);
577 extern int Soft_emulate_8xx(struct pt_regs *);
580 CHECK_FULL_REGS(regs);
582 if (!user_mode(regs)) {
584 die("Kernel Mode Software FPU Emulation", regs, SIGFPE);
587 #ifdef CONFIG_MATH_EMULATION
588 errcode = do_mathemu(regs);
590 errcode = Soft_emulate_8xx(regs);
594 _exception(SIGFPE, regs, 0, 0);
595 else if (errcode == -EFAULT)
596 _exception(SIGSEGV, regs, 0, 0);
598 _exception(SIGILL, regs, ILL_ILLOPC, regs->nip);
600 emulate_single_step(regs);
602 #endif /* CONFIG_8xx */
604 #if defined(CONFIG_4xx) || defined(CONFIG_BOOKE)
606 void DebugException(struct pt_regs *regs, unsigned long debug_status)
609 if (debug_status & DBSR_TIE) { /* trap instruction*/
610 if (!user_mode(regs) && debugger_bpt(regs))
612 _exception(SIGTRAP, regs, 0, 0);
616 if (debug_status & DBSR_IC) { /* instruction completion */
617 if (!user_mode(regs) && debugger_sstep(regs))
619 current->thread.dbcr0 &= ~DBCR0_IC;
620 _exception(SIGTRAP, regs, TRAP_TRACE, 0);
623 #endif /* CONFIG_4xx || CONFIG_BOOKE */
625 #if !defined(CONFIG_TAU_INT)
627 TAUException(struct pt_regs *regs)
629 printk("TAU trap at PC: %lx, MSR: %lx, vector=%lx %s\n",
630 regs->nip, regs->msr, regs->trap, print_tainted());
632 #endif /* CONFIG_INT_TAU */
634 void AltivecUnavailException(struct pt_regs *regs)
636 static int kernel_altivec_count;
638 #ifndef CONFIG_ALTIVEC
639 if (user_mode(regs)) {
640 /* A user program has executed an altivec instruction,
641 but this kernel doesn't support altivec. */
642 _exception(SIGILL, regs, ILL_ILLOPC, regs->nip);
646 /* The kernel has executed an altivec instruction without
647 first enabling altivec. Whinge but let it do it. */
648 if (++kernel_altivec_count < 10)
649 printk(KERN_ERR "AltiVec used in kernel (task=%p, pc=%x)\n",
651 regs->msr |= MSR_VEC;
654 #ifdef CONFIG_ALTIVEC
656 AltivecAssistException(struct pt_regs *regs)
661 if (regs->msr & MSR_VEC)
662 giveup_altivec(current);
665 err = emulate_altivec(regs);
667 regs->nip += 4; /* skip emulated instruction */
668 emulate_single_step(regs);
672 if (err == -EFAULT) {
673 /* got an error reading the instruction */
674 _exception(SIGSEGV, regs, SEGV_ACCERR, regs->nip);
676 /* didn't recognize the instruction */
677 /* XXX quick hack for now: set the non-Java bit in the VSCR */
678 printk(KERN_ERR "unrecognized altivec instruction "
679 "in %s at %lx\n", current->comm, regs->nip);
680 current->thread.vscr.u[3] |= 0x10000;
683 #endif /* CONFIG_ALTIVEC */
686 void __init trap_init(void)