2 * arch/ppc/platforms/ebony.h
4 * Ebony board definitions
6 * Matt Porter <mporter@mvista.com>
8 * Copyright 2002 MontaVista Software Inc.
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License as published by the
12 * Free Software Foundation; either version 2 of the License, or (at your
13 * option) any later version.
17 #ifndef __ASM_EBONY_H__
18 #define __ASM_EBONY_H__
20 #include <linux/config.h>
21 #include <platforms/4xx/ibm440gp.h>
23 /* F/W TLB mapping used in bootloader glue to reset EMAC */
24 #define PPC44x_EMAC0_MR0 0xE0000800
26 /* Macros to get at Ebony VPD info */
27 #define EBONY_VPD_BASE 0x00000001fffffe00ULL
28 #define EBONY_VPD_SIZE 0x24
29 #define EBONY_NA0_OFFSET 0x0c
30 #define EBONY_NA1_OFFSET 0x18
31 #define EBONY_NA0_ADDR(base) (base + EBONY_NA0_OFFSET)
32 #define EBONY_NA1_ADDR(base) (base + EBONY_NA1_OFFSET)
34 /* Default clock rates for Rev. B and Rev. C silicon */
35 #define EBONY_440GP_RB_SYSCLK 33000000
36 #define EBONY_440GP_RC_SYSCLK 400000000
38 /* RTC/NVRAM location */
39 #define EBONY_RTC_ADDR 0x0000000148000000ULL
40 #define EBONY_RTC_SIZE 0x2000
43 #define EBONY_FPGA_ADDR 0x0000000148300000
44 #define EBONY_BOOT_SMALL_FLASH(x) (x & 0x20)
45 #define EBONY_ONBRD_FLASH_EN(x) (x & 0x02)
46 #define EBONY_FLASH_SEL(x) (x & 0x01)
47 #define EBONY_SMALL_FLASH_LOW1 0x00000001ff800000
48 #define EBONY_SMALL_FLASH_LOW2 0x00000001ff880000
49 #define EBONY_SMALL_FLASH_HIGH1 0x00000001fff00000
50 #define EBONY_SMALL_FLASH_HIGH2 0x00000001fff80000
51 #define EBONY_SMALL_FLASH_SIZE 0x80000
52 #define EBONY_LARGE_FLASH_LOW 0x00000001ff800000
53 #define EBONY_LARGE_FLASH_HIGH 0x00000001ffc00000
54 #define EBONY_LARGE_FLASH_SIZE 0x400000
56 #define EBONY_SMALL_FLASH_BASE 0x00000001fff80000
57 #define EBONY_LARGE_FLASH_BASE 0x00000001ff800000
63 /* OpenBIOS defined UART mappings, used before early_serial_setup */
64 #define UART0_IO_BASE (u8 *) 0xE0000200
65 #define UART1_IO_BASE (u8 *) 0xE0000300
67 #define BASE_BAUD 33000000/3/16
69 #define STD_UART_OP(num) \
70 { 0, BASE_BAUD, 0, UART##num##_INT, \
71 (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST), \
72 iomem_base: UART##num##_IO_BASE, \
73 io_type: SERIAL_IO_MEM},
75 #define SERIAL_PORT_DFNS \
80 #define EBONY_PCI_LOWER_IO 0x00000000
81 #define EBONY_PCI_UPPER_IO 0x0000ffff
82 #define EBONY_PCI_LOWER_MEM 0x80002000
83 #define EBONY_PCI_UPPER_MEM 0xffffefff
85 #define EBONY_PCI_CFGREGS_BASE 0x000000020ec00000
86 #define EBONY_PCI_CFGA_PLB32 0x0ec00000
87 #define EBONY_PCI_CFGD_PLB32 0x0ec00004
89 #define EBONY_PCI_IO_BASE 0x0000000208000000ULL
90 #define EBONY_PCI_IO_SIZE 0x00010000
91 #define EBONY_PCI_MEM_OFFSET 0x00000000
93 #endif /* __ASM_EBONY_H__ */
94 #endif /* __KERNEL__ */