2 * arch/ppc/platforms/ibm405ep.c
4 * Support for IBM PPC 405EP processors.
6 * Author: SAW (IBM), derived from ibmnp405l.c.
7 * Maintained by MontaVista Software <source@mvista.com>
9 * 2003 (c) MontaVista Softare Inc. This file is licensed under the
10 * terms of the GNU General Public License version 2. This program is
11 * licensed "as is" without any warranty of any kind, whether express
15 #include <linux/config.h>
16 #include <linux/init.h>
17 #include <linux/smp.h>
18 #include <linux/threads.h>
19 #include <linux/param.h>
20 #include <linux/string.h>
22 #include <asm/ibm4xx.h>
25 #include <platforms/4xx/ibm405ep.h>
27 static struct ocp_func_mal_data ibm405ep_mal0_def = {
28 .num_tx_chans = 4, /* Number of TX channels */
29 .num_rx_chans = 2, /* Number of RX channels */
30 .txeob_irq = 11, /* TX End Of Buffer IRQ */
31 .rxeob_irq = 12, /* RX End Of Buffer IRQ */
32 .txde_irq = 13, /* TX Descriptor Error IRQ */
33 .rxde_irq = 14, /* RX Descriptor Error IRQ */
34 .serr_irq = 10, /* MAL System Error IRQ */
38 static struct ocp_func_emac_data ibm405ep_emac0_def = {
39 .rgmii_idx = -1, /* No RGMII */
40 .rgmii_mux = -1, /* No RGMII */
41 .zmii_idx = -1, /* ZMII device index */
42 .zmii_mux = 0, /* ZMII input of this EMAC */
43 .mal_idx = 0, /* MAL device index */
44 .mal_rx_chan = 0, /* MAL rx channel number */
45 .mal_tx_chan = 0, /* MAL tx channel number */
46 .wol_irq = 9, /* WOL interrupt number */
47 .mdio_idx = 0, /* MDIO via EMAC0 */
48 .tah_idx = -1, /* No TAH */
51 static struct ocp_func_emac_data ibm405ep_emac1_def = {
52 .rgmii_idx = -1, /* No RGMII */
53 .rgmii_mux = -1, /* No RGMII */
54 .zmii_idx = -1, /* ZMII device index */
55 .zmii_mux = 0, /* ZMII input of this EMAC */
56 .mal_idx = 0, /* MAL device index */
57 .mal_rx_chan = 1, /* MAL rx channel number */
58 .mal_tx_chan = 2, /* MAL tx channel number */
59 .wol_irq = 9, /* WOL interrupt number */
60 .mdio_idx = 0, /* MDIO via EMAC0 */
61 .tah_idx = -1, /* No TAH */
65 static struct ocp_func_iic_data ibm405ep_iic0_def = {
66 .fast_mode = 0, /* Use standad mode (100Khz) */
70 struct ocp_def core_ocp[] = {
71 { .vendor = OCP_VENDOR_IBM,
72 .function = OCP_FUNC_OPB,
78 { .vendor = OCP_VENDOR_IBM,
79 .function = OCP_FUNC_16550,
81 .paddr = UART0_IO_BASE,
85 { .vendor = OCP_VENDOR_IBM,
86 .function = OCP_FUNC_16550,
88 .paddr = UART1_IO_BASE,
92 { .vendor = OCP_VENDOR_IBM,
93 .function = OCP_FUNC_IIC,
97 .additions = &ibm405ep_iic0_def,
98 .show = &ocp_show_iic_data
100 { .vendor = OCP_VENDOR_IBM,
101 .function = OCP_FUNC_GPIO,
106 { .vendor = OCP_VENDOR_IBM,
107 .function = OCP_FUNC_MAL,
108 .paddr = OCP_PADDR_NA,
111 .additions = &ibm405ep_mal0_def,
112 .show = &ocp_show_mal_data
114 { .vendor = OCP_VENDOR_IBM,
115 .function = OCP_FUNC_EMAC,
120 .additions = &ibm405ep_emac0_def,
121 .show = &ocp_show_emac_data
123 { .vendor = OCP_VENDOR_IBM,
124 .function = OCP_FUNC_EMAC,
129 .additions = &ibm405ep_emac1_def,
130 .show = &ocp_show_emac_data
132 { .vendor = OCP_VENDOR_INVALID