2 * arch/ppc/platforms/4xx/ibm440gp.h
6 * Roland Dreier <roland@digitalvampire.org>
8 * Copyright 2002 Roland Dreier
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License as published by the
12 * Free Software Foundation; either version 2 of the License, or (at your
13 * option) any later version.
15 * This file contains code that was originally in the files ibm44x.h
16 * and ebony.h, which were written by Matt Porter of MontaVista Software Inc.
20 #ifndef __PPC_PLATFORMS_IBM440GP_H
21 #define __PPC_PLATFORMS_IBM440GP_H
23 #include <linux/config.h>
34 #define PPC440GP_UART0_ADDR 0x0000000140000200ULL
35 #define PPC440GP_UART1_ADDR 0x0000000140000300ULL
38 #define PPC440GP_EMAC0_ADDR 0x0000000140000800ULL
39 #define PPC440GP_EMAC1_ADDR 0x0000000140000900ULL
40 #define PPC440GP_EMAC_SIZE 0x70
43 #define BL_MAC_WOL 61 /* WOL */
44 #define BL_MAC_WOL1 63 /* WOL */
45 #define BL_MAL_SERR 32 /* MAL SERR */
46 #define BL_MAL_TXDE 33 /* MAL TXDE */
47 #define BL_MAL_RXDE 34 /* MAL RXDE */
48 #define BL_MAL_TXEOB 10 /* MAL TX EOB */
49 #define BL_MAL_RXEOB 11 /* MAL RX EOB */
50 #define BL_MAC_ETH0 60 /* MAC */
51 #define BL_MAC_ETH1 62 /* MAC */
54 #define PPC440GP_ZMII_ADDR 0x0000000140000780ULL
55 #define PPC440GP_ZMII_SIZE 0x0c
58 #define PPC440GP_IIC0_ADDR 0x40000400
59 #define PPC440GP_IIC1_ADDR 0x40000500
62 #define PPC440GP_GPIO0_ADDR 0x0000000140000700ULL
64 /* Clock and Power Management */
65 #define IBM_CPM_IIC0 0x80000000 /* IIC interface */
66 #define IBM_CPM_IIC1 0x40000000 /* IIC interface */
67 #define IBM_CPM_PCI 0x20000000 /* PCI bridge */
68 #define IBM_CPM_CPU 0x02000000 /* processor core */
69 #define IBM_CPM_DMA 0x01000000 /* DMA controller */
70 #define IBM_CPM_BGO 0x00800000 /* PLB to OPB bus arbiter */
71 #define IBM_CPM_BGI 0x00400000 /* OPB to PLB bridge */
72 #define IBM_CPM_EBC 0x00200000 /* External Bux Controller */
73 #define IBM_CPM_EBM 0x00100000 /* Ext Bus Master Interface */
74 #define IBM_CPM_DMC 0x00080000 /* SDRAM peripheral controller */
75 #define IBM_CPM_PLB 0x00040000 /* PLB bus arbiter */
76 #define IBM_CPM_SRAM 0x00020000 /* SRAM memory controller */
77 #define IBM_CPM_PPM 0x00002000 /* PLB Performance Monitor */
78 #define IBM_CPM_UIC1 0x00001000 /* Universal Interrupt Controller */
79 #define IBM_CPM_GPIO0 0x00000800 /* General Purpose IO (??) */
80 #define IBM_CPM_GPT 0x00000400 /* General Purpose Timers */
81 #define IBM_CPM_UART0 0x00000200 /* serial port 0 */
82 #define IBM_CPM_UART1 0x00000100 /* serial port 1 */
83 #define IBM_CPM_UIC0 0x00000080 /* Universal Interrupt Controller */
84 #define IBM_CPM_TMRCLK 0x00000040 /* CPU timers */
86 #define DFLT_IBM4xx_PM ~(IBM_CPM_UIC | IBM_CPM_UIC1 | IBM_CPM_CPU \
87 | IBM_CPM_EBC | IBM_CPM_SRAM | IBM_CPM_BGO \
88 | IBM_CPM_EBM | IBM_CPM_PLB | IBM_CPM_OPB \
89 | IBM_CPM_TMRCLK | IBM_CPM_DMA | IBM_CPM_PCI)
91 #define PPC440GP_OPB_BASE_START 0x0000000140000000ULL
96 #define RS_TABLE_SIZE 2
98 #include <asm/ibm44x.h>
99 #include <syslib/ibm440gp_common.h>
101 #endif /* __PPC_PLATFORMS_IBM440GP_H */
102 #endif /* __KERNEL__ */