This commit was manufactured by cvs2svn to create branch 'vserver'.
[linux-2.6.git] / arch / ppc / platforms / 85xx / mpc8540.c
1 /*
2  * arch/ppc/platforms/85xx/mpc8540.c
3  *
4  * MPC8540 I/O descriptions
5  *
6  * Maintainer: Kumar Gala <kumar.gala@freescale.com>
7  *
8  * Copyright 2004 Freescale Semiconductor Inc.
9  *
10  * This program is free software; you can redistribute  it and/or modify it
11  * under  the terms of  the GNU General  Public License as published by the
12  * Free Software Foundation;  either version 2 of the  License, or (at your
13  * option) any later version.
14  */
15
16 #include <linux/init.h>
17 #include <linux/module.h>
18 #include <asm/mpc85xx.h>
19 #include <asm/ocp.h>
20
21 /* These should be defined in platform code */
22 extern struct ocp_gfar_data mpc85xx_tsec1_def;
23 extern struct ocp_gfar_data mpc85xx_tsec2_def;
24 extern struct ocp_gfar_data mpc85xx_fec_def;
25 extern struct ocp_mpc_i2c_data mpc85xx_i2c1_def;
26
27 /* We use offsets for paddr since we do not know at compile time
28  * what CCSRBAR is, platform code should fix this up in
29  * setup_arch
30  *
31  * Only the first IRQ is given even if a device has
32  * multiple lines associated with ita
33  */
34 struct ocp_def core_ocp[] = {
35         { .vendor       = OCP_VENDOR_FREESCALE,
36           .function     = OCP_FUNC_IIC,
37           .index        = 0,
38           .paddr        = MPC85xx_IIC1_OFFSET,
39           .irq          = MPC85xx_IRQ_IIC1,
40           .pm           = OCP_CPM_NA,
41           .additions    = &mpc85xx_i2c1_def,
42         },
43         { .vendor       = OCP_VENDOR_FREESCALE,
44           .function     = OCP_FUNC_16550,
45           .index        = 0,
46           .paddr        = MPC85xx_UART0_OFFSET,
47           .irq          = MPC85xx_IRQ_DUART,
48           .pm           = OCP_CPM_NA,
49         },
50         { .vendor       = OCP_VENDOR_FREESCALE,
51           .function     = OCP_FUNC_16550,
52           .index        = 1,
53           .paddr        = MPC85xx_UART1_OFFSET,
54           .irq          = MPC85xx_IRQ_DUART,
55           .pm           = OCP_CPM_NA,
56         },
57         { .vendor       = OCP_VENDOR_FREESCALE,
58           .function     = OCP_FUNC_GFAR,
59           .index        = 0,
60           .paddr        = MPC85xx_ENET1_OFFSET,
61           .irq          = MPC85xx_IRQ_TSEC1_TX,
62           .pm           = OCP_CPM_NA,
63           .additions    = &mpc85xx_tsec1_def,
64         },
65         { .vendor       = OCP_VENDOR_FREESCALE,
66           .function     = OCP_FUNC_GFAR,
67           .index        = 1,
68           .paddr        = MPC85xx_ENET2_OFFSET,
69           .irq          = MPC85xx_IRQ_TSEC2_TX,
70           .pm           = OCP_CPM_NA,
71           .additions    = &mpc85xx_tsec2_def,
72         },
73         { .vendor       = OCP_VENDOR_FREESCALE,
74           .function     = OCP_FUNC_GFAR,
75           .index        = 2,
76           .paddr        = MPC85xx_ENET3_OFFSET,
77           .irq          = MPC85xx_IRQ_FEC,
78           .pm           = OCP_CPM_NA,
79           .additions    = &mpc85xx_fec_def,
80         },
81         { .vendor       = OCP_VENDOR_FREESCALE,
82           .function     = OCP_FUNC_DMA,
83           .index        = 0,
84           .paddr        = MPC85xx_DMA_OFFSET,
85           .irq          = MPC85xx_IRQ_DMA0,
86           .pm           = OCP_CPM_NA,
87         },
88         { .vendor       = OCP_VENDOR_FREESCALE,
89           .function     = OCP_FUNC_PERFMON,
90           .index        = 0,
91           .paddr        = MPC85xx_PERFMON_OFFSET,
92           .irq          = MPC85xx_IRQ_PERFMON,
93           .pm           = OCP_CPM_NA,
94         },
95         { .vendor       = OCP_VENDOR_INVALID
96         }
97 };