arch/ppc/platforms/85xx/mpc8555.c

   1 /*
   2  * arch/ppc/platform/85xx/mpc8555.c
   3  *
   4  * MPC8555 I/O descriptions
   5  *
   6  * Maintainer: Kumar Gala <kumar.gala@freescale.com>
   7  *
   8  * Copyright 2004 Freescale Semiconductor Inc.
   9  *
  10  * This program is free software; you can redistribute  it and/or modify it
  11  * under  the terms of  the GNU General  Public License as published by the
  12  * Free Software Foundation;  either version 2 of the  License, or (at your
  13  * option) any later version.
  14  */
  15
  16 #include <linux/init.h>
  17 #include <linux/module.h>
  18 #include <asm/mpc85xx.h>
  19 #include <asm/ocp.h>
  20
  21 /* These should be defined in platform code */
  22 extern struct ocp_gfar_data mpc85xx_tsec1_def;
  23 extern struct ocp_gfar_data mpc85xx_tsec2_def;
  24 extern struct ocp_mpc_i2c_data mpc85xx_i2c1_def;
  25
  26 /* We use offsets for paddr since we do not know at compile time
  27  * what CCSRBAR is, platform code should fix this up in
  28  * setup_arch
  29  *
  30  * Only the first IRQ is given even if a device has
  31  * multiple lines associated with ita
  32  */
  33 struct ocp_def core_ocp[] = {
  34         { .vendor       = OCP_VENDOR_FREESCALE,
  35           .function     = OCP_FUNC_IIC,
  36           .index        = 0,
  37           .paddr        = MPC85xx_IIC1_OFFSET,
  38           .irq          = MPC85xx_IRQ_IIC1,
  39           .pm           = OCP_CPM_NA,
  40           .additions    = &mpc85xx_i2c1_def,
  41         },
  42         { .vendor       = OCP_VENDOR_FREESCALE,
  43           .function     = OCP_FUNC_16550,
  44           .index        = 0,
  45           .paddr        = MPC85xx_UART0_OFFSET,
  46           .irq          = MPC85xx_IRQ_DUART,
  47           .pm           = OCP_CPM_NA,
  48         },
  49         { .vendor       = OCP_VENDOR_FREESCALE,
  50           .function     = OCP_FUNC_16550,
  51           .index        = 1,
  52           .paddr        = MPC85xx_UART1_OFFSET,
  53           .irq          = MPC85xx_IRQ_DUART,
  54           .pm           = OCP_CPM_NA,
  55         },
  56         { .vendor       = OCP_VENDOR_FREESCALE,
  57           .function     = OCP_FUNC_GFAR,
  58           .index        = 0,
  59           .paddr        = MPC85xx_ENET1_OFFSET,
  60           .irq          = MPC85xx_IRQ_TSEC1_TX,
  61           .pm           = OCP_CPM_NA,
  62           .additions    = &mpc85xx_tsec1_def,
  63         },
  64         { .vendor       = OCP_VENDOR_FREESCALE,
  65           .function     = OCP_FUNC_GFAR,
  66           .index        = 1,
  67           .paddr        = MPC85xx_ENET2_OFFSET,
  68           .irq          = MPC85xx_IRQ_TSEC2_TX,
  69           .pm           = OCP_CPM_NA,
  70           .additions    = &mpc85xx_tsec2_def,
  71         },
  72         { .vendor       = OCP_VENDOR_FREESCALE,
  73           .function     = OCP_FUNC_DMA,
  74           .index        = 0,
  75           .paddr        = MPC85xx_DMA_OFFSET,
  76           .irq          = MPC85xx_IRQ_DMA0,
  77           .pm           = OCP_CPM_NA,
  78         },
  79         { .vendor       = OCP_VENDOR_FREESCALE,
  80           .function     = OCP_FUNC_PERFMON,
  81           .index        = 0,
  82           .paddr        = MPC85xx_PERFMON_OFFSET,
  83           .irq          = MPC85xx_IRQ_PERFMON,
  84           .pm           = OCP_CPM_NA,
  85         },
  86         { .vendor       = OCP_VENDOR_INVALID
  87         }
  88 };