arch/ppc/platforms/lopec_setup.c

   1 /*
   2  * arch/ppc/platforms/lopec_setup.c
   3  *
   4  * Setup routines for the Motorola LoPEC.
   5  *
   6  * Author: Dan Cox
   7  *         danc@mvista.com
   8  *
   9  * 2001-2002 (c) MontaVista, Software, Inc.  This file is licensed under
  10  * the terms of the GNU General Public License version 2.  This program
  11  * is licensed "as is" without any warranty of any kind, whether express
  12  * or implied.
  13  */
  14
  15 #include <linux/config.h>
  16 #include <linux/types.h>
  17 #include <linux/delay.h>
  18 #include <linux/pci_ids.h>
  19 #include <linux/ioport.h>
  20 #include <linux/init.h>
  21 #include <linux/ide.h>
  22 #include <linux/seq_file.h>
  23 #include <linux/initrd.h>
  24 #include <linux/console.h>
  25 #include <linux/root_dev.h>
  26
  27 #include <asm/io.h>
  28 #include <asm/open_pic.h>
  29 #include <asm/i8259.h>
  30 #include <asm/todc.h>
  31 #include <asm/bootinfo.h>
  32 #include <asm/mpc10x.h>
  33 #include <asm/hw_irq.h>
  34 #include <asm/prep_nvram.h>
  35
  36 extern char saved_command_line[];
  37 extern void lopec_find_bridges(void);
  38
  39 /*
  40  * Define all of the IRQ senses and polarities.  Taken from the
  41  * LoPEC Programmer's Reference Guide.
  42  */
  43 static u_char lopec_openpic_initsenses[16] __initdata = {
  44         (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),      /* IRQ 0 */
  45         (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),      /* IRQ 1 */
  46         (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),      /* IRQ 2 */
  47         (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),      /* IRQ 3 */
  48         (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),      /* IRQ 4 */
  49         (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),      /* IRQ 5 */
  50         (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),      /* IRQ 6 */
  51         (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),      /* IRQ 7 */
  52         (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),      /* IRQ 8 */
  53         (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),      /* IRQ 9 */
  54         (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),      /* IRQ 10 */
  55         (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),      /* IRQ 11 */
  56         (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),      /* IRQ 12 */
  57         (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),      /* IRQ 13 */
  58         (IRQ_SENSE_EDGE | IRQ_POLARITY_NEGATIVE),       /* IRQ 14 */
  59         (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE)       /* IRQ 15 */
  60 };
  61
  62 static int
  63 lopec_show_cpuinfo(struct seq_file *m)
  64 {
  65         seq_printf(m, "machine\t\t: Motorola LoPEC\n");
  66         return 0;
  67 }
  68
  69 static u32
  70 lopec_irq_canonicalize(u32 irq)
  71 {
  72         if (irq == 2)
  73                 return 9;
  74         else
  75                 return irq;
  76 }
  77
  78 static void
  79 lopec_restart(char *cmd)
  80 {
  81 #define LOPEC_SYSSTAT1 0xffe00000
  82         /* force a hard reset, if possible */
  83         unsigned char reg = *((unsigned char *) LOPEC_SYSSTAT1);
  84         reg |= 0x80;
  85         *((unsigned char *) LOPEC_SYSSTAT1) = reg;
  86
  87         local_irq_disable();
  88         while(1);
  89 #undef LOPEC_SYSSTAT1
  90 }
  91
  92 static void
  93 lopec_halt(void)
  94 {
  95         local_irq_disable();
  96         while(1);
  97 }
  98
  99 static void
 100 lopec_power_off(void)
 101 {
 102         lopec_halt();
 103 }
 104
 105 #if defined(CONFIG_BLK_DEV_IDE) || defined(CONFIG_BLK_DEV_IDE_MODULE)
 106 int lopec_ide_ports_known = 0;
 107 static unsigned long lopec_ide_regbase[MAX_HWIFS];
 108 static unsigned long lopec_ide_ctl_regbase[MAX_HWIFS];
 109 static unsigned long lopec_idedma_regbase;
 110
 111 static void
 112 lopec_ide_probe(void)
 113 {
 114         struct pci_dev *dev = pci_find_device(PCI_VENDOR_ID_WINBOND,
 115                                               PCI_DEVICE_ID_WINBOND_82C105,
 116                                               NULL);
 117         lopec_ide_ports_known = 1;
 118
 119         if (dev) {
 120                 lopec_ide_regbase[0] = dev->resource[0].start;
 121                 lopec_ide_regbase[1] = dev->resource[2].start;
 122                 lopec_ide_ctl_regbase[0] = dev->resource[1].start;
 123                 lopec_ide_ctl_regbase[1] = dev->resource[3].start;
 124                 lopec_idedma_regbase = dev->resource[4].start;
 125         }
 126 }
 127
 128 static int
 129 lopec_ide_default_irq(unsigned long base)
 130 {
 131         if (lopec_ide_ports_known == 0)
 132                 lopec_ide_probe();
 133
 134         if (base == lopec_ide_regbase[0])
 135                 return 14;
 136         else if (base == lopec_ide_regbase[1])
 137                 return 15;
 138         else
 139                 return 0;
 140 }
 141
 142 static unsigned long
 143 lopec_ide_default_io_base(int index)
 144 {
 145         if (lopec_ide_ports_known == 0)
 146                 lopec_ide_probe();
 147         return lopec_ide_regbase[index];
 148 }
 149
 150 static void __init
 151 lopec_ide_init_hwif_ports(hw_regs_t *hw, unsigned long data,
 152                           unsigned long ctl, int *irq)
 153 {
 154         unsigned long reg = data;
 155         uint alt_status_base;
 156         int i;
 157
 158         for(i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++)
 159                 hw->io_ports[i] = reg++;
 160
 161         if (data == lopec_ide_regbase[0]) {
 162                 alt_status_base = lopec_ide_ctl_regbase[0] + 2;
 163                 hw->irq = 14;
 164         }
 165         else if (data == lopec_ide_regbase[1]) {
 166                 alt_status_base = lopec_ide_ctl_regbase[1] + 2;
 167                 hw->irq = 15;
 168         }
 169         else {
 170                 alt_status_base = 0;
 171                 hw->irq = 0;
 172         }
 173
 174         if (ctl)
 175                 hw->io_ports[IDE_CONTROL_OFFSET] = ctl;
 176         else
 177                 hw->io_ports[IDE_CONTROL_OFFSET] = alt_status_base;
 178
 179         if (irq != NULL)
 180                 *irq = hw->irq;
 181
 182 }
 183 #endif /* BLK_DEV_IDE */
 184
 185 static void __init
 186 lopec_init_IRQ(void)
 187 {
 188         int i;
 189
 190         /*
 191          * Provide the open_pic code with the correct table of interrupts.
 192          */
 193         OpenPIC_InitSenses = lopec_openpic_initsenses;
 194         OpenPIC_NumInitSenses = sizeof(lopec_openpic_initsenses);
 195
 196         /*
 197          * We need to tell openpic_set_sources where things actually are.
 198          * mpc10x_common will setup OpenPIC_Addr at ioremap(EUMB phys base +
 199          * EPIC offset (0x40000));  The EPIC IRQ Register Address Map -
 200          * Interrupt Source Configuration Registers gives these numbers
 201          * as offsets starting at 0x50200, we need to adjust occordinly.
 202          */
 203         /* Map serial interrupts 0-15 */
 204         openpic_set_sources(0, 16, OpenPIC_Addr + 0x10200);
 205         /* Skip reserved space and map i2c and DMA Ch[01] */
 206         openpic_set_sources(16, 3, OpenPIC_Addr + 0x11020);
 207         /* Skip reserved space and map Message Unit Interrupt (I2O) */
 208         openpic_set_sources(19, 1, OpenPIC_Addr + 0x110C0);
 209
 210         openpic_init(NUM_8259_INTERRUPTS);
 211         /* We have a cascade on OpenPIC IRQ 0, Linux IRQ 16 */
 212         openpic_hookup_cascade(NUM_8259_INTERRUPTS, "82c59 cascade",
 213                         &i8259_irq);
 214
 215         /* Map i8259 interrupts */
 216         for(i = 0; i < NUM_8259_INTERRUPTS; i++)
 217                 irq_desc[i].handler = &i8259_pic;
 218
 219         /*
 220          * The EPIC allows for a read in the range of 0xFEF00000 ->
 221          * 0xFEFFFFFF to generate a PCI interrupt-acknowledge transaction.
 222          */
 223         i8259_init(0xfef00000);
 224 }
 225
 226 static int __init
 227 lopec_request_io(void)
 228 {
 229         outb(0x00, 0x4d0);
 230         outb(0xc0, 0x4d1);
 231
 232         request_region(0x00, 0x20, "dma1");
 233         request_region(0x20, 0x20, "pic1");
 234         request_region(0x40, 0x20, "timer");
 235         request_region(0x80, 0x10, "dma page reg");
 236         request_region(0xa0, 0x20, "pic2");
 237         request_region(0xc0, 0x20, "dma2");
 238
 239         return 0;
 240 }
 241
 242 device_initcall(lopec_request_io);
 243
 244 static void __init
 245 lopec_map_io(void)
 246 {
 247         io_block_mapping(0xf0000000, 0xf0000000, 0x10000000, _PAGE_IO);
 248         io_block_mapping(0xb0000000, 0xb0000000, 0x10000000, _PAGE_IO);
 249 }
 250
 251 static void __init
 252 lopec_set_bat(void)
 253 {
 254         unsigned long batu, batl;
 255
 256         __asm__ __volatile__(
 257                 "lis %0,0xf800\n \
 258                  ori %1,%0,0x002a\n \
 259                  ori %0,%0,0x0ffe\n \
 260                  mtspr 0x21e,%0\n \
 261                  mtspr 0x21f,%1\n \
 262                  isync\n \
 263                  sync "
 264                 : "=r" (batu), "=r" (batl));
 265 }
 266
 267 #ifdef  CONFIG_SERIAL_TEXT_DEBUG
 268 #include <linux/serial.h>
 269 #include <linux/serialP.h>
 270 #include <linux/serial_reg.h>
 271 #include <asm/serial.h>
 272
 273 static struct serial_state rs_table[RS_TABLE_SIZE] = {
 274         SERIAL_PORT_DFNS        /* Defined in <asm/serial.h> */
 275 };
 276
 277 volatile unsigned char *com_port;
 278 volatile unsigned char *com_port_lsr;
 279
 280 static void
 281 serial_writechar(char c)
 282 {
 283         while ((*com_port_lsr & UART_LSR_THRE) == 0)
 284                 ;
 285         *com_port = c;
 286 }
 287
 288 void
 289 lopec_progress(char *s, unsigned short hex)
 290 {
 291         volatile char c;
 292
 293         com_port = (volatile unsigned char *) rs_table[0].port;
 294         com_port_lsr = com_port + UART_LSR;
 295
 296         while ((c = *s++) != 0)
 297                 serial_writechar(c);
 298
 299         /* Most messages don't have a newline in them */
 300         serial_writechar('\n');
 301         serial_writechar('\r');
 302 }
 303 #endif  /* CONFIG_SERIAL_TEXT_DEBUG */
 304
 305 TODC_ALLOC();
 306
 307 static void __init
 308 lopec_setup_arch(void)
 309 {
 310
 311         TODC_INIT(TODC_TYPE_MK48T37, 0, 0,
 312                   ioremap(0xffe80000, 0x8000), 8);
 313
 314         loops_per_jiffy = 100000000/HZ;
 315
 316         lopec_find_bridges();
 317
 318 #ifdef CONFIG_BLK_DEV_INITRD
 319         if (initrd_start)
 320                 ROOT_DEV = Root_RAM0;
 321         else
 322 #elif defined(CONFIG_ROOT_NFS)
 323                 ROOT_DEV = Root_NFS;
 324 #elif defined(CONFIG_BLK_DEV_IDE) || defined(CONFIG_BLK_DEV_IDE_MODULE)
 325                 ROOT_DEV = Root_HDA1;
 326 #else
 327                 ROOT_DEV = Root_SDA1;
 328 #endif
 329
 330 #ifdef CONFIG_VT
 331         conswitchp = &dummy_con;
 332 #endif
 333 #ifdef CONFIG_PPCBUG_NVRAM
 334         /* Read in NVRAM data */
 335         init_prep_nvram();
 336
 337         /* if no bootargs, look in NVRAM */
 338         if ( cmd_line[0] == '\0' ) {
 339                 char *bootargs;
 340                  bootargs = prep_nvram_get_var("bootargs");
 341                  if (bootargs != NULL) {
 342                          strcpy(cmd_line, bootargs);
 343                          /* again.. */
 344                          strcpy(saved_command_line, cmd_line);
 345                 }
 346         }
 347 #endif
 348 }
 349
 350 void __init
 351 platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
 352               unsigned long r6, unsigned long r7)
 353 {
 354         parse_bootinfo(find_bootinfo());
 355         lopec_set_bat();
 356
 357         isa_io_base = MPC10X_MAPB_ISA_IO_BASE;
 358         isa_mem_base = MPC10X_MAPB_ISA_MEM_BASE;
 359         pci_dram_offset = MPC10X_MAPB_DRAM_OFFSET;
 360         ISA_DMA_THRESHOLD = 0x00ffffff;
 361         DMA_MODE_READ = 0x44;
 362         DMA_MODE_WRITE = 0x48;
 363
 364         ppc_md.setup_arch = lopec_setup_arch;
 365         ppc_md.show_cpuinfo = lopec_show_cpuinfo;
 366         ppc_md.irq_canonicalize = lopec_irq_canonicalize;
 367         ppc_md.init_IRQ = lopec_init_IRQ;
 368         ppc_md.get_irq = openpic_get_irq;
 369
 370         ppc_md.restart = lopec_restart;
 371         ppc_md.power_off = lopec_power_off;
 372         ppc_md.halt = lopec_halt;
 373
 374         ppc_md.setup_io_mappings = lopec_map_io;
 375
 376         ppc_md.time_init = todc_time_init;
 377         ppc_md.set_rtc_time = todc_set_rtc_time;
 378         ppc_md.get_rtc_time = todc_get_rtc_time;
 379         ppc_md.calibrate_decr = todc_calibrate_decr;
 380
 381         ppc_md.nvram_read_val = todc_direct_read_val;
 382         ppc_md.nvram_write_val = todc_direct_write_val;
 383
 384 #if defined(CONFIG_BLK_DEV_IDE) || defined(CONFIG_BLK_DEV_IDE_MODULE)
 385         ppc_ide_md.default_irq = lopec_ide_default_irq;
 386         ppc_ide_md.default_io_base = lopec_ide_default_io_base;
 387         ppc_ide_md.ide_init_hwif = lopec_ide_init_hwif_ports;
 388 #endif
 389 #ifdef CONFIG_SERIAL_TEXT_DEBUG
 390         ppc_md.progress = lopec_progress;
 391 #endif
 392 }