4 * Copyright (C) 2001 Dave Engebretsen, IBM Corporation
5 * Copyright (C) 2003 Anton Blanchard <anton@au.ibm.com>, IBM
7 * pSeries specific routines for PCI.
9 * Based on code from pci.c and chrp_pci.c
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
26 #include <linux/kernel.h>
27 #include <linux/threads.h>
28 #include <linux/pci.h>
29 #include <linux/delay.h>
30 #include <linux/string.h>
31 #include <linux/init.h>
32 #include <linux/bootmem.h>
35 #include <asm/pgtable.h>
38 #include <asm/machdep.h>
39 #include <asm/pci-bridge.h>
40 #include <asm/ppcdebug.h>
42 #include <asm/iommu.h>
48 /* legal IO pages under MAX_ISA_PORT. This is to ensure we don't touch
49 devices we don't have access to. */
50 unsigned long io_page_mask;
52 EXPORT_SYMBOL(io_page_mask);
55 static int read_pci_config;
56 static int write_pci_config;
57 static int ibm_read_pci_config;
58 static int ibm_write_pci_config;
60 static int s7a_workaround;
62 extern unsigned long pci_probe_only;
64 static int rtas_read_config(struct device_node *dn, int where, int size, u32 *val)
67 unsigned long buid, addr;
73 addr = (dn->busno << 16) | (dn->devfn << 8) | where;
76 ret = rtas_call(ibm_read_pci_config, 4, 2, &returnval,
77 addr, buid >> 32, buid & 0xffffffff, size);
79 ret = rtas_call(read_pci_config, 2, 2, &returnval, addr, size);
85 static int rtas_pci_read_config(struct pci_bus *bus,
87 int where, int size, u32 *val)
89 struct device_node *busdn, *dn;
92 busdn = pci_device_to_OF_node(bus->self);
94 busdn = bus->sysdata; /* must be a phb */
96 /* Search only direct children of the bus */
97 for (dn = busdn->child; dn; dn = dn->sibling)
98 if (dn->devfn == devfn)
99 return rtas_read_config(dn, where, size, val);
100 return PCIBIOS_DEVICE_NOT_FOUND;
103 static int rtas_write_config(struct device_node *dn, int where, int size, u32 val)
105 unsigned long buid, addr;
111 addr = (dn->busno << 16) | (dn->devfn << 8) | where;
112 buid = dn->phb->buid;
114 ret = rtas_call(ibm_write_pci_config, 5, 1, NULL, addr, buid >> 32, buid & 0xffffffff, size, (ulong) val);
116 ret = rtas_call(write_pci_config, 3, 1, NULL, addr, size, (ulong)val);
121 static int rtas_pci_write_config(struct pci_bus *bus,
123 int where, int size, u32 val)
125 struct device_node *busdn, *dn;
128 busdn = pci_device_to_OF_node(bus->self);
130 busdn = bus->sysdata; /* must be a phb */
132 /* Search only direct children of the bus */
133 for (dn = busdn->child; dn; dn = dn->sibling)
134 if (dn->devfn == devfn)
135 return rtas_write_config(dn, where, size, val);
136 return PCIBIOS_DEVICE_NOT_FOUND;
139 struct pci_ops rtas_pci_ops = {
140 rtas_pci_read_config,
141 rtas_pci_write_config
144 /******************************************************************
147 * Reads the Interrupt Pin to determine if interrupt is use by card.
148 * If the interrupt is used, then gets the interrupt line from the
149 * openfirmware and sets it in the pci_dev and pci_config line.
151 ******************************************************************/
152 int pci_read_irq_line(struct pci_dev *pci_dev)
155 struct device_node *node;
157 pci_read_config_byte(pci_dev, PCI_INTERRUPT_PIN, &intpin);
160 PPCDBG(PPCDBG_BUSWALK,"\tDevice: %s No Interrupt used by device.\n", pci_name(pci_dev));
164 node = pci_device_to_OF_node(pci_dev);
166 PPCDBG(PPCDBG_BUSWALK,"\tDevice: %s Device Node not found.\n",
170 if (node->n_intrs == 0) {
171 PPCDBG(PPCDBG_BUSWALK,"\tDevice: %s No Device OF interrupts defined.\n", pci_name(pci_dev));
174 pci_dev->irq = node->intrs[0].line;
176 if (s7a_workaround) {
177 if (pci_dev->irq > 16)
181 pci_write_config_byte(pci_dev, PCI_INTERRUPT_LINE, pci_dev->irq);
183 PPCDBG(PPCDBG_BUSWALK,"\tDevice: %s pci_dev->irq = 0x%02X\n",
184 pci_name(pci_dev), pci_dev->irq);
187 EXPORT_SYMBOL(pci_read_irq_line);
189 #define ISA_SPACE_MASK 0x1
190 #define ISA_SPACE_IO 0x1
192 static void pci_process_ISA_OF_ranges(struct device_node *isa_node,
193 unsigned long phb_io_base_phys,
194 void * phb_io_base_virt)
196 struct isa_range *range;
197 unsigned long pci_addr;
198 unsigned int isa_addr;
202 range = (struct isa_range *) get_property(isa_node, "ranges", &rlen);
203 if (rlen < sizeof(struct isa_range)) {
204 printk(KERN_ERR "unexpected isa range size: %s\n",
209 /* From "ISA Binding to 1275"
210 * The ranges property is laid out as an array of elements,
211 * each of which comprises:
212 * cells 0 - 1: an ISA address
213 * cells 2 - 4: a PCI address
214 * (size depending on dev->n_addr_cells)
215 * cell 5: the size of the range
217 if ((range->isa_addr.a_hi && ISA_SPACE_MASK) == ISA_SPACE_IO) {
218 isa_addr = range->isa_addr.a_lo;
219 pci_addr = (unsigned long) range->pci_addr.a_mid << 32 |
220 range->pci_addr.a_lo;
222 /* Assume these are both zero */
223 if ((pci_addr != 0) || (isa_addr != 0)) {
224 printk(KERN_ERR "unexpected isa to pci mapping: %s\n",
229 size = PAGE_ALIGN(range->size);
231 __ioremap_explicit(phb_io_base_phys,
232 (unsigned long) phb_io_base_virt,
233 size, _PAGE_NO_CACHE);
237 static void __init pci_process_bridge_OF_ranges(struct pci_controller *hose,
238 struct device_node *dev,
241 unsigned int *ranges;
245 struct resource *res;
246 int np, na = prom_n_addr_cells(dev);
247 unsigned long pci_addr, cpu_phys_addr;
248 struct device_node *isa_dn;
252 /* From "PCI Binding to 1275"
253 * The ranges property is laid out as an array of elements,
254 * each of which comprises:
255 * cells 0 - 2: a PCI address
256 * cells 3 or 3+4: a CPU physical address
257 * (size depending on dev->n_addr_cells)
258 * cells 4+5 or 5+6: the size of the range
261 hose->io_base_phys = 0;
262 ranges = (unsigned int *) get_property(dev, "ranges", &rlen);
263 while ((rlen -= np * sizeof(unsigned int)) >= 0) {
265 pci_addr = (unsigned long)ranges[1] << 32 | ranges[2];
267 cpu_phys_addr = ranges[3];
269 cpu_phys_addr = cpu_phys_addr << 32 | ranges[4];
271 size = (unsigned long)ranges[na+3] << 32 | ranges[na+4];
273 switch (ranges[0] >> 24) {
274 case 1: /* I/O space */
275 hose->io_base_phys = cpu_phys_addr;
276 hose->io_base_virt = reserve_phb_iospace(size);
277 PPCDBG(PPCDBG_PHBINIT,
278 "phb%d io_base_phys 0x%lx io_base_virt 0x%lx\n",
279 hose->global_number, hose->io_base_phys,
280 (unsigned long) hose->io_base_virt);
283 pci_io_base = (unsigned long)hose->io_base_virt;
284 isa_dn = of_find_node_by_type(NULL, "isa");
286 isa_io_base = pci_io_base;
287 pci_process_ISA_OF_ranges(isa_dn,
296 res = &hose->io_resource;
297 res->flags = IORESOURCE_IO;
298 res->start = pci_addr;
299 res->start += (unsigned long)hose->io_base_virt -
302 case 2: /* memory space */
304 while (memno < 3 && hose->mem_resources[memno].flags)
308 hose->pci_mem_offset = cpu_phys_addr - pci_addr;
310 res = &hose->mem_resources[memno];
311 res->flags = IORESOURCE_MEM;
312 res->start = cpu_phys_addr;
317 res->name = dev->full_name;
318 res->end = res->start + size - 1;
327 static void python_countermeasures(unsigned long addr)
330 volatile u32 *tmp, i;
332 /* Python's register file is 1 MB in size. */
333 chip_regs = ioremap(addr & ~(0xfffffUL), 0x100000);
336 * Firmware doesn't always clear this bit which is critical
337 * for good performance - Anton
340 #define PRG_CL_RESET_VALID 0x00010000
342 tmp = (u32 *)((unsigned long)chip_regs + 0xf6030);
344 if (*tmp & PRG_CL_RESET_VALID) {
345 printk(KERN_INFO "Python workaround: ");
346 *tmp &= ~PRG_CL_RESET_VALID;
348 * We must read it back for changes to
352 printk("reg0: %x\n", i);
358 void __init init_pci_config_tokens (void)
360 read_pci_config = rtas_token("read-pci-config");
361 write_pci_config = rtas_token("write-pci-config");
362 ibm_read_pci_config = rtas_token("ibm,read-pci-config");
363 ibm_write_pci_config = rtas_token("ibm,write-pci-config");
366 unsigned long __init get_phb_buid (struct device_node *phb)
369 unsigned int *buid_vals;
373 if (ibm_read_pci_config == -1) return 0;
375 /* PHB's will always be children of the root node,
376 * or so it is promised by the current firmware. */
377 if (phb->parent == NULL)
379 if (phb->parent->parent)
382 buid_vals = (unsigned int *) get_property(phb, "reg", &len);
383 if (buid_vals == NULL)
386 addr_cells = prom_n_addr_cells(phb);
387 if (addr_cells == 1) {
388 buid = (unsigned long) buid_vals[0];
390 buid = (((unsigned long)buid_vals[0]) << 32UL) |
391 (((unsigned long)buid_vals[1]) & 0xffffffff);
396 static struct pci_controller * __init alloc_phb(struct device_node *dev,
397 unsigned int addr_size_words)
399 struct pci_controller *phb;
400 unsigned int *ui_ptr = NULL, len;
401 struct reg_property64 reg_struct;
404 enum phb_types phb_type;
405 struct property *of_prop;
407 model = (char *)get_property(dev, "model", NULL);
410 printk(KERN_ERR "alloc_phb: phb has no model property\n");
414 /* Found a PHB, now figure out where his registers are mapped. */
415 ui_ptr = (unsigned int *) get_property(dev, "reg", &len);
416 if (ui_ptr == NULL) {
417 PPCDBG(PPCDBG_PHBINIT, "\tget reg failed.\n");
421 if (addr_size_words == 1) {
422 reg_struct.address = ((struct reg_property32 *)ui_ptr)->address;
423 reg_struct.size = ((struct reg_property32 *)ui_ptr)->size;
425 reg_struct = *((struct reg_property64 *)ui_ptr);
428 if (strstr(model, "Python")) {
429 phb_type = phb_type_python;
430 } else if (strstr(model, "Speedwagon")) {
431 phb_type = phb_type_speedwagon;
432 } else if (strstr(model, "Winnipeg")) {
433 phb_type = phb_type_winnipeg;
435 printk(KERN_ERR "alloc_phb: unknown PHB %s\n", model);
436 phb_type = phb_type_unknown;
439 phb = pci_alloc_pci_controller(phb_type);
443 if (phb_type == phb_type_python)
444 python_countermeasures(reg_struct.address);
446 bus_range = (int *) get_property(dev, "bus-range", &len);
447 if (bus_range == NULL || len < 2 * sizeof(int)) {
452 of_prop = (struct property *)alloc_bootmem(sizeof(struct property) +
453 sizeof(phb->global_number));
460 memset(of_prop, 0, sizeof(struct property));
461 of_prop->name = "linux,pci-domain";
462 of_prop->length = sizeof(phb->global_number);
463 of_prop->value = (unsigned char *)&of_prop[1];
464 memcpy(of_prop->value, &phb->global_number, sizeof(phb->global_number));
465 prom_add_property(dev, of_prop);
467 phb->first_busno = bus_range[0];
468 phb->last_busno = bus_range[1];
470 phb->arch_data = dev;
471 phb->ops = &rtas_pci_ops;
473 phb->buid = get_phb_buid(dev);
478 unsigned long __init find_and_init_phbs(void)
480 struct device_node *node;
481 struct pci_controller *phb;
482 unsigned int root_size_cells = 0;
484 unsigned int *opprop;
485 struct device_node *root = of_find_node_by_path("/");
487 if (naca->interrupt_controller == IC_OPEN_PIC) {
488 opprop = (unsigned int *)get_property(root,
489 "platform-open-pic", NULL);
492 root_size_cells = prom_n_size_cells(root);
496 for (node = of_get_next_child(root, NULL);
498 node = of_get_next_child(root, node)) {
499 if (node->type == NULL || strcmp(node->type, "pci") != 0)
502 phb = alloc_phb(node, root_size_cells);
506 pci_process_bridge_OF_ranges(phb, node, index == 0);
508 if (naca->interrupt_controller == IC_OPEN_PIC) {
509 int addr = root_size_cells * (index + 2) - 1;
510 openpic_setup_ISU(index, opprop[addr]);
522 void pcibios_name_device(struct pci_dev *dev)
525 struct device_node *dn;
528 * Add IBM loc code (slot) as a prefix to the device names for service
530 dn = pci_device_to_OF_node(dev);
532 char *loc_code = get_property(dn, "ibm,loc-code", 0);
534 int loc_len = strlen(loc_code);
535 if (loc_len < sizeof(dev->dev.name)) {
536 memmove(dev->dev.name+loc_len+1, dev->dev.name,
537 sizeof(dev->dev.name)-loc_len-1);
538 memcpy(dev->dev.name, loc_code, loc_len);
539 dev->dev.name[loc_len] = ' ';
540 dev->dev.name[sizeof(dev->dev.name)-1] = '\0';
547 void __devinit pcibios_fixup_device_resources(struct pci_dev *dev,
550 /* Update device resources. */
551 struct pci_controller *hose = PCI_GET_PHB_PTR(bus);
554 for (i = 0; i < PCI_NUM_RESOURCES; i++) {
555 if (dev->resource[i].flags & IORESOURCE_IO) {
556 unsigned long offset = (unsigned long)hose->io_base_virt - pci_io_base;
557 unsigned long start, end, mask;
559 start = dev->resource[i].start += offset;
560 end = dev->resource[i].end += offset;
562 /* Need to allow IO access to pages that are in the
564 if (start < MAX_ISA_PORT) {
565 if (end > MAX_ISA_PORT)
568 start >>= PAGE_SHIFT;
571 /* get the range of pages for the map */
572 mask = ((1 << (end+1))-1) ^ ((1 << start)-1);
573 io_page_mask |= mask;
576 else if (dev->resource[i].flags & IORESOURCE_MEM) {
577 dev->resource[i].start += hose->pci_mem_offset;
578 dev->resource[i].end += hose->pci_mem_offset;
582 EXPORT_SYMBOL(pcibios_fixup_device_resources);
584 void __devinit pcibios_fixup_bus(struct pci_bus *bus)
586 struct pci_controller *hose = PCI_GET_PHB_PTR(bus);
587 struct list_head *ln;
589 /* XXX or bus->parent? */
590 struct pci_dev *dev = bus->self;
591 struct resource *res;
598 bus->resource[0] = res = &hose->io_resource;
600 BUG(); /* No I/O resource for this PHB? */
602 if (request_resource(&ioport_resource, res))
603 printk(KERN_ERR "Failed to request IO on "
604 "PCI domain %d\n", pci_domain_nr(bus));
607 for (i = 0; i < 3; ++i) {
608 res = &hose->mem_resources[i];
609 if (!res->flags && i == 0)
610 BUG(); /* No memory resource for this PHB? */
611 bus->resource[i+1] = res;
612 if (res->flags && request_resource(&iomem_resource, res))
613 printk(KERN_ERR "Failed to request MEM on "
617 } else if (pci_probe_only &&
618 (dev->class >> 8) == PCI_CLASS_BRIDGE_PCI) {
619 /* This is a subordinate bridge */
621 pci_read_bridge_bases(bus);
622 pcibios_fixup_device_resources(dev, bus);
625 /* XXX Need to check why Alpha doesnt do this - Anton */
629 for (ln = bus->devices.next; ln != &bus->devices; ln = ln->next) {
630 struct pci_dev *dev = pci_dev_b(ln);
631 if ((dev->class >> 8) != PCI_CLASS_BRIDGE_PCI)
632 pcibios_fixup_device_resources(dev, bus);
635 EXPORT_SYMBOL(pcibios_fixup_bus);
637 static void check_s7a(void)
639 struct device_node *root;
642 root = of_find_node_by_path("/");
644 model = get_property(root, "model", NULL);
645 if (model && !strcmp(model, "IBM,7013-S7A"))
651 static int get_bus_io_range(struct pci_bus *bus, unsigned long *start_phys,
652 unsigned long *start_virt, unsigned long *size)
654 struct pci_controller *hose = PCI_GET_PHB_PTR(bus);
655 struct pci_bus_region region;
656 struct resource *res;
659 res = bus->resource[0];
660 pcibios_resource_to_bus(bus->self, ®ion, res);
661 *start_phys = hose->io_base_phys + region.start;
662 *start_virt = (unsigned long) hose->io_base_virt +
664 if (region.end > region.start)
665 *size = region.end - region.start + 1;
667 printk("%s(): unexpected region 0x%lx->0x%lx\n",
668 __FUNCTION__, region.start, region.end);
674 res = &hose->io_resource;
675 *start_phys = hose->io_base_phys;
676 *start_virt = (unsigned long) hose->io_base_virt;
677 if (res->end > res->start)
678 *size = res->end - res->start + 1;
680 printk("%s(): unexpected region 0x%lx->0x%lx\n",
681 __FUNCTION__, res->start, res->end);
689 int unmap_bus_range(struct pci_bus *bus)
691 unsigned long start_phys;
692 unsigned long start_virt;
696 printk(KERN_ERR "%s() expected bus\n", __FUNCTION__);
700 if (get_bus_io_range(bus, &start_phys, &start_virt, &size))
702 if (iounmap_explicit((void *) start_virt, size))
707 EXPORT_SYMBOL(unmap_bus_range);
709 int remap_bus_range(struct pci_bus *bus)
711 unsigned long start_phys;
712 unsigned long start_virt;
716 printk(KERN_ERR "%s() expected bus\n", __FUNCTION__);
720 if (get_bus_io_range(bus, &start_phys, &start_virt, &size))
722 if (__ioremap_explicit(start_phys, start_virt, size, _PAGE_NO_CACHE))
727 EXPORT_SYMBOL(remap_bus_range);
729 static void phbs_fixup_io(void)
731 struct pci_controller *hose;
733 for (hose=hose_head;hose;hose=hose->next)
734 remap_bus_range(hose->bus);
737 extern void chrp_request_regions(void);
739 void __init pSeries_final_fixup(void)
741 struct pci_dev *dev = NULL;
745 while ((dev = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL)
746 pci_read_irq_line(dev);
749 chrp_request_regions();
750 pci_fix_bus_sysdata();
751 if (!ppc64_iommu_off)
752 iommu_setup_pSeries();
755 /***********************************************************************
756 * pci_find_hose_for_OF_device
758 * This function finds the PHB that matching device_node in the
759 * OpenFirmware by scanning all the pci_controllers.
761 ***********************************************************************/
762 struct pci_controller*
763 pci_find_hose_for_OF_device(struct device_node *node)
766 struct pci_controller *hose;
767 for (hose=hose_head;hose;hose=hose->next)
768 if (hose->arch_data == node)
776 * ppc64 can have multifunction devices that do not respond to function 0.
777 * In this case we must scan all functions.
780 pcibios_scan_all_fns(struct pci_bus *bus, int devfn)
782 struct device_node *busdn, *dn;
785 busdn = pci_device_to_OF_node(bus->self);
787 busdn = bus->sysdata; /* must be a phb */
790 * Check to see if there is any of the 8 functions are in the
791 * device tree. If they are then we need to scan all the
792 * functions of this slot.
794 for (dn = busdn->child; dn; dn = dn->sibling)
795 if ((dn->devfn >> 3) == (devfn >> 3))