2 * NS16550 Serial Port (uart) debugging stuff.
4 * c 2001 PPC 64 Team, IBM Corp
6 * NOTE: I am trying to make this code avoid any static data references to
7 * simplify debugging early boot. We'll see how that goes...
9 * To use this call udbg_init() first. It will init the uart to 9600 8N1.
10 * You may need to update the COM1 define if your uart is at a different addr.
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version
15 * 2 of the License, or (at your option) any later version.
19 #define WANT_PPCDBG_TAB /* Only defined here */
20 #include <asm/ppcdebug.h>
21 #include <asm/processor.h>
23 #include <asm/uaccess.h>
24 #include <asm/machdep.h>
27 #include <asm/pmac_feature.h>
30 /* this struct must be packed */
31 unsigned char rbr; /* 0 */
32 unsigned char ier; /* 1 */
33 unsigned char fcr; /* 2 */
34 unsigned char lcr; /* 3 */
35 unsigned char mcr; /* 4 */
36 unsigned char lsr; /* 5 */
37 unsigned char msr; /* 6 */
38 unsigned char scr; /* 7 */
47 #define LSR_DR 0x01 /* Data ready */
48 #define LSR_OE 0x02 /* Overrun */
49 #define LSR_PE 0x04 /* Parity error */
50 #define LSR_FE 0x08 /* Framing error */
51 #define LSR_BI 0x10 /* Break */
52 #define LSR_THRE 0x20 /* Xmit holding register empty */
53 #define LSR_TEMT 0x40 /* Xmitter empty */
54 #define LSR_ERR 0x80 /* Error */
56 volatile struct NS16550 *udbg_comport;
59 udbg_init_uart(void *comport)
62 udbg_comport = (struct NS16550 *)comport;
63 udbg_comport->lcr = 0x00; eieio();
64 udbg_comport->ier = 0xFF; eieio();
65 udbg_comport->ier = 0x00; eieio();
66 udbg_comport->lcr = 0x80; eieio(); /* Access baud rate */
67 udbg_comport->dll = 12; eieio(); /* 1 = 115200, 2 = 57600, 3 = 38400, 12 = 9600 baud */
68 udbg_comport->dlm = 0; eieio(); /* dll >> 8 which should be zero for fast rates; */
69 udbg_comport->lcr = 0x03; eieio(); /* 8 data, 1 stop, no parity */
70 udbg_comport->mcr = 0x03; eieio(); /* RTS/DTR */
71 udbg_comport->fcr = 0x07; eieio(); /* Clear & enable FIFOs */
75 #ifdef CONFIG_PPC_PMAC
80 static volatile u8 *sccc, *sccd;
82 static unsigned char scc_inittab[] = {
83 13, 0, /* set baud rate divisor */
85 14, 1, /* baud rate gen enable, src=rtxc */
86 11, 0x50, /* clocks = br gen */
87 5, 0xea, /* tx 8 bits, assert DTR & RTS */
88 4, 0x46, /* x16 clock, 1 stop */
89 3, 0xc1, /* rx enable, 8 bits */
93 udbg_init_scc(struct device_node *np)
99 np = of_find_node_by_name(NULL, "escc");
103 /* Lock-enable the SCC channel */
104 pmac_call_feature(PMAC_FTR_SCC_ENABLE, np, PMAC_SCC_ASYNC | PMAC_SCC_FLAG_XMON, 1);
106 /* Setup for 57600 8N1 */
107 addr = np->addrs[0].address + 0x20;
108 sccc = (volatile u8 *) ioremap(addr & PAGE_MASK, PAGE_SIZE) ;
109 sccc += addr & ~PAGE_MASK;
112 for (i = 20000; i != 0; --i)
114 *sccc = 9; eieio(); /* reset A or B side */
115 *sccc = 0xc0; eieio();
116 for (i = 0; i < sizeof(scc_inittab); ++i) {
117 *sccc = scc_inittab[i];
121 ppc_md.udbg_putc = udbg_putc;
122 ppc_md.udbg_getc = udbg_getc;
123 ppc_md.udbg_getc_poll = udbg_getc_poll;
125 udbg_puts("Hello World !\n");
128 #endif /* CONFIG_PPC_PMAC */
131 udbg_putc(unsigned char c)
133 if ( udbg_comport ) {
134 while ((udbg_comport->lsr & LSR_THRE) == 0)
136 udbg_comport->thr = c; eieio();
138 /* Also put a CR. This is for convenience. */
139 while ((udbg_comport->lsr & LSR_THRE) == 0)
141 udbg_comport->thr = '\r'; eieio();
144 #ifdef CONFIG_PPC_PMAC
146 while ((*sccc & SCC_TXRDY) == 0)
153 #endif /* CONFIG_PPC_PMAC */
156 int udbg_getc_poll(void)
159 if ((udbg_comport->lsr & LSR_DR) != 0)
160 return udbg_comport->rbr;
164 #ifdef CONFIG_PPC_PMAC
167 if ((*sccc & SCC_RXRDY) != 0)
172 #endif /* CONFIG_PPC_PMAC */
179 if ( udbg_comport ) {
180 while ((udbg_comport->lsr & LSR_DR) == 0)
182 return udbg_comport->rbr;
184 #ifdef CONFIG_PPC_PMAC
187 while ((*sccc & SCC_RXRDY) == 0)
191 #endif /* CONFIG_PPC_PMAC */
196 udbg_puts(const char *s)
198 if (ppc_md.udbg_putc) {
201 if (s && *s != '\0') {
202 while ((c = *s++) != '\0')
211 udbg_write(const char *s, int n)
216 if (!ppc_md.udbg_putc)
219 if ( s && *s != '\0' ) {
220 while ( (( c = *s++ ) != '\0') && (remain-- > 0)) {
228 udbg_read(char *buf, int buflen) {
231 if (!ppc_md.udbg_putc)
232 for (;;); /* stop here for cpuctl */
233 for (i = 0; i < buflen; ++i) {
235 c = ppc_md.udbg_getc();
236 } while (c == 0x11 || c == 0x13);
245 udbg_console_write(struct console *con, const char *s, unsigned int n)
251 udbg_puthex(unsigned long val)
253 int i, nibbles = sizeof(val)*2;
254 unsigned char buf[sizeof(val)*2+1];
255 for (i = nibbles-1; i >= 0; i--) {
256 buf[i] = (val & 0xf) + '0';
258 buf[i] += ('a'-'0'-10);
266 udbg_printSP(const char *s)
268 if (systemcfg->platform == PLATFORM_PSERIES) {
270 asm("mr %0,1" : "=r" (sp) :);
278 udbg_printf(const char *fmt, ...)
280 unsigned char buf[256];
285 vsprintf(buf, fmt, args);
291 /* Special print used by PPCDBG() macro */
293 udbg_ppcdbg(unsigned long debug_flags, const char *fmt, ...)
295 unsigned long active_debugs = debug_flags & naca->debug_switch;
297 if ( active_debugs ) {
299 unsigned char buf[256];
300 unsigned long i, len = 0;
302 for(i=0; i < PPCDBG_NUM_FLAGS ;i++) {
303 if (((1U << i) & active_debugs) &&
305 len += strlen(trace_names[i]);
306 udbg_puts(trace_names[i]);
310 sprintf(buf, " [%s]: ", current->comm);
320 vsprintf(buf, fmt, ap);
328 udbg_ifdebug(unsigned long flags)
330 return (flags & naca->debug_switch);