2 * arch/s390/kernel/entry.S
3 * S390 low-level entry points.
6 * Copyright (C) 1999,2000 IBM Deutschland Entwicklung GmbH, IBM Corporation
7 * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com),
8 * Hartmut Penner (hp@de.ibm.com),
9 * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com),
12 #include <linux/sys.h>
13 #include <linux/linkage.h>
14 #include <linux/config.h>
15 #include <asm/cache.h>
16 #include <asm/lowcore.h>
17 #include <asm/errno.h>
18 #include <asm/ptrace.h>
19 #include <asm/thread_info.h>
20 #include <asm/offsets.h>
21 #include <asm/unistd.h>
24 * Stack layout for the system_call stack entry.
25 * The first few entries are identical to the user_regs_struct.
27 SP_PTREGS = STACK_FRAME_OVERHEAD
28 SP_ARGS = STACK_FRAME_OVERHEAD + __PT_ARGS
29 SP_PSW = STACK_FRAME_OVERHEAD + __PT_PSW
30 SP_R0 = STACK_FRAME_OVERHEAD + __PT_GPRS
31 SP_R1 = STACK_FRAME_OVERHEAD + __PT_GPRS + 8
32 SP_R2 = STACK_FRAME_OVERHEAD + __PT_GPRS + 16
33 SP_R3 = STACK_FRAME_OVERHEAD + __PT_GPRS + 24
34 SP_R4 = STACK_FRAME_OVERHEAD + __PT_GPRS + 32
35 SP_R5 = STACK_FRAME_OVERHEAD + __PT_GPRS + 40
36 SP_R6 = STACK_FRAME_OVERHEAD + __PT_GPRS + 48
37 SP_R7 = STACK_FRAME_OVERHEAD + __PT_GPRS + 56
38 SP_R8 = STACK_FRAME_OVERHEAD + __PT_GPRS + 64
39 SP_R9 = STACK_FRAME_OVERHEAD + __PT_GPRS + 72
40 SP_R10 = STACK_FRAME_OVERHEAD + __PT_GPRS + 80
41 SP_R11 = STACK_FRAME_OVERHEAD + __PT_GPRS + 88
42 SP_R12 = STACK_FRAME_OVERHEAD + __PT_GPRS + 96
43 SP_R13 = STACK_FRAME_OVERHEAD + __PT_GPRS + 104
44 SP_R14 = STACK_FRAME_OVERHEAD + __PT_GPRS + 112
45 SP_R15 = STACK_FRAME_OVERHEAD + __PT_GPRS + 120
46 SP_ORIG_R2 = STACK_FRAME_OVERHEAD + __PT_ORIG_GPR2
47 SP_ILC = STACK_FRAME_OVERHEAD + __PT_ILC
48 SP_TRAP = STACK_FRAME_OVERHEAD + __PT_TRAP
49 SP_SIZE = STACK_FRAME_OVERHEAD + __PT_SIZE
51 _TIF_WORK_SVC = (_TIF_SIGPENDING | _TIF_NEED_RESCHED | \
52 _TIF_RESTART_SVC | _TIF_SINGLE_STEP )
53 _TIF_WORK_INT = (_TIF_SIGPENDING | _TIF_NEED_RESCHED)
56 * Register usage in interrupt handlers:
57 * R9 - pointer to current task structure
58 * R13 - pointer to literal pool
59 * R14 - return register for function calls
60 * R15 - kernel stack pointer
63 .macro SAVE_ALL psworg,savearea,sync
64 stmg %r13,%r15,\savearea
66 tm \psworg+1,0x01 # test problem state bit
67 jz 1f # skip stack setup save
68 lg %r15,__LC_KERNEL_STACK # problem state -> load ksp
70 tm \psworg+1,0x01 # test problem state bit
71 jnz 0f # from user -> load kernel stack
72 lg %r14,__LC_ASYNC_STACK # are we already on the async. stack ?
76 0: lg %r15,__LC_ASYNC_STACK # load async stack
78 1: aghi %r15,-SP_SIZE # make room for registers & psw
81 icm %r14,12,__LC_SVC_ILC
82 stmg %r0,%r12,SP_R0(%r15) # store gprs 0-13 to kernel stack
83 stg %r2,SP_ORIG_R2(%r15) # store original content of gpr 2
84 mvc SP_R13(24,%r15),\savearea # move r13, r14 and r15 to stack
85 mvc SP_PSW(16,%r15),\psworg # move user PSW to stack
90 .macro CLEANUP_SAVE_ALL psworg,savearea,sync
94 mvc \savearea(24),SP_R13(%r15)
95 2: lg %r1,\savearea+16
99 lg %r1,__LC_KERNEL_STACK
103 lg %r0,__LC_ASYNC_STACK
107 0: lg %r1,__LC_ASYNC_STACK
112 xc SP_R13(8,%r15),SP_R13(%r15)
113 icm %r0,12,__LC_SVC_ILC
115 mvc SP_R0(104,%r1),SP_R0(%r15)
116 mvc SP_ORIG_R2(8,%r1),SP_R2(%r15)
117 mvc SP_R13(24,%r1),\savearea
118 mvc SP_PSW(16,%r1),\psworg
123 .macro RESTORE_ALL # system exit macro
124 mvc __LC_RETURN_PSW(16),SP_PSW(%r15) # move user PSW to lowcore
125 ni __LC_RETURN_PSW+1,0xfd # clear wait state bit
126 lmg %r0,%r15,SP_R0(%r15) # load gprs 0-15 of user
127 lpswe __LC_RETURN_PSW # back to caller
130 .macro CLEANUP_RESTORE_ALL
131 lg %r1,SP_PSW+8(%r15)
134 mvc SP_PSW(16,%r15),__LC_RETURN_PSW
136 0: lg %r1,SP_R15(%r15)
137 mvc SP_PSW(16,%r15),SP_PSW(%r1)
138 mvc SP_R0(128,%r15),SP_R0(%r1)
142 .macro GET_THREAD_INFO
143 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
146 .macro CHECK_CRITICAL
147 tm SP_PSW+1(%r15),0x01 # test problem state bit
148 jnz 0f # from user -> not critical
149 larl %r1,.Lcritical_start
150 clc SP_PSW+8(8,%r15),8(%r1) # compare ip with __critical_end
152 clc SP_PSW+8(8,%r15),0(%r1) # compare ip with __critical_start
154 brasl %r14,cleanup_critical
159 * Scheduler resume function, called by switch_to
160 * gpr2 = (task_struct *) prev
161 * gpr3 = (task_struct *) next
167 tm __THREAD_per+4(%r3),0xe8 # is the new process using per ?
168 jz __switch_to_noper # if not we're fine
169 stctg %c9,%c11,48(%r15) # We are using per stuff
170 clc __THREAD_per(24,%r3),48(%r15)
171 je __switch_to_noper # we got away without bashing TLB's
172 lctlg %c9,%c11,__THREAD_per(%r3) # Nope we didn't
174 stmg %r6,%r15,48(%r15) # store __switch_to registers of prev task
175 stg %r15,__THREAD_ksp(%r2) # store kernel stack to prev->tss.ksp
176 lg %r15,__THREAD_ksp(%r3) # load kernel stack from next->tss.ksp
177 lmg %r6,%r15,48(%r15) # load __switch_to registers of next task
178 stg %r3,__LC_CURRENT # __LC_CURRENT = current task struct
179 lg %r3,__THREAD_info(%r3) # load thread_info from task struct
180 stg %r3,__LC_THREAD_INFO
182 stg %r3,__LC_KERNEL_STACK # __LC_KERNEL_STACK = new kernel stack
186 * do_softirq calling function. We want to run the softirq functions on the
187 * asynchronous interrupt stack.
189 .global do_call_softirq
192 stmg %r12,%r15,56(%r15)
194 lg %r0,__LC_ASYNC_STACK
198 lg %r15,__LC_ASYNC_STACK
199 0: aghi %r15,-STACK_FRAME_OVERHEAD
200 stg %r12,0(%r15) # store back chain
201 brasl %r14,do_softirq
202 lmg %r12,%r15,56(%r12)
208 * SVC interrupt handler routine. System calls are synchronous events and
209 * are executed with interrupts enabled.
214 SAVE_ALL __LC_SVC_OLD_PSW,__LC_SAVE_AREA,1
215 llgh %r7,__LC_SVC_INT_CODE # get svc number from lowcore
217 GET_THREAD_INFO # load pointer to task_struct to R9
219 slag %r7,%r7,2 # *4 and test for svc 0
221 # svc 0: system call number in %r1
225 lgfr %r7,%r1 # clear high word in r1
226 slag %r7,%r7,2 # svc 0: system call number in %r1
228 mvc SP_ARGS(8,%r15),SP_R7(%r15)
230 larl %r10,sys_call_table
231 #ifdef CONFIG_S390_SUPPORT
232 tm SP_PSW+3(%r15),0x01 # are we running in 31 bit mode ?
234 larl %r10,sys_call_table_emu # use 31 bit emulation system calls
237 tm __TI_flags+7(%r9),(_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT)
238 lgf %r8,0(%r7,%r10) # load address of system call routine
240 basr %r14,%r8 # call sys_xxxx
241 stg %r2,SP_R2(%r15) # store return value (change R2 on stack)
242 # ATTENTION: check sys_execve_glue before
243 # changing anything here !!
246 tm SP_PSW+1(%r15),0x01 # returning to user ?
248 tm __TI_flags+7(%r9),_TIF_WORK_SVC
249 jnz sysc_work # there is work to do (signals etc.)
254 # recheck if there is more work to do
257 GET_THREAD_INFO # load pointer to task_struct to R9
258 tm __TI_flags+7(%r9),_TIF_WORK_SVC
259 jz sysc_leave # there is no work to do
261 # One of the work bits is on. Find out which one.
264 tm __TI_flags+7(%r9),_TIF_NEED_RESCHED
266 tm __TI_flags+7(%r9),_TIF_SIGPENDING
268 tm __TI_flags+7(%r9),_TIF_RESTART_SVC
270 tm __TI_flags+7(%r9),_TIF_SINGLE_STEP
275 # _TIF_NEED_RESCHED is set, call schedule
278 larl %r14,sysc_work_loop
279 jg schedule # return point is sysc_return
282 # _TIF_SIGPENDING is set, call do_signal
285 la %r2,SP_PTREGS(%r15) # load pt_regs
286 sgr %r3,%r3 # clear *oldset
287 brasl %r14,do_signal # call do_signal
288 tm __TI_flags+7(%r9),_TIF_RESTART_SVC
290 j sysc_leave # out of here, do NOT recheck
293 # _TIF_RESTART_SVC is set, set up registers and restart svc
296 ni __TI_flags+7(%r9),255-_TIF_RESTART_SVC # clear TIF_RESTART_SVC
297 lg %r7,SP_R2(%r15) # load new svc number
299 mvc SP_R2(8,%r15),SP_ORIG_R2(%r15) # restore first argument
300 lmg %r2,%r6,SP_R2(%r15) # load svc arguments
301 j sysc_do_restart # restart svc
304 # _TIF_SINGLE_STEP is set, call do_debugger_trap
307 ni __TI_flags+7(%r9),255-_TIF_SINGLE_STEP # clear TIF_SINGLE_STEP
308 mvi SP_TRAP+1(%r15),0x28 # set trap indication to pgm check
309 la %r2,SP_PTREGS(%r15) # address of register-save area
310 larl %r14,sysc_return # load adr. of system return
311 jg do_debugger_trap # branch to do_debugger_trap
317 # call syscall_trace before and after system call
318 # special linkage: %r12 contains the return address for trace_svc
321 la %r2,SP_PTREGS(%r15) # load pt_regs
325 brasl %r14,syscall_trace
329 lg %r7,SP_R2(%r15) # strace might have changed the
330 sll %r7,2 # system call
333 lmg %r3,%r6,SP_R3(%r15)
334 lg %r2,SP_ORIG_R2(%r15)
335 basr %r14,%r8 # call sys_xxx
336 stg %r2,SP_R2(%r15) # store return value
338 tm __TI_flags+7(%r9),(_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT)
340 la %r2,SP_PTREGS(%r15) # load pt_regs
342 larl %r14,sysc_return # return point is sysc_return
346 # a new process exits the kernel with ret_from_fork
350 GET_THREAD_INFO # load pointer to task_struct to R9
351 brasl %r14,schedule_tail
352 stosm 24(%r15),0x03 # reenable interrupts
356 # clone, fork, vfork, exec and sigreturn need glue,
357 # because they all expect pt_regs as parameter,
358 # but are called with different parameter.
359 # return-address is set up above
362 la %r2,SP_PTREGS(%r15) # load pt_regs
363 jg sys_clone # branch to sys_clone
365 #ifdef CONFIG_S390_SUPPORT
367 la %r2,SP_PTREGS(%r15) # load pt_regs
368 jg sys32_clone # branch to sys32_clone
372 la %r2,SP_PTREGS(%r15) # load pt_regs
373 jg sys_fork # branch to sys_fork
376 la %r2,SP_PTREGS(%r15) # load pt_regs
377 jg sys_vfork # branch to sys_vfork
380 la %r2,SP_PTREGS(%r15) # load pt_regs
381 lgr %r12,%r14 # save return address
382 brasl %r14,sys_execve # call sys_execve
383 ltgr %r2,%r2 # check if execve failed
384 bnz 0(%r12) # it did fail -> store result in gpr2
385 b 6(%r12) # SKIP STG 2,SP_R2(15) in
386 # system_call/sysc_tracesys
387 #ifdef CONFIG_S390_SUPPORT
389 la %r2,SP_PTREGS(%r15) # load pt_regs
390 lgr %r12,%r14 # save return address
391 brasl %r14,sys32_execve # call sys32_execve
392 ltgr %r2,%r2 # check if execve failed
393 bnz 0(%r12) # it did fail -> store result in gpr2
394 b 6(%r12) # SKIP STG 2,SP_R2(15) in
395 # system_call/sysc_tracesys
399 la %r2,SP_PTREGS(%r15) # load pt_regs as parameter
400 jg sys_sigreturn # branch to sys_sigreturn
402 #ifdef CONFIG_S390_SUPPORT
403 sys32_sigreturn_glue:
404 la %r2,SP_PTREGS(%r15) # load pt_regs as parameter
405 jg sys32_sigreturn # branch to sys32_sigreturn
408 sys_rt_sigreturn_glue:
409 la %r2,SP_PTREGS(%r15) # load pt_regs as parameter
410 jg sys_rt_sigreturn # branch to sys_sigreturn
412 #ifdef CONFIG_S390_SUPPORT
413 sys32_rt_sigreturn_glue:
414 la %r2,SP_PTREGS(%r15) # load pt_regs as parameter
415 jg sys32_rt_sigreturn # branch to sys32_sigreturn
419 # sigsuspend and rt_sigsuspend need pt_regs as an additional
420 # parameter and they have to skip the store of %r2 into the
421 # user register %r2 because the return value was set in
422 # sigsuspend and rt_sigsuspend already and must not be overwritten!
426 lgr %r5,%r4 # move mask back
427 lgr %r4,%r3 # move history1 parameter
428 lgr %r3,%r2 # move history0 parameter
429 la %r2,SP_PTREGS(%r15) # load pt_regs as first parameter
430 la %r14,6(%r14) # skip store of return value
431 jg sys_sigsuspend # branch to sys_sigsuspend
433 #ifdef CONFIG_S390_SUPPORT
434 sys32_sigsuspend_glue:
435 llgfr %r4,%r4 # unsigned long
436 lgr %r5,%r4 # move mask back
438 lgr %r4,%r3 # move history1 parameter
440 lgr %r3,%r2 # move history0 parameter
441 la %r2,SP_PTREGS(%r15) # load pt_regs as first parameter
442 la %r14,6(%r14) # skip store of return value
443 jg sys32_sigsuspend # branch to sys32_sigsuspend
446 sys_rt_sigsuspend_glue:
447 lgr %r4,%r3 # move sigsetsize parameter
448 lgr %r3,%r2 # move unewset parameter
449 la %r2,SP_PTREGS(%r15) # load pt_regs as first parameter
450 la %r14,6(%r14) # skip store of return value
451 jg sys_rt_sigsuspend # branch to sys_rt_sigsuspend
453 #ifdef CONFIG_S390_SUPPORT
454 sys32_rt_sigsuspend_glue:
455 llgfr %r3,%r3 # size_t
456 lgr %r4,%r3 # move sigsetsize parameter
457 llgtr %r2,%r2 # sigset_emu31_t *
458 lgr %r3,%r2 # move unewset parameter
459 la %r2,SP_PTREGS(%r15) # load pt_regs as first parameter
460 la %r14,6(%r14) # skip store of return value
461 jg sys32_rt_sigsuspend # branch to sys32_rt_sigsuspend
464 sys_sigaltstack_glue:
465 la %r4,SP_PTREGS(%r15) # load pt_regs as parameter
466 jg sys_sigaltstack # branch to sys_sigreturn
468 #ifdef CONFIG_S390_SUPPORT
469 sys32_sigaltstack_glue:
470 la %r4,SP_PTREGS(%r15) # load pt_regs as parameter
471 jg sys32_sigaltstack_wrapper # branch to sys_sigreturn
475 * Program check handler routine
478 .globl pgm_check_handler
481 * First we need to check for a special case:
482 * Single stepping an instruction that disables the PER event mask will
483 * cause a PER event AFTER the mask has been set. Example: SVC or LPSW.
484 * For a single stepped SVC the program check handler gets control after
485 * the SVC new PSW has been loaded. But we want to execute the SVC first and
486 * then handle the PER event. Therefore we update the SVC old PSW to point
487 * to the pgm_check_handler and branch to the SVC handler after we checked
488 * if we have to load the kernel stack register.
489 * For every other possible cause for PER event without the PER mask set
490 * we just ignore the PER event (FIXME: is there anything we have to do
493 tm __LC_PGM_INT_CODE+1,0x80 # check whether we got a per exception
494 jnz pgm_per # got per exception -> special case
495 SAVE_ALL __LC_PGM_OLD_PSW,__LC_SAVE_AREA,1
496 lgf %r3,__LC_PGM_ILC # load program interruption code
501 larl %r1,pgm_check_table
502 lg %r1,0(%r8,%r1) # load address of handler routine
503 la %r2,SP_PTREGS(%r15) # address of register-save area
504 larl %r14,sysc_return
505 br %r1 # branch to interrupt-handler
508 # handle per exception
511 tm __LC_PGM_OLD_PSW,0x40 # test if per event recording is on
512 jnz pgm_per_std # ok, normal per event from user space
513 # ok its one of the special cases, now we need to find out which one
514 clc __LC_PGM_OLD_PSW(16),__LC_SVC_NEW_PSW
516 # no interesting special case, ignore PER event
517 lpswe __LC_PGM_OLD_PSW
520 # Normal per exception
523 SAVE_ALL __LC_PGM_OLD_PSW,__LC_SAVE_AREA,1
525 lg %r1,__TI_task(%r9)
526 mvc __THREAD_per+__PER_atmid(2,%r1),__LC_PER_ATMID
527 mvc __THREAD_per+__PER_address(8,%r1),__LC_PER_ADDRESS
528 mvc __THREAD_per+__PER_access_id(1,%r1),__LC_PER_ACCESS_ID
530 lgf %r3,__LC_PGM_ILC # load program interruption code
531 nr %r4,%r3 # clear per-event-bit and ilc
532 je pgm_per_only # only per of per+check ?
534 larl %r1,pgm_check_table
535 lg %r1,0(%r4,%r1) # load address of handler routine
536 la %r2,SP_PTREGS(%r15) # address of register-save area
537 basr %r14,%r1 # branch to interrupt-handler
539 la %r2,SP_PTREGS(15) # address of register-save area
540 larl %r14,sysc_return # load adr. of system return
544 # it was a single stepped SVC that is causing all the trouble
547 SAVE_ALL __LC_SVC_OLD_PSW,__LC_SAVE_AREA,1
548 llgh %r7,__LC_SVC_INT_CODE # get svc number from lowcore
549 GET_THREAD_INFO # load pointer to task_struct to R9
550 lg %r1,__TI_task(%r9)
551 mvc __THREAD_per+__PER_atmid(2,%r1),__LC_PER_ATMID
552 mvc __THREAD_per+__PER_address(8,%r1),__LC_PER_ADDRESS
553 mvc __THREAD_per+__PER_access_id(1,%r1),__LC_PER_ACCESS_ID
554 oi __TI_flags+7(%r9),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP
555 stosm 48(%r15),0x03 # reenable interrupts
559 * IO interrupt handler routine
561 .globl io_int_handler
563 SAVE_ALL __LC_IO_OLD_PSW,__LC_SAVE_AREA+32,0
566 GET_THREAD_INFO # load pointer to task_struct to R9
567 la %r2,SP_PTREGS(%r15) # address of register-save area
568 brasl %r14,do_IRQ # call standard irq handler
571 tm SP_PSW+1(%r15),0x01 # returning to user ?
572 #ifdef CONFIG_PREEMPT
573 jno io_preempt # no -> check for preemptive scheduling
575 jno io_leave # no-> skip resched & signal
577 tm __TI_flags+7(%r9),_TIF_WORK_INT
578 jnz io_work # there is work to do (signals etc.)
582 #ifdef CONFIG_PREEMPT
584 icm %r0,15,__TI_precount(%r9)
586 # switch to kernel stack
589 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
590 xc 0(8,%r1),0(%r1) # clear back chain
593 tm __TI_flags+7(%r9),_TIF_NEED_RESCHED
596 mvc __TI_precount(4,%r9),0(%r1)
597 stosm 48(%r15),0x03 # reenable interrupts
598 brasl %r14,schedule # call schedule
599 stnsm 48(%r15),0xfc # disable I/O and ext. interrupts
600 GET_THREAD_INFO # load pointer to task_struct to R9
601 xc __TI_precount(4,%r9),__TI_precount(%r9)
606 # switch to kernel stack, then check TIF bits
609 lg %r1,__LC_KERNEL_STACK
611 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
612 xc 0(8,%r1),0(%r1) # clear back chain
615 # One of the work bits is on. Find out which one.
616 # Checked are: _TIF_SIGPENDING and _TIF_NEED_RESCHED
619 tm __TI_flags+7(%r9),_TIF_NEED_RESCHED
621 tm __TI_flags+7(%r9),_TIF_SIGPENDING
626 # _TIF_NEED_RESCHED is set, call schedule
629 stosm 48(%r15),0x03 # reenable interrupts
630 brasl %r14,schedule # call scheduler
631 stnsm 48(%r15),0xfc # disable I/O and ext. interrupts
632 GET_THREAD_INFO # load pointer to task_struct to R9
633 tm __TI_flags+7(%r9),_TIF_WORK_INT
634 jz io_leave # there is no work to do
638 # _TIF_SIGPENDING is set, call do_signal
641 stosm 48(%r15),0x03 # reenable interrupts
642 la %r2,SP_PTREGS(%r15) # load pt_regs
643 slgr %r3,%r3 # clear *oldset
644 brasl %r14,do_signal # call do_signal
645 stnsm 48(%r15),0xfc # disable I/O and ext. interrupts
646 j sysc_leave # out of here, do NOT recheck
649 * External interrupt handler routine
651 .globl ext_int_handler
653 SAVE_ALL __LC_EXT_OLD_PSW,__LC_SAVE_AREA+32,0
655 GET_THREAD_INFO # load pointer to task_struct to R9
657 la %r2,SP_PTREGS(%r15) # address of register-save area
658 llgh %r3,__LC_EXT_INT_CODE # get interruption code
663 * Machine check handler routines
665 .globl mcck_int_handler
667 SAVE_ALL __LC_MCK_OLD_PSW,__LC_SAVE_AREA+64,0
668 brasl %r14,s390_do_machine_check
674 * Restart interruption handler, kick starter for additional CPUs
676 .globl restart_int_handler
678 lg %r15,__LC_SAVE_AREA+120 # load ksp
679 lghi %r10,__LC_CREGS_SAVE_AREA
680 lctlg %c0,%c15,0(%r10) # get new ctl regs
681 lghi %r10,__LC_AREGS_SAVE_AREA
683 stosm 0(%r15),0x04 # now we can turn dat on
684 lmg %r6,%r15,48(%r15) # load registers from clone
688 * If we do not run with SMP enabled, let the new CPU crash ...
690 .globl restart_int_handler
694 lpswe restart_crash-restart_base(%r1)
697 .long 0x000a0000,0x00000000,0x00000000,0x00000000
702 .quad system_call, sysc_enter, cleanup_sysc_enter
703 .quad sysc_return, sysc_leave, cleanup_sysc_return
704 .quad sysc_leave, sysc_work_loop, cleanup_sysc_leave
705 .quad sysc_work_loop, sysc_reschedule, cleanup_sysc_return
706 cleanup_table_entries=(.-cleanup_table) / 24
709 lghi %r0,cleanup_table_entries
710 larl %r1,cleanup_table
711 lg %r2,SP_PSW+8(%r15)
719 brct %r0,cleanup_loop
726 CLEANUP_SAVE_ALL __LC_SVC_OLD_PSW,__LC_SAVE_AREA,1
730 stg %r1,SP_PSW+8(%r15)
735 stg %r1,SP_PSW+8(%r15)
747 .Lc_pactive: .long PREEMPT_ACTIVE
749 .quad __critical_start
753 #define SYSCALL(esa,esame,emu) .long esame
754 .globl sys_call_table
756 #include "syscalls.S"
759 #ifdef CONFIG_S390_SUPPORT
761 #define SYSCALL(esa,esame,emu) .long emu
762 .globl sys_call_table_emu
764 #include "syscalls.S"