fedora core 6 1.2949 + vserver 2.2.0
[linux-2.6.git] / arch / s390 / kernel / ptrace.c
1 /*
2  *  arch/s390/kernel/ptrace.c
3  *
4  *  S390 version
5  *    Copyright (C) 1999,2000 IBM Deutschland Entwicklung GmbH, IBM Corporation
6  *    Author(s): Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com),
7  *               Martin Schwidefsky (schwidefsky@de.ibm.com)
8  *
9  *  Based on PowerPC version 
10  *    Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
11  *
12  *  Derived from "arch/m68k/kernel/ptrace.c"
13  *  Copyright (C) 1994 by Hamish Macdonald
14  *  Taken from linux/kernel/ptrace.c and modified for M680x0.
15  *  linux/kernel/ptrace.c is by Ross Biro 1/23/92, edited by Linus Torvalds
16  *
17  * Modified by Cort Dougan (cort@cs.nmt.edu) 
18  *
19  *
20  * This file is subject to the terms and conditions of the GNU General
21  * Public License.  See the file README.legal in the main directory of
22  * this archive for more details.
23  */
24
25 #include <linux/kernel.h>
26 #include <linux/sched.h>
27 #include <linux/mm.h>
28 #include <linux/smp.h>
29 #include <linux/smp_lock.h>
30 #include <linux/errno.h>
31 #include <linux/ptrace.h>
32 #include <linux/tracehook.h>
33 #include <linux/module.h>
34 #include <linux/user.h>
35 #include <linux/security.h>
36 #include <linux/audit.h>
37 #include <linux/signal.h>
38 #include <linux/vs_base.h>
39
40 #include <asm/segment.h>
41 #include <asm/page.h>
42 #include <asm/pgtable.h>
43 #include <asm/pgalloc.h>
44 #include <asm/system.h>
45 #include <asm/uaccess.h>
46 #include <asm/unistd.h>
47 #include <asm/elf.h>
48
49 #ifdef CONFIG_COMPAT
50 #include "compat_ptrace.h"
51 #endif
52
53 static void
54 FixPerRegisters(struct task_struct *task)
55 {
56         struct pt_regs *regs;
57         per_struct *per_info;
58
59         regs = task_pt_regs(task);
60         per_info = (per_struct *) &task->thread.per_info;
61         per_info->control_regs.bits.em_instruction_fetch =
62                 per_info->single_step | per_info->instruction_fetch;
63         
64         if (per_info->single_step) {
65                 per_info->control_regs.bits.starting_addr = 0;
66 #ifdef CONFIG_COMPAT
67                 if (test_thread_flag(TIF_31BIT))
68                         per_info->control_regs.bits.ending_addr = 0x7fffffffUL;
69                 else
70 #endif
71                         per_info->control_regs.bits.ending_addr = PSW_ADDR_INSN;
72         } else {
73                 per_info->control_regs.bits.starting_addr =
74                         per_info->starting_addr;
75                 per_info->control_regs.bits.ending_addr =
76                         per_info->ending_addr;
77         }
78         /*
79          * if any of the control reg tracing bits are on 
80          * we switch on per in the psw
81          */
82         if (per_info->control_regs.words.cr[0] & PER_EM_MASK)
83                 regs->psw.mask |= PSW_MASK_PER;
84         else
85                 regs->psw.mask &= ~PSW_MASK_PER;
86
87         if (per_info->control_regs.bits.em_storage_alteration)
88                 per_info->control_regs.bits.storage_alt_space_ctl = 1;
89         else
90                 per_info->control_regs.bits.storage_alt_space_ctl = 0;
91
92         if (task == current)
93                 /*
94                  * These registers are loaded in __switch_to on
95                  * context switch.  We must load them now if
96                  * touching the current thread.
97                  */
98                 __ctl_load(per_info->control_regs.words.cr, 9, 11);
99 }
100
101 void
102 tracehook_enable_single_step(struct task_struct *task)
103 {
104         task->thread.per_info.single_step = 1;
105         FixPerRegisters(task);
106 }
107
108 void
109 tracehook_disable_single_step(struct task_struct *task)
110 {
111         task->thread.per_info.single_step = 0;
112         FixPerRegisters(task);
113         clear_tsk_thread_flag(task, TIF_SINGLE_STEP);
114 }
115
116 int
117 tracehook_single_step_enabled(struct task_struct *task)
118 {
119         return task->thread.per_info.single_step;
120 }
121
122
123 static int
124 genregs_get(struct task_struct *target,
125             const struct utrace_regset *regset,
126             unsigned int pos, unsigned int count,
127             void *kbuf, void __user *ubuf)
128 {
129         struct pt_regs *regs = task_pt_regs(target);
130         unsigned long pswmask;
131         int ret;
132
133         /* Remove per bit from user psw. */
134         pswmask = regs->psw.mask & ~PSW_MASK_PER;
135         ret = utrace_regset_copyout(&pos, &count, &kbuf, &ubuf,
136                                     &pswmask, PT_PSWMASK, PT_PSWADDR);
137
138         /* The rest of the PSW and the GPRs are directly on the stack. */
139         if (ret == 0)
140                 ret = utrace_regset_copyout(&pos, &count, &kbuf, &ubuf,
141                                             &regs->psw.addr, PT_PSWADDR,
142                                             PT_ACR0);
143
144         /* The ACRs are kept in the thread_struct.  */
145         if (ret == 0 && count > 0 && pos < PT_ORIGGPR2) {
146                 if (target == current)
147                         save_access_regs(target->thread.acrs);
148
149                 ret = utrace_regset_copyout(&pos, &count, &kbuf, &ubuf,
150                                             target->thread.acrs,
151                                             PT_ACR0, PT_ORIGGPR2);
152         }
153
154         /* Finally, the ORIG_GPR2 value.  */
155         if (ret == 0)
156                 ret = utrace_regset_copyout(&pos, &count, &kbuf, &ubuf,
157                                             &regs->orig_gpr2, PT_ORIGGPR2, -1);
158
159         return ret;
160 }
161
162 static int
163 genregs_set(struct task_struct *target,
164             const struct utrace_regset *regset,
165             unsigned int pos, unsigned int count,
166             const void *kbuf, const void __user *ubuf)
167 {
168         struct pt_regs *regs = task_pt_regs(target);
169         int ret = 0;
170
171         /* Check for an invalid PSW mask.  */
172         if (count > 0 && pos == PT_PSWMASK) {
173                 unsigned long pswmask = regs->psw.mask;
174                 ret = utrace_regset_copyin(&pos, &count, &kbuf, &ubuf,
175                                            &pswmask, PT_PSWMASK, PT_PSWADDR);
176                 if (pswmask != PSW_MASK_MERGE(PSW_USER_BITS, pswmask)
177 #ifdef CONFIG_COMPAT
178                     && pswmask != PSW_MASK_MERGE(PSW_USER32_BITS, pswmask)
179 #endif
180                         )
181                         /* Invalid psw mask. */
182                         return -EINVAL;
183                 regs->psw.mask = pswmask;
184                 FixPerRegisters(target);
185         }
186
187         /* The rest of the PSW and the GPRs are directly on the stack. */
188         if (ret == 0) {
189                 ret = utrace_regset_copyin(&pos, &count, &kbuf, &ubuf,
190                                            &regs->psw.addr, PT_PSWADDR,
191                                            PT_ACR0);
192 #ifndef CONFIG_64BIT
193                 /* I'd like to reject addresses without the
194                    high order bit but older gdb's rely on it */
195                 regs->psw.addr |= PSW_ADDR_AMODE;
196 #endif
197         }
198
199         /* The ACRs are kept in the thread_struct.  */
200         if (ret == 0 && count > 0 && pos < PT_ORIGGPR2) {
201                 if (target == current
202                     && (pos != PT_ACR0 || count < sizeof(target->thread.acrs)))
203                         save_access_regs(target->thread.acrs);
204
205                 ret = utrace_regset_copyin(&pos, &count, &kbuf, &ubuf,
206                                            target->thread.acrs,
207                                            PT_ACR0, PT_ORIGGPR2);
208                 if (ret == 0 && target == current)
209                         restore_access_regs(target->thread.acrs);
210         }
211
212         /* Finally, the ORIG_GPR2 value.  */
213         if (ret == 0)
214                 ret = utrace_regset_copyin(&pos, &count, &kbuf, &ubuf,
215                                            &regs->orig_gpr2, PT_ORIGGPR2, -1);
216
217         return ret;
218 }
219
220 static int
221 fpregs_get(struct task_struct *target,
222            const struct utrace_regset *regset,
223            unsigned int pos, unsigned int count,
224            void *kbuf, void __user *ubuf)
225 {
226         if (target == current)
227                 save_fp_regs(&target->thread.fp_regs);
228
229         return utrace_regset_copyout(&pos, &count, &kbuf, &ubuf,
230                                      &target->thread.fp_regs, 0, -1);
231 }
232
233 static int
234 fpregs_set(struct task_struct *target,
235             const struct utrace_regset *regset,
236             unsigned int pos, unsigned int count,
237             const void *kbuf, const void __user *ubuf)
238 {
239         int ret = 0;
240
241         if (target == current && (pos != 0 || count != sizeof(s390_fp_regs)))
242                 save_fp_regs(&target->thread.fp_regs);
243
244         /* If setting FPC, must validate it first. */
245         if (count > 0 && pos == 0) {
246                 unsigned long fpc;
247                 ret = utrace_regset_copyin(&pos, &count, &kbuf, &ubuf,
248                                            &fpc, 0, sizeof(fpc));
249                 if (ret)
250                         return ret;
251
252                 if ((fpc & ~((unsigned long) FPC_VALID_MASK
253                              << (BITS_PER_LONG - 32))) != 0)
254                         return -EINVAL;
255
256                 memcpy(&target->thread.fp_regs, &fpc, sizeof(fpc));
257         }
258
259         if (ret == 0)
260                 ret = utrace_regset_copyin(&pos, &count, &kbuf, &ubuf,
261                                            &target->thread.fp_regs, 0, -1);
262
263         if (ret == 0 && target == current)
264                 restore_fp_regs(&target->thread.fp_regs);
265
266         return ret;
267 }
268
269 static int
270 per_info_get(struct task_struct *target,
271              const struct utrace_regset *regset,
272              unsigned int pos, unsigned int count,
273              void *kbuf, void __user *ubuf)
274 {
275         return utrace_regset_copyout(&pos, &count, &kbuf, &ubuf,
276                                      &target->thread.per_info, 0, -1);
277 }
278
279 static int
280 per_info_set(struct task_struct *target,
281              const struct utrace_regset *regset,
282              unsigned int pos, unsigned int count,
283              const void *kbuf, const void __user *ubuf)
284 {
285         int ret = utrace_regset_copyin(&pos, &count, &kbuf, &ubuf,
286                                        &target->thread.per_info, 0, -1);
287
288         FixPerRegisters(target);
289
290         return ret;
291 }
292
293
294 /*
295  * These are our native regset flavors.
296  */
297 static const struct utrace_regset native_regsets[] = {
298         {
299                 .size = sizeof(long), .align = sizeof(long),
300                 .n = sizeof(s390_regs) / sizeof(long),
301                 .get = genregs_get, .set = genregs_set
302         },
303         {
304                 .size = sizeof(long), .align = sizeof(long),
305                 .n = sizeof(s390_fp_regs) / sizeof(long),
306                 .get = fpregs_get, .set = fpregs_set
307         },
308         {
309                 .size = sizeof(long), .align = sizeof(long),
310                 .n = sizeof(per_struct) / sizeof(long),
311                 .get = per_info_get, .set = per_info_set
312         },
313 };
314
315 const struct utrace_regset_view utrace_s390_native_view = {
316         .name = UTS_MACHINE, .e_machine = ELF_ARCH,
317         .regsets = native_regsets, .n = ARRAY_SIZE(native_regsets)
318 };
319 EXPORT_SYMBOL_GPL(utrace_s390_native_view);
320
321
322 #ifdef CONFIG_COMPAT
323 static int
324 s390_genregs_get(struct task_struct *target,
325                  const struct utrace_regset *regset,
326                  unsigned int pos, unsigned int count,
327                  void *kbuf, void __user *ubuf)
328 {
329         struct pt_regs *regs = task_pt_regs(target);
330         int ret = 0;
331
332         /* Fake a 31 bit psw mask. */
333         if (count > 0 && pos == PT_PSWMASK / 2) {
334                 u32 pswmask = PSW32_MASK_MERGE(PSW32_USER_BITS,
335                                                (u32) (regs->psw.mask >> 32));
336                 ret = utrace_regset_copyout(&pos, &count, &kbuf, &ubuf,
337                                             &pswmask, PT_PSWMASK / 2,
338                                             PT_PSWADDR / 2);
339         }
340
341         /* Fake a 31 bit psw address. */
342         if (ret == 0 && count > 0 && pos == PT_PSWADDR / 2) {
343                 u32 pswaddr = (u32) regs->psw.addr | PSW32_ADDR_AMODE31;
344                 ret = utrace_regset_copyout(&pos, &count, &kbuf, &ubuf,
345                                             &pswaddr, PT_PSWADDR / 2,
346                                             PT_GPR0 / 2);
347         }
348
349         /* The GPRs are directly on the stack.  Just truncate them.  */
350         while (ret == 0 && count > 0 && pos < PT_ACR0 / 2) {
351                 u32 value = regs->gprs[(pos - PT_GPR0 / 2) / sizeof(u32)];
352                 if (kbuf) {
353                         *(u32 *) kbuf = value;
354                         kbuf += sizeof(u32);
355                 }
356                 else if (put_user(value, (u32 __user *) ubuf))
357                         ret = -EFAULT;
358                 else
359                         ubuf += sizeof(u32);
360                 pos += sizeof(u32);
361                 count -= sizeof(u32);
362         }
363
364         /* The ACRs are kept in the thread_struct.  */
365         if (ret == 0 && count > 0 && pos < PT_ACR0 / 2 + NUM_ACRS * ACR_SIZE) {
366                 if (target == current)
367                         save_access_regs(target->thread.acrs);
368
369                 ret = utrace_regset_copyout(&pos, &count, &kbuf, &ubuf,
370                                             target->thread.acrs,
371                                             PT_ACR0 / 2,
372                                             PT_ACR0 / 2 + NUM_ACRS * ACR_SIZE);
373         }
374
375         /* Finally, the ORIG_GPR2 value.  */
376         if (count > 0) {
377                 if (kbuf)
378                         *(u32 *) kbuf = regs->orig_gpr2;
379                 else if (put_user((u32) regs->orig_gpr2,
380                                   (u32 __user *) ubuf))
381                         return -EFAULT;
382         }
383
384         return 0;
385 }
386
387 static int
388 s390_genregs_set(struct task_struct *target,
389                  const struct utrace_regset *regset,
390                  unsigned int pos, unsigned int count,
391                  const void *kbuf, const void __user *ubuf)
392 {
393         struct pt_regs *regs = task_pt_regs(target);
394         int ret = 0;
395
396         /* Check for an invalid PSW mask.  */
397         if (count > 0 && pos == PT_PSWMASK / 2) {
398                 u32 pswmask;
399                 ret = utrace_regset_copyin(&pos, &count, &kbuf, &ubuf,
400                                            &pswmask, PT_PSWMASK / 2,
401                                            PT_PSWADDR / 2);
402                 if (ret)
403                         return ret;
404
405                 if (pswmask != PSW_MASK_MERGE(PSW_USER32_BITS, pswmask))
406                         /* Invalid psw mask. */
407                         return -EINVAL;
408
409                 /* Build a 64 bit psw mask from 31 bit mask. */
410                 regs->psw.mask = PSW_MASK_MERGE(PSW_USER32_BITS,
411                                                 (u64) pswmask << 32);
412                 FixPerRegisters(target);
413         }
414
415         /* Build a 64 bit psw address from 31 bit address. */
416         if (count > 0 && pos == PT_PSWADDR / 2) {
417                 u32 pswaddr;
418                 ret = utrace_regset_copyin(&pos, &count, &kbuf, &ubuf,
419                                            &pswaddr, PT_PSWADDR / 2,
420                                            PT_GPR0 / 2);
421                 if (ret == 0)
422                         /* Build a 64 bit psw mask from 31 bit mask. */
423                         regs->psw.addr = pswaddr & PSW32_ADDR_INSN;
424         }
425
426         /* The GPRs are directly onto the stack. */
427         while (ret == 0 && count > 0 && pos < PT_ACR0 / 2) {
428                 u32 value;
429
430                 if (kbuf) {
431                         value = *(const u32 *) kbuf;
432                         kbuf += sizeof(u32);
433                 }
434                 else if (get_user(value, (const u32 __user *) ubuf))
435                         return -EFAULT;
436                 else
437                         ubuf += sizeof(u32);
438                 pos += sizeof(u32);
439                 count -= sizeof(u32);
440
441                 regs->gprs[(pos - PT_GPR0 / 2) / sizeof(u32)] = value;
442         }
443
444         /* The ACRs are kept in the thread_struct.  */
445         if (count > 0 && pos < PT_ORIGGPR2 / 2) {
446                 if (target == current
447                     && (pos != PT_ACR0 / 2
448                         || count < sizeof(target->thread.acrs)))
449                         save_access_regs(target->thread.acrs);
450
451                 ret = utrace_regset_copyin(&pos, &count, &kbuf, &ubuf,
452                                            target->thread.acrs,
453                                            PT_ACR0 / 2,
454                                            PT_ACR0 / 2 + NUM_ACRS * ACR_SIZE);
455
456                 if (ret == 0 && target == current)
457                         restore_access_regs(target->thread.acrs);
458         }
459
460         /* Finally, the ORIG_GPR2 value.  */
461         if (ret == 0 && count > 0) {
462                 u32 value;
463                 if (kbuf)
464                         value = *(const u32 *) kbuf;
465                 else if (get_user(value, (const u32 __user *) ubuf))
466                         return -EFAULT;
467                 regs->orig_gpr2 = value;
468         }
469
470         return ret;
471 }
472
473
474 /*
475  * This is magic. See per_struct and per_struct32.
476  * By incident the offsets in per_struct are exactly
477  * twice the offsets in per_struct32 for all fields.
478  * The 8 byte fields need special handling though,
479  * because the second half (bytes 4-7) is needed and
480  * not the first half.
481  */
482 static unsigned int
483 offset_from_per32(unsigned int offset)
484 {
485         BUILD_BUG_ON(offsetof(per_struct32, control_regs) != 0);
486         if (offset - offsetof(per_struct32, control_regs) < 3*sizeof(u32)
487             || (offset >= offsetof(per_struct32, starting_addr) &&
488                 offset <= offsetof(per_struct32, ending_addr))
489             || offset == offsetof(per_struct32, lowcore.words.address))
490                 offset = offset*2 + 4;
491         else
492                 offset = offset*2;
493         return offset;
494 }
495
496 static int
497 s390_per_info_get(struct task_struct *target,
498                   const struct utrace_regset *regset,
499                   unsigned int pos, unsigned int count,
500                   void *kbuf, void __user *ubuf)
501 {
502         while (count > 0) {
503                 u32 val = *(u32 *) ((char *) &target->thread.per_info
504                                     + offset_from_per32 (pos));
505                 if (kbuf) {
506                         *(u32 *) kbuf = val;
507                         kbuf += sizeof(u32);
508                 }
509                 else if (put_user(val, (u32 __user *) ubuf))
510                         return -EFAULT;
511                 else
512                         ubuf += sizeof(u32);
513                 pos += sizeof(u32);
514                 count -= sizeof(u32);
515         }
516         return 0;
517 }
518
519 static int
520 s390_per_info_set(struct task_struct *target,
521                   const struct utrace_regset *regset,
522                   unsigned int pos, unsigned int count,
523                   const void *kbuf, const void __user *ubuf)
524 {
525         while (count > 0) {
526                 u32 val;
527
528                 if (kbuf) {
529                         val = *(const u32 *) kbuf;
530                         kbuf += sizeof(u32);
531                 }
532                 else if (get_user(val, (const u32 __user *) ubuf))
533                         return -EFAULT;
534                 else
535                         ubuf += sizeof(u32);
536                 pos += sizeof(u32);
537                 count -= sizeof(u32);
538
539                 *(u32 *) ((char *) &target->thread.per_info
540                           + offset_from_per32 (pos)) = val;
541         }
542         return 0;
543 }
544
545
546 static const struct utrace_regset s390_compat_regsets[] = {
547         {
548                 .size = sizeof(u32), .align = sizeof(u32),
549                 .n = sizeof(s390_regs) / sizeof(long),
550                 .get = s390_genregs_get, .set = s390_genregs_set
551         },
552         {
553                 .size = sizeof(u32), .align = sizeof(u32),
554                 .n = sizeof(s390_fp_regs) / sizeof(u32),
555                 .get = fpregs_get, .set = fpregs_set
556         },
557         {
558                 .size = sizeof(u32), .align = sizeof(u32),
559                 .n = sizeof(per_struct) / sizeof(u32),
560                 .get = s390_per_info_get, .set = s390_per_info_set
561         },
562 };
563
564 const struct utrace_regset_view utrace_s390_compat_view = {
565         .name = "s390", .e_machine = EM_S390,
566         .regsets = s390_compat_regsets, .n = ARRAY_SIZE(s390_compat_regsets)
567 };
568 EXPORT_SYMBOL_GPL(utrace_s390_compat_view);
569 #endif  /* CONFIG_COMPAT */
570
571
572 #ifdef CONFIG_PTRACE
573 static const struct ptrace_layout_segment s390_uarea[] = {
574         {PT_PSWMASK, PT_FPC, 0, 0},
575         {PT_FPC, PT_CR_9, 1, 0},
576         {PT_CR_9, PT_IEEE_IP, 2, 0},
577         {PT_IEEE_IP, sizeof(struct user), -1, -1},
578         {0, 0, -1, 0}
579 };
580
581 int arch_ptrace(long *request, struct task_struct *child,
582                 struct utrace_attached_engine *engine,
583                 unsigned long addr, unsigned long data, long *val)
584 {
585         ptrace_area parea;
586         unsigned long tmp;
587         int copied;
588
589         switch (*request) {
590         case PTRACE_PEEKUSR:
591 #ifdef CONFIG_64BIT
592                 /*
593                  * Stupid gdb peeks/pokes the access registers in 64 bit with
594                  * an alignment of 4. Programmers from hell...
595                  */
596                 if (addr >= PT_ACR0 && addr < PT_ACR15) {
597                         if (addr & 3)
598                                 return -EIO;
599                         tmp = *(unsigned long *)
600                                 ((char *) child->thread.acrs + addr - PT_ACR0);
601                         return put_user(tmp, (unsigned long __user *) data);
602                 }
603                 else if (addr == PT_ACR15) {
604                         /*
605                          * Very special case: old & broken 64 bit gdb reading
606                          * from acrs[15]. Result is a 64 bit value. Read the
607                          * 32 bit acrs[15] value and shift it by 32. Sick...
608                          */
609                         tmp = ((unsigned long) child->thread.acrs[15]) << 32;
610                         return put_user(tmp, (unsigned long __user *) data);
611                 }
612 #endif
613                 return ptrace_peekusr(child, engine, s390_uarea, addr, data);
614         case PTRACE_POKEUSR:
615 #ifdef CONFIG_64BIT
616                 if (addr >= PT_ACR0 && addr < PT_ACR15) {
617                         if (addr & 3)
618                                 return -EIO;
619                         *(unsigned long *) ((char *) child->thread.acrs
620                                             + addr - PT_ACR0) = data;
621                         return 0;
622                 }
623                 else if (addr == PT_ACR15) {
624                         /*
625                          * Very special case: old & broken 64 bit gdb writing
626                          * to acrs[15] with a 64 bit value. Ignore the lower
627                          * half of the value and write the upper 32 bit to
628                          * acrs[15]. Sick...
629                          */
630                         child->thread.acrs[15] = data >> 32;
631                         return 0;
632                 }
633 #endif
634                 return ptrace_pokeusr(child, engine, s390_uarea, addr, data);
635
636         case PTRACE_PEEKUSR_AREA:
637         case PTRACE_POKEUSR_AREA:
638                 if (copy_from_user(&parea, (ptrace_area __user *) addr,
639                                    sizeof(parea)))
640                         return -EFAULT;
641                 if ((parea.kernel_addr | parea.len) & (sizeof(data) - 1))
642                         return -EIO;
643                 return ptrace_layout_access(child, engine,
644                                             utrace_native_view(current),
645                                             s390_uarea,
646                                             parea.kernel_addr, parea.len,
647                                             (void __user *) parea.process_addr,
648                                             NULL,
649                                             *request == PTRACE_POKEUSR_AREA);
650
651         case PTRACE_PEEKTEXT:
652         case PTRACE_PEEKDATA:
653                 /* Remove high order bit from address (only for 31 bit). */
654                 addr &= PSW_ADDR_INSN;
655                 /* read word at location addr. */
656                 copied = access_process_vm(child, addr, &tmp, sizeof(tmp), 0);
657                 if (copied != sizeof(tmp))
658                         return -EIO;
659                 return put_user(tmp, (unsigned long __user *) data);
660
661         case PTRACE_POKETEXT:
662         case PTRACE_POKEDATA:
663                 /* Remove high order bit from address (only for 31 bit). */
664                 addr &= PSW_ADDR_INSN;
665                 /* write the word at location addr. */
666                 copied = access_process_vm(child, addr, &data, sizeof(data),1);
667                 if (copied != sizeof(data))
668                         return -EIO;
669                 return 0;
670         }
671
672         return -ENOSYS;
673 }
674
675 #ifdef CONFIG_COMPAT
676 static const struct ptrace_layout_segment s390_compat_uarea[] = {
677         {PT_PSWMASK / 2, PT_FPC / 2, 0, 0},
678         {PT_FPC / 2, PT_CR_9 / 2, 1, 0},
679         {PT_CR_9 / 2, PT_IEEE_IP / 2, 2, 0},
680         {PT_IEEE_IP / 2, sizeof(struct user32), -1, -1},
681         {0, 0, -1, 0}
682 };
683
684 int arch_compat_ptrace(compat_long_t *request,
685                        struct task_struct *child,
686                        struct utrace_attached_engine *engine,
687                        compat_ulong_t addr, compat_ulong_t data,
688                        compat_long_t *val)
689 {
690         ptrace_area_emu31 parea;
691
692         switch (*request) {
693         case PTRACE_PEEKUSR:
694                 return ptrace_compat_peekusr(child, engine, s390_compat_uarea,
695                                              addr, data);
696         case PTRACE_POKEUSR:
697                 return ptrace_compat_pokeusr(child, engine, s390_compat_uarea,
698                                              addr, data);
699         case PTRACE_PEEKUSR_AREA:
700         case PTRACE_POKEUSR_AREA:
701                 if (copy_from_user(&parea, ((ptrace_area_emu31 __user *)
702                                             (unsigned long) addr),
703                                    sizeof(parea)))
704                         return -EFAULT;
705                 if ((parea.kernel_addr | parea.len) & (sizeof(data) - 1))
706                         return -EIO;
707                 return ptrace_layout_access(child, engine,
708                                             utrace_native_view(current),
709                                             s390_compat_uarea,
710                                             parea.kernel_addr, parea.len,
711                                             (void __user *)
712                                             (unsigned long) parea.process_addr,
713                                             NULL,
714                                             *request == PTRACE_POKEUSR_AREA);
715         }
716
717         return -ENOSYS;
718 }
719 #endif  /* CONFIG_COMPAT */
720 #endif  /* CONFIG_PTRACE */
721
722
723 asmlinkage void
724 syscall_trace(struct pt_regs *regs, int entryexit)
725 {
726         if (unlikely(current->audit_context) && entryexit)
727                 audit_syscall_exit(AUDITSC_RESULT(regs->gprs[2]), regs->gprs[2]);
728
729         if (test_thread_flag(TIF_SYSCALL_TRACE)) {
730                 tracehook_report_syscall(regs, entryexit);
731
732                 /*
733                  * If the debugger has set an invalid system call number,
734                  * we prepare to skip the system call restart handling.
735                  */
736                 if (!entryexit && regs->gprs[2] >= NR_syscalls)
737                         regs->trap = -1;
738         }
739
740         if (unlikely(current->audit_context) && !entryexit)
741                 audit_syscall_entry(test_thread_flag(TIF_31BIT)?AUDIT_ARCH_S390:AUDIT_ARCH_S390X,
742                                     regs->gprs[2], regs->orig_gpr2, regs->gprs[3],
743                                     regs->gprs[4], regs->gprs[5]);
744 }