arch/sparc/kernel/sun4m_smp.c

   1 /* sun4m_smp.c: Sparc SUN4M SMP support.
   2  *
   3  * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
   4  */
   5
   6 #include <asm/head.h>
   7
   8 #include <linux/kernel.h>
   9 #include <linux/sched.h>
  10 #include <linux/threads.h>
  11 #include <linux/smp.h>
  12 #include <linux/smp_lock.h>
  13 #include <linux/interrupt.h>
  14 #include <linux/kernel_stat.h>
  15 #include <linux/init.h>
  16 #include <linux/spinlock.h>
  17 #include <linux/mm.h>
  18 #include <linux/swap.h>
  19 #include <linux/profile.h>
  20 #include <asm/cacheflush.h>
  21 #include <asm/tlbflush.h>
  22
  23 #include <asm/ptrace.h>
  24 #include <asm/atomic.h>
  25
  26 #include <asm/delay.h>
  27 #include <asm/irq.h>
  28 #include <asm/page.h>
  29 #include <asm/pgalloc.h>
  30 #include <asm/pgtable.h>
  31 #include <asm/oplib.h>
  32 #include <asm/cpudata.h>
  33
  34 #define IRQ_RESCHEDULE          13
  35 #define IRQ_STOP_CPU            14
  36 #define IRQ_CROSS_CALL          15
  37
  38 extern ctxd_t *srmmu_ctx_table_phys;
  39
  40 extern void calibrate_delay(void);
  41
  42 extern volatile int smp_processors_ready;
  43 extern int smp_num_cpus;
  44 extern int smp_threads_ready;
  45 extern volatile unsigned long cpu_callin_map[NR_CPUS];
  46 extern unsigned char boot_cpu_id;
  47 extern int smp_activated;
  48 extern volatile int __cpu_number_map[NR_CPUS];
  49 extern volatile int __cpu_logical_map[NR_CPUS];
  50 extern volatile unsigned long ipi_count;
  51 extern volatile int smp_process_available;
  52 extern volatile int smp_commenced;
  53 extern int __smp4m_processor_id(void);
  54
  55 /*#define SMP_DEBUG*/
  56
  57 #ifdef SMP_DEBUG
  58 #define SMP_PRINTK(x)   printk x
  59 #else
  60 #define SMP_PRINTK(x)
  61 #endif
  62
  63 static inline unsigned long swap(volatile unsigned long *ptr, unsigned long val)
  64 {
  65         __asm__ __volatile__("swap [%1], %0\n\t" :
  66                              "=&r" (val), "=&r" (ptr) :
  67                              "0" (val), "1" (ptr));
  68         return val;
  69 }
  70
  71 static void smp_setup_percpu_timer(void);
  72 extern void cpu_probe(void);
  73
  74 void __init smp4m_callin(void)
  75 {
  76         int cpuid = hard_smp_processor_id();
  77
  78         local_flush_cache_all();
  79         local_flush_tlb_all();
  80
  81         set_irq_udt(boot_cpu_id);
  82
  83         /* Get our local ticker going. */
  84         smp_setup_percpu_timer();
  85
  86         calibrate_delay();
  87         smp_store_cpu_info(cpuid);
  88
  89         local_flush_cache_all();
  90         local_flush_tlb_all();
  91
  92         /*
  93          * Unblock the master CPU _only_ when the scheduler state
  94          * of all secondary CPUs will be up-to-date, so after
  95          * the SMP initialization the master will be just allowed
  96          * to call the scheduler code.
  97          */
  98         /* Allow master to continue. */
  99         swap((unsigned long *)&cpu_callin_map[cpuid], 1);
 100
 101         local_flush_cache_all();
 102         local_flush_tlb_all();
 103
 104         cpu_probe();
 105
 106         /* Fix idle thread fields. */
 107         __asm__ __volatile__("ld [%0], %%g6\n\t"
 108                              : : "r" (&current_set[cpuid])
 109                              : "memory" /* paranoid */);
 110
 111         /* Attach to the address space of init_task. */
 112         atomic_inc(&init_mm.mm_count);
 113         current->active_mm = &init_mm;
 114
 115         while(!smp_commenced)
 116                 barrier();
 117
 118         local_flush_cache_all();
 119         local_flush_tlb_all();
 120
 121         local_irq_enable();
 122 }
 123
 124 extern int cpu_idle(void *unused);
 125 extern void init_IRQ(void);
 126 extern void cpu_panic(void);
 127
 128 /*
 129  *      Cycle through the processors asking the PROM to start each one.
 130  */
 131
 132 extern struct linux_prom_registers smp_penguin_ctable;
 133 extern unsigned long trapbase_cpu1[];
 134 extern unsigned long trapbase_cpu2[];
 135 extern unsigned long trapbase_cpu3[];
 136
 137 void __init smp4m_boot_cpus(void)
 138 {
 139         int cpucount = 0;
 140         int i, mid;
 141
 142         printk("Entering SMP Mode...\n");
 143
 144         local_irq_enable();
 145         cpus_clear(cpu_present_map);
 146
 147         for (i = 0; !cpu_find_by_instance(i, NULL, &mid); i++)
 148                 cpu_set(mid, cpu_present_map);
 149
 150         for(i=0; i < NR_CPUS; i++) {
 151                 __cpu_number_map[i] = -1;
 152                 __cpu_logical_map[i] = -1;
 153         }
 154
 155         __cpu_number_map[boot_cpu_id] = 0;
 156         __cpu_logical_map[0] = boot_cpu_id;
 157         current_thread_info()->cpu = boot_cpu_id;
 158
 159         smp_store_cpu_info(boot_cpu_id);
 160         set_irq_udt(boot_cpu_id);
 161         smp_setup_percpu_timer();
 162         local_flush_cache_all();
 163         if(cpu_find_by_instance(1, NULL, NULL))
 164                 return;  /* Not an MP box. */
 165         for(i = 0; i < NR_CPUS; i++) {
 166                 if(i == boot_cpu_id)
 167                         continue;
 168
 169                 if (cpu_isset(i, cpu_present_map)) {
 170                         extern unsigned long sun4m_cpu_startup;
 171                         unsigned long *entry = &sun4m_cpu_startup;
 172                         struct task_struct *p;
 173                         int timeout;
 174
 175                         /* Cook up an idler for this guy. */
 176                         p = fork_idle(i);
 177                         cpucount++;
 178                         current_set[i] = p->thread_info;
 179                         /* See trampoline.S for details... */
 180                         entry += ((i-1) * 3);
 181
 182                         /*
 183                          * Initialize the contexts table
 184                          * Since the call to prom_startcpu() trashes the structure,
 185                          * we need to re-initialize it for each cpu
 186                          */
 187                         smp_penguin_ctable.which_io = 0;
 188                         smp_penguin_ctable.phys_addr = (unsigned int) srmmu_ctx_table_phys;
 189                         smp_penguin_ctable.reg_size = 0;
 190
 191                         /* whirrr, whirrr, whirrrrrrrrr... */
 192                         printk("Starting CPU %d at %p\n", i, entry);
 193                         local_flush_cache_all();
 194                         prom_startcpu(cpu_data(i).prom_node,
 195                                       &smp_penguin_ctable, 0, (char *)entry);
 196
 197                         /* wheee... it's going... */
 198                         for(timeout = 0; timeout < 10000; timeout++) {
 199                                 if(cpu_callin_map[i])
 200                                         break;
 201                                 udelay(200);
 202                         }
 203                         if(cpu_callin_map[i]) {
 204                                 /* Another "Red Snapper". */
 205                                 __cpu_number_map[i] = i;
 206                                 __cpu_logical_map[i] = i;
 207                         } else {
 208                                 cpucount--;
 209                                 printk("Processor %d is stuck.\n", i);
 210                         }
 211                 }
 212                 if(!(cpu_callin_map[i])) {
 213                         cpu_clear(i, cpu_present_map);
 214                         __cpu_number_map[i] = -1;
 215                 }
 216         }
 217         local_flush_cache_all();
 218         if(cpucount == 0) {
 219                 printk("Error: only one Processor found.\n");
 220                 cpu_present_map = cpumask_of_cpu(smp_processor_id());
 221         } else {
 222                 unsigned long bogosum = 0;
 223                 for(i = 0; i < NR_CPUS; i++) {
 224                         if (cpu_isset(i, cpu_present_map))
 225                                 bogosum += cpu_data(i).udelay_val;
 226                 }
 227                 printk("Total of %d Processors activated (%lu.%02lu BogoMIPS).\n",
 228                        cpucount + 1,
 229                        bogosum/(500000/HZ),
 230                        (bogosum/(5000/HZ))%100);
 231                 smp_activated = 1;
 232                 smp_num_cpus = cpucount + 1;
 233         }
 234
 235         /* Free unneeded trap tables */
 236         if (!cpu_isset(i, cpu_present_map)) {
 237                 ClearPageReserved(virt_to_page(trapbase_cpu1));
 238                 set_page_count(virt_to_page(trapbase_cpu1), 1);
 239                 free_page((unsigned long)trapbase_cpu1);
 240                 totalram_pages++;
 241                 num_physpages++;
 242         }
 243         if (!cpu_isset(2, cpu_present_map)) {
 244                 ClearPageReserved(virt_to_page(trapbase_cpu2));
 245                 set_page_count(virt_to_page(trapbase_cpu2), 1);
 246                 free_page((unsigned long)trapbase_cpu2);
 247                 totalram_pages++;
 248                 num_physpages++;
 249         }
 250         if (!cpu_isset(3, cpu_present_map)) {
 251                 ClearPageReserved(virt_to_page(trapbase_cpu3));
 252                 set_page_count(virt_to_page(trapbase_cpu3), 1);
 253                 free_page((unsigned long)trapbase_cpu3);
 254                 totalram_pages++;
 255                 num_physpages++;
 256         }
 257
 258         /* Ok, they are spinning and ready to go. */
 259         smp_processors_ready = 1;
 260 }
 261
 262 /* At each hardware IRQ, we get this called to forward IRQ reception
 263  * to the next processor.  The caller must disable the IRQ level being
 264  * serviced globally so that there are no double interrupts received.
 265  *
 266  * XXX See sparc64 irq.c.
 267  */
 268 void smp4m_irq_rotate(int cpu)
 269 {
 270 }
 271
 272 /* Cross calls, in order to work efficiently and atomically do all
 273  * the message passing work themselves, only stopcpu and reschedule
 274  * messages come through here.
 275  */
 276 void smp4m_message_pass(int target, int msg, unsigned long data, int wait)
 277 {
 278         static unsigned long smp_cpu_in_msg[NR_CPUS];
 279         cpumask_t mask;
 280         int me = smp_processor_id();
 281         int irq, i;
 282
 283         if(msg == MSG_RESCHEDULE) {
 284                 irq = IRQ_RESCHEDULE;
 285
 286                 if(smp_cpu_in_msg[me])
 287                         return;
 288         } else if(msg == MSG_STOP_CPU) {
 289                 irq = IRQ_STOP_CPU;
 290         } else {
 291                 goto barf;
 292         }
 293
 294         smp_cpu_in_msg[me]++;
 295         if(target == MSG_ALL_BUT_SELF || target == MSG_ALL) {
 296                 mask = cpu_present_map;
 297                 if(target == MSG_ALL_BUT_SELF)
 298                         cpu_clear(me, mask);
 299                 for(i = 0; i < 4; i++) {
 300                         if (cpu_isset(i, mask))
 301                                 set_cpu_int(i, irq);
 302                 }
 303         } else {
 304                 set_cpu_int(target, irq);
 305         }
 306         smp_cpu_in_msg[me]--;
 307
 308         return;
 309 barf:
 310         printk("Yeeee, trying to send SMP msg(%d) on cpu %d\n", msg, me);
 311         panic("Bogon SMP message pass.");
 312 }
 313
 314 static struct smp_funcall {
 315         smpfunc_t func;
 316         unsigned long arg1;
 317         unsigned long arg2;
 318         unsigned long arg3;
 319         unsigned long arg4;
 320         unsigned long arg5;
 321         unsigned long processors_in[NR_CPUS];  /* Set when ipi entered. */
 322         unsigned long processors_out[NR_CPUS]; /* Set when ipi exited. */
 323 } ccall_info;
 324
 325 static spinlock_t cross_call_lock = SPIN_LOCK_UNLOCKED;
 326
 327 /* Cross calls must be serialized, at least currently. */
 328 void smp4m_cross_call(smpfunc_t func, unsigned long arg1, unsigned long arg2,
 329                     unsigned long arg3, unsigned long arg4, unsigned long arg5)
 330 {
 331         if(smp_processors_ready) {
 332                 register int ncpus = smp_num_cpus;
 333                 unsigned long flags;
 334
 335                 spin_lock_irqsave(&cross_call_lock, flags);
 336
 337                 /* Init function glue. */
 338                 ccall_info.func = func;
 339                 ccall_info.arg1 = arg1;
 340                 ccall_info.arg2 = arg2;
 341                 ccall_info.arg3 = arg3;
 342                 ccall_info.arg4 = arg4;
 343                 ccall_info.arg5 = arg5;
 344
 345                 /* Init receive/complete mapping, plus fire the IPI's off. */
 346                 {
 347                         cpumask_t mask = cpu_present_map;
 348                         register int i;
 349
 350                         cpu_clear(smp_processor_id(), mask);
 351                         for(i = 0; i < ncpus; i++) {
 352                                 if (cpu_isset(i, mask)) {
 353                                         ccall_info.processors_in[i] = 0;
 354                                         ccall_info.processors_out[i] = 0;
 355                                         set_cpu_int(i, IRQ_CROSS_CALL);
 356                                 } else {
 357                                         ccall_info.processors_in[i] = 1;
 358                                         ccall_info.processors_out[i] = 1;
 359                                 }
 360                         }
 361                 }
 362
 363                 {
 364                         register int i;
 365
 366                         i = 0;
 367                         do {
 368                                 while(!ccall_info.processors_in[i])
 369                                         barrier();
 370                         } while(++i < ncpus);
 371
 372                         i = 0;
 373                         do {
 374                                 while(!ccall_info.processors_out[i])
 375                                         barrier();
 376                         } while(++i < ncpus);
 377                 }
 378
 379                 spin_unlock_irqrestore(&cross_call_lock, flags);
 380         }
 381 }
 382
 383 /* Running cross calls. */
 384 void smp4m_cross_call_irq(void)
 385 {
 386         int i = smp_processor_id();
 387
 388         ccall_info.processors_in[i] = 1;
 389         ccall_info.func(ccall_info.arg1, ccall_info.arg2, ccall_info.arg3,
 390                         ccall_info.arg4, ccall_info.arg5);
 391         ccall_info.processors_out[i] = 1;
 392 }
 393
 394 void smp4m_percpu_timer_interrupt(struct pt_regs *regs)
 395 {
 396         int cpu = smp_processor_id();
 397
 398         clear_profile_irq(cpu);
 399
 400         profile_tick(CPU_PROFILING, regs);
 401
 402         if(!--prof_counter(cpu)) {
 403                 int user = user_mode(regs);
 404
 405                 irq_enter();
 406                 update_process_times(user);
 407                 irq_exit();
 408
 409                 prof_counter(cpu) = prof_multiplier(cpu);
 410         }
 411 }
 412
 413 extern unsigned int lvl14_resolution;
 414
 415 static void __init smp_setup_percpu_timer(void)
 416 {
 417         int cpu = smp_processor_id();
 418
 419         prof_counter(cpu) = prof_multiplier(cpu) = 1;
 420         load_profile_irq(cpu, lvl14_resolution);
 421
 422         if(cpu == boot_cpu_id)
 423                 enable_pil_irq(14);
 424 }
 425
 426 void __init smp4m_blackbox_id(unsigned *addr)
 427 {
 428         int rd = *addr & 0x3e000000;
 429         int rs1 = rd >> 11;
 430
 431         addr[0] = 0x81580000 | rd;              /* rd %tbr, reg */
 432         addr[1] = 0x8130200c | rd | rs1;        /* srl reg, 0xc, reg */
 433         addr[2] = 0x80082003 | rd | rs1;        /* and reg, 3, reg */
 434 }
 435
 436 void __init smp4m_blackbox_current(unsigned *addr)
 437 {
 438         int rd = *addr & 0x3e000000;
 439         int rs1 = rd >> 11;
 440
 441         addr[0] = 0x81580000 | rd;              /* rd %tbr, reg */
 442         addr[2] = 0x8130200a | rd | rs1;        /* srl reg, 0xa, reg */
 443         addr[4] = 0x8008200c | rd | rs1;        /* and reg, 3, reg */
 444 }
 445
 446 void __init sun4m_init_smp(void)
 447 {
 448         BTFIXUPSET_BLACKBOX(hard_smp_processor_id, smp4m_blackbox_id);
 449         BTFIXUPSET_BLACKBOX(load_current, smp4m_blackbox_current);
 450         BTFIXUPSET_CALL(smp_cross_call, smp4m_cross_call, BTFIXUPCALL_NORM);
 451         BTFIXUPSET_CALL(smp_message_pass, smp4m_message_pass, BTFIXUPCALL_NORM);
 452         BTFIXUPSET_CALL(__hard_smp_processor_id, __smp4m_processor_id, BTFIXUPCALL_NORM);
 453 }