vserver 1.9.5.x5
[linux-2.6.git] / arch / sparc / kernel / sun4m_smp.c
1 /* sun4m_smp.c: Sparc SUN4M SMP support.
2  *
3  * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
4  */
5
6 #include <asm/head.h>
7
8 #include <linux/kernel.h>
9 #include <linux/sched.h>
10 #include <linux/threads.h>
11 #include <linux/smp.h>
12 #include <linux/smp_lock.h>
13 #include <linux/interrupt.h>
14 #include <linux/kernel_stat.h>
15 #include <linux/init.h>
16 #include <linux/spinlock.h>
17 #include <linux/mm.h>
18 #include <linux/swap.h>
19 #include <linux/profile.h>
20 #include <asm/cacheflush.h>
21 #include <asm/tlbflush.h>
22
23 #include <asm/ptrace.h>
24 #include <asm/atomic.h>
25
26 #include <asm/delay.h>
27 #include <asm/irq.h>
28 #include <asm/page.h>
29 #include <asm/pgalloc.h>
30 #include <asm/pgtable.h>
31 #include <asm/oplib.h>
32 #include <asm/cpudata.h>
33
34 #define IRQ_RESCHEDULE          13
35 #define IRQ_STOP_CPU            14
36 #define IRQ_CROSS_CALL          15
37
38 extern ctxd_t *srmmu_ctx_table_phys;
39
40 extern void calibrate_delay(void);
41
42 extern volatile int smp_processors_ready;
43 extern int smp_num_cpus;
44 extern int smp_threads_ready;
45 extern volatile unsigned long cpu_callin_map[NR_CPUS];
46 extern unsigned char boot_cpu_id;
47 extern int smp_activated;
48 extern volatile int __cpu_number_map[NR_CPUS];
49 extern volatile int __cpu_logical_map[NR_CPUS];
50 extern volatile unsigned long ipi_count;
51 extern volatile int smp_process_available;
52 extern volatile int smp_commenced;
53 extern int __smp4m_processor_id(void);
54
55 /*#define SMP_DEBUG*/
56
57 #ifdef SMP_DEBUG
58 #define SMP_PRINTK(x)   printk x
59 #else
60 #define SMP_PRINTK(x)
61 #endif
62
63 static inline unsigned long swap(volatile unsigned long *ptr, unsigned long val)
64 {
65         __asm__ __volatile__("swap [%1], %0\n\t" :
66                              "=&r" (val), "=&r" (ptr) :
67                              "0" (val), "1" (ptr));
68         return val;
69 }
70
71 static void smp_setup_percpu_timer(void);
72 extern void cpu_probe(void);
73
74 void __init smp4m_callin(void)
75 {
76         int cpuid = hard_smp_processor_id();
77
78         local_flush_cache_all();
79         local_flush_tlb_all();
80
81         set_irq_udt(boot_cpu_id);
82
83         /* Get our local ticker going. */
84         smp_setup_percpu_timer();
85
86         calibrate_delay();
87         smp_store_cpu_info(cpuid);
88
89         local_flush_cache_all();
90         local_flush_tlb_all();
91
92         /*
93          * Unblock the master CPU _only_ when the scheduler state
94          * of all secondary CPUs will be up-to-date, so after
95          * the SMP initialization the master will be just allowed
96          * to call the scheduler code.
97          */
98         /* Allow master to continue. */
99         swap((unsigned long *)&cpu_callin_map[cpuid], 1);
100
101         local_flush_cache_all();
102         local_flush_tlb_all();
103         
104         cpu_probe();
105
106         /* Fix idle thread fields. */
107         __asm__ __volatile__("ld [%0], %%g6\n\t"
108                              : : "r" (&current_set[cpuid])
109                              : "memory" /* paranoid */);
110
111         /* Attach to the address space of init_task. */
112         atomic_inc(&init_mm.mm_count);
113         current->active_mm = &init_mm;
114
115         while(!smp_commenced)
116                 barrier();
117
118         local_flush_cache_all();
119         local_flush_tlb_all();
120
121         local_irq_enable();
122 }
123
124 extern void init_IRQ(void);
125 extern void cpu_panic(void);
126
127 /*
128  *      Cycle through the processors asking the PROM to start each one.
129  */
130  
131 extern struct linux_prom_registers smp_penguin_ctable;
132 extern unsigned long trapbase_cpu1[];
133 extern unsigned long trapbase_cpu2[];
134 extern unsigned long trapbase_cpu3[];
135
136 void __init smp4m_boot_cpus(void)
137 {
138         int cpucount = 0;
139         int i, mid;
140
141         printk("Entering SMP Mode...\n");
142
143         local_irq_enable();
144         cpus_clear(cpu_present_map);
145
146         for (i = 0; !cpu_find_by_instance(i, NULL, &mid); i++)
147                 cpu_set(mid, cpu_present_map);
148
149         for(i=0; i < NR_CPUS; i++) {
150                 __cpu_number_map[i] = -1;
151                 __cpu_logical_map[i] = -1;
152         }
153
154         __cpu_number_map[boot_cpu_id] = 0;
155         __cpu_logical_map[0] = boot_cpu_id;
156         current_thread_info()->cpu = boot_cpu_id;
157
158         smp_store_cpu_info(boot_cpu_id);
159         set_irq_udt(boot_cpu_id);
160         smp_setup_percpu_timer();
161         local_flush_cache_all();
162         if(cpu_find_by_instance(1, NULL, NULL))
163                 return;  /* Not an MP box. */
164         for(i = 0; i < NR_CPUS; i++) {
165                 if(i == boot_cpu_id)
166                         continue;
167
168                 if (cpu_isset(i, cpu_present_map)) {
169                         extern unsigned long sun4m_cpu_startup;
170                         unsigned long *entry = &sun4m_cpu_startup;
171                         struct task_struct *p;
172                         int timeout;
173
174                         /* Cook up an idler for this guy. */
175                         p = fork_idle(i);
176                         cpucount++;
177                         current_set[i] = p->thread_info;
178                         /* See trampoline.S for details... */
179                         entry += ((i-1) * 3);
180
181                         /*
182                          * Initialize the contexts table
183                          * Since the call to prom_startcpu() trashes the structure,
184                          * we need to re-initialize it for each cpu
185                          */
186                         smp_penguin_ctable.which_io = 0;
187                         smp_penguin_ctable.phys_addr = (unsigned int) srmmu_ctx_table_phys;
188                         smp_penguin_ctable.reg_size = 0;
189
190                         /* whirrr, whirrr, whirrrrrrrrr... */
191                         printk("Starting CPU %d at %p\n", i, entry);
192                         local_flush_cache_all();
193                         prom_startcpu(cpu_data(i).prom_node,
194                                       &smp_penguin_ctable, 0, (char *)entry);
195
196                         /* wheee... it's going... */
197                         for(timeout = 0; timeout < 10000; timeout++) {
198                                 if(cpu_callin_map[i])
199                                         break;
200                                 udelay(200);
201                         }
202                         if(cpu_callin_map[i]) {
203                                 /* Another "Red Snapper". */
204                                 __cpu_number_map[i] = i;
205                                 __cpu_logical_map[i] = i;
206                         } else {
207                                 cpucount--;
208                                 printk("Processor %d is stuck.\n", i);
209                         }
210                 }
211                 if(!(cpu_callin_map[i])) {
212                         cpu_clear(i, cpu_present_map);
213                         __cpu_number_map[i] = -1;
214                 }
215         }
216         local_flush_cache_all();
217         if(cpucount == 0) {
218                 printk("Error: only one Processor found.\n");
219                 cpu_present_map = cpumask_of_cpu(smp_processor_id());
220         } else {
221                 unsigned long bogosum = 0;
222                 for(i = 0; i < NR_CPUS; i++) {
223                         if (cpu_isset(i, cpu_present_map))
224                                 bogosum += cpu_data(i).udelay_val;
225                 }
226                 printk("Total of %d Processors activated (%lu.%02lu BogoMIPS).\n",
227                        cpucount + 1,
228                        bogosum/(500000/HZ),
229                        (bogosum/(5000/HZ))%100);
230                 smp_activated = 1;
231                 smp_num_cpus = cpucount + 1;
232         }
233
234         /* Free unneeded trap tables */
235         if (!cpu_isset(i, cpu_present_map)) {
236                 ClearPageReserved(virt_to_page(trapbase_cpu1));
237                 set_page_count(virt_to_page(trapbase_cpu1), 1);
238                 free_page((unsigned long)trapbase_cpu1);
239                 totalram_pages++;
240                 num_physpages++;
241         }
242         if (!cpu_isset(2, cpu_present_map)) {
243                 ClearPageReserved(virt_to_page(trapbase_cpu2));
244                 set_page_count(virt_to_page(trapbase_cpu2), 1);
245                 free_page((unsigned long)trapbase_cpu2);
246                 totalram_pages++;
247                 num_physpages++;
248         }
249         if (!cpu_isset(3, cpu_present_map)) {
250                 ClearPageReserved(virt_to_page(trapbase_cpu3));
251                 set_page_count(virt_to_page(trapbase_cpu3), 1);
252                 free_page((unsigned long)trapbase_cpu3);
253                 totalram_pages++;
254                 num_physpages++;
255         }
256
257         /* Ok, they are spinning and ready to go. */
258         smp_processors_ready = 1;
259 }
260
261 /* At each hardware IRQ, we get this called to forward IRQ reception
262  * to the next processor.  The caller must disable the IRQ level being
263  * serviced globally so that there are no double interrupts received.
264  *
265  * XXX See sparc64 irq.c.
266  */
267 void smp4m_irq_rotate(int cpu)
268 {
269 }
270
271 /* Cross calls, in order to work efficiently and atomically do all
272  * the message passing work themselves, only stopcpu and reschedule
273  * messages come through here.
274  */
275 void smp4m_message_pass(int target, int msg, unsigned long data, int wait)
276 {
277         static unsigned long smp_cpu_in_msg[NR_CPUS];
278         cpumask_t mask;
279         int me = smp_processor_id();
280         int irq, i;
281
282         if(msg == MSG_RESCHEDULE) {
283                 irq = IRQ_RESCHEDULE;
284
285                 if(smp_cpu_in_msg[me])
286                         return;
287         } else if(msg == MSG_STOP_CPU) {
288                 irq = IRQ_STOP_CPU;
289         } else {
290                 goto barf;
291         }
292
293         smp_cpu_in_msg[me]++;
294         if(target == MSG_ALL_BUT_SELF || target == MSG_ALL) {
295                 mask = cpu_present_map;
296                 if(target == MSG_ALL_BUT_SELF)
297                         cpu_clear(me, mask);
298                 for(i = 0; i < 4; i++) {
299                         if (cpu_isset(i, mask))
300                                 set_cpu_int(i, irq);
301                 }
302         } else {
303                 set_cpu_int(target, irq);
304         }
305         smp_cpu_in_msg[me]--;
306
307         return;
308 barf:
309         printk("Yeeee, trying to send SMP msg(%d) on cpu %d\n", msg, me);
310         panic("Bogon SMP message pass.");
311 }
312
313 static struct smp_funcall {
314         smpfunc_t func;
315         unsigned long arg1;
316         unsigned long arg2;
317         unsigned long arg3;
318         unsigned long arg4;
319         unsigned long arg5;
320         unsigned long processors_in[NR_CPUS];  /* Set when ipi entered. */
321         unsigned long processors_out[NR_CPUS]; /* Set when ipi exited. */
322 } ccall_info;
323
324 static DEFINE_SPINLOCK(cross_call_lock);
325
326 /* Cross calls must be serialized, at least currently. */
327 void smp4m_cross_call(smpfunc_t func, unsigned long arg1, unsigned long arg2,
328                     unsigned long arg3, unsigned long arg4, unsigned long arg5)
329 {
330         if(smp_processors_ready) {
331                 register int ncpus = smp_num_cpus;
332                 unsigned long flags;
333
334                 spin_lock_irqsave(&cross_call_lock, flags);
335
336                 /* Init function glue. */
337                 ccall_info.func = func;
338                 ccall_info.arg1 = arg1;
339                 ccall_info.arg2 = arg2;
340                 ccall_info.arg3 = arg3;
341                 ccall_info.arg4 = arg4;
342                 ccall_info.arg5 = arg5;
343
344                 /* Init receive/complete mapping, plus fire the IPI's off. */
345                 {
346                         cpumask_t mask = cpu_present_map;
347                         register int i;
348
349                         cpu_clear(smp_processor_id(), mask);
350                         for(i = 0; i < ncpus; i++) {
351                                 if (cpu_isset(i, mask)) {
352                                         ccall_info.processors_in[i] = 0;
353                                         ccall_info.processors_out[i] = 0;
354                                         set_cpu_int(i, IRQ_CROSS_CALL);
355                                 } else {
356                                         ccall_info.processors_in[i] = 1;
357                                         ccall_info.processors_out[i] = 1;
358                                 }
359                         }
360                 }
361
362                 {
363                         register int i;
364
365                         i = 0;
366                         do {
367                                 while(!ccall_info.processors_in[i])
368                                         barrier();
369                         } while(++i < ncpus);
370
371                         i = 0;
372                         do {
373                                 while(!ccall_info.processors_out[i])
374                                         barrier();
375                         } while(++i < ncpus);
376                 }
377
378                 spin_unlock_irqrestore(&cross_call_lock, flags);
379         }
380 }
381
382 /* Running cross calls. */
383 void smp4m_cross_call_irq(void)
384 {
385         int i = smp_processor_id();
386
387         ccall_info.processors_in[i] = 1;
388         ccall_info.func(ccall_info.arg1, ccall_info.arg2, ccall_info.arg3,
389                         ccall_info.arg4, ccall_info.arg5);
390         ccall_info.processors_out[i] = 1;
391 }
392
393 void smp4m_percpu_timer_interrupt(struct pt_regs *regs)
394 {
395         int cpu = smp_processor_id();
396
397         clear_profile_irq(cpu);
398
399         profile_tick(CPU_PROFILING, regs);
400
401         if(!--prof_counter(cpu)) {
402                 int user = user_mode(regs);
403
404                 irq_enter();
405                 update_process_times(user);
406                 irq_exit();
407
408                 prof_counter(cpu) = prof_multiplier(cpu);
409         }
410 }
411
412 extern unsigned int lvl14_resolution;
413
414 static void __init smp_setup_percpu_timer(void)
415 {
416         int cpu = smp_processor_id();
417
418         prof_counter(cpu) = prof_multiplier(cpu) = 1;
419         load_profile_irq(cpu, lvl14_resolution);
420
421         if(cpu == boot_cpu_id)
422                 enable_pil_irq(14);
423 }
424
425 void __init smp4m_blackbox_id(unsigned *addr)
426 {
427         int rd = *addr & 0x3e000000;
428         int rs1 = rd >> 11;
429         
430         addr[0] = 0x81580000 | rd;              /* rd %tbr, reg */
431         addr[1] = 0x8130200c | rd | rs1;        /* srl reg, 0xc, reg */
432         addr[2] = 0x80082003 | rd | rs1;        /* and reg, 3, reg */
433 }
434
435 void __init smp4m_blackbox_current(unsigned *addr)
436 {
437         int rd = *addr & 0x3e000000;
438         int rs1 = rd >> 11;
439         
440         addr[0] = 0x81580000 | rd;              /* rd %tbr, reg */
441         addr[2] = 0x8130200a | rd | rs1;        /* srl reg, 0xa, reg */
442         addr[4] = 0x8008200c | rd | rs1;        /* and reg, 3, reg */
443 }
444
445 void __init sun4m_init_smp(void)
446 {
447         BTFIXUPSET_BLACKBOX(hard_smp_processor_id, smp4m_blackbox_id);
448         BTFIXUPSET_BLACKBOX(load_current, smp4m_blackbox_current);
449         BTFIXUPSET_CALL(smp_cross_call, smp4m_cross_call, BTFIXUPCALL_NORM);
450         BTFIXUPSET_CALL(smp_message_pass, smp4m_message_pass, BTFIXUPCALL_NORM);
451         BTFIXUPSET_CALL(__hard_smp_processor_id, __smp4m_processor_id, BTFIXUPCALL_NORM);
452 }