2 * linux/arch/x86-64/kernel/setup.c
4 * Copyright (C) 1995 Linus Torvalds
6 * Nov 2001 Dave Jones <davej@suse.de>
7 * Forked from i386 setup code.
13 * This file handles the architecture-dependent parts of initialization
16 #include <linux/errno.h>
17 #include <linux/sched.h>
18 #include <linux/kernel.h>
20 #include <linux/stddef.h>
21 #include <linux/unistd.h>
22 #include <linux/ptrace.h>
23 #include <linux/slab.h>
24 #include <linux/user.h>
25 #include <linux/a.out.h>
26 #include <linux/tty.h>
27 #include <linux/ioport.h>
28 #include <linux/delay.h>
29 #include <linux/config.h>
30 #include <linux/init.h>
31 #include <linux/initrd.h>
32 #include <linux/highmem.h>
33 #include <linux/bootmem.h>
34 #include <linux/module.h>
35 #include <asm/processor.h>
36 #include <linux/console.h>
37 #include <linux/seq_file.h>
38 #include <linux/root_dev.h>
39 #include <linux/pci.h>
40 #include <linux/acpi.h>
41 #include <linux/kallsyms.h>
42 #include <linux/edd.h>
44 #include <asm/uaccess.h>
45 #include <asm/system.h>
50 #include <video/edid.h>
53 #include <asm/mpspec.h>
54 #include <asm/mmu_context.h>
55 #include <asm/bootsetup.h>
57 #include <asm/proto.h>
58 #include <asm/setup.h>
64 struct cpuinfo_x86 boot_cpu_data;
66 unsigned long mmu_cr4_features;
67 EXPORT_SYMBOL_GPL(mmu_cr4_features);
70 EXPORT_SYMBOL(acpi_disabled);
71 #ifdef CONFIG_ACPI_BOOT
72 extern int __initdata acpi_ht;
73 extern acpi_interrupt_flags acpi_sci_flags;
74 /* int __initdata acpi_force = 0; */
77 /* For PCI or other memory-mapped resources */
78 unsigned long pci_mem_start = 0x10000000;
80 unsigned long saved_video_mode;
83 EXPORT_SYMBOL(swiotlb);
88 struct drive_info_struct { char dummy[32]; } drive_info;
89 struct screen_info screen_info;
90 struct sys_desc_table_struct {
91 unsigned short length;
92 unsigned char table[0];
95 struct edid_info edid_info;
98 unsigned char aux_device_present;
100 extern int root_mountflags;
101 extern char _text, _etext, _edata, _end;
103 char command_line[COMMAND_LINE_SIZE];
105 struct resource standard_io_resources[] = {
106 { "dma1", 0x00, 0x1f, IORESOURCE_BUSY | IORESOURCE_IO },
107 { "pic1", 0x20, 0x21, IORESOURCE_BUSY | IORESOURCE_IO },
108 { "timer", 0x40, 0x5f, IORESOURCE_BUSY | IORESOURCE_IO },
109 { "keyboard", 0x60, 0x6f, IORESOURCE_BUSY | IORESOURCE_IO },
110 { "dma page reg", 0x80, 0x8f, IORESOURCE_BUSY | IORESOURCE_IO },
111 { "pic2", 0xa0, 0xa1, IORESOURCE_BUSY | IORESOURCE_IO },
112 { "dma2", 0xc0, 0xdf, IORESOURCE_BUSY | IORESOURCE_IO },
113 { "fpu", 0xf0, 0xff, IORESOURCE_BUSY | IORESOURCE_IO }
116 #define STANDARD_IO_RESOURCES \
117 (sizeof standard_io_resources / sizeof standard_io_resources[0])
119 #define IORESOURCE_RAM (IORESOURCE_BUSY | IORESOURCE_MEM)
121 struct resource data_resource = { "Kernel data", 0, 0, IORESOURCE_RAM };
122 struct resource code_resource = { "Kernel code", 0, 0, IORESOURCE_RAM };
124 #define IORESOURCE_ROM (IORESOURCE_BUSY | IORESOURCE_READONLY | IORESOURCE_MEM)
126 static struct resource system_rom_resource = { "System ROM", 0xf0000, 0xfffff, IORESOURCE_ROM };
127 static struct resource extension_rom_resource = { "Extension ROM", 0xe0000, 0xeffff, IORESOURCE_ROM };
129 static struct resource adapter_rom_resources[] = {
130 { "Adapter ROM", 0xc8000, 0, IORESOURCE_ROM },
131 { "Adapter ROM", 0, 0, IORESOURCE_ROM },
132 { "Adapter ROM", 0, 0, IORESOURCE_ROM },
133 { "Adapter ROM", 0, 0, IORESOURCE_ROM },
134 { "Adapter ROM", 0, 0, IORESOURCE_ROM },
135 { "Adapter ROM", 0, 0, IORESOURCE_ROM }
138 #define ADAPTER_ROM_RESOURCES \
139 (sizeof adapter_rom_resources / sizeof adapter_rom_resources[0])
141 static struct resource video_rom_resource = { "Video ROM", 0xc0000, 0xc7fff, IORESOURCE_ROM };
142 static struct resource video_ram_resource = { "Video RAM area", 0xa0000, 0xbffff, IORESOURCE_RAM };
144 #define romsignature(x) (*(unsigned short *)(x) == 0xaa55)
146 static int __init romchecksum(unsigned char *rom, unsigned long length)
148 unsigned char *p, sum = 0;
150 for (p = rom; p < rom + length; p++)
155 static void __init probe_roms(void)
157 unsigned long start, length, upper;
162 upper = adapter_rom_resources[0].start;
163 for (start = video_rom_resource.start; start < upper; start += 2048) {
164 rom = isa_bus_to_virt(start);
165 if (!romsignature(rom))
168 video_rom_resource.start = start;
170 /* 0 < length <= 0x7f * 512, historically */
171 length = rom[2] * 512;
173 /* if checksum okay, trust length byte */
174 if (length && romchecksum(rom, length))
175 video_rom_resource.end = start + length - 1;
177 request_resource(&iomem_resource, &video_rom_resource);
181 start = (video_rom_resource.end + 1 + 2047) & ~2047UL;
186 request_resource(&iomem_resource, &system_rom_resource);
187 upper = system_rom_resource.start;
189 /* check for extension rom (ignore length byte!) */
190 rom = isa_bus_to_virt(extension_rom_resource.start);
191 if (romsignature(rom)) {
192 length = extension_rom_resource.end - extension_rom_resource.start + 1;
193 if (romchecksum(rom, length)) {
194 request_resource(&iomem_resource, &extension_rom_resource);
195 upper = extension_rom_resource.start;
199 /* check for adapter roms on 2k boundaries */
200 for (i = 0; i < ADAPTER_ROM_RESOURCES && start < upper; start += 2048) {
201 rom = isa_bus_to_virt(start);
202 if (!romsignature(rom))
205 /* 0 < length <= 0x7f * 512, historically */
206 length = rom[2] * 512;
208 /* but accept any length that fits if checksum okay */
209 if (!length || start + length > upper || !romchecksum(rom, length))
212 adapter_rom_resources[i].start = start;
213 adapter_rom_resources[i].end = start + length - 1;
214 request_resource(&iomem_resource, &adapter_rom_resources[i]);
216 start = adapter_rom_resources[i++].end & ~2047UL;
220 static __init void parse_cmdline_early (char ** cmdline_p)
222 char c = ' ', *to = command_line, *from = COMMAND_LINE;
225 /* Save unparsed command line copy for /proc/cmdline */
226 memcpy(saved_command_line, COMMAND_LINE, COMMAND_LINE_SIZE);
227 saved_command_line[COMMAND_LINE_SIZE-1] = '\0';
235 * If the BIOS enumerates physical processors before logical,
236 * maxcpus=N at enumeration-time can be used to disable HT.
238 else if (!memcmp(from, "maxcpus=", 8)) {
239 extern unsigned int maxcpus;
241 maxcpus = simple_strtoul(from + 8, NULL, 0);
244 #ifdef CONFIG_ACPI_BOOT
245 /* "acpi=off" disables both ACPI table parsing and interpreter init */
246 if (!memcmp(from, "acpi=off", 8))
249 if (!memcmp(from, "acpi=force", 10)) {
250 /* add later when we do DMI horrors: */
251 /* acpi_force = 1; */
255 /* acpi=ht just means: do ACPI MADT parsing
256 at bootup, but don't enable the full ACPI interpreter */
257 if (!memcmp(from, "acpi=ht", 7)) {
258 /* if (!acpi_force) */
262 else if (!memcmp(from, "pci=noacpi", 10))
264 else if (!memcmp(from, "acpi=noirq", 10))
267 else if (!memcmp(from, "acpi_sci=edge", 13))
268 acpi_sci_flags.trigger = 1;
269 else if (!memcmp(from, "acpi_sci=level", 14))
270 acpi_sci_flags.trigger = 3;
271 else if (!memcmp(from, "acpi_sci=high", 13))
272 acpi_sci_flags.polarity = 1;
273 else if (!memcmp(from, "acpi_sci=low", 12))
274 acpi_sci_flags.polarity = 3;
276 /* acpi=strict disables out-of-spec workarounds */
277 else if (!memcmp(from, "acpi=strict", 11)) {
282 if (!memcmp(from, "nolapic", 7) ||
283 !memcmp(from, "disableapic", 11))
286 if (!memcmp(from, "noapic", 6))
287 skip_ioapic_setup = 1;
289 if (!memcmp(from, "apic", 4)) {
290 skip_ioapic_setup = 0;
294 if (!memcmp(from, "mem=", 4))
295 parse_memopt(from+4, &from);
297 #ifdef CONFIG_DISCONTIGMEM
298 if (!memcmp(from, "numa=", 5))
302 #ifdef CONFIG_GART_IOMMU
303 if (!memcmp(from,"iommu=",6)) {
308 if (!memcmp(from,"oops=panic", 10))
315 if (COMMAND_LINE_SIZE <= ++len)
320 *cmdline_p = command_line;
323 #ifndef CONFIG_DISCONTIGMEM
324 static void __init contig_initmem_init(void)
326 unsigned long bootmap_size, bootmap;
327 bootmap_size = bootmem_bootmap_pages(end_pfn)<<PAGE_SHIFT;
328 bootmap = find_e820_area(0, end_pfn<<PAGE_SHIFT, bootmap_size);
330 panic("Cannot find bootmem map of size %ld\n",bootmap_size);
331 bootmap_size = init_bootmem(bootmap >> PAGE_SHIFT, end_pfn);
332 e820_bootmem_free(&contig_page_data, 0, end_pfn << PAGE_SHIFT);
333 reserve_bootmem(bootmap, bootmap_size);
337 /* Use inline assembly to define this because the nops are defined
338 as inline assembly strings in the include files and we cannot
339 get them easily into strings. */
340 asm("\t.data\nk8nops: "
341 K8_NOP1 K8_NOP2 K8_NOP3 K8_NOP4 K8_NOP5 K8_NOP6
344 extern unsigned char k8nops[];
345 static unsigned char *k8_nops[ASM_NOP_MAX+1] = {
351 k8nops + 1 + 2 + 3 + 4,
352 k8nops + 1 + 2 + 3 + 4 + 5,
353 k8nops + 1 + 2 + 3 + 4 + 5 + 6,
354 k8nops + 1 + 2 + 3 + 4 + 5 + 6 + 7,
357 /* Replace instructions with better alternatives for this CPU type.
359 This runs before SMP is initialized to avoid SMP problems with
360 self modifying code. This implies that assymetric systems where
361 APs have less capabilities than the boot processor are not handled.
362 In this case boot with "noreplacement". */
363 void apply_alternatives(void *start, void *end)
367 for (a = start; (void *)a < end; a++) {
368 if (!boot_cpu_has(a->cpuid))
371 BUG_ON(a->replacementlen > a->instrlen);
372 __inline_memcpy(a->instr, a->replacement, a->replacementlen);
373 diff = a->instrlen - a->replacementlen;
375 /* Pad the rest with nops */
376 for (i = a->replacementlen; diff > 0; diff -= k, i += k) {
380 __inline_memcpy(a->instr + i, k8_nops[k], k);
385 static int no_replacement __initdata = 0;
387 void __init alternative_instructions(void)
389 extern struct alt_instr __alt_instructions[], __alt_instructions_end[];
392 apply_alternatives(__alt_instructions, __alt_instructions_end);
395 static int __init noreplacement_setup(char *s)
401 __setup("noreplacement", noreplacement_setup);
403 #if defined(CONFIG_EDD) || defined(CONFIG_EDD_MODULE)
405 #ifdef CONFIG_EDD_MODULE
409 * copy_edd() - Copy the BIOS EDD information
410 * from boot_params into a safe place.
413 static inline void copy_edd(void)
415 memcpy(edd.mbr_signature, EDD_MBR_SIGNATURE, sizeof(edd.mbr_signature));
416 memcpy(edd.edd_info, EDD_BUF, sizeof(edd.edd_info));
417 edd.mbr_signature_nr = EDD_MBR_SIG_NR;
418 edd.edd_info_nr = EDD_NR;
421 static inline void copy_edd(void)
426 void __init setup_arch(char **cmdline_p)
428 unsigned long low_mem_size;
429 unsigned long kernel_end;
431 ROOT_DEV = old_decode_dev(ORIG_ROOT_DEV);
432 drive_info = DRIVE_INFO;
433 screen_info = SCREEN_INFO;
434 edid_info = EDID_INFO;
435 aux_device_present = AUX_DEVICE_INFO;
436 saved_video_mode = SAVED_VIDEO_MODE;
438 #ifdef CONFIG_BLK_DEV_RAM
439 rd_image_start = RAMDISK_FLAGS & RAMDISK_IMAGE_START_MASK;
440 rd_prompt = ((RAMDISK_FLAGS & RAMDISK_PROMPT_FLAG) != 0);
441 rd_doload = ((RAMDISK_FLAGS & RAMDISK_LOAD_FLAG) != 0);
443 setup_memory_region();
446 if (!MOUNT_ROOT_RDONLY)
447 root_mountflags &= ~MS_RDONLY;
448 init_mm.start_code = (unsigned long) &_text;
449 init_mm.end_code = (unsigned long) &_etext;
450 init_mm.end_data = (unsigned long) &_edata;
451 init_mm.brk = (unsigned long) &_end;
453 code_resource.start = virt_to_phys(&_text);
454 code_resource.end = virt_to_phys(&_etext)-1;
455 data_resource.start = virt_to_phys(&_etext);
456 data_resource.end = virt_to_phys(&_edata)-1;
458 parse_cmdline_early(cmdline_p);
461 * partially used pages are not usable - thus
462 * we are rounding upwards:
464 end_pfn = e820_end_of_ram();
468 init_memory_mapping();
470 #ifdef CONFIG_DISCONTIGMEM
471 numa_initmem_init(0, end_pfn);
473 contig_initmem_init();
476 /* Reserve direct mapping */
477 reserve_bootmem_generic(table_start << PAGE_SHIFT,
478 (table_end - table_start) << PAGE_SHIFT);
481 kernel_end = round_up(__pa_symbol(&_end),PAGE_SIZE);
482 reserve_bootmem_generic(HIGH_MEMORY, kernel_end - HIGH_MEMORY);
485 * reserve physical page 0 - it's a special BIOS page on many boxes,
486 * enabling clean reboots, SMP operation, laptop functions.
488 reserve_bootmem_generic(0, PAGE_SIZE);
492 * But first pinch a few for the stack/trampoline stuff
493 * FIXME: Don't need the extra page at 4K, but need to fix
494 * trampoline before removing it. (see the GDT stuff)
496 reserve_bootmem_generic(PAGE_SIZE, PAGE_SIZE);
498 /* Reserve SMP trampoline */
499 reserve_bootmem_generic(SMP_TRAMPOLINE_BASE, PAGE_SIZE);
502 #ifdef CONFIG_ACPI_SLEEP
504 * Reserve low memory region for sleep support.
506 acpi_reserve_bootmem();
508 #ifdef CONFIG_X86_LOCAL_APIC
510 * Find and reserve possible boot-time SMP configuration:
514 #ifdef CONFIG_BLK_DEV_INITRD
515 if (LOADER_TYPE && INITRD_START) {
516 if (INITRD_START + INITRD_SIZE <= (end_pfn << PAGE_SHIFT)) {
517 reserve_bootmem_generic(INITRD_START, INITRD_SIZE);
519 INITRD_START ? INITRD_START + PAGE_OFFSET : 0;
520 initrd_end = initrd_start+INITRD_SIZE;
523 printk(KERN_ERR "initrd extends beyond end of memory "
524 "(0x%08lx > 0x%08lx)\ndisabling initrd\n",
525 (unsigned long)(INITRD_START + INITRD_SIZE),
526 (unsigned long)(end_pfn << PAGE_SHIFT));
534 #ifdef CONFIG_ACPI_BOOT
536 * Initialize the ACPI boot-time table parser (gets the RSDP and SDT).
537 * Must do this after paging_init (due to reliance on fixmap, and thus
538 * the bootmem allocator) but before get_smp_config (to allow parsing
543 #ifdef CONFIG_X86_LOCAL_APIC
545 * get boot-time SMP configuration:
547 if (smp_found_config)
549 init_apic_mappings();
553 * Request address space for all standard RAM and ROM resources
554 * and also for regions reported as reserved by the e820.
557 e820_reserve_resources();
559 request_resource(&iomem_resource, &video_ram_resource);
563 /* request I/O space for devices used on all i[345]86 PCs */
564 for (i = 0; i < STANDARD_IO_RESOURCES; i++)
565 request_resource(&ioport_resource, &standard_io_resources[i]);
568 /* Will likely break when you have unassigned resources with more
569 than 4GB memory and bridges that don't support more than 4GB.
570 Doing it properly would require to use pci_alloc_consistent
572 low_mem_size = ((end_pfn << PAGE_SHIFT) + 0xfffff) & ~0xfffff;
573 if (low_mem_size > pci_mem_start)
574 pci_mem_start = low_mem_size;
576 #ifdef CONFIG_GART_IOMMU
581 #if defined(CONFIG_VGA_CONSOLE)
582 conswitchp = &vga_con;
583 #elif defined(CONFIG_DUMMY_CONSOLE)
584 conswitchp = &dummy_con;
589 static int __init get_model_name(struct cpuinfo_x86 *c)
593 if (cpuid_eax(0x80000000) < 0x80000004)
596 v = (unsigned int *) c->x86_model_id;
597 cpuid(0x80000002, &v[0], &v[1], &v[2], &v[3]);
598 cpuid(0x80000003, &v[4], &v[5], &v[6], &v[7]);
599 cpuid(0x80000004, &v[8], &v[9], &v[10], &v[11]);
600 c->x86_model_id[48] = 0;
605 static void __init display_cacheinfo(struct cpuinfo_x86 *c)
607 unsigned int n, dummy, eax, ebx, ecx, edx;
609 n = cpuid_eax(0x80000000);
611 if (n >= 0x80000005) {
612 cpuid(0x80000005, &dummy, &ebx, &ecx, &edx);
613 printk(KERN_INFO "CPU: L1 I Cache: %dK (%d bytes/line), D cache %dK (%d bytes/line)\n",
614 edx>>24, edx&0xFF, ecx>>24, ecx&0xFF);
615 c->x86_cache_size=(ecx>>24)+(edx>>24);
616 /* DTLB and ITLB together, but only 4K */
617 c->x86_tlbsize = ((ebx>>16)&0xff) + (ebx&0xff);
620 if (n >= 0x80000006) {
621 cpuid(0x80000006, &dummy, &ebx, &ecx, &edx);
622 ecx = cpuid_ecx(0x80000006);
623 c->x86_cache_size = ecx >> 16;
624 c->x86_tlbsize += ((ebx >> 16) & 0xfff) + (ebx & 0xfff);
626 printk(KERN_INFO "CPU: L2 Cache: %dK (%d bytes/line)\n",
627 c->x86_cache_size, ecx & 0xFF);
631 cpuid(0x80000007, &dummy, &dummy, &dummy, &c->x86_power);
632 if (n >= 0x80000008) {
633 cpuid(0x80000008, &eax, &dummy, &dummy, &dummy);
634 c->x86_virt_bits = (eax >> 8) & 0xff;
635 c->x86_phys_bits = eax & 0xff;
640 static int __init init_amd(struct cpuinfo_x86 *c)
645 /* Bit 31 in normal CPUID used for nonstandard 3DNow ID;
646 3DNow is IDd by bit 31 in extended CPUID (1*32+31) anyway */
647 clear_bit(0*32+31, &c->x86_capability);
650 level = cpuid_eax(1);
651 if ((level >= 0x0f48 && level < 0x0f50) || level >= 0x0f58)
652 set_bit(X86_FEATURE_K8_C, &c->x86_capability);
654 r = get_model_name(c);
658 /* Should distinguish Models here, but this is only
659 a fallback anyways. */
660 strcpy(c->x86_model_id, "Hammer");
664 display_cacheinfo(c);
668 static void __init detect_ht(struct cpuinfo_x86 *c)
671 u32 eax, ebx, ecx, edx;
672 int index_lsb, index_msb, tmp;
674 int cpu = smp_processor_id();
676 if (!cpu_has(c, X86_FEATURE_HT))
679 cpuid(1, &eax, &ebx, &ecx, &edx);
680 smp_num_siblings = (ebx & 0xff0000) >> 16;
682 if (smp_num_siblings == 1) {
683 printk(KERN_INFO "CPU: Hyper-Threading is disabled\n");
684 } else if (smp_num_siblings > 1) {
688 * At this point we only support two siblings per
691 if (smp_num_siblings > NR_CPUS) {
692 printk(KERN_WARNING "CPU: Unsupported number of the siblings %d", smp_num_siblings);
693 smp_num_siblings = 1;
696 tmp = smp_num_siblings;
697 while ((tmp & 1) == 0) {
701 tmp = smp_num_siblings;
702 while ((tmp & 0x80000000 ) == 0) {
706 if (index_lsb != index_msb )
708 initial_apic_id = ebx >> 24 & 0xff;
709 phys_proc_id[cpu] = initial_apic_id >> index_msb;
711 printk(KERN_INFO "CPU: Physical Processor ID: %d\n",
725 unsigned char descriptor;
730 /* all the cache descriptor types we care about (no TLB or trace cache entries) */
731 static struct _cache_table cache_table[] __initdata =
733 { 0x06, LVL_1_INST, 8 },
734 { 0x08, LVL_1_INST, 16 },
735 { 0x0a, LVL_1_DATA, 8 },
736 { 0x0c, LVL_1_DATA, 16 },
737 { 0x22, LVL_3, 512 },
738 { 0x23, LVL_3, 1024 },
739 { 0x25, LVL_3, 2048 },
740 { 0x29, LVL_3, 4096 },
741 { 0x2c, LVL_1_DATA, 32 },
742 { 0x30, LVL_1_INST, 32 },
743 { 0x39, LVL_2, 128 },
744 { 0x3b, LVL_2, 128 },
745 { 0x3c, LVL_2, 256 },
746 { 0x41, LVL_2, 128 },
747 { 0x42, LVL_2, 256 },
748 { 0x43, LVL_2, 512 },
749 { 0x44, LVL_2, 1024 },
750 { 0x45, LVL_2, 2048 },
751 { 0x66, LVL_1_DATA, 8 },
752 { 0x67, LVL_1_DATA, 16 },
753 { 0x68, LVL_1_DATA, 32 },
754 { 0x70, LVL_TRACE, 12 },
755 { 0x71, LVL_TRACE, 16 },
756 { 0x72, LVL_TRACE, 32 },
757 { 0x79, LVL_2, 128 },
758 { 0x7a, LVL_2, 256 },
759 { 0x7b, LVL_2, 512 },
760 { 0x7c, LVL_2, 1024 },
761 { 0x82, LVL_2, 256 },
762 { 0x83, LVL_2, 512 },
763 { 0x84, LVL_2, 1024 },
764 { 0x85, LVL_2, 2048 },
765 { 0x86, LVL_2, 512 },
766 { 0x87, LVL_2, 1024 },
770 static void __init init_intel(struct cpuinfo_x86 *c)
773 unsigned int trace = 0, l1i = 0, l1d = 0, l2 = 0, l3 = 0;
776 if (c->cpuid_level > 1) {
777 /* supports eax=2 call */
780 unsigned char *dp = (unsigned char *)regs;
782 /* Number of times to iterate */
783 n = cpuid_eax(2) & 0xFF;
785 for ( i = 0 ; i < n ; i++ ) {
786 cpuid(2, ®s[0], ®s[1], ®s[2], ®s[3]);
788 /* If bit 31 is set, this is an unknown format */
789 for ( j = 0 ; j < 3 ; j++ ) {
790 if ( regs[j] < 0 ) regs[j] = 0;
793 /* Byte 0 is level count, not a descriptor */
794 for ( j = 1 ; j < 16 ; j++ ) {
795 unsigned char des = dp[j];
798 /* look up this descriptor in the table */
799 while (cache_table[k].descriptor != 0)
801 if (cache_table[k].descriptor == des) {
802 switch (cache_table[k].cache_type) {
804 l1i += cache_table[k].size;
807 l1d += cache_table[k].size;
810 l2 += cache_table[k].size;
813 l3 += cache_table[k].size;
816 trace += cache_table[k].size;
829 printk (KERN_INFO "CPU: Trace cache: %dK uops", trace);
831 printk (KERN_INFO "CPU: L1 I cache: %dK", l1i);
833 printk(", L1 D cache: %dK\n", l1d);
837 printk(KERN_INFO "CPU: L2 cache: %dK\n", l2);
839 printk(KERN_INFO "CPU: L3 cache: %dK\n", l3);
841 c->x86_cache_size = l2 ? l2 : (l1i+l1d);
844 n = cpuid_eax(0x80000000);
845 if (n >= 0x80000008) {
846 unsigned eax = cpuid_eax(0x80000008);
847 c->x86_virt_bits = (eax >> 8) & 0xff;
848 c->x86_phys_bits = eax & 0xff;
852 c->x86_cache_alignment = c->x86_clflush_size * 2;
855 void __init get_cpu_vendor(struct cpuinfo_x86 *c)
857 char *v = c->x86_vendor_id;
859 if (!strcmp(v, "AuthenticAMD"))
860 c->x86_vendor = X86_VENDOR_AMD;
861 else if (!strcmp(v, "GenuineIntel"))
862 c->x86_vendor = X86_VENDOR_INTEL;
864 c->x86_vendor = X86_VENDOR_UNKNOWN;
867 struct cpu_model_info {
870 char *model_names[16];
873 /* Do some early cpuid on the boot CPU to get some parameter that are
874 needed before check_bugs. Everything advanced is in identify_cpu
876 void __init early_identify_cpu(struct cpuinfo_x86 *c)
880 c->loops_per_jiffy = loops_per_jiffy;
881 c->x86_cache_size = -1;
882 c->x86_vendor = X86_VENDOR_UNKNOWN;
883 c->x86_model = c->x86_mask = 0; /* So far unknown... */
884 c->x86_vendor_id[0] = '\0'; /* Unset */
885 c->x86_model_id[0] = '\0'; /* Unset */
886 c->x86_clflush_size = 64;
887 c->x86_cache_alignment = c->x86_clflush_size;
888 memset(&c->x86_capability, 0, sizeof c->x86_capability);
890 /* Get vendor name */
891 cpuid(0x00000000, &c->cpuid_level,
892 (int *)&c->x86_vendor_id[0],
893 (int *)&c->x86_vendor_id[8],
894 (int *)&c->x86_vendor_id[4]);
898 /* Initialize the standard set of capabilities */
899 /* Note that the vendor-specific code below might override */
901 /* Intel-defined flags: level 0x00000001 */
902 if (c->cpuid_level >= 0x00000001) {
904 cpuid(0x00000001, &tfms, &misc, &c->x86_capability[4],
905 &c->x86_capability[0]);
906 c->x86 = (tfms >> 8) & 0xf;
907 c->x86_model = (tfms >> 4) & 0xf;
908 c->x86_mask = tfms & 0xf;
910 c->x86 += (tfms >> 20) & 0xff;
911 c->x86_model += ((tfms >> 16) & 0xF) << 4;
913 if (c->x86_capability[0] & (1<<19))
914 c->x86_clflush_size = ((misc >> 8) & 0xff) * 8;
916 /* Have CPUID level 0 only - unheard of */
922 * This does the hard work of actually picking apart the CPU stuff...
924 void __init identify_cpu(struct cpuinfo_x86 *c)
929 early_identify_cpu(c);
931 /* AMD-defined flags: level 0x80000001 */
932 xlvl = cpuid_eax(0x80000000);
933 if ( (xlvl & 0xffff0000) == 0x80000000 ) {
934 if ( xlvl >= 0x80000001 )
935 c->x86_capability[1] = cpuid_edx(0x80000001);
936 if ( xlvl >= 0x80000004 )
937 get_model_name(c); /* Default name */
940 /* Transmeta-defined flags: level 0x80860001 */
941 xlvl = cpuid_eax(0x80860000);
942 if ( (xlvl & 0xffff0000) == 0x80860000 ) {
943 if ( xlvl >= 0x80860001 )
944 c->x86_capability[2] = cpuid_edx(0x80860001);
948 * Vendor-specific initialization. In this section we
949 * canonicalize the feature flags, meaning if there are
950 * features a certain CPU supports which CPUID doesn't
951 * tell us, CPUID claiming incorrect flags, or other bugs,
952 * we handle them here.
954 * At the end of this section, c->x86_capability better
955 * indicate the features this CPU genuinely supports!
957 switch ( c->x86_vendor ) {
963 case X86_VENDOR_INTEL:
967 case X86_VENDOR_UNKNOWN:
969 display_cacheinfo(c);
973 select_idle_routine(c);
977 * On SMP, boot_cpu_data holds the common feature set between
978 * all CPUs; so make sure that we indicate which features are
979 * common between the CPUs. The first time this routine gets
980 * executed, c == &boot_cpu_data.
982 if ( c != &boot_cpu_data ) {
983 /* AND the already accumulated flags with these */
984 for ( i = 0 ; i < NCAPINTS ; i++ )
985 boot_cpu_data.x86_capability[i] &= c->x86_capability[i];
992 void __init print_cpu_info(struct cpuinfo_x86 *c)
994 if (c->x86_model_id[0])
995 printk("%s", c->x86_model_id);
997 if (c->x86_mask || c->cpuid_level >= 0)
998 printk(" stepping %02x\n", c->x86_mask);
1004 * Get CPU information for use by the procfs.
1007 static int show_cpuinfo(struct seq_file *m, void *v)
1009 struct cpuinfo_x86 *c = v;
1012 * These flag bits must match the definitions in <asm/cpufeature.h>.
1013 * NULL means this bit is undefined or reserved; either way it doesn't
1014 * have meaning as far as Linux is concerned. Note that it's important
1015 * to realize there is a difference between this table and CPUID -- if
1016 * applications want to get the raw CPUID data, they should access
1017 * /dev/cpu/<cpu_nr>/cpuid instead.
1019 static char *x86_cap_flags[] = {
1021 "fpu", "vme", "de", "pse", "tsc", "msr", "pae", "mce",
1022 "cx8", "apic", NULL, "sep", "mtrr", "pge", "mca", "cmov",
1023 "pat", "pse36", "pn", "clflush", NULL, "dts", "acpi", "mmx",
1024 "fxsr", "sse", "sse2", "ss", "ht", "tm", "ia64", NULL,
1027 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1028 NULL, NULL, NULL, "syscall", NULL, NULL, NULL, NULL,
1029 NULL, NULL, NULL, NULL, "nx", NULL, "mmxext", NULL,
1030 NULL, NULL, NULL, NULL, NULL, "lm", "3dnowext", "3dnow",
1032 /* Transmeta-defined */
1033 "recovery", "longrun", NULL, "lrti", NULL, NULL, NULL, NULL,
1034 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1035 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1036 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1038 /* Other (Linux-defined) */
1039 "cxmmx", "k6_mtrr", "cyrix_arr", "centaur_mcr", NULL, NULL, NULL, NULL,
1040 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1041 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1042 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1044 /* Intel-defined (#2) */
1045 "pni", NULL, NULL, "monitor", "ds_cpl", NULL, NULL, "tm2",
1046 "est", NULL, "cid", NULL, NULL, "cmpxchg16b", NULL, NULL,
1047 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1048 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1050 static char *x86_power_flags[] = {
1051 "ts", /* temperature sensor */
1052 "fid", /* frequency id control */
1053 "vid", /* voltage id control */
1054 "ttp", /* thermal trip */
1059 if (!cpu_online(c-cpu_data))
1063 seq_printf(m,"processor\t: %u\n"
1065 "cpu family\t: %d\n"
1067 "model name\t: %s\n",
1068 (unsigned)(c-cpu_data),
1069 c->x86_vendor_id[0] ? c->x86_vendor_id : "unknown",
1072 c->x86_model_id[0] ? c->x86_model_id : "unknown");
1074 if (c->x86_mask || c->cpuid_level >= 0)
1075 seq_printf(m, "stepping\t: %d\n", c->x86_mask);
1077 seq_printf(m, "stepping\t: unknown\n");
1079 if (cpu_has(c,X86_FEATURE_TSC)) {
1080 seq_printf(m, "cpu MHz\t\t: %u.%03u\n",
1081 cpu_khz / 1000, (cpu_khz % 1000));
1085 if (c->x86_cache_size >= 0)
1086 seq_printf(m, "cache size\t: %d KB\n", c->x86_cache_size);
1088 #ifdef CONFIG_X86_HT
1090 seq_printf(m, "physical id\t: %d\n", phys_proc_id[c - cpu_data]);
1091 seq_printf(m, "siblings\t: %d\n", smp_num_siblings);
1097 "fpu_exception\t: yes\n"
1098 "cpuid level\t: %d\n"
1105 for ( i = 0 ; i < 32*NCAPINTS ; i++ )
1106 if ( test_bit(i, &c->x86_capability) &&
1107 x86_cap_flags[i] != NULL )
1108 seq_printf(m, " %s", x86_cap_flags[i]);
1111 seq_printf(m, "\nbogomips\t: %lu.%02lu\n",
1112 c->loops_per_jiffy/(500000/HZ),
1113 (c->loops_per_jiffy/(5000/HZ)) % 100);
1115 if (c->x86_tlbsize > 0)
1116 seq_printf(m, "TLB size\t: %d 4K pages\n", c->x86_tlbsize);
1117 seq_printf(m, "clflush size\t: %d\n", c->x86_clflush_size);
1118 seq_printf(m, "cache_alignment\t: %d\n", c->x86_cache_alignment);
1120 seq_printf(m, "address sizes\t: %u bits physical, %u bits virtual\n",
1121 c->x86_phys_bits, c->x86_virt_bits);
1123 seq_printf(m, "power management:");
1126 for (i = 0; i < 32; i++)
1127 if (c->x86_power & (1 << i)) {
1128 if (i < ARRAY_SIZE(x86_power_flags))
1129 seq_printf(m, " %s", x86_power_flags[i]);
1131 seq_printf(m, " [%d]", i);
1135 seq_printf(m, "\n\n");
1140 static void *c_start(struct seq_file *m, loff_t *pos)
1142 return *pos < NR_CPUS ? cpu_data + *pos : NULL;
1145 static void *c_next(struct seq_file *m, void *v, loff_t *pos)
1148 return c_start(m, pos);
1151 static void c_stop(struct seq_file *m, void *v)
1155 struct seq_operations cpuinfo_op = {
1159 .show = show_cpuinfo,