2 * X86-64 specific CPU setup.
3 * Copyright (C) 1995 Linus Torvalds
4 * Copyright 2001, 2002, 2003 SuSE Labs / Andi Kleen.
5 * See setup.c for older changelog.
7 * Jun Nakajima <jun.nakajima@intel.com>
11 #include <linux/init.h>
12 #include <linux/kernel.h>
13 #include <linux/sched.h>
14 #include <linux/string.h>
15 #include <linux/bootmem.h>
16 #include <linux/bitops.h>
17 #include <linux/module.h>
18 #include <asm/bootsetup.h>
20 #include <asm/pgtable.h>
21 #include <asm/processor.h>
23 #include <asm/atomic.h>
24 #include <asm/mmu_context.h>
27 #include <asm/percpu.h>
28 #include <asm/proto.h>
29 #include <asm/sections.h>
31 #include <asm/hypervisor.h>
34 char x86_boot_params[BOOT_PARAM_SIZE] __initdata;
36 cpumask_t cpu_initialized __cpuinitdata = CPU_MASK_NONE;
38 struct x8664_pda *_cpu_pda[NR_CPUS] __read_mostly;
39 EXPORT_SYMBOL(_cpu_pda);
40 struct x8664_pda boot_cpu_pda[NR_CPUS] __cacheline_aligned;
42 #ifndef CONFIG_X86_NO_IDT
43 struct desc_ptr idt_descr = { 256 * 16 - 1, (unsigned long) idt_table };
46 char boot_cpu_stack[IRQSTACKSIZE] __attribute__((section(".bss.page_aligned")));
48 unsigned long __supported_pte_mask __read_mostly = ~0UL;
49 EXPORT_SYMBOL(__supported_pte_mask);
50 static int do_not_nx __cpuinitdata = 0;
54 * Declare PDA itself and support (irqstack,tss,pgd) as per cpu data.
55 * Always point %gs to its beginning
57 void __init setup_per_cpu_areas(void)
62 #ifdef CONFIG_HOTPLUG_CPU
63 prefill_possible_map();
66 /* Copy section for each CPU (we discard the original) */
67 size = PERCPU_ENOUGH_ROOM;
69 printk(KERN_INFO "PERCPU: Allocating %lu bytes of per cpu data\n", size);
70 for_each_cpu_mask (i, cpu_possible_map) {
73 if (!NODE_DATA(cpu_to_node(i))) {
74 printk("cpu with no node %d, num_online_nodes %d\n",
75 i, num_online_nodes());
76 ptr = alloc_bootmem(size);
78 ptr = alloc_bootmem_node(NODE_DATA(cpu_to_node(i)), size);
81 panic("Cannot allocate cpu data for CPU %d\n", i);
82 cpu_pda(i)->data_offset = ptr - __per_cpu_start;
83 memcpy(ptr, __per_cpu_start, __per_cpu_end - __per_cpu_start);
88 static void switch_pt(void)
90 xen_pt_switch(__pa(init_level4_pgt));
91 xen_new_user_pt(__pa(init_level4_user_pgt));
94 void __cpuinit cpu_gdt_init(struct desc_ptr *gdt_descr)
96 unsigned long frames[16];
100 for (va = gdt_descr->address, f = 0;
101 va < gdt_descr->address + gdt_descr->size;
102 va += PAGE_SIZE, f++) {
103 frames[f] = virt_to_mfn(va);
105 (void *)va, XENFEAT_writable_descriptor_tables);
107 if (HYPERVISOR_set_gdt(frames, gdt_descr->size /
108 sizeof (struct desc_struct)))
112 static void switch_pt(void)
114 asm volatile("movq %0,%%cr3" :: "r" (__pa_symbol(&init_level4_pgt)));
117 void __init cpu_gdt_init(struct desc_ptr *gdt_descr)
119 asm volatile("lgdt %0" :: "m" (*gdt_descr));
120 asm volatile("lidt %0" :: "m" (idt_descr));
124 void pda_init(int cpu)
126 struct x8664_pda *pda = cpu_pda(cpu);
128 /* Setup up data that may be needed in __get_free_pages early */
129 asm volatile("movl %0,%%fs ; movl %0,%%gs" :: "r" (0));
131 /* Memory clobbers used to order PDA accessed */
133 wrmsrl(MSR_GS_BASE, pda);
136 HYPERVISOR_set_segment_base(SEGBASE_GS_KERNEL, (unsigned long)pda);
138 pda->cpunumber = cpu;
141 (unsigned long)stack_thread_info() - PDA_STACKOFFSET + THREAD_SIZE;
142 pda->active_mm = &init_mm;
149 /* others are initialized in smpboot.c */
150 pda->pcurrent = &init_task;
151 pda->irqstackptr = boot_cpu_stack;
153 pda->irqstackptr = (char *)
154 __get_free_pages(GFP_ATOMIC, IRQSTACK_ORDER);
155 if (!pda->irqstackptr)
156 panic("cannot allocate irqstack for cpu %d", cpu);
161 pda->irqstackptr += IRQSTACKSIZE-64;
164 #ifndef CONFIG_X86_NO_TSS
165 char boot_exception_stacks[(N_EXCEPTION_STACKS - 1) * EXCEPTION_STKSZ + DEBUG_STKSZ]
166 __attribute__((section(".bss.page_aligned")));
169 /* May not be marked __init: used by software suspend */
170 void syscall_init(void)
174 * LSTAR and STAR live in a bit strange symbiosis.
175 * They both write to the same internal register. STAR allows to set CS/DS
176 * but only a 32bit target. LSTAR sets the 64bit rip.
178 wrmsrl(MSR_STAR, ((u64)__USER32_CS)<<48 | ((u64)__KERNEL_CS)<<32);
179 wrmsrl(MSR_LSTAR, system_call);
181 /* Flags to clear on syscall */
182 wrmsrl(MSR_SYSCALL_MASK, EF_TF|EF_DF|EF_IE|0x3000);
184 #ifdef CONFIG_IA32_EMULATION
185 syscall32_cpu_init ();
189 void __cpuinit check_efer(void)
193 rdmsrl(MSR_EFER, efer);
194 if (!(efer & EFER_NX) || do_not_nx) {
195 __supported_pte_mask &= ~_PAGE_NX;
199 unsigned long kernel_eflags;
202 * cpu_init() initializes state that is per-CPU. Some data is already
203 * initialized (naturally) in the bootstrap process, such as the GDT
204 * and IDT. We reload them nevertheless, this function acts as a
205 * 'CPU state barrier', nothing should get across.
206 * A lot of state is already set up in PDA init.
208 void __cpuinit cpu_init (void)
210 int cpu = stack_smp_processor_id();
211 #ifndef CONFIG_X86_NO_TSS
212 struct tss_struct *t = &per_cpu(init_tss, cpu);
213 struct orig_ist *orig_ist = &per_cpu(orig_ist, cpu);
215 char *estacks = NULL;
218 struct task_struct *me;
220 /* CPU 0 is initialised in head64.c */
223 zap_low_mappings(cpu);
225 #ifndef CONFIG_X86_NO_TSS
227 estacks = boot_exception_stacks;
232 if (cpu_test_and_set(cpu, cpu_initialized))
233 panic("CPU#%d already initialized!\n", cpu);
235 printk("Initializing CPU#%d\n", cpu);
237 clear_in_cr4(X86_CR4_VME|X86_CR4_PVI|X86_CR4_TSD|X86_CR4_DE);
240 * Initialize the per-CPU GDT with the boot GDT,
241 * and set up the GDT descriptor:
245 memcpy(cpu_gdt(cpu), cpu_gdt_table, GDT_SIZE);
248 cpu_gdt_descr[cpu].size = GDT_SIZE;
249 cpu_gdt_init(&cpu_gdt_descr[cpu]);
251 memset(me->thread.tls_array, 0, GDT_ENTRY_TLS_ENTRIES * 8);
254 wrmsrl(MSR_FS_BASE, 0);
255 wrmsrl(MSR_KERNEL_GS_BASE, 0);
260 #ifndef CONFIG_X86_NO_TSS
262 * set up and load the per-CPU TSS
264 for (v = 0; v < N_EXCEPTION_STACKS; v++) {
265 static const unsigned int order[N_EXCEPTION_STACKS] = {
266 [0 ... N_EXCEPTION_STACKS - 1] = EXCEPTION_STACK_ORDER,
267 [DEBUG_STACK - 1] = DEBUG_STACK_ORDER
270 estacks = (char *)__get_free_pages(GFP_ATOMIC, order[v]);
272 panic("Cannot allocate exception stack %ld %d\n",
275 estacks += PAGE_SIZE << order[v];
276 orig_ist->ist[v] = t->ist[v] = (unsigned long)estacks;
279 t->io_bitmap_base = offsetof(struct tss_struct, io_bitmap);
281 * <= is required because the CPU will access up to
282 * 8 bits beyond the end of the IO permission bitmap.
284 for (i = 0; i <= IO_BITMAP_LONGS; i++)
285 t->io_bitmap[i] = ~0UL;
288 atomic_inc(&init_mm.mm_count);
289 me->active_mm = &init_mm;
292 enter_lazy_tlb(&init_mm, me);
294 #ifndef CONFIG_X86_NO_TSS
295 set_tss_desc(cpu, t);
300 load_LDT(&init_mm.context);
303 * Clear all 6 debug registers:
306 set_debugreg(0UL, 0);
307 set_debugreg(0UL, 1);
308 set_debugreg(0UL, 2);
309 set_debugreg(0UL, 3);
310 set_debugreg(0UL, 6);
311 set_debugreg(0UL, 7);
315 raw_local_save_flags(kernel_eflags);