This commit was manufactured by cvs2svn to create branch 'vserver'.
[linux-2.6.git] / crypto / mpi / longlong.h
1 /* longlong.h -- definitions for mixed size 32/64 bit arithmetic.
2    Note: I added some stuff for use with gnupg
3
4 Copyright (C) 1991, 1992, 1993, 1994, 1996, 1998,
5               2000, 2001, 2002, 2003 Free Software Foundation, Inc.
6
7 This file is free software; you can redistribute it and/or modify
8 it under the terms of the GNU Library General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or (at your
10 option) any later version.
11
12 This file is distributed in the hope that it will be useful, but
13 WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14 or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU Library General Public
15 License for more details.
16
17 You should have received a copy of the GNU Library General Public License
18 along with this file; see the file COPYING.LIB.  If not, write to
19 the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston,
20 MA 02111-1307, USA. */
21
22 /* You have to define the following before including this file:
23
24    UWtype -- An unsigned type, default type for operations (typically a "word")
25    UHWtype -- An unsigned type, at least half the size of UWtype.
26    UDWtype -- An unsigned type, at least twice as large a UWtype
27    W_TYPE_SIZE -- size in bits of UWtype
28
29    SItype, USItype -- Signed and unsigned 32 bit types.
30    DItype, UDItype -- Signed and unsigned 64 bit types.
31
32    On a 32 bit machine UWtype should typically be USItype;
33    on a 64 bit machine, UWtype should typically be UDItype.
34 */
35
36 #define __BITS4 (W_TYPE_SIZE / 4)
37 #define __ll_B ((UWtype) 1 << (W_TYPE_SIZE / 2))
38 #define __ll_lowpart(t) ((UWtype) (t) & (__ll_B - 1))
39 #define __ll_highpart(t) ((UWtype) (t) >> (W_TYPE_SIZE / 2))
40
41 /* This is used to make sure no undesirable sharing between different libraries
42    that use this file takes place.  */
43 #ifndef __MPN
44 #define __MPN(x) __##x
45 #endif
46
47 /* Define auxiliary asm macros.
48
49    1) umul_ppmm(high_prod, low_prod, multipler, multiplicand) multiplies two
50    UWtype integers MULTIPLER and MULTIPLICAND, and generates a two UWtype
51    word product in HIGH_PROD and LOW_PROD.
52
53    2) __umulsidi3(a,b) multiplies two UWtype integers A and B, and returns a
54    UDWtype product.  This is just a variant of umul_ppmm.
55
56    3) udiv_qrnnd(quotient, remainder, high_numerator, low_numerator,
57    denominator) divides a UDWtype, composed by the UWtype integers
58    HIGH_NUMERATOR and LOW_NUMERATOR, by DENOMINATOR and places the quotient
59    in QUOTIENT and the remainder in REMAINDER.  HIGH_NUMERATOR must be less
60    than DENOMINATOR for correct operation.  If, in addition, the most
61    significant bit of DENOMINATOR must be 1, then the pre-processor symbol
62    UDIV_NEEDS_NORMALIZATION is defined to 1.
63
64    4) sdiv_qrnnd(quotient, remainder, high_numerator, low_numerator,
65    denominator).  Like udiv_qrnnd but the numbers are signed.  The quotient
66    is rounded towards 0.
67
68    5) count_leading_zeros(count, x) counts the number of zero-bits from the
69    msb to the first non-zero bit in the UWtype X.  This is the number of
70    steps X needs to be shifted left to set the msb.  Undefined for X == 0,
71    unless the symbol COUNT_LEADING_ZEROS_0 is defined to some value.
72
73    6) count_trailing_zeros(count, x) like count_leading_zeros, but counts
74    from the least significant end.
75
76    7) add_ssaaaa(high_sum, low_sum, high_addend_1, low_addend_1,
77    high_addend_2, low_addend_2) adds two UWtype integers, composed by
78    HIGH_ADDEND_1 and LOW_ADDEND_1, and HIGH_ADDEND_2 and LOW_ADDEND_2
79    respectively.  The result is placed in HIGH_SUM and LOW_SUM.  Overflow
80    (i.e. carry out) is not stored anywhere, and is lost.
81
82    8) sub_ddmmss(high_difference, low_difference, high_minuend, low_minuend,
83    high_subtrahend, low_subtrahend) subtracts two two-word UWtype integers,
84    composed by HIGH_MINUEND_1 and LOW_MINUEND_1, and HIGH_SUBTRAHEND_2 and
85    LOW_SUBTRAHEND_2 respectively.  The result is placed in HIGH_DIFFERENCE
86    and LOW_DIFFERENCE.  Overflow (i.e. carry out) is not stored anywhere,
87    and is lost.
88
89    If any of these macros are left undefined for a particular CPU,
90    C macros are used.  */
91
92 /* The CPUs come in alphabetical order below.
93
94    Please add support for more CPUs here, or improve the current support
95    for the CPUs below!  */
96
97 #if defined (__GNUC__) && !defined (NO_ASM)
98
99 /* We sometimes need to clobber "cc" with gcc2, but that would not be
100    understood by gcc1.  Use cpp to avoid major code duplication.  */
101 #if __GNUC__ < 2
102 #define __CLOBBER_CC
103 #define __AND_CLOBBER_CC
104 #else /* __GNUC__ >= 2 */
105 #define __CLOBBER_CC : "cc"
106 #define __AND_CLOBBER_CC , "cc"
107 #endif /* __GNUC__ < 2 */
108
109
110 /***************************************
111  **************  A29K  *****************
112  ***************************************/
113 #if (defined (__a29k__) || defined (_AM29K)) && W_TYPE_SIZE == 32
114 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
115   __asm__ ("add %1,%4,%5\n"   \
116            "addc %0,%2,%3"                                              \
117            : "=r" ((USItype)(sh)),                                      \
118             "=&r" ((USItype)(sl))                                       \
119            : "%r" ((USItype)(ah)),                                      \
120              "rI" ((USItype)(bh)),                                      \
121              "%r" ((USItype)(al)),                                      \
122              "rI" ((USItype)(bl)))
123 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
124   __asm__ ("sub %1,%4,%5\n"                                             \
125            "subc %0,%2,%3"                                              \
126            : "=r" ((USItype)(sh)),                                      \
127              "=&r" ((USItype)(sl))                                      \
128            : "r" ((USItype)(ah)),                                       \
129              "rI" ((USItype)(bh)),                                      \
130              "r" ((USItype)(al)),                                       \
131              "rI" ((USItype)(bl)))
132 #define umul_ppmm(xh, xl, m0, m1) \
133   do {                                                                  \
134     USItype __m0 = (m0), __m1 = (m1);                                   \
135     __asm__ ("multiplu %0,%1,%2"                                        \
136              : "=r" ((USItype)(xl))                                     \
137              : "r" (__m0),                                              \
138                "r" (__m1));                                             \
139     __asm__ ("multmu %0,%1,%2"                                          \
140              : "=r" ((USItype)(xh))                                     \
141              : "r" (__m0),                                              \
142                "r" (__m1));                                             \
143   } while (0)
144 #define udiv_qrnnd(q, r, n1, n0, d) \
145   __asm__ ("dividu %0,%3,%4"                                            \
146            : "=r" ((USItype)(q)),                                       \
147              "=q" ((USItype)(r))                                        \
148            : "1" ((USItype)(n1)),                                       \
149              "r" ((USItype)(n0)),                                       \
150              "r" ((USItype)(d)))
151
152 #define count_leading_zeros(count, x) \
153     __asm__ ("clz %0,%1"                                                \
154              : "=r" ((USItype)(count))                                  \
155              : "r" ((USItype)(x)))
156 #define COUNT_LEADING_ZEROS_0 32
157 #endif /* __a29k__ */
158
159
160 #if defined (__alpha) && W_TYPE_SIZE == 64
161 #define umul_ppmm(ph, pl, m0, m1) \
162   do {                                                                  \
163     UDItype __m0 = (m0), __m1 = (m1);                                   \
164     __asm__ ("umulh %r1,%2,%0"                                          \
165              : "=r" ((UDItype) ph)                                      \
166              : "%rJ" (__m0),                                            \
167                "rI" (__m1));                                            \
168     (pl) = __m0 * __m1;                                                 \
169   } while (0)
170 #define UMUL_TIME 46
171 #ifndef LONGLONG_STANDALONE
172 #define udiv_qrnnd(q, r, n1, n0, d) \
173   do { UDItype __r;                                                     \
174     (q) = __udiv_qrnnd (&__r, (n1), (n0), (d));                         \
175     (r) = __r;                                                          \
176   } while (0)
177 extern UDItype __udiv_qrnnd ();
178 #define UDIV_TIME 220
179 #endif /* LONGLONG_STANDALONE */
180 #endif /* __alpha */
181
182 /***************************************
183  **************  ARM  ******************
184  ***************************************/
185 #if defined (__arm__) && W_TYPE_SIZE == 32
186 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
187   __asm__ ("adds %1, %4, %5\n"                                          \
188            "adc  %0, %2, %3"                                            \
189            : "=r" ((USItype)(sh)),                                      \
190              "=&r" ((USItype)(sl))                                      \
191            : "%r" ((USItype)(ah)),                                      \
192              "rI" ((USItype)(bh)),                                      \
193              "%r" ((USItype)(al)),                                      \
194              "rI" ((USItype)(bl)))
195 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
196   __asm__ ("subs %1, %4, %5\n"                                          \
197            "sbc  %0, %2, %3"                                            \
198            : "=r" ((USItype)(sh)),                                      \
199              "=&r" ((USItype)(sl))                                      \
200            : "r" ((USItype)(ah)),                                       \
201              "rI" ((USItype)(bh)),                                      \
202              "r" ((USItype)(al)),                                       \
203              "rI" ((USItype)(bl)))
204 #if defined __ARM_ARCH_2__ || defined __ARM_ARCH_3__
205 #define umul_ppmm(xh, xl, a, b) \
206   __asm__ ("%@ Inlined umul_ppmm\n"                                     \
207         "mov    %|r0, %2, lsr #16               @ AAAA\n"               \
208         "mov    %|r2, %3, lsr #16               @ BBBB\n"               \
209         "bic    %|r1, %2, %|r0, lsl #16         @ aaaa\n"               \
210         "bic    %0, %3, %|r2, lsl #16           @ bbbb\n"               \
211         "mul    %1, %|r1, %|r2                  @ aaaa * BBBB\n"        \
212         "mul    %|r2, %|r0, %|r2                @ AAAA * BBBB\n"        \
213         "mul    %|r1, %0, %|r1                  @ aaaa * bbbb\n"        \
214         "mul    %0, %|r0, %0                    @ AAAA * bbbb\n"        \
215         "adds   %|r0, %1, %0                    @ central sum\n"        \
216         "addcs  %|r2, %|r2, #65536\n"                                   \
217         "adds   %1, %|r1, %|r0, lsl #16\n"                              \
218         "adc    %0, %|r2, %|r0, lsr #16"                                \
219            : "=&r" ((USItype)(xh)),                                     \
220              "=r" ((USItype)(xl))                                       \
221            : "r" ((USItype)(a)),                                        \
222              "r" ((USItype)(b))                                         \
223            : "r0", "r1", "r2")
224 #else
225 #define umul_ppmm(xh, xl, a, b)                                         \
226   __asm__ ("%@ Inlined umul_ppmm\n"                                     \
227            "umull %r1, %r0, %r2, %r3"                                   \
228                    : "=&r" ((USItype)(xh)),                             \
229                      "=r" ((USItype)(xl))                               \
230                    : "r" ((USItype)(a)),                                \
231                      "r" ((USItype)(b))                                 \
232                    : "r0", "r1")
233 #endif
234 #define UMUL_TIME 20
235 #define UDIV_TIME 100
236 #endif /* __arm__ */
237
238 /***************************************
239  **************  CLIPPER  **************
240  ***************************************/
241 #if defined (__clipper__) && W_TYPE_SIZE == 32
242 #define umul_ppmm(w1, w0, u, v) \
243   ({union {UDItype __ll;                                                \
244            struct {USItype __l, __h;} __i;                              \
245           } __xx;                                                       \
246   __asm__ ("mulwux %2,%0"                                               \
247            : "=r" (__xx.__ll)                                           \
248            : "%0" ((USItype)(u)),                                       \
249              "r" ((USItype)(v)));                                       \
250   (w1) = __xx.__i.__h; (w0) = __xx.__i.__l;})
251 #define smul_ppmm(w1, w0, u, v) \
252   ({union {DItype __ll;                                                 \
253            struct {SItype __l, __h;} __i;                               \
254           } __xx;                                                       \
255   __asm__ ("mulwx %2,%0"                                                \
256            : "=r" (__xx.__ll)                                           \
257            : "%0" ((SItype)(u)),                                        \
258              "r" ((SItype)(v)));                                        \
259   (w1) = __xx.__i.__h; (w0) = __xx.__i.__l;})
260 #define __umulsidi3(u, v) \
261   ({UDItype __w;                                                        \
262     __asm__ ("mulwux %2,%0"                                             \
263              : "=r" (__w)                                               \
264              : "%0" ((USItype)(u)),                                     \
265                "r" ((USItype)(v)));                                     \
266     __w; })
267 #endif /* __clipper__ */
268
269
270 /***************************************
271  **************  GMICRO  ***************
272  ***************************************/
273 #if defined (__gmicro__) && W_TYPE_SIZE == 32
274 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
275   __asm__ ("add.w %5,%1\n"                                              \
276            "addx %3,%0"                                                 \
277            : "=g" ((USItype)(sh)),                                      \
278              "=&g" ((USItype)(sl))                                      \
279            : "%0" ((USItype)(ah)),                                      \
280              "g" ((USItype)(bh)),                                       \
281              "%1" ((USItype)(al)),                                      \
282              "g" ((USItype)(bl)))
283 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
284   __asm__ ("sub.w %5,%1\n"                                              \
285            "subx %3,%0"                                                 \
286            : "=g" ((USItype)(sh)),                                      \
287              "=&g" ((USItype)(sl))                                      \
288            : "0" ((USItype)(ah)),                                       \
289              "g" ((USItype)(bh)),                                       \
290              "1" ((USItype)(al)),                                       \
291              "g" ((USItype)(bl)))
292 #define umul_ppmm(ph, pl, m0, m1) \
293   __asm__ ("mulx %3,%0,%1"                                              \
294            : "=g" ((USItype)(ph)),                                      \
295              "=r" ((USItype)(pl))                                       \
296            : "%0" ((USItype)(m0)),                                      \
297              "g" ((USItype)(m1)))
298 #define udiv_qrnnd(q, r, nh, nl, d) \
299   __asm__ ("divx %4,%0,%1"                                              \
300            : "=g" ((USItype)(q)),                                       \
301              "=r" ((USItype)(r))                                        \
302            : "1" ((USItype)(nh)),                                       \
303              "0" ((USItype)(nl)),                                       \
304              "g" ((USItype)(d)))
305 #define count_leading_zeros(count, x) \
306   __asm__ ("bsch/1 %1,%0"                                               \
307            : "=g" (count)                                               \
308            : "g" ((USItype)(x)),                                        \
309              "0" ((USItype)0))
310 #endif
311
312
313 /***************************************
314  **************  HPPA  *****************
315  ***************************************/
316 #if defined (__hppa) && W_TYPE_SIZE == 32
317 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
318   __asm__ ("    add %4,%5,%1\n"                                             \
319            "    addc %2,%3,%0"                                              \
320            : "=r" ((USItype)(sh)),                                      \
321              "=&r" ((USItype)(sl))                                      \
322            : "%rM" ((USItype)(ah)),                                     \
323              "rM" ((USItype)(bh)),                                      \
324              "%rM" ((USItype)(al)),                                     \
325              "rM" ((USItype)(bl)))
326 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
327   __asm__ ("    sub %4,%5,%1\n"                                             \
328            "    subb %2,%3,%0"                                              \
329            : "=r" ((USItype)(sh)),                                      \
330              "=&r" ((USItype)(sl))                                      \
331            : "rM" ((USItype)(ah)),                                      \
332              "rM" ((USItype)(bh)),                                      \
333              "rM" ((USItype)(al)),                                      \
334              "rM" ((USItype)(bl)))
335 #if defined (_PA_RISC1_1)
336 #define umul_ppmm(wh, wl, u, v) \
337   do {                                                                  \
338     union {UDItype __ll;                                                \
339            struct {USItype __h, __l;} __i;                              \
340           } __xx;                                                       \
341     __asm__ ("  xmpyu %1,%2,%0"                                           \
342              : "=*f" (__xx.__ll)                                        \
343              : "*f" ((USItype)(u)),                                     \
344                "*f" ((USItype)(v)));                                    \
345     (wh) = __xx.__i.__h;                                                \
346     (wl) = __xx.__i.__l;                                                \
347   } while (0)
348 #define UMUL_TIME 8
349 #define UDIV_TIME 60
350 #else
351 #define UMUL_TIME 40
352 #define UDIV_TIME 80
353 #endif
354 #ifndef LONGLONG_STANDALONE
355 #define udiv_qrnnd(q, r, n1, n0, d) \
356   do { USItype __r;                                                     \
357     (q) = __udiv_qrnnd (&__r, (n1), (n0), (d));                         \
358     (r) = __r;                                                          \
359   } while (0)
360 extern USItype __udiv_qrnnd ();
361 #endif /* LONGLONG_STANDALONE */
362 #define count_leading_zeros(count, x) \
363   do {                                                                 \
364     USItype __tmp;                                                     \
365     __asm__ (                                                          \
366        "        ldi             1,%0                                       \n" \
367        "        extru,=         %1,15,16,%%r0  ; Bits 31..16 zero?         \n" \
368        "        extru,tr        %1,15,16,%1    ; No.  Shift down, skip add.\n" \
369        "        ldo             16(%0),%0      ; Yes.   Perform add.       \n" \
370        "        extru,=         %1,23,8,%%r0   ; Bits 15..8 zero?          \n" \
371        "        extru,tr        %1,23,8,%1     ; No.  Shift down, skip add.\n" \
372        "        ldo             8(%0),%0       ; Yes.   Perform add.       \n" \
373        "        extru,=         %1,27,4,%%r0   ; Bits 7..4 zero?           \n" \
374        "        extru,tr        %1,27,4,%1     ; No.  Shift down, skip add.\n" \
375        "        ldo             4(%0),%0       ; Yes.   Perform add.       \n" \
376        "        extru,=         %1,29,2,%%r0   ; Bits 3..2 zero?           \n" \
377        "        extru,tr        %1,29,2,%1     ; No.  Shift down, skip add.\n" \
378        "        ldo             2(%0),%0       ; Yes.   Perform add.       \n" \
379        "        extru           %1,30,1,%1     ; Extract bit 1.            \n" \
380        "        sub             %0,%1,%0       ; Subtract it.              "   \
381        : "=r" (count), "=r" (__tmp) : "1" (x));                        \
382   } while (0)
383 #endif /* hppa */
384
385
386 /***************************************
387  **************  I370  *****************
388  ***************************************/
389 #if (defined (__i370__) || defined (__mvs__)) && W_TYPE_SIZE == 32
390 #define umul_ppmm(xh, xl, m0, m1) \
391   do {                                                                  \
392     union {UDItype __ll;                                                \
393            struct {USItype __h, __l;} __i;                              \
394           } __xx;                                                       \
395     USItype __m0 = (m0), __m1 = (m1);                                   \
396     __asm__ ("mr %0,%3"                                                 \
397              : "=r" (__xx.__i.__h),                                     \
398                "=r" (__xx.__i.__l)                                      \
399              : "%1" (__m0),                                             \
400                "r" (__m1));                                             \
401     (xh) = __xx.__i.__h; (xl) = __xx.__i.__l;                           \
402     (xh) += ((((SItype) __m0 >> 31) & __m1)                             \
403              + (((SItype) __m1 >> 31) & __m0));                         \
404   } while (0)
405 #define smul_ppmm(xh, xl, m0, m1) \
406   do {                                                                  \
407     union {DItype __ll;                                                 \
408            struct {USItype __h, __l;} __i;                              \
409           } __xx;                                                       \
410     __asm__ ("mr %0,%3"                                                 \
411              : "=r" (__xx.__i.__h),                                     \
412                "=r" (__xx.__i.__l)                                      \
413              : "%1" (m0),                                               \
414                "r" (m1));                                               \
415     (xh) = __xx.__i.__h; (xl) = __xx.__i.__l;                           \
416   } while (0)
417 #define sdiv_qrnnd(q, r, n1, n0, d) \
418   do {                                                                  \
419     union {DItype __ll;                                                 \
420            struct {USItype __h, __l;} __i;                              \
421           } __xx;                                                       \
422     __xx.__i.__h = n1; __xx.__i.__l = n0;                               \
423     __asm__ ("dr %0,%2"                                                 \
424              : "=r" (__xx.__ll)                                         \
425              : "0" (__xx.__ll), "r" (d));                               \
426     (q) = __xx.__i.__l; (r) = __xx.__i.__h;                             \
427   } while (0)
428 #endif
429
430
431 /***************************************
432  **************  I386  *****************
433  ***************************************/
434 #undef __i386__
435 #if (defined (__i386__) || defined (__i486__)) && W_TYPE_SIZE == 32
436 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
437   __asm__ ("addl %5,%1\n"                                               \
438            "adcl %3,%0"                                                 \
439            : "=r" ((USItype)(sh)),                                      \
440              "=&r" ((USItype)(sl))                                      \
441            : "%0" ((USItype)(ah)),                                      \
442              "g" ((USItype)(bh)),                                       \
443              "%1" ((USItype)(al)),                                      \
444              "g" ((USItype)(bl)))
445 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
446   __asm__ ("subl %5,%1\n"                                               \
447            "sbbl %3,%0"                                                 \
448            : "=r" ((USItype)(sh)),                                      \
449              "=&r" ((USItype)(sl))                                      \
450            : "0" ((USItype)(ah)),                                       \
451              "g" ((USItype)(bh)),                                       \
452              "1" ((USItype)(al)),                                       \
453              "g" ((USItype)(bl)))
454 #define umul_ppmm(w1, w0, u, v) \
455   __asm__ ("mull %3"                                                    \
456            : "=a" ((USItype)(w0)),                                      \
457              "=d" ((USItype)(w1))                                       \
458            : "%0" ((USItype)(u)),                                       \
459              "rm" ((USItype)(v)))
460 #define udiv_qrnnd(q, r, n1, n0, d) \
461   __asm__ ("divl %4"                                                    \
462            : "=a" ((USItype)(q)),                                       \
463              "=d" ((USItype)(r))                                        \
464            : "0" ((USItype)(n0)),                                       \
465              "1" ((USItype)(n1)),                                       \
466              "rm" ((USItype)(d)))
467 #define count_leading_zeros(count, x) \
468   do {                                                                  \
469     USItype __cbtmp;                                                    \
470     __asm__ ("bsrl %1,%0"                                               \
471              : "=r" (__cbtmp) : "rm" ((USItype)(x)));                   \
472     (count) = __cbtmp ^ 31;                                             \
473   } while (0)
474 #define count_trailing_zeros(count, x) \
475   __asm__ ("bsfl %1,%0" : "=r" (count) : "rm" ((USItype)(x)))
476 #ifndef UMUL_TIME
477 #define UMUL_TIME 40
478 #endif
479 #ifndef UDIV_TIME
480 #define UDIV_TIME 40
481 #endif
482 #endif /* 80x86 */
483
484
485 /***************************************
486  **************  I860  *****************
487  ***************************************/
488 #if defined (__i860__) && W_TYPE_SIZE == 32
489 #define rshift_rhlc(r,h,l,c) \
490   __asm__ ("shr %3,r0,r0\n"  \
491            "shrd %1,%2,%0"   \
492            "=r" (r) : "r" (h), "r" (l), "rn" (c))
493 #endif /* i860 */
494
495 /***************************************
496  **************  I960  *****************
497  ***************************************/
498 #if defined (__i960__) && W_TYPE_SIZE == 32
499 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
500   __asm__ ("cmpo 1,0\n"      \
501            "addc %5,%4,%1\n" \
502            "addc %3,%2,%0"   \
503            : "=r" ((USItype)(sh)),                                      \
504              "=&r" ((USItype)(sl))                                      \
505            : "%dI" ((USItype)(ah)),                                     \
506              "dI" ((USItype)(bh)),                                      \
507              "%dI" ((USItype)(al)),                                     \
508              "dI" ((USItype)(bl)))
509 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
510   __asm__ ("cmpo 0,0\n"      \
511            "subc %5,%4,%1\n" \
512            "subc %3,%2,%0"   \
513            : "=r" ((USItype)(sh)),                                      \
514              "=&r" ((USItype)(sl))                                      \
515            : "dI" ((USItype)(ah)),                                      \
516              "dI" ((USItype)(bh)),                                      \
517              "dI" ((USItype)(al)),                                      \
518              "dI" ((USItype)(bl)))
519 #define umul_ppmm(w1, w0, u, v) \
520   ({union {UDItype __ll;                                                \
521            struct {USItype __l, __h;} __i;                              \
522           } __xx;                                                       \
523   __asm__ ("emul        %2,%1,%0"                                       \
524            : "=d" (__xx.__ll)                                           \
525            : "%dI" ((USItype)(u)),                                      \
526              "dI" ((USItype)(v)));                                      \
527   (w1) = __xx.__i.__h; (w0) = __xx.__i.__l;})
528 #define __umulsidi3(u, v) \
529   ({UDItype __w;                                                        \
530     __asm__ ("emul      %2,%1,%0"                                       \
531              : "=d" (__w)                                               \
532              : "%dI" ((USItype)(u)),                                    \
533                "dI" ((USItype)(v)));                                    \
534     __w; })
535 #define udiv_qrnnd(q, r, nh, nl, d) \
536   do {                                                                  \
537     union {UDItype __ll;                                                \
538            struct {USItype __l, __h;} __i;                              \
539           } __nn;                                                       \
540     __nn.__i.__h = (nh); __nn.__i.__l = (nl);                           \
541     __asm__ ("ediv %d,%n,%0"                                            \
542            : "=d" (__rq.__ll)                                           \
543            : "dI" (__nn.__ll),                                          \
544              "dI" ((USItype)(d)));                                      \
545     (r) = __rq.__i.__l; (q) = __rq.__i.__h;                             \
546   } while (0)
547 #define count_leading_zeros(count, x) \
548   do {                                                                  \
549     USItype __cbtmp;                                                    \
550     __asm__ ("scanbit %1,%0"                                            \
551              : "=r" (__cbtmp)                                           \
552              : "r" ((USItype)(x)));                                     \
553     (count) = __cbtmp ^ 31;                                             \
554   } while (0)
555 #define COUNT_LEADING_ZEROS_0 (-32) /* sic */
556 #if defined (__i960mx)          /* what is the proper symbol to test??? */
557 #define rshift_rhlc(r,h,l,c) \
558   do {                                                                  \
559     union {UDItype __ll;                                                \
560            struct {USItype __l, __h;} __i;                              \
561           } __nn;                                                       \
562     __nn.__i.__h = (h); __nn.__i.__l = (l);                             \
563     __asm__ ("shre %2,%1,%0"                                            \
564              : "=d" (r) : "dI" (__nn.__ll), "dI" (c));                  \
565   }
566 #endif /* i960mx */
567 #endif /* i960 */
568
569
570 /***************************************
571  **************  68000  ****************
572  ***************************************/
573 #if (defined (__mc68000__) || defined (__mc68020__) || defined (__NeXT__) || defined(mc68020)) && W_TYPE_SIZE == 32
574 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
575   __asm__ ("add%.l %5,%1\n"                                             \
576            "addx%.l %3,%0"                                              \
577            : "=d" ((USItype)(sh)),                                      \
578              "=&d" ((USItype)(sl))                                      \
579            : "%0" ((USItype)(ah)),                                      \
580              "d" ((USItype)(bh)),                                       \
581              "%1" ((USItype)(al)),                                      \
582              "g" ((USItype)(bl)))
583 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
584   __asm__ ("sub%.l %5,%1\n"                                             \
585            "subx%.l %3,%0"                                              \
586            : "=d" ((USItype)(sh)),                                      \
587              "=&d" ((USItype)(sl))                                      \
588            : "0" ((USItype)(ah)),                                       \
589              "d" ((USItype)(bh)),                                       \
590              "1" ((USItype)(al)),                                       \
591              "g" ((USItype)(bl)))
592 #if (defined (__mc68020__) || defined (__NeXT__) || defined(mc68020))
593 #define umul_ppmm(w1, w0, u, v) \
594   __asm__ ("mulu%.l %3,%1:%0"                                           \
595            : "=d" ((USItype)(w0)),                                      \
596              "=d" ((USItype)(w1))                                       \
597            : "%0" ((USItype)(u)),                                       \
598              "dmi" ((USItype)(v)))
599 #define UMUL_TIME 45
600 #define udiv_qrnnd(q, r, n1, n0, d) \
601   __asm__ ("divu%.l %4,%1:%0"                                           \
602            : "=d" ((USItype)(q)),                                       \
603              "=d" ((USItype)(r))                                        \
604            : "0" ((USItype)(n0)),                                       \
605              "1" ((USItype)(n1)),                                       \
606              "dmi" ((USItype)(d)))
607 #define UDIV_TIME 90
608 #define sdiv_qrnnd(q, r, n1, n0, d) \
609   __asm__ ("divs%.l %4,%1:%0"                                           \
610            : "=d" ((USItype)(q)),                                       \
611              "=d" ((USItype)(r))                                        \
612            : "0" ((USItype)(n0)),                                       \
613              "1" ((USItype)(n1)),                                       \
614              "dmi" ((USItype)(d)))
615 #define count_leading_zeros(count, x) \
616   __asm__ ("bfffo %1{%b2:%b2},%0"                                       \
617            : "=d" ((USItype)(count))                                    \
618            : "od" ((USItype)(x)), "n" (0))
619 #define COUNT_LEADING_ZEROS_0 32
620 #else /* not mc68020 */
621 #define umul_ppmm(xh, xl, a, b) \
622   do { USItype __umul_tmp1, __umul_tmp2;                          \
623         __asm__ ("| Inlined umul_ppmm                         \n" \
624  "        move%.l %5,%3                                       \n" \
625  "        move%.l %2,%0                                       \n" \
626  "        move%.w %3,%1                                       \n" \
627  "        swap  %3                                            \n" \
628  "        swap  %0                                            \n" \
629  "        mulu  %2,%1                                         \n" \
630  "        mulu  %3,%0                                         \n" \
631  "        mulu  %2,%3                                         \n" \
632  "        swap  %2                                            \n" \
633  "        mulu  %5,%2                                         \n" \
634  "        add%.l        %3,%2                                 \n" \
635  "        jcc   1f                                            \n" \
636  "        add%.l        %#0x10000,%0                          \n" \
637  "1:    move%.l %2,%3                                         \n" \
638  "        clr%.w        %2                                    \n" \
639  "        swap  %2                                            \n" \
640  "        swap  %3                                            \n" \
641  "        clr%.w        %3                                    \n" \
642  "        add%.l        %3,%1                                 \n" \
643  "        addx%.l %2,%0                                       \n" \
644  "        | End inlined umul_ppmm"                                \
645               : "=&d" ((USItype)(xh)), "=&d" ((USItype)(xl)),     \
646                 "=d" (__umul_tmp1), "=&d" (__umul_tmp2)           \
647               : "%2" ((USItype)(a)), "d" ((USItype)(b)));         \
648   } while (0)
649 #define UMUL_TIME 100
650 #define UDIV_TIME 400
651 #endif /* not mc68020 */
652 #endif /* mc68000 */
653
654
655 /***************************************
656  **************  88000  ****************
657  ***************************************/
658 #if defined (__m88000__) && W_TYPE_SIZE == 32
659 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
660   __asm__ ("addu.co %1,%r4,%r5\n"                                       \
661            "addu.ci %0,%r2,%r3"                                         \
662            : "=r" ((USItype)(sh)),                                      \
663              "=&r" ((USItype)(sl))                                      \
664            : "%rJ" ((USItype)(ah)),                                     \
665              "rJ" ((USItype)(bh)),                                      \
666              "%rJ" ((USItype)(al)),                                     \
667              "rJ" ((USItype)(bl)))
668 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
669   __asm__ ("subu.co %1,%r4,%r5\n"                                       \
670            "subu.ci %0,%r2,%r3"                                         \
671            : "=r" ((USItype)(sh)),                                      \
672              "=&r" ((USItype)(sl))                                      \
673            : "rJ" ((USItype)(ah)),                                      \
674              "rJ" ((USItype)(bh)),                                      \
675              "rJ" ((USItype)(al)),                                      \
676              "rJ" ((USItype)(bl)))
677 #define count_leading_zeros(count, x) \
678   do {                                                                  \
679     USItype __cbtmp;                                                    \
680     __asm__ ("ff1 %0,%1"                                                \
681              : "=r" (__cbtmp)                                           \
682              : "r" ((USItype)(x)));                                     \
683     (count) = __cbtmp ^ 31;                                             \
684   } while (0)
685 #define COUNT_LEADING_ZEROS_0 63 /* sic */
686 #if defined (__m88110__)
687 #define umul_ppmm(wh, wl, u, v) \
688   do {                                                                  \
689     union {UDItype __ll;                                                \
690            struct {USItype __h, __l;} __i;                              \
691           } __x;                                                        \
692     __asm__ ("mulu.d %0,%1,%2" : "=r" (__x.__ll) : "r" (u), "r" (v));   \
693     (wh) = __x.__i.__h;                                                 \
694     (wl) = __x.__i.__l;                                                 \
695   } while (0)
696 #define udiv_qrnnd(q, r, n1, n0, d) \
697   ({union {UDItype __ll;                                                \
698            struct {USItype __h, __l;} __i;                              \
699           } __x, __q;                                                   \
700   __x.__i.__h = (n1); __x.__i.__l = (n0);                               \
701   __asm__ ("divu.d %0,%1,%2"                                            \
702            : "=r" (__q.__ll) : "r" (__x.__ll), "r" (d));                \
703   (r) = (n0) - __q.__l * (d); (q) = __q.__l; })
704 #define UMUL_TIME 5
705 #define UDIV_TIME 25
706 #else
707 #define UMUL_TIME 17
708 #define UDIV_TIME 150
709 #endif /* __m88110__ */
710 #endif /* __m88000__ */
711
712 /***************************************
713  **************  MIPS  *****************
714  ***************************************/
715 #if defined (__mips__) && W_TYPE_SIZE == 32
716 #if __GNUC__ > 2 || __GNUC_MINOR__ >= 7
717 #define umul_ppmm(w1, w0, u, v) \
718   __asm__ ("multu %2,%3"                                                \
719            : "=l" ((USItype)(w0)),                                      \
720              "=h" ((USItype)(w1))                                       \
721            : "d" ((USItype)(u)),                                        \
722              "d" ((USItype)(v)))
723 #else
724 #define umul_ppmm(w1, w0, u, v) \
725   __asm__ ("multu %2,%3 \n" \
726            "mflo %0 \n"     \
727            "mfhi %1"                                                        \
728            : "=d" ((USItype)(w0)),                                      \
729              "=d" ((USItype)(w1))                                       \
730            : "d" ((USItype)(u)),                                        \
731              "d" ((USItype)(v)))
732 #endif
733 #define UMUL_TIME 10
734 #define UDIV_TIME 100
735 #endif /* __mips__ */
736
737 /***************************************
738  **************  MIPS/64  **************
739  ***************************************/
740 #if (defined (__mips) && __mips >= 3) && W_TYPE_SIZE == 64
741 #if __GNUC__ > 2 || __GNUC_MINOR__ >= 7
742 #define umul_ppmm(w1, w0, u, v) \
743   __asm__ ("dmultu %2,%3"                                               \
744            : "=l" ((UDItype)(w0)),                                      \
745              "=h" ((UDItype)(w1))                                       \
746            : "d" ((UDItype)(u)),                                        \
747              "d" ((UDItype)(v)))
748 #else
749 #define umul_ppmm(w1, w0, u, v) \
750   __asm__ ("dmultu %2,%3 \n"    \
751            "mflo %0 \n"         \
752            "mfhi %1"                                                        \
753            : "=d" ((UDItype)(w0)),                                      \
754              "=d" ((UDItype)(w1))                                       \
755            : "d" ((UDItype)(u)),                                        \
756              "d" ((UDItype)(v)))
757 #endif
758 #define UMUL_TIME 20
759 #define UDIV_TIME 140
760 #endif /* __mips__ */
761
762
763 /***************************************
764  **************  32000  ****************
765  ***************************************/
766 #if defined (__ns32000__) && W_TYPE_SIZE == 32
767 #define umul_ppmm(w1, w0, u, v) \
768   ({union {UDItype __ll;                                                \
769            struct {USItype __l, __h;} __i;                              \
770           } __xx;                                                       \
771   __asm__ ("meid %2,%0"                                                 \
772            : "=g" (__xx.__ll)                                           \
773            : "%0" ((USItype)(u)),                                       \
774              "g" ((USItype)(v)));                                       \
775   (w1) = __xx.__i.__h; (w0) = __xx.__i.__l;})
776 #define __umulsidi3(u, v) \
777   ({UDItype __w;                                                        \
778     __asm__ ("meid %2,%0"                                               \
779              : "=g" (__w)                                               \
780              : "%0" ((USItype)(u)),                                     \
781                "g" ((USItype)(v)));                                     \
782     __w; })
783 #define udiv_qrnnd(q, r, n1, n0, d) \
784   ({union {UDItype __ll;                                                \
785            struct {USItype __l, __h;} __i;                              \
786           } __xx;                                                       \
787   __xx.__i.__h = (n1); __xx.__i.__l = (n0);                             \
788   __asm__ ("deid %2,%0"                                                 \
789            : "=g" (__xx.__ll)                                           \
790            : "0" (__xx.__ll),                                           \
791              "g" ((USItype)(d)));                                       \
792   (r) = __xx.__i.__l; (q) = __xx.__i.__h; })
793 #define count_trailing_zeros(count,x) \
794   do {
795     __asm__ ("ffsd      %2,%0"                                          \
796              : "=r" ((USItype) (count))                                 \
797              : "0" ((USItype) 0),                                       \
798                "r" ((USItype) (x)));                                    \
799   } while (0)
800 #endif /* __ns32000__ */
801
802
803 /***************************************
804  **************  PPC  ******************
805  ***************************************/
806 #if (defined (_ARCH_PPC) || defined (_IBMR2)) && W_TYPE_SIZE == 32
807 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
808   do {                                                                  \
809     if (__builtin_constant_p (bh) && (bh) == 0)                         \
810       __asm__ ("{a%I4|add%I4c} %1,%3,%4\n\t{aze|addze} %0,%2"           \
811              : "=r" ((USItype)(sh)),                                    \
812                "=&r" ((USItype)(sl))                                    \
813              : "%r" ((USItype)(ah)),                                    \
814                "%r" ((USItype)(al)),                                    \
815                "rI" ((USItype)(bl)));                                   \
816     else if (__builtin_constant_p (bh) && (bh) ==~(USItype) 0)          \
817       __asm__ ("{a%I4|add%I4c} %1,%3,%4\n\t{ame|addme} %0,%2"           \
818              : "=r" ((USItype)(sh)),                                    \
819                "=&r" ((USItype)(sl))                                    \
820              : "%r" ((USItype)(ah)),                                    \
821                "%r" ((USItype)(al)),                                    \
822                "rI" ((USItype)(bl)));                                   \
823     else                                                                \
824       __asm__ ("{a%I5|add%I5c} %1,%4,%5\n\t{ae|adde} %0,%2,%3"          \
825              : "=r" ((USItype)(sh)),                                    \
826                "=&r" ((USItype)(sl))                                    \
827              : "%r" ((USItype)(ah)),                                    \
828                "r" ((USItype)(bh)),                                     \
829                "%r" ((USItype)(al)),                                    \
830                "rI" ((USItype)(bl)));                                   \
831   } while (0)
832 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
833   do {                                                                  \
834     if (__builtin_constant_p (ah) && (ah) == 0)                         \
835       __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{sfze|subfze} %0,%2"       \
836                : "=r" ((USItype)(sh)),                                  \
837                  "=&r" ((USItype)(sl))                                  \
838                : "r" ((USItype)(bh)),                                   \
839                  "rI" ((USItype)(al)),                                  \
840                  "r" ((USItype)(bl)));                                  \
841     else if (__builtin_constant_p (ah) && (ah) ==~(USItype) 0)          \
842       __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{sfme|subfme} %0,%2"       \
843                : "=r" ((USItype)(sh)),                                  \
844                  "=&r" ((USItype)(sl))                                  \
845                : "r" ((USItype)(bh)),                                   \
846                  "rI" ((USItype)(al)),                                  \
847                  "r" ((USItype)(bl)));                                  \
848     else if (__builtin_constant_p (bh) && (bh) == 0)                    \
849       __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{ame|addme} %0,%2"         \
850                : "=r" ((USItype)(sh)),                                  \
851                  "=&r" ((USItype)(sl))                                  \
852                : "r" ((USItype)(ah)),                                   \
853                  "rI" ((USItype)(al)),                                  \
854                  "r" ((USItype)(bl)));                                  \
855     else if (__builtin_constant_p (bh) && (bh) ==~(USItype) 0)          \
856       __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{aze|addze} %0,%2"         \
857                : "=r" ((USItype)(sh)),                                  \
858                  "=&r" ((USItype)(sl))                                  \
859                : "r" ((USItype)(ah)),                                   \
860                  "rI" ((USItype)(al)),                                  \
861                  "r" ((USItype)(bl)));                                  \
862     else                                                                \
863       __asm__ ("{sf%I4|subf%I4c} %1,%5,%4\n\t{sfe|subfe} %0,%3,%2"      \
864                : "=r" ((USItype)(sh)),                                  \
865                  "=&r" ((USItype)(sl))                                  \
866                : "r" ((USItype)(ah)),                                   \
867                  "r" ((USItype)(bh)),                                   \
868                  "rI" ((USItype)(al)),                                  \
869                  "r" ((USItype)(bl)));                                  \
870   } while (0)
871 #define count_leading_zeros(count, x) \
872   __asm__ ("{cntlz|cntlzw} %0,%1"                                       \
873            : "=r" ((USItype)(count))                                    \
874            : "r" ((USItype)(x)))
875 #define COUNT_LEADING_ZEROS_0 32
876 #if defined (_ARCH_PPC)
877 #define umul_ppmm(ph, pl, m0, m1) \
878   do {                                                                  \
879     USItype __m0 = (m0), __m1 = (m1);                                   \
880     __asm__ ("mulhwu %0,%1,%2"                                          \
881              : "=r" ((USItype) ph)                                      \
882              : "%r" (__m0),                                             \
883                "r" (__m1));                                             \
884     (pl) = __m0 * __m1;                                                 \
885   } while (0)
886 #define UMUL_TIME 15
887 #define smul_ppmm(ph, pl, m0, m1) \
888   do {                                                                  \
889     SItype __m0 = (m0), __m1 = (m1);                                    \
890     __asm__ ("mulhw %0,%1,%2"                                           \
891              : "=r" ((SItype) ph)                                       \
892              : "%r" (__m0),                                             \
893                "r" (__m1));                                             \
894     (pl) = __m0 * __m1;                                                 \
895   } while (0)
896 #define SMUL_TIME 14
897 #define UDIV_TIME 120
898 #else
899 #define umul_ppmm(xh, xl, m0, m1) \
900   do {                                                                  \
901     USItype __m0 = (m0), __m1 = (m1);                                   \
902     __asm__ ("mul %0,%2,%3"                                             \
903              : "=r" ((USItype)(xh)),                                    \
904                "=q" ((USItype)(xl))                                     \
905              : "r" (__m0),                                              \
906                "r" (__m1));                                             \
907     (xh) += ((((SItype) __m0 >> 31) & __m1)                             \
908              + (((SItype) __m1 >> 31) & __m0));                         \
909   } while (0)
910 #define UMUL_TIME 8
911 #define smul_ppmm(xh, xl, m0, m1) \
912   __asm__ ("mul %0,%2,%3"                                               \
913            : "=r" ((SItype)(xh)),                                       \
914              "=q" ((SItype)(xl))                                        \
915            : "r" (m0),                                                  \
916              "r" (m1))
917 #define SMUL_TIME 4
918 #define sdiv_qrnnd(q, r, nh, nl, d) \
919   __asm__ ("div %0,%2,%4"                                               \
920            : "=r" ((SItype)(q)), "=q" ((SItype)(r))                     \
921            : "r" ((SItype)(nh)), "1" ((SItype)(nl)), "r" ((SItype)(d)))
922 #define UDIV_TIME 100
923 #endif
924 #endif /* Power architecture variants.  */
925
926
927 /***************************************
928  **************  PYR  ******************
929  ***************************************/
930 #if defined (__pyr__) && W_TYPE_SIZE == 32
931 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
932   __asm__ ("addw        %5,%1 \n" \
933            "addwc       %3,%0"                                          \
934            : "=r" ((USItype)(sh)),                                      \
935              "=&r" ((USItype)(sl))                                      \
936            : "%0" ((USItype)(ah)),                                      \
937              "g" ((USItype)(bh)),                                       \
938              "%1" ((USItype)(al)),                                      \
939              "g" ((USItype)(bl)))
940 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
941   __asm__ ("subw        %5,%1 \n" \
942            "subwb       %3,%0"                                          \
943            : "=r" ((USItype)(sh)),                                      \
944              "=&r" ((USItype)(sl))                                      \
945            : "0" ((USItype)(ah)),                                       \
946              "g" ((USItype)(bh)),                                       \
947              "1" ((USItype)(al)),                                       \
948              "g" ((USItype)(bl)))
949 /* This insn works on Pyramids with AP, XP, or MI CPUs, but not with SP.  */
950 #define umul_ppmm(w1, w0, u, v) \
951   ({union {UDItype __ll;                                                \
952            struct {USItype __h, __l;} __i;                              \
953           } __xx;                                                       \
954   __asm__ ("movw %1,%R0 \n" \
955            "uemul %2,%0"                                                \
956            : "=&r" (__xx.__ll)                                          \
957            : "g" ((USItype) (u)),                                       \
958              "g" ((USItype)(v)));                                       \
959   (w1) = __xx.__i.__h; (w0) = __xx.__i.__l;})
960 #endif /* __pyr__ */
961
962
963 /***************************************
964  **************  RT/ROMP  **************
965  ***************************************/
966 #if defined (__ibm032__) /* RT/ROMP */  && W_TYPE_SIZE == 32
967 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
968   __asm__ ("a %1,%5 \n" \
969            "ae %0,%3"                                                   \
970            : "=r" ((USItype)(sh)),                                      \
971              "=&r" ((USItype)(sl))                                      \
972            : "%0" ((USItype)(ah)),                                      \
973              "r" ((USItype)(bh)),                                       \
974              "%1" ((USItype)(al)),                                      \
975              "r" ((USItype)(bl)))
976 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
977   __asm__ ("s %1,%5\n" \
978            "se %0,%3"                                                   \
979            : "=r" ((USItype)(sh)),                                      \
980              "=&r" ((USItype)(sl))                                      \
981            : "0" ((USItype)(ah)),                                       \
982              "r" ((USItype)(bh)),                                       \
983              "1" ((USItype)(al)),                                       \
984              "r" ((USItype)(bl)))
985 #define umul_ppmm(ph, pl, m0, m1) \
986   do {                                                                  \
987     USItype __m0 = (m0), __m1 = (m1);                                   \
988     __asm__ (                                                           \
989        "s       r2,r2    \n" \
990        "mts     r10,%2   \n" \
991        "m       r2,%3    \n" \
992        "m       r2,%3    \n" \
993        "m       r2,%3    \n" \
994        "m       r2,%3    \n" \
995        "m       r2,%3    \n" \
996        "m       r2,%3    \n" \
997        "m       r2,%3    \n" \
998        "m       r2,%3    \n" \
999        "m       r2,%3    \n" \
1000        "m       r2,%3    \n" \
1001        "m       r2,%3    \n" \
1002        "m       r2,%3    \n" \
1003        "m       r2,%3    \n" \
1004        "m       r2,%3    \n" \
1005        "m       r2,%3    \n" \
1006        "m       r2,%3    \n" \
1007        "cas     %0,r2,r0 \n" \
1008        "mfs     r10,%1"                                                 \
1009              : "=r" ((USItype)(ph)),                                    \
1010                "=r" ((USItype)(pl))                                     \
1011              : "%r" (__m0),                                             \
1012                 "r" (__m1)                                              \
1013              : "r2");                                                   \
1014     (ph) += ((((SItype) __m0 >> 31) & __m1)                             \
1015              + (((SItype) __m1 >> 31) & __m0));                         \
1016   } while (0)
1017 #define UMUL_TIME 20
1018 #define UDIV_TIME 200
1019 #define count_leading_zeros(count, x) \
1020   do {                                                                  \
1021     if ((x) >= 0x10000)                                                 \
1022       __asm__ ("clz     %0,%1"                                          \
1023                : "=r" ((USItype)(count))                                \
1024                : "r" ((USItype)(x) >> 16));                             \
1025     else                                                                \
1026       {                                                                 \
1027         __asm__ ("clz   %0,%1"                                          \
1028                  : "=r" ((USItype)(count))                              \
1029                  : "r" ((USItype)(x)));                                 \
1030         (count) += 16;                                                  \
1031       }                                                                 \
1032   } while (0)
1033 #endif /* RT/ROMP */
1034
1035
1036 /***************************************
1037  **************  SH2  ******************
1038  ***************************************/
1039 #if (defined (__sh2__) || defined(__sh3__) || defined(__SH4__) ) \
1040     && W_TYPE_SIZE == 32
1041 #define umul_ppmm(w1, w0, u, v) \
1042   __asm__ (                                                             \
1043         "dmulu.l %2,%3\n"  \
1044         "sts    macl,%1\n" \
1045         "sts    mach,%0"                                                \
1046            : "=r" ((USItype)(w1)),                                      \
1047              "=r" ((USItype)(w0))                                       \
1048            : "r" ((USItype)(u)),                                        \
1049              "r" ((USItype)(v))                                         \
1050            : "macl", "mach")
1051 #define UMUL_TIME 5
1052 #endif
1053
1054 /***************************************
1055  **************  SPARC  ****************
1056  ***************************************/
1057 #if defined (__sparc__) && W_TYPE_SIZE == 32
1058 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
1059   __asm__ ("addcc %r4,%5,%1\n" \
1060            "addx %r2,%3,%0"                                             \
1061            : "=r" ((USItype)(sh)),                                      \
1062              "=&r" ((USItype)(sl))                                      \
1063            : "%rJ" ((USItype)(ah)),                                     \
1064              "rI" ((USItype)(bh)),                                      \
1065              "%rJ" ((USItype)(al)),                                     \
1066              "rI" ((USItype)(bl))                                       \
1067            __CLOBBER_CC)
1068 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
1069   __asm__ ("subcc %r4,%5,%1\n" \
1070            "subx %r2,%3,%0"                                             \
1071            : "=r" ((USItype)(sh)),                                      \
1072              "=&r" ((USItype)(sl))                                      \
1073            : "rJ" ((USItype)(ah)),                                      \
1074              "rI" ((USItype)(bh)),                                      \
1075              "rJ" ((USItype)(al)),                                      \
1076              "rI" ((USItype)(bl))                                       \
1077            __CLOBBER_CC)
1078 #if defined (__sparc_v8__)
1079 /* Don't match immediate range because, 1) it is not often useful,
1080    2) the 'I' flag thinks of the range as a 13 bit signed interval,
1081    while we want to match a 13 bit interval, sign extended to 32 bits,
1082    but INTERPRETED AS UNSIGNED.  */
1083 #define umul_ppmm(w1, w0, u, v) \
1084   __asm__ ("umul %2,%3,%1;rd %%y,%0"                                    \
1085            : "=r" ((USItype)(w1)),                                      \
1086              "=r" ((USItype)(w0))                                       \
1087            : "r" ((USItype)(u)),                                        \
1088              "r" ((USItype)(v)))
1089 #define UMUL_TIME 5
1090 #ifndef SUPERSPARC      /* SuperSPARC's udiv only handles 53 bit dividends */
1091 #define udiv_qrnnd(q, r, n1, n0, d) \
1092   do {                                                                  \
1093     USItype __q;                                                        \
1094     __asm__ ("mov %1,%%y;nop;nop;nop;udiv %2,%3,%0"                     \
1095              : "=r" ((USItype)(__q))                                    \
1096              : "r" ((USItype)(n1)),                                     \
1097                "r" ((USItype)(n0)),                                     \
1098                "r" ((USItype)(d)));                                     \
1099     (r) = (n0) - __q * (d);                                             \
1100     (q) = __q;                                                          \
1101   } while (0)
1102 #define UDIV_TIME 25
1103 #endif /* SUPERSPARC */
1104 #else /* ! __sparc_v8__ */
1105 #if defined (__sparclite__)
1106 /* This has hardware multiply but not divide.  It also has two additional
1107    instructions scan (ffs from high bit) and divscc.  */
1108 #define umul_ppmm(w1, w0, u, v) \
1109   __asm__ ("umul %2,%3,%1;rd %%y,%0"                                    \
1110            : "=r" ((USItype)(w1)),                                      \
1111              "=r" ((USItype)(w0))                                       \
1112            : "r" ((USItype)(u)),                                        \
1113              "r" ((USItype)(v)))
1114 #define UMUL_TIME 5
1115 #define udiv_qrnnd(q, r, n1, n0, d) \
1116   __asm__ ("! Inlined udiv_qrnnd                                     \n" \
1117  "        wr    %%g0,%2,%%y     ! Not a delayed write for sparclite  \n" \
1118  "        tst   %%g0                                                 \n" \
1119  "        divscc        %3,%4,%%g1                                   \n" \
1120  "        divscc        %%g1,%4,%%g1                                 \n" \
1121  "        divscc        %%g1,%4,%%g1                                 \n" \
1122  "        divscc        %%g1,%4,%%g1                                 \n" \
1123  "        divscc        %%g1,%4,%%g1                                 \n" \
1124  "        divscc        %%g1,%4,%%g1                                 \n" \
1125  "        divscc        %%g1,%4,%%g1                                 \n" \
1126  "        divscc        %%g1,%4,%%g1                                 \n" \
1127  "        divscc        %%g1,%4,%%g1                                 \n" \
1128  "        divscc        %%g1,%4,%%g1                                 \n" \
1129  "        divscc        %%g1,%4,%%g1                                 \n" \
1130  "        divscc        %%g1,%4,%%g1                                 \n" \
1131  "        divscc        %%g1,%4,%%g1                                 \n" \
1132  "        divscc        %%g1,%4,%%g1                                 \n" \
1133  "        divscc        %%g1,%4,%%g1                                 \n" \
1134  "        divscc        %%g1,%4,%%g1                                 \n" \
1135  "        divscc        %%g1,%4,%%g1                                 \n" \
1136  "        divscc        %%g1,%4,%%g1                                 \n" \
1137  "        divscc        %%g1,%4,%%g1                                 \n" \
1138  "        divscc        %%g1,%4,%%g1                                 \n" \
1139  "        divscc        %%g1,%4,%%g1                                 \n" \
1140  "        divscc        %%g1,%4,%%g1                                 \n" \
1141  "        divscc        %%g1,%4,%%g1                                 \n" \
1142  "        divscc        %%g1,%4,%%g1                                 \n" \
1143  "        divscc        %%g1,%4,%%g1                                 \n" \
1144  "        divscc        %%g1,%4,%%g1                                 \n" \
1145  "        divscc        %%g1,%4,%%g1                                 \n" \
1146  "        divscc        %%g1,%4,%%g1                                 \n" \
1147  "        divscc        %%g1,%4,%%g1                                 \n" \
1148  "        divscc        %%g1,%4,%%g1                                 \n" \
1149  "        divscc        %%g1,%4,%%g1                                 \n" \
1150  "        divscc        %%g1,%4,%0                                   \n" \
1151  "        rd    %%y,%1                                               \n" \
1152  "        bl,a 1f                                                    \n" \
1153  "        add   %1,%4,%1                                             \n" \
1154  "1:    ! End of inline udiv_qrnnd"                                     \
1155            : "=r" ((USItype)(q)),                                       \
1156              "=r" ((USItype)(r))                                        \
1157            : "r" ((USItype)(n1)),                                       \
1158              "r" ((USItype)(n0)),                                       \
1159              "rI" ((USItype)(d))                                        \
1160            : "%g1" __AND_CLOBBER_CC)
1161 #define UDIV_TIME 37
1162 #define count_leading_zeros(count, x) \
1163   __asm__ ("scan %1,0,%0"                                               \
1164            : "=r" ((USItype)(x))                                        \
1165            : "r" ((USItype)(count)))
1166 /* Early sparclites return 63 for an argument of 0, but they warn that future
1167    implementations might change this.  Therefore, leave COUNT_LEADING_ZEROS_0
1168    undefined.  */
1169 #endif /* __sparclite__ */
1170 #endif /* __sparc_v8__ */
1171 /* Default to sparc v7 versions of umul_ppmm and udiv_qrnnd.  */
1172 #ifndef umul_ppmm
1173 #define umul_ppmm(w1, w0, u, v) \
1174   __asm__ ("! Inlined umul_ppmm                                        \n" \
1175  "        wr    %%g0,%2,%%y     ! SPARC has 0-3 delay insn after a wr  \n" \
1176  "        sra   %3,31,%%g2      ! Don't move this insn                 \n" \
1177  "        and   %2,%%g2,%%g2    ! Don't move this insn                 \n" \
1178  "        andcc %%g0,0,%%g1     ! Don't move this insn                 \n" \
1179  "        mulscc        %%g1,%3,%%g1                                   \n" \
1180  "        mulscc        %%g1,%3,%%g1                                   \n" \
1181  "        mulscc        %%g1,%3,%%g1                                   \n" \
1182  "        mulscc        %%g1,%3,%%g1                                   \n" \
1183  "        mulscc        %%g1,%3,%%g1                                   \n" \
1184  "        mulscc        %%g1,%3,%%g1                                   \n" \
1185  "        mulscc        %%g1,%3,%%g1                                   \n" \
1186  "        mulscc        %%g1,%3,%%g1                                   \n" \
1187  "        mulscc        %%g1,%3,%%g1                                   \n" \
1188  "        mulscc        %%g1,%3,%%g1                                   \n" \
1189  "        mulscc        %%g1,%3,%%g1                                   \n" \
1190  "        mulscc        %%g1,%3,%%g1                                   \n" \
1191  "        mulscc        %%g1,%3,%%g1                                   \n" \
1192  "        mulscc        %%g1,%3,%%g1                                   \n" \
1193  "        mulscc        %%g1,%3,%%g1                                   \n" \
1194  "        mulscc        %%g1,%3,%%g1                                   \n" \
1195  "        mulscc        %%g1,%3,%%g1                                   \n" \
1196  "        mulscc        %%g1,%3,%%g1                                   \n" \
1197  "        mulscc        %%g1,%3,%%g1                                   \n" \
1198  "        mulscc        %%g1,%3,%%g1                                   \n" \
1199  "        mulscc        %%g1,%3,%%g1                                   \n" \
1200  "        mulscc        %%g1,%3,%%g1                                   \n" \
1201  "        mulscc        %%g1,%3,%%g1                                   \n" \
1202  "        mulscc        %%g1,%3,%%g1                                   \n" \
1203  "        mulscc        %%g1,%3,%%g1                                   \n" \
1204  "        mulscc        %%g1,%3,%%g1                                   \n" \
1205  "        mulscc        %%g1,%3,%%g1                                   \n" \
1206  "        mulscc        %%g1,%3,%%g1                                   \n" \
1207  "        mulscc        %%g1,%3,%%g1                                   \n" \
1208  "        mulscc        %%g1,%3,%%g1                                   \n" \
1209  "        mulscc        %%g1,%3,%%g1                                   \n" \
1210  "        mulscc        %%g1,%3,%%g1                                   \n" \
1211  "        mulscc        %%g1,0,%%g1                                    \n" \
1212  "        add   %%g1,%%g2,%0                                           \n" \
1213  "        rd    %%y,%1"                                                 \
1214            : "=r" ((USItype)(w1)),                                      \
1215              "=r" ((USItype)(w0))                                       \
1216            : "%rI" ((USItype)(u)),                                      \
1217              "r" ((USItype)(v))                                         \
1218            : "%g1", "%g2" __AND_CLOBBER_CC)
1219 #define UMUL_TIME 39            /* 39 instructions */
1220 #endif
1221 #ifndef udiv_qrnnd
1222 #ifndef LONGLONG_STANDALONE
1223 #define udiv_qrnnd(q, r, n1, n0, d) \
1224   do { USItype __r;                                                     \
1225     (q) = __udiv_qrnnd (&__r, (n1), (n0), (d));                         \
1226     (r) = __r;                                                          \
1227   } while (0)
1228 extern USItype __udiv_qrnnd ();
1229 #define UDIV_TIME 140
1230 #endif /* LONGLONG_STANDALONE */
1231 #endif /* udiv_qrnnd */
1232 #endif /* __sparc__ */
1233
1234
1235 /***************************************
1236  **************  VAX  ******************
1237  ***************************************/
1238 #if defined (__vax__) && W_TYPE_SIZE == 32
1239 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
1240   __asm__ ("addl2 %5,%1\n" \
1241            "adwc %3,%0"                                                 \
1242            : "=g" ((USItype)(sh)),                                      \
1243              "=&g" ((USItype)(sl))                                      \
1244            : "%0" ((USItype)(ah)),                                      \
1245              "g" ((USItype)(bh)),                                       \
1246              "%1" ((USItype)(al)),                                      \
1247              "g" ((USItype)(bl)))
1248 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
1249   __asm__ ("subl2 %5,%1\n" \
1250            "sbwc %3,%0"                                                 \
1251            : "=g" ((USItype)(sh)),                                      \
1252              "=&g" ((USItype)(sl))                                      \
1253            : "0" ((USItype)(ah)),                                       \
1254              "g" ((USItype)(bh)),                                       \
1255              "1" ((USItype)(al)),                                       \
1256              "g" ((USItype)(bl)))
1257 #define umul_ppmm(xh, xl, m0, m1) \
1258   do {                                                                  \
1259     union {UDItype __ll;                                                \
1260            struct {USItype __l, __h;} __i;                              \
1261           } __xx;                                                       \
1262     USItype __m0 = (m0), __m1 = (m1);                                   \
1263     __asm__ ("emul %1,%2,$0,%0"                                         \
1264              : "=g" (__xx.__ll)                                         \
1265              : "g" (__m0),                                              \
1266                "g" (__m1));                                             \
1267     (xh) = __xx.__i.__h; (xl) = __xx.__i.__l;                           \
1268     (xh) += ((((SItype) __m0 >> 31) & __m1)                             \
1269              + (((SItype) __m1 >> 31) & __m0));                         \
1270   } while (0)
1271 #define sdiv_qrnnd(q, r, n1, n0, d) \
1272   do {                                                                  \
1273     union {DItype __ll;                                                 \
1274            struct {SItype __l, __h;} __i;                               \
1275           } __xx;                                                       \
1276     __xx.__i.__h = n1; __xx.__i.__l = n0;                               \
1277     __asm__ ("ediv %3,%2,%0,%1"                                         \
1278              : "=g" (q), "=g" (r)                                       \
1279              : "g" (__xx.__ll), "g" (d));                               \
1280   } while (0)
1281 #endif /* __vax__ */
1282
1283
1284 /***************************************
1285  **************  Z8000  ****************
1286  ***************************************/
1287 #if defined (__z8000__) && W_TYPE_SIZE == 16
1288 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
1289   __asm__ ("add %H1,%H5\n\tadc  %H0,%H3"                                \
1290            : "=r" ((unsigned int)(sh)),                                 \
1291              "=&r" ((unsigned int)(sl))                                 \
1292            : "%0" ((unsigned int)(ah)),                                 \
1293              "r" ((unsigned int)(bh)),                                  \
1294              "%1" ((unsigned int)(al)),                                 \
1295              "rQR" ((unsigned int)(bl)))
1296 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
1297   __asm__ ("sub %H1,%H5\n\tsbc  %H0,%H3"                                \
1298            : "=r" ((unsigned int)(sh)),                                 \
1299              "=&r" ((unsigned int)(sl))                                 \
1300            : "0" ((unsigned int)(ah)),                                  \
1301              "r" ((unsigned int)(bh)),                                  \
1302              "1" ((unsigned int)(al)),                                  \
1303              "rQR" ((unsigned int)(bl)))
1304 #define umul_ppmm(xh, xl, m0, m1) \
1305   do {                                                                  \
1306     union {long int __ll;                                               \
1307            struct {unsigned int __h, __l;} __i;                         \
1308           } __xx;                                                       \
1309     unsigned int __m0 = (m0), __m1 = (m1);                              \
1310     __asm__ ("mult      %S0,%H3"                                        \
1311              : "=r" (__xx.__i.__h),                                     \
1312                "=r" (__xx.__i.__l)                                      \
1313              : "%1" (__m0),                                             \
1314                "rQR" (__m1));                                           \
1315     (xh) = __xx.__i.__h; (xl) = __xx.__i.__l;                           \
1316     (xh) += ((((signed int) __m0 >> 15) & __m1)                         \
1317              + (((signed int) __m1 >> 15) & __m0));                     \
1318   } while (0)
1319 #endif /* __z8000__ */
1320
1321 #endif /* __GNUC__ */
1322
1323
1324 /***************************************
1325  ***********  Generic Versions  ********
1326  ***************************************/
1327 #if !defined (umul_ppmm) && defined (__umulsidi3)
1328 #define umul_ppmm(ph, pl, m0, m1) \
1329   {                                                                     \
1330     UDWtype __ll = __umulsidi3 (m0, m1);                                \
1331     ph = (UWtype) (__ll >> W_TYPE_SIZE);                                \
1332     pl = (UWtype) __ll;                                                 \
1333   }
1334 #endif
1335
1336 #if !defined (__umulsidi3)
1337 #define __umulsidi3(u, v) \
1338   ({UWtype __hi, __lo;                                                  \
1339     umul_ppmm (__hi, __lo, u, v);                                       \
1340     ((UDWtype) __hi << W_TYPE_SIZE) | __lo; })
1341 #endif
1342
1343 /* If this machine has no inline assembler, use C macros.  */
1344
1345 #if !defined (add_ssaaaa)
1346 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
1347   do {                                                                  \
1348     UWtype __x;                                                         \
1349     __x = (al) + (bl);                                                  \
1350     (sh) = (ah) + (bh) + (__x < (al));                                  \
1351     (sl) = __x;                                                         \
1352   } while (0)
1353 #endif
1354
1355 #if !defined (sub_ddmmss)
1356 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
1357   do {                                                                  \
1358     UWtype __x;                                                         \
1359     __x = (al) - (bl);                                                  \
1360     (sh) = (ah) - (bh) - (__x > (al));                                  \
1361     (sl) = __x;                                                         \
1362   } while (0)
1363 #endif
1364
1365 #if !defined (umul_ppmm)
1366 #define umul_ppmm(w1, w0, u, v)                                         \
1367   do {                                                                  \
1368     UWtype __x0, __x1, __x2, __x3;                                      \
1369     UHWtype __ul, __vl, __uh, __vh;                                     \
1370     UWtype __u = (u), __v = (v);                                        \
1371                                                                         \
1372     __ul = __ll_lowpart (__u);                                          \
1373     __uh = __ll_highpart (__u);                                         \
1374     __vl = __ll_lowpart (__v);                                          \
1375     __vh = __ll_highpart (__v);                                         \
1376                                                                         \
1377     __x0 = (UWtype) __ul * __vl;                                        \
1378     __x1 = (UWtype) __ul * __vh;                                        \
1379     __x2 = (UWtype) __uh * __vl;                                        \
1380     __x3 = (UWtype) __uh * __vh;                                        \
1381                                                                         \
1382     __x1 += __ll_highpart (__x0);/* this can't give carry */            \
1383     __x1 += __x2;               /* but this indeed can */               \
1384     if (__x1 < __x2)            /* did we get it? */                    \
1385       __x3 += __ll_B;           /* yes, add it in the proper pos. */    \
1386                                                                         \
1387     (w1) = __x3 + __ll_highpart (__x1);                                 \
1388     (w0) = (__ll_lowpart (__x1) << W_TYPE_SIZE/2) + __ll_lowpart (__x0);\
1389   } while (0)
1390 #endif
1391
1392 #if !defined (umul_ppmm)
1393 #define smul_ppmm(w1, w0, u, v)                                         \
1394   do {                                                                  \
1395     UWtype __w1;                                                        \
1396     UWtype __m0 = (u), __m1 = (v);                                      \
1397     umul_ppmm (__w1, w0, __m0, __m1);                                   \
1398     (w1) = __w1 - (-(__m0 >> (W_TYPE_SIZE - 1)) & __m1)                 \
1399                 - (-(__m1 >> (W_TYPE_SIZE - 1)) & __m0);                \
1400   } while (0)
1401 #endif
1402
1403 /* Define this unconditionally, so it can be used for debugging.  */
1404 #define __udiv_qrnnd_c(q, r, n1, n0, d) \
1405   do {                                                                  \
1406     UWtype __d1, __d0, __q1, __q0, __r1, __r0, __m;                     \
1407     __d1 = __ll_highpart (d);                                           \
1408     __d0 = __ll_lowpart (d);                                            \
1409                                                                         \
1410     __r1 = (n1) % __d1;                                                 \
1411     __q1 = (n1) / __d1;                                                 \
1412     __m = (UWtype) __q1 * __d0;                                         \
1413     __r1 = __r1 * __ll_B | __ll_highpart (n0);                          \
1414     if (__r1 < __m)                                                     \
1415       {                                                                 \
1416         __q1--, __r1 += (d);                                            \
1417         if (__r1 >= (d)) /* i.e. we didn't get carry when adding to __r1 */\
1418           if (__r1 < __m)                                               \
1419             __q1--, __r1 += (d);                                        \
1420       }                                                                 \
1421     __r1 -= __m;                                                        \
1422                                                                         \
1423     __r0 = __r1 % __d1;                                                 \
1424     __q0 = __r1 / __d1;                                                 \
1425     __m = (UWtype) __q0 * __d0;                                         \
1426     __r0 = __r0 * __ll_B | __ll_lowpart (n0);                           \
1427     if (__r0 < __m)                                                     \
1428       {                                                                 \
1429         __q0--, __r0 += (d);                                            \
1430         if (__r0 >= (d))                                                \
1431           if (__r0 < __m)                                               \
1432             __q0--, __r0 += (d);                                        \
1433       }                                                                 \
1434     __r0 -= __m;                                                        \
1435                                                                         \
1436     (q) = (UWtype) __q1 * __ll_B | __q0;                                \
1437     (r) = __r0;                                                         \
1438   } while (0)
1439
1440 /* If the processor has no udiv_qrnnd but sdiv_qrnnd, go through
1441    __udiv_w_sdiv (defined in libgcc or elsewhere).  */
1442 #if !defined (udiv_qrnnd) && defined (sdiv_qrnnd)
1443 #define udiv_qrnnd(q, r, nh, nl, d) \
1444   do {                                                                  \
1445     UWtype __r;                                                         \
1446     (q) = __MPN(udiv_w_sdiv) (&__r, nh, nl, d);                         \
1447     (r) = __r;                                                          \
1448   } while (0)
1449 #endif
1450
1451 /* If udiv_qrnnd was not defined for this processor, use __udiv_qrnnd_c.  */
1452 #if !defined (udiv_qrnnd)
1453 #define UDIV_NEEDS_NORMALIZATION 1
1454 #define udiv_qrnnd __udiv_qrnnd_c
1455 #endif
1456
1457 #undef count_leading_zeros
1458 #if !defined (count_leading_zeros)
1459 extern
1460 #ifdef __STDC__
1461 const
1462 #endif
1463 unsigned char __clz_tab[];
1464 #define count_leading_zeros(count, x) \
1465   do {                                                                  \
1466     UWtype __xr = (x);                                                  \
1467     UWtype __a;                                                         \
1468                                                                         \
1469     if (W_TYPE_SIZE <= 32)                                              \
1470       {                                                                 \
1471         __a = __xr < ((UWtype) 1 << 2*__BITS4)                          \
1472           ? (__xr < ((UWtype) 1 << __BITS4) ? 0 : __BITS4)              \
1473           : (__xr < ((UWtype) 1 << 3*__BITS4) ?  2*__BITS4 : 3*__BITS4);\
1474       }                                                                 \
1475     else                                                                \
1476       {                                                                 \
1477         for (__a = W_TYPE_SIZE - 8; __a > 0; __a -= 8)                  \
1478           if (((__xr >> __a) & 0xff) != 0)                              \
1479             break;                                                      \
1480       }                                                                 \
1481                                                                         \
1482     (count) = W_TYPE_SIZE - (__clz_tab[__xr >> __a] + __a);             \
1483   } while (0)
1484 /* This version gives a well-defined value for zero. */
1485 #define COUNT_LEADING_ZEROS_0 W_TYPE_SIZE
1486 #endif
1487
1488 #if !defined (count_trailing_zeros)
1489 /* Define count_trailing_zeros using count_leading_zeros.  The latter might be
1490    defined in asm, but if it is not, the C version above is good enough.  */
1491 #define count_trailing_zeros(count, x) \
1492   do {                                                                  \
1493     UWtype __ctz_x = (x);                                               \
1494     UWtype __ctz_c;                                                     \
1495     count_leading_zeros (__ctz_c, __ctz_x & -__ctz_x);                  \
1496     (count) = W_TYPE_SIZE - 1 - __ctz_c;                                \
1497   } while (0)
1498 #endif
1499
1500 #ifndef UDIV_NEEDS_NORMALIZATION
1501 #define UDIV_NEEDS_NORMALIZATION 0
1502 #endif