drivers/atm/idt77252.c

   1 /*******************************************************************
   2  * ident "$Id: idt77252.c,v 1.2 2001/11/11 08:13:54 ecd Exp $"
   3  *
   4  * $Author: ecd $
   5  * $Date: 2001/11/11 08:13:54 $
   6  *
   7  * Copyright (c) 2000 ATecoM GmbH
   8  *
   9  * The author may be reached at ecd@atecom.com.
  10  *
  11  * This program is free software; you can redistribute  it and/or modify it
  12  * under  the terms of  the GNU General  Public License as published by the
  13  * Free Software Foundation;  either version 2 of the  License, or (at your
  14  * option) any later version.
  15  *
  16  * THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR   IMPLIED
  17  * WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
  18  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
  19  * NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT,  INDIRECT,
  20  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  21  * NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
  22  * USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
  23  * ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
  24  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  25  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  26  *
  27  * You should have received a copy of the  GNU General Public License along
  28  * with this program; if not, write  to the Free Software Foundation, Inc.,
  29  * 675 Mass Ave, Cambridge, MA 02139, USA.
  30  *
  31  *******************************************************************/
  32 static char const rcsid[] =
  33 "$Id: idt77252.c,v 1.2 2001/11/11 08:13:54 ecd Exp $";
  34
  35
  36 #include <linux/module.h>
  37 #include <linux/config.h>
  38 #include <linux/pci.h>
  39 #include <linux/skbuff.h>
  40 #include <linux/kernel.h>
  41 #include <linux/vmalloc.h>
  42 #include <linux/netdevice.h>
  43 #include <linux/atmdev.h>
  44 #include <linux/atm.h>
  45 #include <linux/delay.h>
  46 #include <linux/init.h>
  47 #include <linux/bitops.h>
  48 #include <linux/wait.h>
  49 #include <asm/semaphore.h>
  50 #include <asm/io.h>
  51 #include <asm/uaccess.h>
  52 #include <asm/atomic.h>
  53 #include <asm/byteorder.h>
  54
  55 #ifdef CONFIG_ATM_IDT77252_USE_SUNI
  56 #include "suni.h"
  57 #endif /* CONFIG_ATM_IDT77252_USE_SUNI */
  58
  59
  60 #include "idt77252.h"
  61 #include "idt77252_tables.h"
  62
  63 static unsigned int vpibits = 1;
  64
  65
  66 #define CONFIG_ATM_IDT77252_SEND_IDLE 1
  67
  68
  69 /*
  70  * Debug HACKs.
  71  */
  72 #define DEBUG_MODULE 1
  73 #undef HAVE_EEPROM      /* does not work, yet. */
  74
  75 #ifdef CONFIG_ATM_IDT77252_DEBUG
  76 static unsigned long debug = DBG_GENERAL;
  77 #endif
  78
  79
  80 #define SAR_RX_DELAY    (SAR_CFG_RXINT_NODELAY)
  81
  82
  83 /*
  84  * SCQ Handling.
  85  */
  86 static struct scq_info *alloc_scq(struct idt77252_dev *, int);
  87 static void free_scq(struct idt77252_dev *, struct scq_info *);
  88 static int queue_skb(struct idt77252_dev *, struct vc_map *,
  89                      struct sk_buff *, int oam);
  90 static void drain_scq(struct idt77252_dev *, struct vc_map *);
  91 static unsigned long get_free_scd(struct idt77252_dev *, struct vc_map *);
  92 static void fill_scd(struct idt77252_dev *, struct scq_info *, int);
  93
  94 /*
  95  * FBQ Handling.
  96  */
  97 static int push_rx_skb(struct idt77252_dev *,
  98                        struct sk_buff *, int queue);
  99 static void recycle_rx_skb(struct idt77252_dev *, struct sk_buff *);
 100 static void flush_rx_pool(struct idt77252_dev *, struct rx_pool *);
 101 static void recycle_rx_pool_skb(struct idt77252_dev *,
 102                                 struct rx_pool *);
 103 static void add_rx_skb(struct idt77252_dev *, int queue,
 104                        unsigned int size, unsigned int count);
 105
 106 /*
 107  * RSQ Handling.
 108  */
 109 static int init_rsq(struct idt77252_dev *);
 110 static void deinit_rsq(struct idt77252_dev *);
 111 static void idt77252_rx(struct idt77252_dev *);
 112
 113 /*
 114  * TSQ handling.
 115  */
 116 static int init_tsq(struct idt77252_dev *);
 117 static void deinit_tsq(struct idt77252_dev *);
 118 static void idt77252_tx(struct idt77252_dev *);
 119
 120
 121 /*
 122  * ATM Interface.
 123  */
 124 static void idt77252_dev_close(struct atm_dev *dev);
 125 static int idt77252_open(struct atm_vcc *vcc);
 126 static void idt77252_close(struct atm_vcc *vcc);
 127 static int idt77252_send(struct atm_vcc *vcc, struct sk_buff *skb);
 128 static int idt77252_send_oam(struct atm_vcc *vcc, void *cell,
 129                              int flags);
 130 static void idt77252_phy_put(struct atm_dev *dev, unsigned char value,
 131                              unsigned long addr);
 132 static unsigned char idt77252_phy_get(struct atm_dev *dev, unsigned long addr);
 133 static int idt77252_change_qos(struct atm_vcc *vcc, struct atm_qos *qos,
 134                                int flags);
 135 static int idt77252_proc_read(struct atm_dev *dev, loff_t * pos,
 136                               char *page);
 137 static void idt77252_softint(void *dev_id);
 138
 139
 140 static struct atmdev_ops idt77252_ops =
 141 {
 142         .dev_close      = idt77252_dev_close,
 143         .open           = idt77252_open,
 144         .close          = idt77252_close,
 145         .send           = idt77252_send,
 146         .send_oam       = idt77252_send_oam,
 147         .phy_put        = idt77252_phy_put,
 148         .phy_get        = idt77252_phy_get,
 149         .change_qos     = idt77252_change_qos,
 150         .proc_read      = idt77252_proc_read,
 151         .owner          = THIS_MODULE
 152 };
 153
 154 static struct idt77252_dev *idt77252_chain = NULL;
 155 static unsigned int idt77252_sram_write_errors = 0;
 156
 157 /*****************************************************************************/
 158 /*                                                                           */
 159 /* I/O and Utility Bus                                                       */
 160 /*                                                                           */
 161 /*****************************************************************************/
 162
 163 static void
 164 waitfor_idle(struct idt77252_dev *card)
 165 {
 166         u32 stat;
 167
 168         stat = readl(SAR_REG_STAT);
 169         while (stat & SAR_STAT_CMDBZ)
 170                 stat = readl(SAR_REG_STAT);
 171 }
 172
 173 static u32
 174 read_sram(struct idt77252_dev *card, unsigned long addr)
 175 {
 176         unsigned long flags;
 177         u32 value;
 178
 179         spin_lock_irqsave(&card->cmd_lock, flags);
 180         writel(SAR_CMD_READ_SRAM | (addr << 2), SAR_REG_CMD);
 181         waitfor_idle(card);
 182         value = readl(SAR_REG_DR0);
 183         spin_unlock_irqrestore(&card->cmd_lock, flags);
 184         return value;
 185 }
 186
 187 static void
 188 write_sram(struct idt77252_dev *card, unsigned long addr, u32 value)
 189 {
 190         unsigned long flags;
 191
 192         if ((idt77252_sram_write_errors == 0) &&
 193             (((addr > card->tst[0] + card->tst_size - 2) &&
 194               (addr < card->tst[0] + card->tst_size)) ||
 195              ((addr > card->tst[1] + card->tst_size - 2) &&
 196               (addr < card->tst[1] + card->tst_size)))) {
 197                 printk("%s: ERROR: TST JMP section at %08lx written: %08x\n",
 198                        card->name, addr, value);
 199         }
 200
 201         spin_lock_irqsave(&card->cmd_lock, flags);
 202         writel(value, SAR_REG_DR0);
 203         writel(SAR_CMD_WRITE_SRAM | (addr << 2), SAR_REG_CMD);
 204         waitfor_idle(card);
 205         spin_unlock_irqrestore(&card->cmd_lock, flags);
 206 }
 207
 208 static u8
 209 read_utility(void *dev, unsigned long ubus_addr)
 210 {
 211         struct idt77252_dev *card = dev;
 212         unsigned long flags;
 213         u8 value;
 214
 215         if (!card) {
 216                 printk("Error: No such device.\n");
 217                 return -1;
 218         }
 219
 220         spin_lock_irqsave(&card->cmd_lock, flags);
 221         writel(SAR_CMD_READ_UTILITY + ubus_addr, SAR_REG_CMD);
 222         waitfor_idle(card);
 223         value = readl(SAR_REG_DR0);
 224         spin_unlock_irqrestore(&card->cmd_lock, flags);
 225         return value;
 226 }
 227
 228 static void
 229 write_utility(void *dev, unsigned long ubus_addr, u8 value)
 230 {
 231         struct idt77252_dev *card = dev;
 232         unsigned long flags;
 233
 234         if (!card) {
 235                 printk("Error: No such device.\n");
 236                 return;
 237         }
 238
 239         spin_lock_irqsave(&card->cmd_lock, flags);
 240         writel((u32) value, SAR_REG_DR0);
 241         writel(SAR_CMD_WRITE_UTILITY + ubus_addr, SAR_REG_CMD);
 242         waitfor_idle(card);
 243         spin_unlock_irqrestore(&card->cmd_lock, flags);
 244 }
 245
 246 #ifdef HAVE_EEPROM
 247 static u32 rdsrtab[] =
 248 {
 249         SAR_GP_EECS | SAR_GP_EESCLK,
 250         0,
 251         SAR_GP_EESCLK,                  /* 0 */
 252         0,
 253         SAR_GP_EESCLK,                  /* 0 */
 254         0,
 255         SAR_GP_EESCLK,                  /* 0 */
 256         0,
 257         SAR_GP_EESCLK,                  /* 0 */
 258         0,
 259         SAR_GP_EESCLK,                  /* 0 */
 260         SAR_GP_EEDO,
 261         SAR_GP_EESCLK | SAR_GP_EEDO,    /* 1 */
 262         0,
 263         SAR_GP_EESCLK,                  /* 0 */
 264         SAR_GP_EEDO,
 265         SAR_GP_EESCLK | SAR_GP_EEDO     /* 1 */
 266 };
 267
 268 static u32 wrentab[] =
 269 {
 270         SAR_GP_EECS | SAR_GP_EESCLK,
 271         0,
 272         SAR_GP_EESCLK,                  /* 0 */
 273         0,
 274         SAR_GP_EESCLK,                  /* 0 */
 275         0,
 276         SAR_GP_EESCLK,                  /* 0 */
 277         0,
 278         SAR_GP_EESCLK,                  /* 0 */
 279         SAR_GP_EEDO,
 280         SAR_GP_EESCLK | SAR_GP_EEDO,    /* 1 */
 281         SAR_GP_EEDO,
 282         SAR_GP_EESCLK | SAR_GP_EEDO,    /* 1 */
 283         0,
 284         SAR_GP_EESCLK,                  /* 0 */
 285         0,
 286         SAR_GP_EESCLK                   /* 0 */
 287 };
 288
 289 static u32 rdtab[] =
 290 {
 291         SAR_GP_EECS | SAR_GP_EESCLK,
 292         0,
 293         SAR_GP_EESCLK,                  /* 0 */
 294         0,
 295         SAR_GP_EESCLK,                  /* 0 */
 296         0,
 297         SAR_GP_EESCLK,                  /* 0 */
 298         0,
 299         SAR_GP_EESCLK,                  /* 0 */
 300         0,
 301         SAR_GP_EESCLK,                  /* 0 */
 302         0,
 303         SAR_GP_EESCLK,                  /* 0 */
 304         SAR_GP_EEDO,
 305         SAR_GP_EESCLK | SAR_GP_EEDO,    /* 1 */
 306         SAR_GP_EEDO,
 307         SAR_GP_EESCLK | SAR_GP_EEDO     /* 1 */
 308 };
 309
 310 static u32 wrtab[] =
 311 {
 312         SAR_GP_EECS | SAR_GP_EESCLK,
 313         0,
 314         SAR_GP_EESCLK,                  /* 0 */
 315         0,
 316         SAR_GP_EESCLK,                  /* 0 */
 317         0,
 318         SAR_GP_EESCLK,                  /* 0 */
 319         0,
 320         SAR_GP_EESCLK,                  /* 0 */
 321         0,
 322         SAR_GP_EESCLK,                  /* 0 */
 323         0,
 324         SAR_GP_EESCLK,                  /* 0 */
 325         SAR_GP_EEDO,
 326         SAR_GP_EESCLK | SAR_GP_EEDO,    /* 1 */
 327         0,
 328         SAR_GP_EESCLK                   /* 0 */
 329 };
 330
 331 static u32 clktab[] =
 332 {
 333         0,
 334         SAR_GP_EESCLK,
 335         0,
 336         SAR_GP_EESCLK,
 337         0,
 338         SAR_GP_EESCLK,
 339         0,
 340         SAR_GP_EESCLK,
 341         0,
 342         SAR_GP_EESCLK,
 343         0,
 344         SAR_GP_EESCLK,
 345         0,
 346         SAR_GP_EESCLK,
 347         0,
 348         SAR_GP_EESCLK,
 349         0
 350 };
 351
 352 static u32
 353 idt77252_read_gp(struct idt77252_dev *card)
 354 {
 355         u32 gp;
 356
 357         gp = readl(SAR_REG_GP);
 358 #if 0
 359         printk("RD: %s\n", gp & SAR_GP_EEDI ? "1" : "0");
 360 #endif
 361         return gp;
 362 }
 363
 364 static void
 365 idt77252_write_gp(struct idt77252_dev *card, u32 value)
 366 {
 367         unsigned long flags;
 368
 369 #if 0
 370         printk("WR: %s %s %s\n", value & SAR_GP_EECS ? "   " : "/CS",
 371                value & SAR_GP_EESCLK ? "HIGH" : "LOW ",
 372                value & SAR_GP_EEDO   ? "1" : "0");
 373 #endif
 374
 375         spin_lock_irqsave(&card->cmd_lock, flags);
 376         waitfor_idle(card);
 377         writel(value, SAR_REG_GP);
 378         spin_unlock_irqrestore(&card->cmd_lock, flags);
 379 }
 380
 381 static u8
 382 idt77252_eeprom_read_status(struct idt77252_dev *card)
 383 {
 384         u8 byte;
 385         u32 gp;
 386         int i, j;
 387
 388         gp = idt77252_read_gp(card) & ~(SAR_GP_EESCLK|SAR_GP_EECS|SAR_GP_EEDO);
 389
 390         for (i = 0; i < sizeof(rdsrtab)/sizeof(rdsrtab[0]); i++) {
 391                 idt77252_write_gp(card, gp | rdsrtab[i]);
 392                 udelay(5);
 393         }
 394         idt77252_write_gp(card, gp | SAR_GP_EECS);
 395         udelay(5);
 396
 397         byte = 0;
 398         for (i = 0, j = 0; i < 8; i++) {
 399                 byte <<= 1;
 400
 401                 idt77252_write_gp(card, gp | clktab[j++]);
 402                 udelay(5);
 403
 404                 byte |= idt77252_read_gp(card) & SAR_GP_EEDI ? 1 : 0;
 405
 406                 idt77252_write_gp(card, gp | clktab[j++]);
 407                 udelay(5);
 408         }
 409         idt77252_write_gp(card, gp | SAR_GP_EECS);
 410         udelay(5);
 411
 412         return byte;
 413 }
 414
 415 static u8
 416 idt77252_eeprom_read_byte(struct idt77252_dev *card, u8 offset)
 417 {
 418         u8 byte;
 419         u32 gp;
 420         int i, j;
 421
 422         gp = idt77252_read_gp(card) & ~(SAR_GP_EESCLK|SAR_GP_EECS|SAR_GP_EEDO);
 423
 424         for (i = 0; i < sizeof(rdtab)/sizeof(rdtab[0]); i++) {
 425                 idt77252_write_gp(card, gp | rdtab[i]);
 426                 udelay(5);
 427         }
 428         idt77252_write_gp(card, gp | SAR_GP_EECS);
 429         udelay(5);
 430
 431         for (i = 0, j = 0; i < 8; i++) {
 432                 idt77252_write_gp(card, gp | clktab[j++] |
 433                                         (offset & 1 ? SAR_GP_EEDO : 0));
 434                 udelay(5);
 435
 436                 idt77252_write_gp(card, gp | clktab[j++] |
 437                                         (offset & 1 ? SAR_GP_EEDO : 0));
 438                 udelay(5);
 439
 440                 offset >>= 1;
 441         }
 442         idt77252_write_gp(card, gp | SAR_GP_EECS);
 443         udelay(5);
 444
 445         byte = 0;
 446         for (i = 0, j = 0; i < 8; i++) {
 447                 byte <<= 1;
 448
 449                 idt77252_write_gp(card, gp | clktab[j++]);
 450                 udelay(5);
 451
 452                 byte |= idt77252_read_gp(card) & SAR_GP_EEDI ? 1 : 0;
 453
 454                 idt77252_write_gp(card, gp | clktab[j++]);
 455                 udelay(5);
 456         }
 457         idt77252_write_gp(card, gp | SAR_GP_EECS);
 458         udelay(5);
 459
 460         return byte;
 461 }
 462
 463 static void
 464 idt77252_eeprom_write_byte(struct idt77252_dev *card, u8 offset, u8 data)
 465 {
 466         u32 gp;
 467         int i, j;
 468
 469         gp = idt77252_read_gp(card) & ~(SAR_GP_EESCLK|SAR_GP_EECS|SAR_GP_EEDO);
 470
 471         for (i = 0; i < sizeof(wrentab)/sizeof(wrentab[0]); i++) {
 472                 idt77252_write_gp(card, gp | wrentab[i]);
 473                 udelay(5);
 474         }
 475         idt77252_write_gp(card, gp | SAR_GP_EECS);
 476         udelay(5);
 477
 478         for (i = 0; i < sizeof(wrtab)/sizeof(wrtab[0]); i++) {
 479                 idt77252_write_gp(card, gp | wrtab[i]);
 480                 udelay(5);
 481         }
 482         idt77252_write_gp(card, gp | SAR_GP_EECS);
 483         udelay(5);
 484
 485         for (i = 0, j = 0; i < 8; i++) {
 486                 idt77252_write_gp(card, gp | clktab[j++] |
 487                                         (offset & 1 ? SAR_GP_EEDO : 0));
 488                 udelay(5);
 489
 490                 idt77252_write_gp(card, gp | clktab[j++] |
 491                                         (offset & 1 ? SAR_GP_EEDO : 0));
 492                 udelay(5);
 493
 494                 offset >>= 1;
 495         }
 496         idt77252_write_gp(card, gp | SAR_GP_EECS);
 497         udelay(5);
 498
 499         for (i = 0, j = 0; i < 8; i++) {
 500                 idt77252_write_gp(card, gp | clktab[j++] |
 501                                         (data & 1 ? SAR_GP_EEDO : 0));
 502                 udelay(5);
 503
 504                 idt77252_write_gp(card, gp | clktab[j++] |
 505                                         (data & 1 ? SAR_GP_EEDO : 0));
 506                 udelay(5);
 507
 508                 data >>= 1;
 509         }
 510         idt77252_write_gp(card, gp | SAR_GP_EECS);
 511         udelay(5);
 512 }
 513
 514 static void
 515 idt77252_eeprom_init(struct idt77252_dev *card)
 516 {
 517         u32 gp;
 518
 519         gp = idt77252_read_gp(card) & ~(SAR_GP_EESCLK|SAR_GP_EECS|SAR_GP_EEDO);
 520
 521         idt77252_write_gp(card, gp | SAR_GP_EECS | SAR_GP_EESCLK);
 522         udelay(5);
 523         idt77252_write_gp(card, gp | SAR_GP_EECS);
 524         udelay(5);
 525         idt77252_write_gp(card, gp | SAR_GP_EECS | SAR_GP_EESCLK);
 526         udelay(5);
 527         idt77252_write_gp(card, gp | SAR_GP_EECS);
 528         udelay(5);
 529 }
 530 #endif /* HAVE_EEPROM */
 531
 532
 533 #ifdef CONFIG_ATM_IDT77252_DEBUG
 534 static void
 535 dump_tct(struct idt77252_dev *card, int index)
 536 {
 537         unsigned long tct;
 538         int i;
 539
 540         tct = (unsigned long) (card->tct_base + index * SAR_SRAM_TCT_SIZE);
 541
 542         printk("%s: TCT %x:", card->name, index);
 543         for (i = 0; i < 8; i++) {
 544                 printk(" %08x", read_sram(card, tct + i));
 545         }
 546         printk("\n");
 547 }
 548
 549 static void
 550 idt77252_tx_dump(struct idt77252_dev *card)
 551 {
 552         struct atm_vcc *vcc;
 553         struct vc_map *vc;
 554         int i;
 555
 556         printk("%s\n", __FUNCTION__);
 557         for (i = 0; i < card->tct_size; i++) {
 558                 vc = card->vcs[i];
 559                 if (!vc)
 560                         continue;
 561
 562                 vcc = NULL;
 563                 if (vc->rx_vcc)
 564                         vcc = vc->rx_vcc;
 565                 else if (vc->tx_vcc)
 566                         vcc = vc->tx_vcc;
 567
 568                 if (!vcc)
 569                         continue;
 570
 571                 printk("%s: Connection %d:\n", card->name, vc->index);
 572                 dump_tct(card, vc->index);
 573         }
 574 }
 575 #endif
 576
 577
 578 /*****************************************************************************/
 579 /*                                                                           */
 580 /* SCQ Handling                                                              */
 581 /*                                                                           */
 582 /*****************************************************************************/
 583
 584 static int
 585 sb_pool_add(struct idt77252_dev *card, struct sk_buff *skb, int queue)
 586 {
 587         struct sb_pool *pool = &card->sbpool[queue];
 588         int index;
 589
 590         index = pool->index;
 591         while (pool->skb[index]) {
 592                 index = (index + 1) & FBQ_MASK;
 593                 if (index == pool->index)
 594                         return -ENOBUFS;
 595         }
 596
 597         pool->skb[index] = skb;
 598         IDT77252_PRV_POOL(skb) = POOL_HANDLE(queue, index);
 599
 600         pool->index = (index + 1) & FBQ_MASK;
 601         return 0;
 602 }
 603
 604 static void
 605 sb_pool_remove(struct idt77252_dev *card, struct sk_buff *skb)
 606 {
 607         unsigned int queue, index;
 608         u32 handle;
 609
 610         handle = IDT77252_PRV_POOL(skb);
 611
 612         queue = POOL_QUEUE(handle);
 613         if (queue > 3)
 614                 return;
 615
 616         index = POOL_INDEX(handle);
 617         if (index > FBQ_SIZE - 1)
 618                 return;
 619
 620         card->sbpool[queue].skb[index] = NULL;
 621 }
 622
 623 static struct sk_buff *
 624 sb_pool_skb(struct idt77252_dev *card, u32 handle)
 625 {
 626         unsigned int queue, index;
 627
 628         queue = POOL_QUEUE(handle);
 629         if (queue > 3)
 630                 return NULL;
 631
 632         index = POOL_INDEX(handle);
 633         if (index > FBQ_SIZE - 1)
 634                 return NULL;
 635
 636         return card->sbpool[queue].skb[index];
 637 }
 638
 639 static struct scq_info *
 640 alloc_scq(struct idt77252_dev *card, int class)
 641 {
 642         struct scq_info *scq;
 643
 644         scq = (struct scq_info *) kmalloc(sizeof(struct scq_info), GFP_KERNEL);
 645         if (!scq)
 646                 return NULL;
 647         memset(scq, 0, sizeof(struct scq_info));
 648
 649         scq->base = pci_alloc_consistent(card->pcidev, SCQ_SIZE,
 650                                          &scq->paddr);
 651         if (scq->base == NULL) {
 652                 kfree(scq);
 653                 return NULL;
 654         }
 655         memset(scq->base, 0, SCQ_SIZE);
 656
 657         scq->next = scq->base;
 658         scq->last = scq->base + (SCQ_ENTRIES - 1);
 659         atomic_set(&scq->used, 0);
 660
 661         spin_lock_init(&scq->lock);
 662         spin_lock_init(&scq->skblock);
 663
 664         skb_queue_head_init(&scq->transmit);
 665         skb_queue_head_init(&scq->pending);
 666
 667         TXPRINTK("idt77252: SCQ: base 0x%p, next 0x%p, last 0x%p, paddr %08llx\n",
 668                  scq->base, scq->next, scq->last, (unsigned long long)scq->paddr);
 669
 670         return scq;
 671 }
 672
 673 static void
 674 free_scq(struct idt77252_dev *card, struct scq_info *scq)
 675 {
 676         struct sk_buff *skb;
 677         struct atm_vcc *vcc;
 678
 679         pci_free_consistent(card->pcidev, SCQ_SIZE,
 680                             scq->base, scq->paddr);
 681
 682         while ((skb = skb_dequeue(&scq->transmit))) {
 683                 pci_unmap_single(card->pcidev, IDT77252_PRV_PADDR(skb),
 684                                  skb->len, PCI_DMA_TODEVICE);
 685
 686                 vcc = ATM_SKB(skb)->vcc;
 687                 if (vcc->pop)
 688                         vcc->pop(vcc, skb);
 689                 else
 690                         dev_kfree_skb(skb);
 691         }
 692
 693         while ((skb = skb_dequeue(&scq->pending))) {
 694                 pci_unmap_single(card->pcidev, IDT77252_PRV_PADDR(skb),
 695                                  skb->len, PCI_DMA_TODEVICE);
 696
 697                 vcc = ATM_SKB(skb)->vcc;
 698                 if (vcc->pop)
 699                         vcc->pop(vcc, skb);
 700                 else
 701                         dev_kfree_skb(skb);
 702         }
 703
 704         kfree(scq);
 705 }
 706
 707
 708 static int
 709 push_on_scq(struct idt77252_dev *card, struct vc_map *vc, struct sk_buff *skb)
 710 {
 711         struct scq_info *scq = vc->scq;
 712         unsigned long flags;
 713         struct scqe *tbd;
 714         int entries;
 715
 716         TXPRINTK("%s: SCQ: next 0x%p\n", card->name, scq->next);
 717
 718         atomic_inc(&scq->used);
 719         entries = atomic_read(&scq->used);
 720         if (entries > (SCQ_ENTRIES - 1)) {
 721                 atomic_dec(&scq->used);
 722                 goto out;
 723         }
 724
 725         skb_queue_tail(&scq->transmit, skb);
 726
 727         spin_lock_irqsave(&vc->lock, flags);
 728         if (vc->estimator) {
 729                 struct atm_vcc *vcc = vc->tx_vcc;
 730
 731                 vc->estimator->cells += (skb->len + 47) / 48;
 732                 if (atomic_read(&vcc->sk->sk_wmem_alloc) >
 733                     (vcc->sk->sk_sndbuf >> 1)) {
 734                         u32 cps = vc->estimator->maxcps;
 735
 736                         vc->estimator->cps = cps;
 737                         vc->estimator->avcps = cps << 5;
 738                         if (vc->lacr < vc->init_er) {
 739                                 vc->lacr = vc->init_er;
 740                                 writel(TCMDQ_LACR | (vc->lacr << 16) |
 741                                        vc->index, SAR_REG_TCMDQ);
 742                         }
 743                 }
 744         }
 745         spin_unlock_irqrestore(&vc->lock, flags);
 746
 747         tbd = &IDT77252_PRV_TBD(skb);
 748
 749         spin_lock_irqsave(&scq->lock, flags);
 750         scq->next->word_1 = cpu_to_le32(tbd->word_1 |
 751                                         SAR_TBD_TSIF | SAR_TBD_GTSI);
 752         scq->next->word_2 = cpu_to_le32(tbd->word_2);
 753         scq->next->word_3 = cpu_to_le32(tbd->word_3);
 754         scq->next->word_4 = cpu_to_le32(tbd->word_4);
 755
 756         if (scq->next == scq->last)
 757                 scq->next = scq->base;
 758         else
 759                 scq->next++;
 760
 761         write_sram(card, scq->scd,
 762                    scq->paddr +
 763                    (u32)((unsigned long)scq->next - (unsigned long)scq->base));
 764         spin_unlock_irqrestore(&scq->lock, flags);
 765
 766         scq->trans_start = jiffies;
 767
 768         if (test_and_clear_bit(VCF_IDLE, &vc->flags)) {
 769                 writel(TCMDQ_START_LACR | (vc->lacr << 16) | vc->index,
 770                        SAR_REG_TCMDQ);
 771         }
 772
 773         TXPRINTK("%d entries in SCQ used (push).\n", atomic_read(&scq->used));
 774
 775         XPRINTK("%s: SCQ (after push %2d) head = 0x%x, next = 0x%p.\n",
 776                 card->name, atomic_read(&scq->used),
 777                 read_sram(card, scq->scd + 1), scq->next);
 778
 779         return 0;
 780
 781 out:
 782         if (jiffies - scq->trans_start > HZ) {
 783                 printk("%s: Error pushing TBD for %d.%d\n",
 784                        card->name, vc->tx_vcc->vpi, vc->tx_vcc->vci);
 785 #ifdef CONFIG_ATM_IDT77252_DEBUG
 786                 idt77252_tx_dump(card);
 787 #endif
 788                 scq->trans_start = jiffies;
 789         }
 790
 791         return -ENOBUFS;
 792 }
 793
 794
 795 static void
 796 drain_scq(struct idt77252_dev *card, struct vc_map *vc)
 797 {
 798         struct scq_info *scq = vc->scq;
 799         struct sk_buff *skb;
 800         struct atm_vcc *vcc;
 801
 802         TXPRINTK("%s: SCQ (before drain %2d) next = 0x%p.\n",
 803                  card->name, atomic_read(&scq->used), scq->next);
 804
 805         skb = skb_dequeue(&scq->transmit);
 806         if (skb) {
 807                 TXPRINTK("%s: freeing skb at %p.\n", card->name, skb);
 808
 809                 pci_unmap_single(card->pcidev, IDT77252_PRV_PADDR(skb),
 810                                  skb->len, PCI_DMA_TODEVICE);
 811
 812                 vcc = ATM_SKB(skb)->vcc;
 813
 814                 if (vcc->pop)
 815                         vcc->pop(vcc, skb);
 816                 else
 817                         dev_kfree_skb(skb);
 818
 819                 atomic_inc(&vcc->stats->tx);
 820         }
 821
 822         atomic_dec(&scq->used);
 823
 824         spin_lock(&scq->skblock);
 825         while ((skb = skb_dequeue(&scq->pending))) {
 826                 if (push_on_scq(card, vc, skb)) {
 827                         skb_queue_head(&vc->scq->pending, skb);
 828                         break;
 829                 }
 830         }
 831         spin_unlock(&scq->skblock);
 832 }
 833
 834 static int
 835 queue_skb(struct idt77252_dev *card, struct vc_map *vc,
 836           struct sk_buff *skb, int oam)
 837 {
 838         struct atm_vcc *vcc;
 839         struct scqe *tbd;
 840         unsigned long flags;
 841         int error;
 842         int aal;
 843
 844         if (skb->len == 0) {
 845                 printk("%s: invalid skb->len (%d)\n", card->name, skb->len);
 846                 return -EINVAL;
 847         }
 848
 849         TXPRINTK("%s: Sending %d bytes of data.\n",
 850                  card->name, skb->len);
 851
 852         tbd = &IDT77252_PRV_TBD(skb);
 853         vcc = ATM_SKB(skb)->vcc;
 854
 855         IDT77252_PRV_PADDR(skb) = pci_map_single(card->pcidev, skb->data,
 856                                                  skb->len, PCI_DMA_TODEVICE);
 857
 858         error = -EINVAL;
 859
 860         if (oam) {
 861                 if (skb->len != 52)
 862                         goto errout;
 863
 864                 tbd->word_1 = SAR_TBD_OAM | ATM_CELL_PAYLOAD | SAR_TBD_EPDU;
 865                 tbd->word_2 = IDT77252_PRV_PADDR(skb) + 4;
 866                 tbd->word_3 = 0x00000000;
 867                 tbd->word_4 = (skb->data[0] << 24) | (skb->data[1] << 16) |
 868                               (skb->data[2] <<  8) | (skb->data[3] <<  0);
 869
 870                 if (test_bit(VCF_RSV, &vc->flags))
 871                         vc = card->vcs[0];
 872
 873                 goto done;
 874         }
 875
 876         if (test_bit(VCF_RSV, &vc->flags)) {
 877                 printk("%s: Trying to transmit on reserved VC\n", card->name);
 878                 goto errout;
 879         }
 880
 881         aal = vcc->qos.aal;
 882
 883         switch (aal) {
 884         case ATM_AAL0:
 885         case ATM_AAL34:
 886                 if (skb->len > 52)
 887                         goto errout;
 888
 889                 if (aal == ATM_AAL0)
 890                         tbd->word_1 = SAR_TBD_EPDU | SAR_TBD_AAL0 |
 891                                       ATM_CELL_PAYLOAD;
 892                 else
 893                         tbd->word_1 = SAR_TBD_EPDU | SAR_TBD_AAL34 |
 894                                       ATM_CELL_PAYLOAD;
 895
 896                 tbd->word_2 = IDT77252_PRV_PADDR(skb) + 4;
 897                 tbd->word_3 = 0x00000000;
 898                 tbd->word_4 = (skb->data[0] << 24) | (skb->data[1] << 16) |
 899                               (skb->data[2] <<  8) | (skb->data[3] <<  0);
 900                 break;
 901
 902         case ATM_AAL5:
 903                 tbd->word_1 = SAR_TBD_EPDU | SAR_TBD_AAL5 | skb->len;
 904                 tbd->word_2 = IDT77252_PRV_PADDR(skb);
 905                 tbd->word_3 = skb->len;
 906                 tbd->word_4 = (vcc->vpi << SAR_TBD_VPI_SHIFT) |
 907                               (vcc->vci << SAR_TBD_VCI_SHIFT);
 908                 break;
 909
 910         case ATM_AAL1:
 911         case ATM_AAL2:
 912         default:
 913                 printk("%s: Traffic type not supported.\n", card->name);
 914                 error = -EPROTONOSUPPORT;
 915                 goto errout;
 916         }
 917
 918 done:
 919         spin_lock_irqsave(&vc->scq->skblock, flags);
 920         skb_queue_tail(&vc->scq->pending, skb);
 921
 922         while ((skb = skb_dequeue(&vc->scq->pending))) {
 923                 if (push_on_scq(card, vc, skb)) {
 924                         skb_queue_head(&vc->scq->pending, skb);
 925                         break;
 926                 }
 927         }
 928         spin_unlock_irqrestore(&vc->scq->skblock, flags);
 929
 930         return 0;
 931
 932 errout:
 933         pci_unmap_single(card->pcidev, IDT77252_PRV_PADDR(skb),
 934                          skb->len, PCI_DMA_TODEVICE);
 935         return error;
 936 }
 937
 938 static unsigned long
 939 get_free_scd(struct idt77252_dev *card, struct vc_map *vc)
 940 {
 941         int i;
 942
 943         for (i = 0; i < card->scd_size; i++) {
 944                 if (!card->scd2vc[i]) {
 945                         card->scd2vc[i] = vc;
 946                         vc->scd_index = i;
 947                         return card->scd_base + i * SAR_SRAM_SCD_SIZE;
 948                 }
 949         }
 950         return 0;
 951 }
 952
 953 static void
 954 fill_scd(struct idt77252_dev *card, struct scq_info *scq, int class)
 955 {
 956         write_sram(card, scq->scd, scq->paddr);
 957         write_sram(card, scq->scd + 1, 0x00000000);
 958         write_sram(card, scq->scd + 2, 0xffffffff);
 959         write_sram(card, scq->scd + 3, 0x00000000);
 960 }
 961
 962 static void
 963 clear_scd(struct idt77252_dev *card, struct scq_info *scq, int class)
 964 {
 965         return;
 966 }
 967
 968 /*****************************************************************************/
 969 /*                                                                           */
 970 /* RSQ Handling                                                              */
 971 /*                                                                           */
 972 /*****************************************************************************/
 973
 974 static int
 975 init_rsq(struct idt77252_dev *card)
 976 {
 977         struct rsq_entry *rsqe;
 978
 979         card->rsq.base = pci_alloc_consistent(card->pcidev, RSQSIZE,
 980                                               &card->rsq.paddr);
 981         if (card->rsq.base == NULL) {
 982                 printk("%s: can't allocate RSQ.\n", card->name);
 983                 return -1;
 984         }
 985         memset(card->rsq.base, 0, RSQSIZE);
 986
 987         card->rsq.last = card->rsq.base + RSQ_NUM_ENTRIES - 1;
 988         card->rsq.next = card->rsq.last;
 989         for (rsqe = card->rsq.base; rsqe <= card->rsq.last; rsqe++)
 990                 rsqe->word_4 = 0;
 991
 992         writel((unsigned long) card->rsq.last - (unsigned long) card->rsq.base,
 993                SAR_REG_RSQH);
 994         writel(card->rsq.paddr, SAR_REG_RSQB);
 995
 996         IPRINTK("%s: RSQ base at 0x%lx (0x%x).\n", card->name,
 997                 (unsigned long) card->rsq.base,
 998                 readl(SAR_REG_RSQB));
 999         IPRINTK("%s: RSQ head = 0x%x, base = 0x%x, tail = 0x%x.\n",
1000                 card->name,
1001                 readl(SAR_REG_RSQH),
1002                 readl(SAR_REG_RSQB),
1003                 readl(SAR_REG_RSQT));
1004
1005         return 0;
1006 }
1007
1008 static void
1009 deinit_rsq(struct idt77252_dev *card)
1010 {
1011         pci_free_consistent(card->pcidev, RSQSIZE,
1012                             card->rsq.base, card->rsq.paddr);
1013 }
1014
1015 static void
1016 dequeue_rx(struct idt77252_dev *card, struct rsq_entry *rsqe)
1017 {
1018         struct atm_vcc *vcc;
1019         struct sk_buff *skb;
1020         struct rx_pool *rpp;
1021         struct vc_map *vc;
1022         u32 header, vpi, vci;
1023         u32 stat;
1024         int i;
1025
1026         stat = le32_to_cpu(rsqe->word_4);
1027
1028         if (stat & SAR_RSQE_IDLE) {
1029                 RXPRINTK("%s: message about inactive connection.\n",
1030                          card->name);
1031                 return;
1032         }
1033
1034         skb = sb_pool_skb(card, le32_to_cpu(rsqe->word_2));
1035         if (skb == NULL) {
1036                 printk("%s: NULL skb in %s, rsqe: %08x %08x %08x %08x\n",
1037                        card->name, __FUNCTION__,
1038                        le32_to_cpu(rsqe->word_1), le32_to_cpu(rsqe->word_2),
1039                        le32_to_cpu(rsqe->word_3), le32_to_cpu(rsqe->word_4));
1040                 return;
1041         }
1042
1043         header = le32_to_cpu(rsqe->word_1);
1044         vpi = (header >> 16) & 0x00ff;
1045         vci = (header >>  0) & 0xffff;
1046
1047         RXPRINTK("%s: SDU for %d.%d received in buffer 0x%p (data 0x%p).\n",
1048                  card->name, vpi, vci, skb, skb->data);
1049
1050         if ((vpi >= (1 << card->vpibits)) || (vci != (vci & card->vcimask))) {
1051                 printk("%s: SDU received for out-of-range vc %u.%u\n",
1052                        card->name, vpi, vci);
1053                 recycle_rx_skb(card, skb);
1054                 return;
1055         }
1056
1057         vc = card->vcs[VPCI2VC(card, vpi, vci)];
1058         if (!vc || !test_bit(VCF_RX, &vc->flags)) {
1059                 printk("%s: SDU received on non RX vc %u.%u\n",
1060                        card->name, vpi, vci);
1061                 recycle_rx_skb(card, skb);
1062                 return;
1063         }
1064
1065         vcc = vc->rx_vcc;
1066
1067         pci_dma_sync_single_for_cpu(card->pcidev, IDT77252_PRV_PADDR(skb),
1068                                     skb->end - skb->data, PCI_DMA_FROMDEVICE);
1069
1070         if ((vcc->qos.aal == ATM_AAL0) ||
1071             (vcc->qos.aal == ATM_AAL34)) {
1072                 struct sk_buff *sb;
1073                 unsigned char *cell;
1074                 u32 aal0;
1075
1076                 cell = skb->data;
1077                 for (i = (stat & SAR_RSQE_CELLCNT); i; i--) {
1078                         if ((sb = dev_alloc_skb(64)) == NULL) {
1079                                 printk("%s: Can't allocate buffers for aal0.\n",
1080                                        card->name);
1081                                 atomic_add(i, &vcc->stats->rx_drop);
1082                                 break;
1083                         }
1084                         if (!atm_charge(vcc, sb->truesize)) {
1085                                 RXPRINTK("%s: atm_charge() dropped aal0 packets.\n",
1086                                          card->name);
1087                                 atomic_add(i - 1, &vcc->stats->rx_drop);
1088                                 dev_kfree_skb(sb);
1089                                 break;
1090                         }
1091                         aal0 = (vpi << ATM_HDR_VPI_SHIFT) |
1092                                (vci << ATM_HDR_VCI_SHIFT);
1093                         aal0 |= (stat & SAR_RSQE_EPDU) ? 0x00000002 : 0;
1094                         aal0 |= (stat & SAR_RSQE_CLP)  ? 0x00000001 : 0;
1095
1096                         *((u32 *) sb->data) = aal0;
1097                         skb_put(sb, sizeof(u32));
1098                         memcpy(skb_put(sb, ATM_CELL_PAYLOAD),
1099                                cell, ATM_CELL_PAYLOAD);
1100
1101                         ATM_SKB(sb)->vcc = vcc;
1102                         do_gettimeofday(&sb->stamp);
1103                         vcc->push(vcc, sb);
1104                         atomic_inc(&vcc->stats->rx);
1105
1106                         cell += ATM_CELL_PAYLOAD;
1107                 }
1108
1109                 recycle_rx_skb(card, skb);
1110                 return;
1111         }
1112         if (vcc->qos.aal != ATM_AAL5) {
1113                 printk("%s: Unexpected AAL type in dequeue_rx(): %d.\n",
1114                        card->name, vcc->qos.aal);
1115                 recycle_rx_skb(card, skb);
1116                 return;
1117         }
1118         skb->len = (stat & SAR_RSQE_CELLCNT) * ATM_CELL_PAYLOAD;
1119
1120         rpp = &vc->rcv.rx_pool;
1121
1122         rpp->len += skb->len;
1123         if (!rpp->count++)
1124                 rpp->first = skb;
1125         *rpp->last = skb;
1126         rpp->last = &skb->next;
1127
1128         if (stat & SAR_RSQE_EPDU) {
1129                 unsigned char *l1l2;
1130                 unsigned int len;
1131
1132                 l1l2 = (unsigned char *) ((unsigned long) skb->data + skb->len - 6);
1133
1134                 len = (l1l2[0] << 8) | l1l2[1];
1135                 len = len ? len : 0x10000;
1136
1137                 RXPRINTK("%s: PDU has %d bytes.\n", card->name, len);
1138
1139                 if ((len + 8 > rpp->len) || (len + (47 + 8) < rpp->len)) {
1140                         RXPRINTK("%s: AAL5 PDU size mismatch: %d != %d. "
1141                                  "(CDC: %08x)\n",
1142                                  card->name, len, rpp->len, readl(SAR_REG_CDC));
1143                         recycle_rx_pool_skb(card, rpp);
1144                         atomic_inc(&vcc->stats->rx_err);
1145                         return;
1146                 }
1147                 if (stat & SAR_RSQE_CRC) {
1148                         RXPRINTK("%s: AAL5 CRC error.\n", card->name);
1149                         recycle_rx_pool_skb(card, rpp);
1150                         atomic_inc(&vcc->stats->rx_err);
1151                         return;
1152                 }
1153                 if (rpp->count > 1) {
1154                         struct sk_buff *sb;
1155
1156                         skb = dev_alloc_skb(rpp->len);
1157                         if (!skb) {
1158                                 RXPRINTK("%s: Can't alloc RX skb.\n",
1159                                          card->name);
1160                                 recycle_rx_pool_skb(card, rpp);
1161                                 atomic_inc(&vcc->stats->rx_err);
1162                                 return;
1163                         }
1164                         if (!atm_charge(vcc, skb->truesize)) {
1165                                 recycle_rx_pool_skb(card, rpp);
1166                                 dev_kfree_skb(skb);
1167                                 return;
1168                         }
1169                         sb = rpp->first;
1170                         for (i = 0; i < rpp->count; i++) {
1171                                 memcpy(skb_put(skb, sb->len),
1172                                        sb->data, sb->len);
1173                                 sb = sb->next;
1174                         }
1175
1176                         recycle_rx_pool_skb(card, rpp);
1177
1178                         skb_trim(skb, len);
1179                         ATM_SKB(skb)->vcc = vcc;
1180                         do_gettimeofday(&skb->stamp);
1181
1182                         vcc->push(vcc, skb);
1183                         atomic_inc(&vcc->stats->rx);
1184
1185                         return;
1186                 }
1187
1188                 skb->next = NULL;
1189                 flush_rx_pool(card, rpp);
1190
1191                 if (!atm_charge(vcc, skb->truesize)) {
1192                         recycle_rx_skb(card, skb);
1193                         return;
1194                 }
1195
1196                 pci_unmap_single(card->pcidev, IDT77252_PRV_PADDR(skb),
1197                                  skb->end - skb->data, PCI_DMA_FROMDEVICE);
1198                 sb_pool_remove(card, skb);
1199
1200                 skb_trim(skb, len);
1201                 ATM_SKB(skb)->vcc = vcc;
1202                 do_gettimeofday(&skb->stamp);
1203
1204                 vcc->push(vcc, skb);
1205                 atomic_inc(&vcc->stats->rx);
1206
1207                 if (skb->truesize > SAR_FB_SIZE_3)
1208                         add_rx_skb(card, 3, SAR_FB_SIZE_3, 1);
1209                 else if (skb->truesize > SAR_FB_SIZE_2)
1210                         add_rx_skb(card, 2, SAR_FB_SIZE_2, 1);
1211                 else if (skb->truesize > SAR_FB_SIZE_1)
1212                         add_rx_skb(card, 1, SAR_FB_SIZE_1, 1);
1213                 else
1214                         add_rx_skb(card, 0, SAR_FB_SIZE_0, 1);
1215                 return;
1216         }
1217 }
1218
1219 static void
1220 idt77252_rx(struct idt77252_dev *card)
1221 {
1222         struct rsq_entry *rsqe;
1223
1224         if (card->rsq.next == card->rsq.last)
1225                 rsqe = card->rsq.base;
1226         else
1227                 rsqe = card->rsq.next + 1;
1228
1229         if (!(le32_to_cpu(rsqe->word_4) & SAR_RSQE_VALID)) {
1230                 RXPRINTK("%s: no entry in RSQ.\n", card->name);
1231                 return;
1232         }
1233
1234         do {
1235                 dequeue_rx(card, rsqe);
1236                 rsqe->word_4 = 0;
1237                 card->rsq.next = rsqe;
1238                 if (card->rsq.next == card->rsq.last)
1239                         rsqe = card->rsq.base;
1240                 else
1241                         rsqe = card->rsq.next + 1;
1242         } while (le32_to_cpu(rsqe->word_4) & SAR_RSQE_VALID);
1243
1244         writel((unsigned long) card->rsq.next - (unsigned long) card->rsq.base,
1245                SAR_REG_RSQH);
1246 }
1247
1248 static void
1249 idt77252_rx_raw(struct idt77252_dev *card)
1250 {
1251         struct sk_buff  *queue;
1252         u32             head, tail;
1253         struct atm_vcc  *vcc;
1254         struct vc_map   *vc;
1255         struct sk_buff  *sb;
1256
1257         if (card->raw_cell_head == NULL) {
1258                 u32 handle = le32_to_cpu(*(card->raw_cell_hnd + 1));
1259                 card->raw_cell_head = sb_pool_skb(card, handle);
1260         }
1261
1262         queue = card->raw_cell_head;
1263         if (!queue)
1264                 return;
1265
1266         head = IDT77252_PRV_PADDR(queue) + (queue->data - queue->head - 16);
1267         tail = readl(SAR_REG_RAWCT);
1268
1269         pci_dma_sync_single_for_cpu(card->pcidev, IDT77252_PRV_PADDR(queue),
1270                                     queue->end - queue->head - 16,
1271                                     PCI_DMA_FROMDEVICE);
1272
1273         while (head != tail) {
1274                 unsigned int vpi, vci, pti;
1275                 u32 header;
1276
1277                 header = le32_to_cpu(*(u32 *) &queue->data[0]);
1278
1279                 vpi = (header & ATM_HDR_VPI_MASK) >> ATM_HDR_VPI_SHIFT;
1280                 vci = (header & ATM_HDR_VCI_MASK) >> ATM_HDR_VCI_SHIFT;
1281                 pti = (header & ATM_HDR_PTI_MASK) >> ATM_HDR_PTI_SHIFT;
1282
1283 #ifdef CONFIG_ATM_IDT77252_DEBUG
1284                 if (debug & DBG_RAW_CELL) {
1285                         int i;
1286
1287                         printk("%s: raw cell %x.%02x.%04x.%x.%x\n",
1288                                card->name, (header >> 28) & 0x000f,
1289                                (header >> 20) & 0x00ff,
1290                                (header >>  4) & 0xffff,
1291                                (header >>  1) & 0x0007,
1292                                (header >>  0) & 0x0001);
1293                         for (i = 16; i < 64; i++)
1294                                 printk(" %02x", queue->data[i]);
1295                         printk("\n");
1296                 }
1297 #endif
1298
1299                 if (vpi >= (1<<card->vpibits) || vci >= (1<<card->vcibits)) {
1300                         RPRINTK("%s: SDU received for out-of-range vc %u.%u\n",
1301                                 card->name, vpi, vci);
1302                         goto drop;
1303                 }
1304
1305                 vc = card->vcs[VPCI2VC(card, vpi, vci)];
1306                 if (!vc || !test_bit(VCF_RX, &vc->flags)) {
1307                         RPRINTK("%s: SDU received on non RX vc %u.%u\n",
1308                                 card->name, vpi, vci);
1309                         goto drop;
1310                 }
1311
1312                 vcc = vc->rx_vcc;
1313
1314                 if (vcc->qos.aal != ATM_AAL0) {
1315                         RPRINTK("%s: raw cell for non AAL0 vc %u.%u\n",
1316                                 card->name, vpi, vci);
1317                         atomic_inc(&vcc->stats->rx_drop);
1318                         goto drop;
1319                 }
1320
1321                 if ((sb = dev_alloc_skb(64)) == NULL) {
1322                         printk("%s: Can't allocate buffers for AAL0.\n",
1323                                card->name);
1324                         atomic_inc(&vcc->stats->rx_err);
1325                         goto drop;
1326                 }
1327
1328                 if ((vcc->sk != NULL) && !atm_charge(vcc, sb->truesize)) {
1329                         RXPRINTK("%s: atm_charge() dropped AAL0 packets.\n",
1330                                  card->name);
1331                         dev_kfree_skb(sb);
1332                         goto drop;
1333                 }
1334
1335                 *((u32 *) sb->data) = header;
1336                 skb_put(sb, sizeof(u32));
1337                 memcpy(skb_put(sb, ATM_CELL_PAYLOAD), &(queue->data[16]),
1338                        ATM_CELL_PAYLOAD);
1339
1340                 ATM_SKB(sb)->vcc = vcc;
1341                 do_gettimeofday(&sb->stamp);
1342                 vcc->push(vcc, sb);
1343                 atomic_inc(&vcc->stats->rx);
1344
1345 drop:
1346                 skb_pull(queue, 64);
1347
1348                 head = IDT77252_PRV_PADDR(queue)
1349                                         + (queue->data - queue->head - 16);
1350
1351                 if (queue->len < 128) {
1352                         struct sk_buff *next;
1353                         u32 handle;
1354
1355                         head = le32_to_cpu(*(u32 *) &queue->data[0]);
1356                         handle = le32_to_cpu(*(u32 *) &queue->data[4]);
1357
1358                         next = sb_pool_skb(card, handle);
1359                         recycle_rx_skb(card, queue);
1360
1361                         if (next) {
1362                                 card->raw_cell_head = next;
1363                                 queue = card->raw_cell_head;
1364                                 pci_dma_sync_single_for_cpu(card->pcidev,
1365                                                             IDT77252_PRV_PADDR(queue),
1366                                                             queue->end - queue->data,
1367                                                             PCI_DMA_FROMDEVICE);
1368                         } else {
1369                                 card->raw_cell_head = NULL;
1370                                 printk("%s: raw cell queue overrun\n",
1371                                        card->name);
1372                                 break;
1373                         }
1374                 }
1375         }
1376 }
1377
1378
1379 /*****************************************************************************/
1380 /*                                                                           */
1381 /* TSQ Handling                                                              */
1382 /*                                                                           */
1383 /*****************************************************************************/
1384
1385 static int
1386 init_tsq(struct idt77252_dev *card)
1387 {
1388         struct tsq_entry *tsqe;
1389
1390         card->tsq.base = pci_alloc_consistent(card->pcidev, RSQSIZE,
1391                                               &card->tsq.paddr);
1392         if (card->tsq.base == NULL) {
1393                 printk("%s: can't allocate TSQ.\n", card->name);
1394                 return -1;
1395         }
1396         memset(card->tsq.base, 0, TSQSIZE);
1397
1398         card->tsq.last = card->tsq.base + TSQ_NUM_ENTRIES - 1;
1399         card->tsq.next = card->tsq.last;
1400         for (tsqe = card->tsq.base; tsqe <= card->tsq.last; tsqe++)
1401                 tsqe->word_2 = cpu_to_le32(SAR_TSQE_INVALID);
1402
1403         writel(card->tsq.paddr, SAR_REG_TSQB);
1404         writel((unsigned long) card->tsq.next - (unsigned long) card->tsq.base,
1405                SAR_REG_TSQH);
1406
1407         return 0;
1408 }
1409
1410 static void
1411 deinit_tsq(struct idt77252_dev *card)
1412 {
1413         pci_free_consistent(card->pcidev, TSQSIZE,
1414                             card->tsq.base, card->tsq.paddr);
1415 }
1416
1417 static void
1418 idt77252_tx(struct idt77252_dev *card)
1419 {
1420         struct tsq_entry *tsqe;
1421         unsigned int vpi, vci;
1422         struct vc_map *vc;
1423         u32 conn, stat;
1424
1425         if (card->tsq.next == card->tsq.last)
1426                 tsqe = card->tsq.base;
1427         else
1428                 tsqe = card->tsq.next + 1;
1429
1430         TXPRINTK("idt77252_tx: tsq  %p: base %p, next %p, last %p\n", tsqe,
1431                  card->tsq.base, card->tsq.next, card->tsq.last);
1432         TXPRINTK("idt77252_tx: tsqb %08x, tsqt %08x, tsqh %08x, \n",
1433                  readl(SAR_REG_TSQB),
1434                  readl(SAR_REG_TSQT),
1435                  readl(SAR_REG_TSQH));
1436
1437         stat = le32_to_cpu(tsqe->word_2);
1438
1439         if (stat & SAR_TSQE_INVALID)
1440                 return;
1441
1442         do {
1443                 TXPRINTK("tsqe: 0x%p [0x%08x 0x%08x]\n", tsqe,
1444                          le32_to_cpu(tsqe->word_1),
1445                          le32_to_cpu(tsqe->word_2));
1446
1447                 switch (stat & SAR_TSQE_TYPE) {
1448                 case SAR_TSQE_TYPE_TIMER:
1449                         TXPRINTK("%s: Timer RollOver detected.\n", card->name);
1450                         break;
1451
1452                 case SAR_TSQE_TYPE_IDLE:
1453
1454                         conn = le32_to_cpu(tsqe->word_1);
1455
1456                         if (SAR_TSQE_TAG(stat) == 0x10) {
1457 #ifdef  NOTDEF
1458                                 printk("%s: Connection %d halted.\n",
1459                                        card->name,
1460                                        le32_to_cpu(tsqe->word_1) & 0x1fff);
1461 #endif
1462                                 break;
1463                         }
1464
1465                         vc = card->vcs[conn & 0x1fff];
1466                         if (!vc) {
1467                                 printk("%s: could not find VC from conn %d\n",
1468                                        card->name, conn & 0x1fff);
1469                                 break;
1470                         }
1471
1472                         printk("%s: Connection %d IDLE.\n",
1473                                card->name, vc->index);
1474
1475                         set_bit(VCF_IDLE, &vc->flags);
1476                         break;
1477
1478                 case SAR_TSQE_TYPE_TSR:
1479
1480                         conn = le32_to_cpu(tsqe->word_1);
1481
1482                         vc = card->vcs[conn & 0x1fff];
1483                         if (!vc) {
1484                                 printk("%s: no VC at index %d\n",
1485                                        card->name,
1486                                        le32_to_cpu(tsqe->word_1) & 0x1fff);
1487                                 break;
1488                         }
1489
1490                         drain_scq(card, vc);
1491                         break;
1492
1493                 case SAR_TSQE_TYPE_TBD_COMP:
1494
1495                         conn = le32_to_cpu(tsqe->word_1);
1496
1497                         vpi = (conn >> SAR_TBD_VPI_SHIFT) & 0x00ff;
1498                         vci = (conn >> SAR_TBD_VCI_SHIFT) & 0xffff;
1499
1500                         if (vpi >= (1 << card->vpibits) ||
1501                             vci >= (1 << card->vcibits)) {
1502                                 printk("%s: TBD complete: "
1503                                        "out of range VPI.VCI %u.%u\n",
1504                                        card->name, vpi, vci);
1505                                 break;
1506                         }
1507
1508                         vc = card->vcs[VPCI2VC(card, vpi, vci)];
1509                         if (!vc) {
1510                                 printk("%s: TBD complete: "
1511                                        "no VC at VPI.VCI %u.%u\n",
1512                                        card->name, vpi, vci);
1513                                 break;
1514                         }
1515
1516                         drain_scq(card, vc);
1517                         break;
1518                 }
1519
1520                 tsqe->word_2 = cpu_to_le32(SAR_TSQE_INVALID);
1521
1522                 card->tsq.next = tsqe;
1523                 if (card->tsq.next == card->tsq.last)
1524                         tsqe = card->tsq.base;
1525                 else
1526                         tsqe = card->tsq.next + 1;
1527
1528                 TXPRINTK("tsqe: %p: base %p, next %p, last %p\n", tsqe,
1529                          card->tsq.base, card->tsq.next, card->tsq.last);
1530
1531                 stat = le32_to_cpu(tsqe->word_2);
1532
1533         } while (!(stat & SAR_TSQE_INVALID));
1534
1535         writel((unsigned long)card->tsq.next - (unsigned long)card->tsq.base,
1536                SAR_REG_TSQH);
1537
1538         XPRINTK("idt77252_tx-after writel%d: TSQ head = 0x%x, tail = 0x%x, next = 0x%p.\n",
1539                 card->index, readl(SAR_REG_TSQH),
1540                 readl(SAR_REG_TSQT), card->tsq.next);
1541 }
1542
1543
1544 static void
1545 tst_timer(unsigned long data)
1546 {
1547         struct idt77252_dev *card = (struct idt77252_dev *)data;
1548         unsigned long base, idle, jump;
1549         unsigned long flags;
1550         u32 pc;
1551         int e;
1552
1553         spin_lock_irqsave(&card->tst_lock, flags);
1554
1555         base = card->tst[card->tst_index];
1556         idle = card->tst[card->tst_index ^ 1];
1557
1558         if (test_bit(TST_SWITCH_WAIT, &card->tst_state)) {
1559                 jump = base + card->tst_size - 2;
1560
1561                 pc = readl(SAR_REG_NOW) >> 2;
1562                 if ((pc ^ idle) & ~(card->tst_size - 1)) {
1563                         mod_timer(&card->tst_timer, jiffies + 1);
1564                         goto out;
1565                 }
1566
1567                 clear_bit(TST_SWITCH_WAIT, &card->tst_state);
1568
1569                 card->tst_index ^= 1;
1570                 write_sram(card, jump, TSTE_OPC_JMP | (base << 2));
1571
1572                 base = card->tst[card->tst_index];
1573                 idle = card->tst[card->tst_index ^ 1];
1574
1575                 for (e = 0; e < card->tst_size - 2; e++) {
1576                         if (card->soft_tst[e].tste & TSTE_PUSH_IDLE) {
1577                                 write_sram(card, idle + e,
1578                                            card->soft_tst[e].tste & TSTE_MASK);
1579                                 card->soft_tst[e].tste &= ~(TSTE_PUSH_IDLE);
1580                         }
1581                 }
1582         }
1583
1584         if (test_and_clear_bit(TST_SWITCH_PENDING, &card->tst_state)) {
1585
1586                 for (e = 0; e < card->tst_size - 2; e++) {
1587                         if (card->soft_tst[e].tste & TSTE_PUSH_ACTIVE) {
1588                                 write_sram(card, idle + e,
1589                                            card->soft_tst[e].tste & TSTE_MASK);
1590                                 card->soft_tst[e].tste &= ~(TSTE_PUSH_ACTIVE);
1591                                 card->soft_tst[e].tste |= TSTE_PUSH_IDLE;
1592                         }
1593                 }
1594
1595                 jump = base + card->tst_size - 2;
1596
1597                 write_sram(card, jump, TSTE_OPC_NULL);
1598                 set_bit(TST_SWITCH_WAIT, &card->tst_state);
1599
1600                 mod_timer(&card->tst_timer, jiffies + 1);
1601         }
1602
1603 out:
1604         spin_unlock_irqrestore(&card->tst_lock, flags);
1605 }
1606
1607 static int
1608 __fill_tst(struct idt77252_dev *card, struct vc_map *vc,
1609            int n, unsigned int opc)
1610 {
1611         unsigned long cl, avail;
1612         unsigned long idle;
1613         int e, r;
1614         u32 data;
1615
1616         avail = card->tst_size - 2;
1617         for (e = 0; e < avail; e++) {
1618                 if (card->soft_tst[e].vc == NULL)
1619                         break;
1620         }
1621         if (e >= avail) {
1622                 printk("%s: No free TST entries found\n", card->name);
1623                 return -1;
1624         }
1625
1626         NPRINTK("%s: conn %d: first TST entry at %d.\n",
1627                 card->name, vc ? vc->index : -1, e);
1628
1629         r = n;
1630         cl = avail;
1631         data = opc & TSTE_OPC_MASK;
1632         if (vc && (opc != TSTE_OPC_NULL))
1633                 data = opc | vc->index;
1634
1635         idle = card->tst[card->tst_index ^ 1];
1636
1637         /*
1638          * Fill Soft TST.
1639          */
1640         while (r > 0) {
1641                 if ((cl >= avail) && (card->soft_tst[e].vc == NULL)) {
1642                         if (vc)
1643                                 card->soft_tst[e].vc = vc;
1644                         else
1645                                 card->soft_tst[e].vc = (void *)-1;
1646
1647                         card->soft_tst[e].tste = data;
1648                         if (timer_pending(&card->tst_timer))
1649                                 card->soft_tst[e].tste |= TSTE_PUSH_ACTIVE;
1650                         else {
1651                                 write_sram(card, idle + e, data);
1652                                 card->soft_tst[e].tste |= TSTE_PUSH_IDLE;
1653                         }
1654
1655                         cl -= card->tst_size;
1656                         r--;
1657                 }
1658
1659                 if (++e == avail)
1660                         e = 0;
1661                 cl += n;
1662         }
1663
1664         return 0;
1665 }
1666
1667 static int
1668 fill_tst(struct idt77252_dev *card, struct vc_map *vc, int n, unsigned int opc)
1669 {
1670         unsigned long flags;
1671         int res;
1672
1673         spin_lock_irqsave(&card->tst_lock, flags);
1674
1675         res = __fill_tst(card, vc, n, opc);
1676
1677         set_bit(TST_SWITCH_PENDING, &card->tst_state);
1678         if (!timer_pending(&card->tst_timer))
1679                 mod_timer(&card->tst_timer, jiffies + 1);
1680
1681         spin_unlock_irqrestore(&card->tst_lock, flags);
1682         return res;
1683 }
1684
1685 static int
1686 __clear_tst(struct idt77252_dev *card, struct vc_map *vc)
1687 {
1688         unsigned long idle;
1689         int e;
1690
1691         idle = card->tst[card->tst_index ^ 1];
1692
1693         for (e = 0; e < card->tst_size - 2; e++) {
1694                 if (card->soft_tst[e].vc == vc) {
1695                         card->soft_tst[e].vc = NULL;
1696
1697                         card->soft_tst[e].tste = TSTE_OPC_VAR;
1698                         if (timer_pending(&card->tst_timer))
1699                                 card->soft_tst[e].tste |= TSTE_PUSH_ACTIVE;
1700                         else {
1701                                 write_sram(card, idle + e, TSTE_OPC_VAR);
1702                                 card->soft_tst[e].tste |= TSTE_PUSH_IDLE;
1703                         }
1704                 }
1705         }
1706
1707         return 0;
1708 }
1709
1710 static int
1711 clear_tst(struct idt77252_dev *card, struct vc_map *vc)
1712 {
1713         unsigned long flags;
1714         int res;
1715
1716         spin_lock_irqsave(&card->tst_lock, flags);
1717
1718         res = __clear_tst(card, vc);
1719
1720         set_bit(TST_SWITCH_PENDING, &card->tst_state);
1721         if (!timer_pending(&card->tst_timer))
1722                 mod_timer(&card->tst_timer, jiffies + 1);
1723
1724         spin_unlock_irqrestore(&card->tst_lock, flags);
1725         return res;
1726 }
1727
1728 static int
1729 change_tst(struct idt77252_dev *card, struct vc_map *vc,
1730            int n, unsigned int opc)
1731 {
1732         unsigned long flags;
1733         int res;
1734
1735         spin_lock_irqsave(&card->tst_lock, flags);
1736
1737         __clear_tst(card, vc);
1738         res = __fill_tst(card, vc, n, opc);
1739
1740         set_bit(TST_SWITCH_PENDING, &card->tst_state);
1741         if (!timer_pending(&card->tst_timer))
1742                 mod_timer(&card->tst_timer, jiffies + 1);
1743
1744         spin_unlock_irqrestore(&card->tst_lock, flags);
1745         return res;
1746 }
1747
1748
1749 static int
1750 set_tct(struct idt77252_dev *card, struct vc_map *vc)
1751 {
1752         unsigned long tct;
1753
1754         tct = (unsigned long) (card->tct_base + vc->index * SAR_SRAM_TCT_SIZE);
1755
1756         switch (vc->class) {
1757         case SCHED_CBR:
1758                 OPRINTK("%s: writing TCT at 0x%lx, SCD 0x%lx.\n",
1759                         card->name, tct, vc->scq->scd);
1760
1761                 write_sram(card, tct + 0, TCT_CBR | vc->scq->scd);
1762                 write_sram(card, tct + 1, 0);
1763                 write_sram(card, tct + 2, 0);
1764                 write_sram(card, tct + 3, 0);
1765                 write_sram(card, tct + 4, 0);
1766                 write_sram(card, tct + 5, 0);
1767                 write_sram(card, tct + 6, 0);
1768                 write_sram(card, tct + 7, 0);
1769                 break;
1770
1771         case SCHED_UBR:
1772                 OPRINTK("%s: writing TCT at 0x%lx, SCD 0x%lx.\n",
1773                         card->name, tct, vc->scq->scd);
1774
1775                 write_sram(card, tct + 0, TCT_UBR | vc->scq->scd);
1776                 write_sram(card, tct + 1, 0);
1777                 write_sram(card, tct + 2, TCT_TSIF);
1778                 write_sram(card, tct + 3, TCT_HALT | TCT_IDLE);
1779                 write_sram(card, tct + 4, 0);
1780                 write_sram(card, tct + 5, vc->init_er);
1781                 write_sram(card, tct + 6, 0);
1782                 write_sram(card, tct + 7, TCT_FLAG_UBR);
1783                 break;
1784
1785         case SCHED_VBR:
1786         case SCHED_ABR:
1787         default:
1788                 return -ENOSYS;
1789         }
1790
1791         return 0;
1792 }
1793
1794 /*****************************************************************************/
1795 /*                                                                           */
1796 /* FBQ Handling                                                              */
1797 /*                                                                           */
1798 /*****************************************************************************/
1799
1800 static __inline__ int
1801 idt77252_fbq_level(struct idt77252_dev *card, int queue)
1802 {
1803         return (readl(SAR_REG_STAT) >> (16 + (queue << 2))) & 0x0f;
1804 }
1805
1806 static __inline__ int
1807 idt77252_fbq_full(struct idt77252_dev *card, int queue)
1808 {
1809         return (readl(SAR_REG_STAT) >> (16 + (queue << 2))) == 0x0f;
1810 }
1811
1812 static int
1813 push_rx_skb(struct idt77252_dev *card, struct sk_buff *skb, int queue)
1814 {
1815         unsigned long flags;
1816         u32 handle;
1817         u32 addr;
1818
1819         skb->data = skb->tail = skb->head;
1820         skb->len = 0;
1821
1822         skb_reserve(skb, 16);
1823
1824         switch (queue) {
1825         case 0:
1826                 skb_put(skb, SAR_FB_SIZE_0);
1827                 break;
1828         case 1:
1829                 skb_put(skb, SAR_FB_SIZE_1);
1830                 break;
1831         case 2:
1832                 skb_put(skb, SAR_FB_SIZE_2);
1833                 break;
1834         case 3:
1835                 skb_put(skb, SAR_FB_SIZE_3);
1836                 break;
1837         default:
1838                 dev_kfree_skb(skb);
1839                 return -1;
1840         }
1841
1842         if (idt77252_fbq_full(card, queue))
1843                 return -1;
1844
1845         memset(&skb->data[(skb->len & ~(0x3f)) - 64], 0, 2 * sizeof(u32));
1846
1847         handle = IDT77252_PRV_POOL(skb);
1848         addr = IDT77252_PRV_PADDR(skb);
1849
1850         spin_lock_irqsave(&card->cmd_lock, flags);
1851         writel(handle, card->fbq[queue]);
1852         writel(addr, card->fbq[queue]);
1853         spin_unlock_irqrestore(&card->cmd_lock, flags);
1854
1855         return 0;
1856 }
1857
1858 static void
1859 add_rx_skb(struct idt77252_dev *card, int queue,
1860            unsigned int size, unsigned int count)
1861 {
1862         struct sk_buff *skb;
1863         dma_addr_t paddr;
1864         u32 handle;
1865
1866         while (count--) {
1867                 skb = dev_alloc_skb(size);
1868                 if (!skb)
1869                         return;
1870
1871                 if (sb_pool_add(card, skb, queue)) {
1872                         printk("%s: SB POOL full\n", __FUNCTION__);
1873                         goto outfree;
1874                 }
1875
1876                 paddr = pci_map_single(card->pcidev, skb->data,
1877                                        skb->end - skb->data,
1878                                        PCI_DMA_FROMDEVICE);
1879                 IDT77252_PRV_PADDR(skb) = paddr;
1880
1881                 if (push_rx_skb(card, skb, queue)) {
1882                         printk("%s: FB QUEUE full\n", __FUNCTION__);
1883                         goto outunmap;
1884                 }
1885         }
1886
1887         return;
1888
1889 outunmap:
1890         pci_unmap_single(card->pcidev, IDT77252_PRV_PADDR(skb),
1891                          skb->end - skb->data, PCI_DMA_FROMDEVICE);
1892
1893         handle = IDT77252_PRV_POOL(skb);
1894         card->sbpool[POOL_QUEUE(handle)].skb[POOL_INDEX(handle)] = NULL;
1895
1896 outfree:
1897         dev_kfree_skb(skb);
1898 }
1899
1900
1901 static void
1902 recycle_rx_skb(struct idt77252_dev *card, struct sk_buff *skb)
1903 {
1904         u32 handle = IDT77252_PRV_POOL(skb);
1905         int err;
1906
1907         pci_dma_sync_single_for_device(card->pcidev, IDT77252_PRV_PADDR(skb),
1908                                        skb->end - skb->data, PCI_DMA_FROMDEVICE);
1909
1910         err = push_rx_skb(card, skb, POOL_QUEUE(handle));
1911         if (err) {
1912                 pci_unmap_single(card->pcidev, IDT77252_PRV_PADDR(skb),
1913                                  skb->end - skb->data, PCI_DMA_FROMDEVICE);
1914                 sb_pool_remove(card, skb);
1915                 dev_kfree_skb(skb);
1916         }
1917 }
1918
1919 static void
1920 flush_rx_pool(struct idt77252_dev *card, struct rx_pool *rpp)
1921 {
1922         rpp->len = 0;
1923         rpp->count = 0;
1924         rpp->first = NULL;
1925         rpp->last = &rpp->first;
1926 }
1927
1928 static void
1929 recycle_rx_pool_skb(struct idt77252_dev *card, struct rx_pool *rpp)
1930 {
1931         struct sk_buff *skb, *next;
1932         int i;
1933
1934         skb = rpp->first;
1935         for (i = 0; i < rpp->count; i++) {
1936                 next = skb->next;
1937                 skb->next = NULL;
1938                 recycle_rx_skb(card, skb);
1939                 skb = next;
1940         }
1941         flush_rx_pool(card, rpp);
1942 }
1943
1944 /*****************************************************************************/
1945 /*                                                                           */
1946 /* ATM Interface                                                             */
1947 /*                                                                           */
1948 /*****************************************************************************/
1949
1950 static void
1951 idt77252_phy_put(struct atm_dev *dev, unsigned char value, unsigned long addr)
1952 {
1953         write_utility(dev->dev_data, 0x100 + (addr & 0x1ff), value);
1954 }
1955
1956 static unsigned char
1957 idt77252_phy_get(struct atm_dev *dev, unsigned long addr)
1958 {
1959         return read_utility(dev->dev_data, 0x100 + (addr & 0x1ff));
1960 }
1961
1962 static inline int
1963 idt77252_send_skb(struct atm_vcc *vcc, struct sk_buff *skb, int oam)
1964 {
1965         struct atm_dev *dev = vcc->dev;
1966         struct idt77252_dev *card = dev->dev_data;
1967         struct vc_map *vc = vcc->dev_data;
1968         int err;
1969
1970         if (vc == NULL) {
1971                 printk("%s: NULL connection in send().\n", card->name);
1972                 atomic_inc(&vcc->stats->tx_err);
1973                 dev_kfree_skb(skb);
1974                 return -EINVAL;
1975         }
1976         if (!test_bit(VCF_TX, &vc->flags)) {
1977                 printk("%s: Trying to transmit on a non-tx VC.\n", card->name);
1978                 atomic_inc(&vcc->stats->tx_err);
1979                 dev_kfree_skb(skb);
1980                 return -EINVAL;
1981         }
1982
1983         switch (vcc->qos.aal) {
1984         case ATM_AAL0:
1985         case ATM_AAL1:
1986         case ATM_AAL5:
1987                 break;
1988         default:
1989                 printk("%s: Unsupported AAL: %d\n", card->name, vcc->qos.aal);
1990                 atomic_inc(&vcc->stats->tx_err);
1991                 dev_kfree_skb(skb);
1992                 return -EINVAL;
1993         }
1994
1995         if (skb_shinfo(skb)->nr_frags != 0) {
1996                 printk("%s: No scatter-gather yet.\n", card->name);
1997                 atomic_inc(&vcc->stats->tx_err);
1998                 dev_kfree_skb(skb);
1999                 return -EINVAL;
2000         }
2001         ATM_SKB(skb)->vcc = vcc;
2002
2003         err = queue_skb(card, vc, skb, oam);
2004         if (err) {
2005                 atomic_inc(&vcc->stats->tx_err);
2006                 dev_kfree_skb(skb);
2007                 return err;
2008         }
2009
2010         return 0;
2011 }
2012
2013 int
2014 idt77252_send(struct atm_vcc *vcc, struct sk_buff *skb)
2015 {
2016         return idt77252_send_skb(vcc, skb, 0);
2017 }
2018
2019 static int
2020 idt77252_send_oam(struct atm_vcc *vcc, void *cell, int flags)
2021 {
2022         struct atm_dev *dev = vcc->dev;
2023         struct idt77252_dev *card = dev->dev_data;
2024         struct sk_buff *skb;
2025
2026         skb = dev_alloc_skb(64);
2027         if (!skb) {
2028                 printk("%s: Out of memory in send_oam().\n", card->name);
2029                 atomic_inc(&vcc->stats->tx_err);
2030                 return -ENOMEM;
2031         }
2032         atomic_add(skb->truesize, &vcc->sk->sk_wmem_alloc);
2033
2034         memcpy(skb_put(skb, 52), cell, 52);
2035
2036         return idt77252_send_skb(vcc, skb, 1);
2037 }
2038
2039 static __inline__ unsigned int
2040 idt77252_fls(unsigned int x)
2041 {
2042         int r = 1;
2043
2044         if (x == 0)
2045                 return 0;
2046         if (x & 0xffff0000) {
2047                 x >>= 16;
2048                 r += 16;
2049         }
2050         if (x & 0xff00) {
2051                 x >>= 8;
2052                 r += 8;
2053         }
2054         if (x & 0xf0) {
2055                 x >>= 4;
2056                 r += 4;
2057         }
2058         if (x & 0xc) {
2059                 x >>= 2;
2060                 r += 2;
2061         }
2062         if (x & 0x2)
2063                 r += 1;
2064         return r;
2065 }
2066
2067 static u16
2068 idt77252_int_to_atmfp(unsigned int rate)
2069 {
2070         u16 m, e;
2071
2072         if (rate == 0)
2073                 return 0;
2074         e = idt77252_fls(rate) - 1;
2075         if (e < 9)
2076                 m = (rate - (1 << e)) << (9 - e);
2077         else if (e == 9)
2078                 m = (rate - (1 << e));
2079         else /* e > 9 */
2080                 m = (rate - (1 << e)) >> (e - 9);
2081         return 0x4000 | (e << 9) | m;
2082 }
2083
2084 static u8
2085 idt77252_rate_logindex(struct idt77252_dev *card, int pcr)
2086 {
2087         u16 afp;
2088
2089         afp = idt77252_int_to_atmfp(pcr < 0 ? -pcr : pcr);
2090         if (pcr < 0)
2091                 return rate_to_log[(afp >> 5) & 0x1ff];
2092         return rate_to_log[((afp >> 5) + 1) & 0x1ff];
2093 }
2094
2095 static void
2096 idt77252_est_timer(unsigned long data)
2097 {
2098         struct vc_map *vc = (struct vc_map *)data;
2099         struct idt77252_dev *card = vc->card;
2100         struct rate_estimator *est;
2101         unsigned long flags;
2102         u32 rate, cps;
2103         u64 ncells;
2104         u8 lacr;
2105
2106         spin_lock_irqsave(&vc->lock, flags);
2107         est = vc->estimator;
2108         if (!est)
2109                 goto out;
2110
2111         ncells = est->cells;
2112
2113         rate = ((u32)(ncells - est->last_cells)) << (7 - est->interval);
2114         est->last_cells = ncells;
2115         est->avcps += ((long)rate - (long)est->avcps) >> est->ewma_log;
2116         est->cps = (est->avcps + 0x1f) >> 5;
2117
2118         cps = est->cps;
2119         if (cps < (est->maxcps >> 4))
2120                 cps = est->maxcps >> 4;
2121
2122         lacr = idt77252_rate_logindex(card, cps);
2123         if (lacr > vc->max_er)
2124                 lacr = vc->max_er;
2125
2126         if (lacr != vc->lacr) {
2127                 vc->lacr = lacr;
2128                 writel(TCMDQ_LACR|(vc->lacr << 16)|vc->index, SAR_REG_TCMDQ);
2129         }
2130
2131         est->timer.expires = jiffies + ((HZ / 4) << est->interval);
2132         add_timer(&est->timer);
2133
2134 out:
2135         spin_unlock_irqrestore(&vc->lock, flags);
2136 }
2137
2138 static struct rate_estimator *
2139 idt77252_init_est(struct vc_map *vc, int pcr)
2140 {
2141         struct rate_estimator *est;
2142
2143         est = kmalloc(sizeof(struct rate_estimator), GFP_KERNEL);
2144         if (!est)
2145                 return NULL;
2146         memset(est, 0, sizeof(*est));
2147
2148         est->maxcps = pcr < 0 ? -pcr : pcr;
2149         est->cps = est->maxcps;
2150         est->avcps = est->cps << 5;
2151
2152         est->interval = 2;              /* XXX: make this configurable */
2153         est->ewma_log = 2;              /* XXX: make this configurable */
2154         init_timer(&est->timer);
2155         est->timer.data = (unsigned long)vc;
2156         est->timer.function = idt77252_est_timer;
2157
2158         est->timer.expires = jiffies + ((HZ / 4) << est->interval);
2159         add_timer(&est->timer);
2160
2161         return est;
2162 }
2163
2164 static int
2165 idt77252_init_cbr(struct idt77252_dev *card, struct vc_map *vc,
2166                   struct atm_vcc *vcc, struct atm_qos *qos)
2167 {
2168         int tst_free, tst_used, tst_entries;
2169         unsigned long tmpl, modl;
2170         int tcr, tcra;
2171
2172         if ((qos->txtp.max_pcr == 0) &&
2173             (qos->txtp.pcr == 0) && (qos->txtp.min_pcr == 0)) {
2174                 printk("%s: trying to open a CBR VC with cell rate = 0\n",
2175                        card->name);
2176                 return -EINVAL;
2177         }
2178
2179         tst_used = 0;
2180         tst_free = card->tst_free;
2181         if (test_bit(VCF_TX, &vc->flags))
2182                 tst_used = vc->ntste;
2183         tst_free += tst_used;
2184
2185         tcr = atm_pcr_goal(&qos->txtp);
2186         tcra = tcr >= 0 ? tcr : -tcr;
2187
2188         TXPRINTK("%s: CBR target cell rate = %d\n", card->name, tcra);
2189
2190         tmpl = (unsigned long) tcra * ((unsigned long) card->tst_size - 2);
2191         modl = tmpl % (unsigned long)card->utopia_pcr;
2192
2193         tst_entries = (int) (tmpl / card->utopia_pcr);
2194         if (tcr > 0) {
2195                 if (modl > 0)
2196                         tst_entries++;
2197         } else if (tcr == 0) {
2198                 tst_entries = tst_free - SAR_TST_RESERVED;
2199                 if (tst_entries <= 0) {
2200                         printk("%s: no CBR bandwidth free.\n", card->name);
2201                         return -ENOSR;
2202                 }
2203         }
2204
2205         if (tst_entries == 0) {
2206                 printk("%s: selected CBR bandwidth < granularity.\n",
2207                        card->name);
2208                 return -EINVAL;
2209         }
2210
2211         if (tst_entries > (tst_free - SAR_TST_RESERVED)) {
2212                 printk("%s: not enough CBR bandwidth free.\n", card->name);
2213                 return -ENOSR;
2214         }
2215
2216         vc->ntste = tst_entries;
2217
2218         card->tst_free = tst_free - tst_entries;
2219         if (test_bit(VCF_TX, &vc->flags)) {
2220                 if (tst_used == tst_entries)
2221                         return 0;
2222
2223                 OPRINTK("%s: modify %d -> %d entries in TST.\n",
2224                         card->name, tst_used, tst_entries);
2225                 change_tst(card, vc, tst_entries, TSTE_OPC_CBR);
2226                 return 0;
2227         }
2228
2229         OPRINTK("%s: setting %d entries in TST.\n", card->name, tst_entries);
2230         fill_tst(card, vc, tst_entries, TSTE_OPC_CBR);
2231         return 0;
2232 }
2233
2234 static int
2235 idt77252_init_ubr(struct idt77252_dev *card, struct vc_map *vc,
2236                   struct atm_vcc *vcc, struct atm_qos *qos)
2237 {
2238         unsigned long flags;
2239         int tcr;
2240
2241         spin_lock_irqsave(&vc->lock, flags);
2242         if (vc->estimator) {
2243                 del_timer(&vc->estimator->timer);
2244                 kfree(vc->estimator);
2245                 vc->estimator = NULL;
2246         }
2247         spin_unlock_irqrestore(&vc->lock, flags);
2248
2249         tcr = atm_pcr_goal(&qos->txtp);
2250         if (tcr == 0)
2251                 tcr = card->link_pcr;
2252
2253         vc->estimator = idt77252_init_est(vc, tcr);
2254
2255         vc->class = SCHED_UBR;
2256         vc->init_er = idt77252_rate_logindex(card, tcr);
2257         vc->lacr = vc->init_er;
2258         if (tcr < 0)
2259                 vc->max_er = vc->init_er;
2260         else
2261                 vc->max_er = 0xff;
2262
2263         return 0;
2264 }
2265
2266 static int
2267 idt77252_init_tx(struct idt77252_dev *card, struct vc_map *vc,
2268                  struct atm_vcc *vcc, struct atm_qos *qos)
2269 {
2270         int error;
2271
2272         if (test_bit(VCF_TX, &vc->flags))
2273                 return -EBUSY;
2274
2275         switch (qos->txtp.traffic_class) {
2276                 case ATM_CBR:
2277                         vc->class = SCHED_CBR;
2278                         break;
2279
2280                 case ATM_UBR:
2281                         vc->class = SCHED_UBR;
2282                         break;
2283
2284                 case ATM_VBR:
2285                 case ATM_ABR:
2286                 default:
2287                         return -EPROTONOSUPPORT;
2288         }
2289
2290         vc->scq = alloc_scq(card, vc->class);
2291         if (!vc->scq) {
2292                 printk("%s: can't get SCQ.\n", card->name);
2293                 return -ENOMEM;
2294         }
2295
2296         vc->scq->scd = get_free_scd(card, vc);
2297         if (vc->scq->scd == 0) {
2298                 printk("%s: no SCD available.\n", card->name);
2299                 free_scq(card, vc->scq);
2300                 return -ENOMEM;
2301         }
2302
2303         fill_scd(card, vc->scq, vc->class);
2304
2305         if (set_tct(card, vc)) {
2306                 printk("%s: class %d not supported.\n",
2307                        card->name, qos->txtp.traffic_class);
2308
2309                 card->scd2vc[vc->scd_index] = NULL;
2310                 free_scq(card, vc->scq);
2311                 return -EPROTONOSUPPORT;
2312         }
2313
2314         switch (vc->class) {
2315                 case SCHED_CBR:
2316                         error = idt77252_init_cbr(card, vc, vcc, qos);
2317                         if (error) {
2318                                 card->scd2vc[vc->scd_index] = NULL;
2319                                 free_scq(card, vc->scq);
2320                                 return error;
2321                         }
2322
2323                         clear_bit(VCF_IDLE, &vc->flags);
2324                         writel(TCMDQ_START | vc->index, SAR_REG_TCMDQ);
2325                         break;
2326
2327                 case SCHED_UBR:
2328                         error = idt77252_init_ubr(card, vc, vcc, qos);
2329                         if (error) {
2330                                 card->scd2vc[vc->scd_index] = NULL;
2331                                 free_scq(card, vc->scq);
2332                                 return error;
2333                         }
2334
2335                         set_bit(VCF_IDLE, &vc->flags);
2336                         break;
2337         }
2338
2339         vc->tx_vcc = vcc;
2340         set_bit(VCF_TX, &vc->flags);
2341         return 0;
2342 }
2343
2344 static int
2345 idt77252_init_rx(struct idt77252_dev *card, struct vc_map *vc,
2346                  struct atm_vcc *vcc, struct atm_qos *qos)
2347 {
2348         unsigned long flags;
2349         unsigned long addr;
2350         u32 rcte = 0;
2351
2352         if (test_bit(VCF_RX, &vc->flags))
2353                 return -EBUSY;
2354
2355         vc->rx_vcc = vcc;
2356         set_bit(VCF_RX, &vc->flags);
2357
2358         if ((vcc->vci == 3) || (vcc->vci == 4))
2359                 return 0;
2360
2361         flush_rx_pool(card, &vc->rcv.rx_pool);
2362
2363         rcte |= SAR_RCTE_CONNECTOPEN;
2364         rcte |= SAR_RCTE_RAWCELLINTEN;
2365
2366         switch (qos->aal) {
2367                 case ATM_AAL0:
2368                         rcte |= SAR_RCTE_RCQ;
2369                         break;
2370                 case ATM_AAL1:
2371                         rcte |= SAR_RCTE_OAM; /* Let SAR drop Video */
2372                         break;
2373                 case ATM_AAL34:
2374                         rcte |= SAR_RCTE_AAL34;
2375                         break;
2376                 case ATM_AAL5:
2377                         rcte |= SAR_RCTE_AAL5;
2378                         break;
2379                 default:
2380                         rcte |= SAR_RCTE_RCQ;
2381                         break;
2382         }
2383
2384         if (qos->aal != ATM_AAL5)
2385                 rcte |= SAR_RCTE_FBP_1;
2386         else if (qos->rxtp.max_sdu > SAR_FB_SIZE_2)
2387                 rcte |= SAR_RCTE_FBP_3;
2388         else if (qos->rxtp.max_sdu > SAR_FB_SIZE_1)
2389                 rcte |= SAR_RCTE_FBP_2;
2390         else if (qos->rxtp.max_sdu > SAR_FB_SIZE_0)
2391                 rcte |= SAR_RCTE_FBP_1;
2392         else
2393                 rcte |= SAR_RCTE_FBP_01;
2394
2395         addr = card->rct_base + (vc->index << 2);
2396
2397         OPRINTK("%s: writing RCT at 0x%lx\n", card->name, addr);
2398         write_sram(card, addr, rcte);
2399
2400         spin_lock_irqsave(&card->cmd_lock, flags);
2401         writel(SAR_CMD_OPEN_CONNECTION | (addr << 2), SAR_REG_CMD);
2402         waitfor_idle(card);
2403         spin_unlock_irqrestore(&card->cmd_lock, flags);
2404
2405         return 0;
2406 }
2407
2408 static int
2409 idt77252_open(struct atm_vcc *vcc)
2410 {
2411         struct atm_dev *dev = vcc->dev;
2412         struct idt77252_dev *card = dev->dev_data;
2413         struct vc_map *vc;
2414         unsigned int index;
2415         unsigned int inuse;
2416         int error;
2417         int vci = vcc->vci;
2418         short vpi = vcc->vpi;
2419
2420         if (vpi == ATM_VPI_UNSPEC || vci == ATM_VCI_UNSPEC)
2421                 return 0;
2422
2423         if (vpi >= (1 << card->vpibits)) {
2424                 printk("%s: unsupported VPI: %d\n", card->name, vpi);
2425                 return -EINVAL;
2426         }
2427
2428         if (vci >= (1 << card->vcibits)) {
2429                 printk("%s: unsupported VCI: %d\n", card->name, vci);
2430                 return -EINVAL;
2431         }
2432
2433         set_bit(ATM_VF_ADDR, &vcc->flags);
2434
2435         down(&card->mutex);
2436
2437         OPRINTK("%s: opening vpi.vci: %d.%d\n", card->name, vpi, vci);
2438
2439         switch (vcc->qos.aal) {
2440         case ATM_AAL0:
2441         case ATM_AAL1:
2442         case ATM_AAL5:
2443                 break;
2444         default:
2445                 printk("%s: Unsupported AAL: %d\n", card->name, vcc->qos.aal);
2446                 up(&card->mutex);
2447                 return -EPROTONOSUPPORT;
2448         }
2449
2450         index = VPCI2VC(card, vpi, vci);
2451         if (!card->vcs[index]) {
2452                 card->vcs[index] = kmalloc(sizeof(struct vc_map), GFP_KERNEL);
2453                 if (!card->vcs[index]) {
2454                         printk("%s: can't alloc vc in open()\n", card->name);
2455                         up(&card->mutex);
2456                         return -ENOMEM;
2457                 }
2458                 memset(card->vcs[index], 0, sizeof(struct vc_map));
2459
2460                 card->vcs[index]->card = card;
2461                 card->vcs[index]->index = index;
2462
2463                 spin_lock_init(&card->vcs[index]->lock);
2464         }
2465         vc = card->vcs[index];
2466
2467         vcc->dev_data = vc;
2468
2469         IPRINTK("%s: idt77252_open: vc = %d (%d.%d) %s/%s (max RX SDU: %u)\n",
2470                 card->name, vc->index, vcc->vpi, vcc->vci,
2471                 vcc->qos.rxtp.traffic_class != ATM_NONE ? "rx" : "--",
2472                 vcc->qos.txtp.traffic_class != ATM_NONE ? "tx" : "--",
2473                 vcc->qos.rxtp.max_sdu);
2474
2475         inuse = 0;
2476         if (vcc->qos.txtp.traffic_class != ATM_NONE &&
2477             test_bit(VCF_TX, &vc->flags))
2478                 inuse = 1;
2479         if (vcc->qos.rxtp.traffic_class != ATM_NONE &&
2480             test_bit(VCF_RX, &vc->flags))
2481                 inuse += 2;
2482
2483         if (inuse) {
2484                 printk("%s: %s vci already in use.\n", card->name,
2485                        inuse == 1 ? "tx" : inuse == 2 ? "rx" : "tx and rx");
2486                 up(&card->mutex);
2487                 return -EADDRINUSE;
2488         }
2489
2490         if (vcc->qos.txtp.traffic_class != ATM_NONE) {
2491                 error = idt77252_init_tx(card, vc, vcc, &vcc->qos);
2492                 if (error) {
2493                         up(&card->mutex);
2494                         return error;
2495                 }
2496         }
2497
2498         if (vcc->qos.rxtp.traffic_class != ATM_NONE) {
2499                 error = idt77252_init_rx(card, vc, vcc, &vcc->qos);
2500                 if (error) {
2501                         up(&card->mutex);
2502                         return error;
2503                 }
2504         }
2505
2506         set_bit(ATM_VF_READY, &vcc->flags);
2507
2508         up(&card->mutex);
2509         return 0;
2510 }
2511
2512 static void
2513 idt77252_close(struct atm_vcc *vcc)
2514 {
2515         struct atm_dev *dev = vcc->dev;
2516         struct idt77252_dev *card = dev->dev_data;
2517         struct vc_map *vc = vcc->dev_data;
2518         unsigned long flags;
2519         unsigned long addr;
2520         unsigned long timeout;
2521
2522         down(&card->mutex);
2523
2524         IPRINTK("%s: idt77252_close: vc = %d (%d.%d)\n",
2525                 card->name, vc->index, vcc->vpi, vcc->vci);
2526
2527         clear_bit(ATM_VF_READY, &vcc->flags);
2528
2529         if (vcc->qos.rxtp.traffic_class != ATM_NONE) {
2530
2531                 spin_lock_irqsave(&vc->lock, flags);
2532                 clear_bit(VCF_RX, &vc->flags);
2533                 vc->rx_vcc = NULL;
2534                 spin_unlock_irqrestore(&vc->lock, flags);
2535
2536                 if ((vcc->vci == 3) || (vcc->vci == 4))
2537                         goto done;
2538
2539                 addr = card->rct_base + vc->index * SAR_SRAM_RCT_SIZE;
2540
2541                 spin_lock_irqsave(&card->cmd_lock, flags);
2542                 writel(SAR_CMD_CLOSE_CONNECTION | (addr << 2), SAR_REG_CMD);
2543                 waitfor_idle(card);
2544                 spin_unlock_irqrestore(&card->cmd_lock, flags);
2545
2546                 if (vc->rcv.rx_pool.count) {
2547                         DPRINTK("%s: closing a VC with pending rx buffers.\n",
2548                                 card->name);
2549
2550                         recycle_rx_pool_skb(card, &vc->rcv.rx_pool);
2551                 }
2552         }
2553
2554 done:
2555         if (vcc->qos.txtp.traffic_class != ATM_NONE) {
2556
2557                 spin_lock_irqsave(&vc->lock, flags);
2558                 clear_bit(VCF_TX, &vc->flags);
2559                 clear_bit(VCF_IDLE, &vc->flags);
2560                 clear_bit(VCF_RSV, &vc->flags);
2561                 vc->tx_vcc = NULL;
2562
2563                 if (vc->estimator) {
2564                         del_timer(&vc->estimator->timer);
2565                         kfree(vc->estimator);
2566                         vc->estimator = NULL;
2567                 }
2568                 spin_unlock_irqrestore(&vc->lock, flags);
2569
2570                 timeout = 5 * 1000;
2571                 while (atomic_read(&vc->scq->used) > 0) {
2572                         timeout = msleep_interruptible(timeout);
2573                         if (!timeout)
2574                                 break;
2575                 }
2576                 if (!timeout)
2577                         printk("%s: SCQ drain timeout: %u used\n",
2578                                card->name, atomic_read(&vc->scq->used));
2579
2580                 writel(TCMDQ_HALT | vc->index, SAR_REG_TCMDQ);
2581                 clear_scd(card, vc->scq, vc->class);
2582
2583                 if (vc->class == SCHED_CBR) {
2584                         clear_tst(card, vc);
2585                         card->tst_free += vc->ntste;
2586                         vc->ntste = 0;
2587                 }
2588
2589                 card->scd2vc[vc->scd_index] = NULL;
2590                 free_scq(card, vc->scq);
2591         }
2592
2593         up(&card->mutex);
2594 }
2595
2596 static int
2597 idt77252_change_qos(struct atm_vcc *vcc, struct atm_qos *qos, int flags)
2598 {
2599         struct atm_dev *dev = vcc->dev;
2600         struct idt77252_dev *card = dev->dev_data;
2601         struct vc_map *vc = vcc->dev_data;
2602         int error = 0;
2603
2604         down(&card->mutex);
2605
2606         if (qos->txtp.traffic_class != ATM_NONE) {
2607                 if (!test_bit(VCF_TX, &vc->flags)) {
2608                         error = idt77252_init_tx(card, vc, vcc, qos);
2609                         if (error)
2610                                 goto out;
2611                 } else {
2612                         switch (qos->txtp.traffic_class) {
2613                         case ATM_CBR:
2614                                 error = idt77252_init_cbr(card, vc, vcc, qos);
2615                                 if (error)
2616                                         goto out;
2617                                 break;
2618
2619                         case ATM_UBR:
2620                                 error = idt77252_init_ubr(card, vc, vcc, qos);
2621                                 if (error)
2622                                         goto out;
2623
2624                                 if (!test_bit(VCF_IDLE, &vc->flags)) {
2625                                         writel(TCMDQ_LACR | (vc->lacr << 16) |
2626                                                vc->index, SAR_REG_TCMDQ);
2627                                 }
2628                                 break;
2629
2630                         case ATM_VBR:
2631                         case ATM_ABR:
2632                                 error = -EOPNOTSUPP;
2633                                 goto out;
2634                         }
2635                 }
2636         }
2637
2638         if ((qos->rxtp.traffic_class != ATM_NONE) &&
2639             !test_bit(VCF_RX, &vc->flags)) {
2640                 error = idt77252_init_rx(card, vc, vcc, qos);
2641                 if (error)
2642                         goto out;
2643         }
2644
2645         memcpy(&vcc->qos, qos, sizeof(struct atm_qos));
2646
2647         set_bit(ATM_VF_HASQOS, &vcc->flags);
2648
2649 out:
2650         up(&card->mutex);
2651         return error;
2652 }
2653
2654 static int
2655 idt77252_proc_read(struct atm_dev *dev, loff_t * pos, char *page)
2656 {
2657         struct idt77252_dev *card = dev->dev_data;
2658         int i, left;
2659
2660         left = (int) *pos;
2661         if (!left--)
2662                 return sprintf(page, "IDT77252 Interrupts:\n");
2663         if (!left--)
2664                 return sprintf(page, "TSIF:  %lu\n", card->irqstat[15]);
2665         if (!left--)
2666                 return sprintf(page, "TXICP: %lu\n", card->irqstat[14]);
2667         if (!left--)
2668                 return sprintf(page, "TSQF:  %lu\n", card->irqstat[12]);
2669         if (!left--)
2670                 return sprintf(page, "TMROF: %lu\n", card->irqstat[11]);
2671         if (!left--)
2672                 return sprintf(page, "PHYI:  %lu\n", card->irqstat[10]);
2673         if (!left--)
2674                 return sprintf(page, "FBQ3A: %lu\n", card->irqstat[8]);
2675         if (!left--)
2676                 return sprintf(page, "FBQ2A: %lu\n", card->irqstat[7]);
2677         if (!left--)
2678                 return sprintf(page, "RSQF:  %lu\n", card->irqstat[6]);
2679         if (!left--)
2680                 return sprintf(page, "EPDU:  %lu\n", card->irqstat[5]);
2681         if (!left--)
2682                 return sprintf(page, "RAWCF: %lu\n", card->irqstat[4]);
2683         if (!left--)
2684                 return sprintf(page, "FBQ1A: %lu\n", card->irqstat[3]);
2685         if (!left--)
2686                 return sprintf(page, "FBQ0A: %lu\n", card->irqstat[2]);
2687         if (!left--)
2688                 return sprintf(page, "RSQAF: %lu\n", card->irqstat[1]);
2689         if (!left--)
2690                 return sprintf(page, "IDT77252 Transmit Connection Table:\n");
2691
2692         for (i = 0; i < card->tct_size; i++) {
2693                 unsigned long tct;
2694                 struct atm_vcc *vcc;
2695                 struct vc_map *vc;
2696                 char *p;
2697
2698                 vc = card->vcs[i];
2699                 if (!vc)
2700                         continue;
2701
2702                 vcc = NULL;
2703                 if (vc->tx_vcc)
2704                         vcc = vc->tx_vcc;
2705                 if (!vcc)
2706                         continue;
2707                 if (left--)
2708                         continue;
2709
2710                 p = page;
2711                 p += sprintf(p, "  %4u: %u.%u: ", i, vcc->vpi, vcc->vci);
2712                 tct = (unsigned long) (card->tct_base + i * SAR_SRAM_TCT_SIZE);
2713
2714                 for (i = 0; i < 8; i++)
2715                         p += sprintf(p, " %08x", read_sram(card, tct + i));
2716                 p += sprintf(p, "\n");
2717                 return p - page;
2718         }
2719         return 0;
2720 }
2721
2722 /*****************************************************************************/
2723 /*                                                                           */
2724 /* Interrupt handler                                                         */
2725 /*                                                                           */
2726 /*****************************************************************************/
2727
2728 static void
2729 idt77252_collect_stat(struct idt77252_dev *card)
2730 {
2731         u32 cdc, vpec, icc;
2732
2733         cdc = readl(SAR_REG_CDC);
2734         vpec = readl(SAR_REG_VPEC);
2735         icc = readl(SAR_REG_ICC);
2736
2737 #ifdef  NOTDEF
2738         printk("%s:", card->name);
2739
2740         if (cdc & 0x7f0000) {
2741                 char *s = "";
2742
2743                 printk(" [");
2744                 if (cdc & (1 << 22)) {
2745                         printk("%sRM ID", s);
2746                         s = " | ";
2747                 }
2748                 if (cdc & (1 << 21)) {
2749                         printk("%sCON TAB", s);
2750                         s = " | ";
2751                 }
2752                 if (cdc & (1 << 20)) {
2753                         printk("%sNO FB", s);
2754                         s = " | ";
2755                 }
2756                 if (cdc & (1 << 19)) {
2757                         printk("%sOAM CRC", s);
2758                         s = " | ";
2759                 }
2760                 if (cdc & (1 << 18)) {
2761                         printk("%sRM CRC", s);
2762                         s = " | ";
2763                 }
2764                 if (cdc & (1 << 17)) {
2765                         printk("%sRM FIFO", s);
2766                         s = " | ";
2767                 }
2768                 if (cdc & (1 << 16)) {
2769                         printk("%sRX FIFO", s);
2770                         s = " | ";
2771                 }
2772                 printk("]");
2773         }
2774
2775         printk(" CDC %04x, VPEC %04x, ICC: %04x\n",
2776                cdc & 0xffff, vpec & 0xffff, icc & 0xffff);
2777 #endif
2778 }
2779
2780 static irqreturn_t
2781 idt77252_interrupt(int irq, void *dev_id, struct pt_regs *ptregs)
2782 {
2783         struct idt77252_dev *card = dev_id;
2784         u32 stat;
2785
2786         stat = readl(SAR_REG_STAT) & 0xffff;
2787         if (!stat)      /* no interrupt for us */
2788                 return IRQ_NONE;
2789
2790         if (test_and_set_bit(IDT77252_BIT_INTERRUPT, &card->flags)) {
2791                 printk("%s: Re-entering irq_handler()\n", card->name);
2792                 goto out;
2793         }
2794
2795         writel(stat, SAR_REG_STAT);     /* reset interrupt */
2796
2797         if (stat & SAR_STAT_TSIF) {     /* entry written to TSQ  */
2798                 INTPRINTK("%s: TSIF\n", card->name);
2799                 card->irqstat[15]++;
2800                 idt77252_tx(card);
2801         }
2802         if (stat & SAR_STAT_TXICP) {    /* Incomplete CS-PDU has  */
2803                 INTPRINTK("%s: TXICP\n", card->name);
2804                 card->irqstat[14]++;
2805 #ifdef CONFIG_ATM_IDT77252_DEBUG
2806                 idt77252_tx_dump(card);
2807 #endif
2808         }
2809         if (stat & SAR_STAT_TSQF) {     /* TSQ 7/8 full           */
2810                 INTPRINTK("%s: TSQF\n", card->name);
2811                 card->irqstat[12]++;
2812                 idt77252_tx(card);
2813         }
2814         if (stat & SAR_STAT_TMROF) {    /* Timer overflow         */
2815                 INTPRINTK("%s: TMROF\n", card->name);
2816                 card->irqstat[11]++;
2817                 idt77252_collect_stat(card);
2818         }
2819
2820         if (stat & SAR_STAT_EPDU) {     /* Got complete CS-PDU    */
2821                 INTPRINTK("%s: EPDU\n", card->name);
2822                 card->irqstat[5]++;
2823                 idt77252_rx(card);
2824         }
2825         if (stat & SAR_STAT_RSQAF) {    /* RSQ is 7/8 full        */
2826                 INTPRINTK("%s: RSQAF\n", card->name);
2827                 card->irqstat[1]++;
2828                 idt77252_rx(card);
2829         }
2830         if (stat & SAR_STAT_RSQF) {     /* RSQ is full            */
2831                 INTPRINTK("%s: RSQF\n", card->name);
2832                 card->irqstat[6]++;
2833                 idt77252_rx(card);
2834         }
2835         if (stat & SAR_STAT_RAWCF) {    /* Raw cell received      */
2836                 INTPRINTK("%s: RAWCF\n", card->name);
2837                 card->irqstat[4]++;
2838                 idt77252_rx_raw(card);
2839         }
2840
2841         if (stat & SAR_STAT_PHYI) {     /* PHY device interrupt   */
2842                 INTPRINTK("%s: PHYI", card->name);
2843                 card->irqstat[10]++;
2844                 if (card->atmdev->phy && card->atmdev->phy->interrupt)
2845                         card->atmdev->phy->interrupt(card->atmdev);
2846         }
2847
2848         if (stat & (SAR_STAT_FBQ0A | SAR_STAT_FBQ1A |
2849                     SAR_STAT_FBQ2A | SAR_STAT_FBQ3A)) {
2850
2851                 writel(readl(SAR_REG_CFG) & ~(SAR_CFG_FBIE), SAR_REG_CFG);
2852
2853                 INTPRINTK("%s: FBQA: %04x\n", card->name, stat);
2854
2855                 if (stat & SAR_STAT_FBQ0A)
2856                         card->irqstat[2]++;
2857                 if (stat & SAR_STAT_FBQ1A)
2858                         card->irqstat[3]++;
2859                 if (stat & SAR_STAT_FBQ2A)
2860                         card->irqstat[7]++;
2861                 if (stat & SAR_STAT_FBQ3A)
2862                         card->irqstat[8]++;
2863
2864                 schedule_work(&card->tqueue);
2865         }
2866
2867 out:
2868         clear_bit(IDT77252_BIT_INTERRUPT, &card->flags);
2869         return IRQ_HANDLED;
2870 }
2871
2872 static void
2873 idt77252_softint(void *dev_id)
2874 {
2875         struct idt77252_dev *card = dev_id;
2876         u32 stat;
2877         int done;
2878
2879         for (done = 1; ; done = 1) {
2880                 stat = readl(SAR_REG_STAT) >> 16;
2881
2882                 if ((stat & 0x0f) < SAR_FBQ0_HIGH) {
2883                         add_rx_skb(card, 0, SAR_FB_SIZE_0, 32);
2884                         done = 0;
2885                 }
2886
2887                 stat >>= 4;
2888                 if ((stat & 0x0f) < SAR_FBQ1_HIGH) {
2889                         add_rx_skb(card, 1, SAR_FB_SIZE_1, 32);
2890                         done = 0;
2891                 }
2892
2893                 stat >>= 4;
2894                 if ((stat & 0x0f) < SAR_FBQ2_HIGH) {
2895                         add_rx_skb(card, 2, SAR_FB_SIZE_2, 32);
2896                         done = 0;
2897                 }
2898
2899                 stat >>= 4;
2900                 if ((stat & 0x0f) < SAR_FBQ3_HIGH) {
2901                         add_rx_skb(card, 3, SAR_FB_SIZE_3, 32);
2902                         done = 0;
2903                 }
2904
2905                 if (done)
2906                         break;
2907         }
2908
2909         writel(readl(SAR_REG_CFG) | SAR_CFG_FBIE, SAR_REG_CFG);
2910 }
2911
2912
2913 static int
2914 open_card_oam(struct idt77252_dev *card)
2915 {
2916         unsigned long flags;
2917         unsigned long addr;
2918         struct vc_map *vc;
2919         int vpi, vci;
2920         int index;
2921         u32 rcte;
2922
2923         for (vpi = 0; vpi < (1 << card->vpibits); vpi++) {
2924                 for (vci = 3; vci < 5; vci++) {
2925                         index = VPCI2VC(card, vpi, vci);
2926
2927                         vc = kmalloc(sizeof(struct vc_map), GFP_KERNEL);
2928                         if (!vc) {
2929                                 printk("%s: can't alloc vc\n", card->name);
2930                                 return -ENOMEM;
2931                         }
2932                         memset(vc, 0, sizeof(struct vc_map));
2933
2934                         vc->index = index;
2935                         card->vcs[index] = vc;
2936
2937                         flush_rx_pool(card, &vc->rcv.rx_pool);
2938
2939                         rcte = SAR_RCTE_CONNECTOPEN |
2940                                SAR_RCTE_RAWCELLINTEN |
2941                                SAR_RCTE_RCQ |
2942                                SAR_RCTE_FBP_1;
2943
2944                         addr = card->rct_base + (vc->index << 2);
2945                         write_sram(card, addr, rcte);
2946
2947                         spin_lock_irqsave(&card->cmd_lock, flags);
2948                         writel(SAR_CMD_OPEN_CONNECTION | (addr << 2),
2949                                SAR_REG_CMD);
2950                         waitfor_idle(card);
2951                         spin_unlock_irqrestore(&card->cmd_lock, flags);
2952                 }
2953         }
2954
2955         return 0;
2956 }
2957
2958 static void
2959 close_card_oam(struct idt77252_dev *card)
2960 {
2961         unsigned long flags;
2962         unsigned long addr;
2963         struct vc_map *vc;
2964         int vpi, vci;
2965         int index;
2966
2967         for (vpi = 0; vpi < (1 << card->vpibits); vpi++) {
2968                 for (vci = 3; vci < 5; vci++) {
2969                         index = VPCI2VC(card, vpi, vci);
2970                         vc = card->vcs[index];
2971
2972                         addr = card->rct_base + vc->index * SAR_SRAM_RCT_SIZE;
2973
2974                         spin_lock_irqsave(&card->cmd_lock, flags);
2975                         writel(SAR_CMD_CLOSE_CONNECTION | (addr << 2),
2976                                SAR_REG_CMD);
2977                         waitfor_idle(card);
2978                         spin_unlock_irqrestore(&card->cmd_lock, flags);
2979
2980                         if (vc->rcv.rx_pool.count) {
2981                                 DPRINTK("%s: closing a VC "
2982                                         "with pending rx buffers.\n",
2983                                         card->name);
2984
2985                                 recycle_rx_pool_skb(card, &vc->rcv.rx_pool);
2986                         }
2987                 }
2988         }
2989 }
2990
2991 static int
2992 open_card_ubr0(struct idt77252_dev *card)
2993 {
2994         struct vc_map *vc;
2995
2996         vc = kmalloc(sizeof(struct vc_map), GFP_KERNEL);
2997         if (!vc) {
2998                 printk("%s: can't alloc vc\n", card->name);
2999                 return -ENOMEM;
3000         }
3001         memset(vc, 0, sizeof(struct vc_map));
3002         card->vcs[0] = vc;
3003         vc->class = SCHED_UBR0;
3004
3005         vc->scq = alloc_scq(card, vc->class);
3006         if (!vc->scq) {
3007                 printk("%s: can't get SCQ.\n", card->name);
3008                 return -ENOMEM;
3009         }
3010
3011         card->scd2vc[0] = vc;
3012         vc->scd_index = 0;
3013         vc->scq->scd = card->scd_base;
3014
3015         fill_scd(card, vc->scq, vc->class);
3016
3017         write_sram(card, card->tct_base + 0, TCT_UBR | card->scd_base);
3018         write_sram(card, card->tct_base + 1, 0);
3019         write_sram(card, card->tct_base + 2, 0);
3020         write_sram(card, card->tct_base + 3, 0);
3021         write_sram(card, card->tct_base + 4, 0);
3022         write_sram(card, card->tct_base + 5, 0);
3023         write_sram(card, card->tct_base + 6, 0);
3024         write_sram(card, card->tct_base + 7, TCT_FLAG_UBR);
3025
3026         clear_bit(VCF_IDLE, &vc->flags);
3027         writel(TCMDQ_START | 0, SAR_REG_TCMDQ);
3028         return 0;
3029 }
3030
3031 static int
3032 idt77252_dev_open(struct idt77252_dev *card)
3033 {
3034         u32 conf;
3035
3036         if (!test_bit(IDT77252_BIT_INIT, &card->flags)) {
3037                 printk("%s: SAR not yet initialized.\n", card->name);
3038                 return -1;
3039         }
3040
3041         conf = SAR_CFG_RXPTH|   /* enable receive path                  */
3042             SAR_RX_DELAY |      /* interrupt on complete PDU            */
3043             SAR_CFG_RAWIE |     /* interrupt enable on raw cells        */
3044             SAR_CFG_RQFIE |     /* interrupt on RSQ almost full         */
3045             SAR_CFG_TMOIE |     /* interrupt on timer overflow          */
3046             SAR_CFG_FBIE |      /* interrupt on low free buffers        */
3047             SAR_CFG_TXEN |      /* transmit operation enable            */
3048             SAR_CFG_TXINT |     /* interrupt on transmit status         */
3049             SAR_CFG_TXUIE |     /* interrupt on transmit underrun       */
3050             SAR_CFG_TXSFI |     /* interrupt on TSQ almost full         */
3051             SAR_CFG_PHYIE       /* enable PHY interrupts                */
3052             ;
3053
3054 #ifdef CONFIG_ATM_IDT77252_RCV_ALL
3055         /* Test RAW cell receive. */
3056         conf |= SAR_CFG_VPECA;
3057 #endif
3058
3059         writel(readl(SAR_REG_CFG) | conf, SAR_REG_CFG);
3060
3061         if (open_card_oam(card)) {
3062                 printk("%s: Error initializing OAM.\n", card->name);
3063                 return -1;
3064         }
3065
3066         if (open_card_ubr0(card)) {
3067                 printk("%s: Error initializing UBR0.\n", card->name);
3068                 return -1;
3069         }
3070
3071         IPRINTK("%s: opened IDT77252 ABR SAR.\n", card->name);
3072         return 0;
3073 }
3074
3075 void
3076 idt77252_dev_close(struct atm_dev *dev)
3077 {
3078         struct idt77252_dev *card = dev->dev_data;
3079         u32 conf;
3080
3081         close_card_oam(card);
3082
3083         conf = SAR_CFG_RXPTH |  /* enable receive path           */
3084             SAR_RX_DELAY |      /* interrupt on complete PDU     */
3085             SAR_CFG_RAWIE |     /* interrupt enable on raw cells */
3086             SAR_CFG_RQFIE |     /* interrupt on RSQ almost full  */
3087             SAR_CFG_TMOIE |     /* interrupt on timer overflow   */
3088             SAR_CFG_FBIE |      /* interrupt on low free buffers */
3089             SAR_CFG_TXEN |      /* transmit operation enable     */
3090             SAR_CFG_TXINT |     /* interrupt on transmit status  */
3091             SAR_CFG_TXUIE |     /* interrupt on xmit underrun    */
3092             SAR_CFG_TXSFI       /* interrupt on TSQ almost full  */
3093             ;
3094
3095         writel(readl(SAR_REG_CFG) & ~(conf), SAR_REG_CFG);
3096
3097         DIPRINTK("%s: closed IDT77252 ABR SAR.\n", card->name);
3098 }
3099
3100
3101 /*****************************************************************************/
3102 /*                                                                           */
3103 /* Initialisation and Deinitialization of IDT77252                           */
3104 /*                                                                           */
3105 /*****************************************************************************/
3106
3107
3108 static void
3109 deinit_card(struct idt77252_dev *card)
3110 {
3111         struct sk_buff *skb;
3112         int i, j;
3113
3114         if (!test_bit(IDT77252_BIT_INIT, &card->flags)) {
3115                 printk("%s: SAR not yet initialized.\n", card->name);
3116                 return;
3117         }
3118         DIPRINTK("idt77252: deinitialize card %u\n", card->index);
3119
3120         writel(0, SAR_REG_CFG);
3121
3122         if (card->atmdev)
3123                 atm_dev_deregister(card->atmdev);
3124
3125         for (i = 0; i < 4; i++) {
3126                 for (j = 0; j < FBQ_SIZE; j++) {
3127                         skb = card->sbpool[i].skb[j];
3128                         if (skb) {
3129                                 pci_unmap_single(card->pcidev,
3130                                                  IDT77252_PRV_PADDR(skb),
3131                                                  skb->end - skb->data,
3132                                                  PCI_DMA_FROMDEVICE);
3133                                 card->sbpool[i].skb[j] = NULL;
3134                                 dev_kfree_skb(skb);
3135                         }
3136                 }
3137         }
3138
3139         vfree(card->soft_tst);
3140
3141         vfree(card->scd2vc);
3142
3143         vfree(card->vcs);
3144
3145         if (card->raw_cell_hnd) {
3146                 pci_free_consistent(card->pcidev, 2 * sizeof(u32),
3147                                     card->raw_cell_hnd, card->raw_cell_paddr);
3148         }
3149
3150         if (card->rsq.base) {
3151                 DIPRINTK("%s: Release RSQ ...\n", card->name);
3152                 deinit_rsq(card);
3153         }
3154
3155         if (card->tsq.base) {
3156                 DIPRINTK("%s: Release TSQ ...\n", card->name);
3157                 deinit_tsq(card);
3158         }
3159
3160         DIPRINTK("idt77252: Release IRQ.\n");
3161         free_irq(card->pcidev->irq, card);
3162
3163         for (i = 0; i < 4; i++) {
3164                 if (card->fbq[i])
3165                         iounmap(card->fbq[i]);
3166         }
3167
3168         if (card->membase)
3169                 iounmap(card->membase);
3170
3171         clear_bit(IDT77252_BIT_INIT, &card->flags);
3172         DIPRINTK("%s: Card deinitialized.\n", card->name);
3173 }
3174
3175
3176 static int __devinit
3177 init_sram(struct idt77252_dev *card)
3178 {
3179         int i;
3180
3181         for (i = 0; i < card->sramsize; i += 4)
3182                 write_sram(card, (i >> 2), 0);
3183
3184         /* set SRAM layout for THIS card */
3185         if (card->sramsize == (512 * 1024)) {
3186                 card->tct_base = SAR_SRAM_TCT_128_BASE;
3187                 card->tct_size = (SAR_SRAM_TCT_128_TOP - card->tct_base + 1)
3188                     / SAR_SRAM_TCT_SIZE;
3189                 card->rct_base = SAR_SRAM_RCT_128_BASE;
3190                 card->rct_size = (SAR_SRAM_RCT_128_TOP - card->rct_base + 1)
3191                     / SAR_SRAM_RCT_SIZE;
3192                 card->rt_base = SAR_SRAM_RT_128_BASE;
3193                 card->scd_base = SAR_SRAM_SCD_128_BASE;
3194                 card->scd_size = (SAR_SRAM_SCD_128_TOP - card->scd_base + 1)
3195                     / SAR_SRAM_SCD_SIZE;
3196                 card->tst[0] = SAR_SRAM_TST1_128_BASE;
3197                 card->tst[1] = SAR_SRAM_TST2_128_BASE;
3198                 card->tst_size = SAR_SRAM_TST1_128_TOP - card->tst[0] + 1;
3199                 card->abrst_base = SAR_SRAM_ABRSTD_128_BASE;
3200                 card->abrst_size = SAR_ABRSTD_SIZE_8K;
3201                 card->fifo_base = SAR_SRAM_FIFO_128_BASE;
3202                 card->fifo_size = SAR_RXFD_SIZE_32K;
3203         } else {
3204                 card->tct_base = SAR_SRAM_TCT_32_BASE;
3205                 card->tct_size = (SAR_SRAM_TCT_32_TOP - card->tct_base + 1)
3206                     / SAR_SRAM_TCT_SIZE;
3207                 card->rct_base = SAR_SRAM_RCT_32_BASE;
3208                 card->rct_size = (SAR_SRAM_RCT_32_TOP - card->rct_base + 1)
3209                     / SAR_SRAM_RCT_SIZE;
3210                 card->rt_base = SAR_SRAM_RT_32_BASE;
3211                 card->scd_base = SAR_SRAM_SCD_32_BASE;
3212                 card->scd_size = (SAR_SRAM_SCD_32_TOP - card->scd_base + 1)
3213                     / SAR_SRAM_SCD_SIZE;
3214                 card->tst[0] = SAR_SRAM_TST1_32_BASE;
3215                 card->tst[1] = SAR_SRAM_TST2_32_BASE;
3216                 card->tst_size = (SAR_SRAM_TST1_32_TOP - card->tst[0] + 1);
3217                 card->abrst_base = SAR_SRAM_ABRSTD_32_BASE;
3218                 card->abrst_size = SAR_ABRSTD_SIZE_1K;
3219                 card->fifo_base = SAR_SRAM_FIFO_32_BASE;
3220                 card->fifo_size = SAR_RXFD_SIZE_4K;
3221         }
3222
3223         /* Initialize TCT */
3224         for (i = 0; i < card->tct_size; i++) {
3225                 write_sram(card, i * SAR_SRAM_TCT_SIZE + 0, 0);
3226                 write_sram(card, i * SAR_SRAM_TCT_SIZE + 1, 0);
3227                 write_sram(card, i * SAR_SRAM_TCT_SIZE + 2, 0);
3228                 write_sram(card, i * SAR_SRAM_TCT_SIZE + 3, 0);
3229                 write_sram(card, i * SAR_SRAM_TCT_SIZE + 4, 0);
3230                 write_sram(card, i * SAR_SRAM_TCT_SIZE + 5, 0);
3231                 write_sram(card, i * SAR_SRAM_TCT_SIZE + 6, 0);
3232                 write_sram(card, i * SAR_SRAM_TCT_SIZE + 7, 0);
3233         }
3234
3235         /* Initialize RCT */
3236         for (i = 0; i < card->rct_size; i++) {
3237                 write_sram(card, card->rct_base + i * SAR_SRAM_RCT_SIZE,
3238                                     (u32) SAR_RCTE_RAWCELLINTEN);
3239                 write_sram(card, card->rct_base + i * SAR_SRAM_RCT_SIZE + 1,
3240                                     (u32) 0);
3241                 write_sram(card, card->rct_base + i * SAR_SRAM_RCT_SIZE + 2,
3242                                     (u32) 0);
3243                 write_sram(card, card->rct_base + i * SAR_SRAM_RCT_SIZE + 3,
3244                                     (u32) 0xffffffff);
3245         }
3246
3247         writel((SAR_FBQ0_LOW << 28) | 0x00000000 | 0x00000000 |
3248                (SAR_FB_SIZE_0 / 48), SAR_REG_FBQS0);
3249         writel((SAR_FBQ1_LOW << 28) | 0x00000000 | 0x00000000 |
3250                (SAR_FB_SIZE_1 / 48), SAR_REG_FBQS1);
3251         writel((SAR_FBQ2_LOW << 28) | 0x00000000 | 0x00000000 |
3252                (SAR_FB_SIZE_2 / 48), SAR_REG_FBQS2);
3253         writel((SAR_FBQ3_LOW << 28) | 0x00000000 | 0x00000000 |
3254                (SAR_FB_SIZE_3 / 48), SAR_REG_FBQS3);
3255
3256         /* Initialize rate table  */
3257         for (i = 0; i < 256; i++) {
3258                 write_sram(card, card->rt_base + i, log_to_rate[i]);
3259         }
3260
3261         for (i = 0; i < 128; i++) {
3262                 unsigned int tmp;
3263
3264                 tmp  = rate_to_log[(i << 2) + 0] << 0;
3265                 tmp |= rate_to_log[(i << 2) + 1] << 8;
3266                 tmp |= rate_to_log[(i << 2) + 2] << 16;
3267                 tmp |= rate_to_log[(i << 2) + 3] << 24;
3268                 write_sram(card, card->rt_base + 256 + i, tmp);
3269         }
3270
3271 #if 0 /* Fill RDF and AIR tables. */
3272         for (i = 0; i < 128; i++) {
3273                 unsigned int tmp;
3274
3275                 tmp = RDF[0][(i << 1) + 0] << 16;
3276                 tmp |= RDF[0][(i << 1) + 1] << 0;
3277                 write_sram(card, card->rt_base + 512 + i, tmp);
3278         }
3279
3280         for (i = 0; i < 128; i++) {
3281                 unsigned int tmp;
3282
3283                 tmp = AIR[0][(i << 1) + 0] << 16;
3284                 tmp |= AIR[0][(i << 1) + 1] << 0;
3285                 write_sram(card, card->rt_base + 640 + i, tmp);
3286         }
3287 #endif
3288
3289         IPRINTK("%s: initialize rate table ...\n", card->name);
3290         writel(card->rt_base << 2, SAR_REG_RTBL);
3291
3292         /* Initialize TSTs */
3293         IPRINTK("%s: initialize TST ...\n", card->name);
3294         card->tst_free = card->tst_size - 2;    /* last two are jumps */
3295
3296         for (i = card->tst[0]; i < card->tst[0] + card->tst_size - 2; i++)
3297                 write_sram(card, i, TSTE_OPC_VAR);
3298         write_sram(card, i++, TSTE_OPC_JMP | (card->tst[0] << 2));
3299         idt77252_sram_write_errors = 1;
3300         write_sram(card, i++, TSTE_OPC_JMP | (card->tst[1] << 2));
3301         idt77252_sram_write_errors = 0;
3302         for (i = card->tst[1]; i < card->tst[1] + card->tst_size - 2; i++)
3303                 write_sram(card, i, TSTE_OPC_VAR);
3304         write_sram(card, i++, TSTE_OPC_JMP | (card->tst[1] << 2));
3305         idt77252_sram_write_errors = 1;
3306         write_sram(card, i++, TSTE_OPC_JMP | (card->tst[0] << 2));
3307         idt77252_sram_write_errors = 0;
3308
3309         card->tst_index = 0;
3310         writel(card->tst[0] << 2, SAR_REG_TSTB);
3311
3312         /* Initialize ABRSTD and Receive FIFO */
3313         IPRINTK("%s: initialize ABRSTD ...\n", card->name);
3314         writel(card->abrst_size | (card->abrst_base << 2),
3315                SAR_REG_ABRSTD);
3316
3317         IPRINTK("%s: initialize receive fifo ...\n", card->name);
3318         writel(card->fifo_size | (card->fifo_base << 2),
3319                SAR_REG_RXFD);
3320
3321         IPRINTK("%s: SRAM initialization complete.\n", card->name);
3322         return 0;
3323 }
3324
3325 static int __devinit
3326 init_card(struct atm_dev *dev)
3327 {
3328         struct idt77252_dev *card = dev->dev_data;
3329         struct pci_dev *pcidev = card->pcidev;
3330         unsigned long tmpl, modl;
3331         unsigned int linkrate, rsvdcr;
3332         unsigned int tst_entries;
3333         struct net_device *tmp;
3334         char tname[10];
3335
3336         u32 size;
3337         u_char pci_byte;
3338         u32 conf;
3339         int i, k;
3340
3341         if (test_bit(IDT77252_BIT_INIT, &card->flags)) {
3342                 printk("Error: SAR already initialized.\n");
3343                 return -1;
3344         }
3345
3346 /*****************************************************************/
3347 /*   P C I   C O N F I G U R A T I O N                           */
3348 /*****************************************************************/
3349
3350         /* Set PCI Retry-Timeout and TRDY timeout */
3351         IPRINTK("%s: Checking PCI retries.\n", card->name);
3352         if (pci_read_config_byte(pcidev, 0x40, &pci_byte) != 0) {
3353                 printk("%s: can't read PCI retry timeout.\n", card->name);
3354                 deinit_card(card);
3355                 return -1;
3356         }
3357         if (pci_byte != 0) {
3358                 IPRINTK("%s: PCI retry timeout: %d, set to 0.\n",
3359                         card->name, pci_byte);
3360                 if (pci_write_config_byte(pcidev, 0x40, 0) != 0) {
3361                         printk("%s: can't set PCI retry timeout.\n",
3362                                card->name);
3363                         deinit_card(card);
3364                         return -1;
3365                 }
3366         }
3367         IPRINTK("%s: Checking PCI TRDY.\n", card->name);
3368         if (pci_read_config_byte(pcidev, 0x41, &pci_byte) != 0) {
3369                 printk("%s: can't read PCI TRDY timeout.\n", card->name);
3370                 deinit_card(card);
3371                 return -1;
3372         }
3373         if (pci_byte != 0) {
3374                 IPRINTK("%s: PCI TRDY timeout: %d, set to 0.\n",
3375                         card->name, pci_byte);
3376                 if (pci_write_config_byte(pcidev, 0x41, 0) != 0) {
3377                         printk("%s: can't set PCI TRDY timeout.\n", card->name);
3378                         deinit_card(card);
3379                         return -1;
3380                 }
3381         }
3382         /* Reset Timer register */
3383         if (readl(SAR_REG_STAT) & SAR_STAT_TMROF) {
3384                 printk("%s: resetting timer overflow.\n", card->name);
3385                 writel(SAR_STAT_TMROF, SAR_REG_STAT);
3386         }
3387         IPRINTK("%s: Request IRQ ... ", card->name);
3388         if (request_irq(pcidev->irq, idt77252_interrupt, SA_INTERRUPT|SA_SHIRQ,
3389                         card->name, card) != 0) {
3390                 printk("%s: can't allocate IRQ.\n", card->name);
3391                 deinit_card(card);
3392                 return -1;
3393         }
3394         IPRINTK("got %d.\n", pcidev->irq);
3395
3396 /*****************************************************************/
3397 /*   C H E C K   A N D   I N I T   S R A M                       */
3398 /*****************************************************************/
3399
3400         IPRINTK("%s: Initializing SRAM\n", card->name);
3401
3402         /* preset size of connecton table, so that init_sram() knows about it */
3403         conf =  SAR_CFG_TX_FIFO_SIZE_9 |        /* Use maximum fifo size */
3404                 SAR_CFG_RXSTQ_SIZE_8k |         /* Receive Status Queue is 8k */
3405                 SAR_CFG_IDLE_CLP |              /* Set CLP on idle cells */
3406 #ifndef CONFIG_ATM_IDT77252_SEND_IDLE
3407                 SAR_CFG_NO_IDLE |               /* Do not send idle cells */
3408 #endif
3409                 0;
3410
3411         if (card->sramsize == (512 * 1024))
3412                 conf |= SAR_CFG_CNTBL_1k;
3413         else
3414                 conf |= SAR_CFG_CNTBL_512;
3415
3416         switch (vpibits) {
3417         case 0:
3418                 conf |= SAR_CFG_VPVCS_0;
3419                 break;
3420         default:
3421         case 1:
3422                 conf |= SAR_CFG_VPVCS_1;
3423                 break;
3424         case 2:
3425                 conf |= SAR_CFG_VPVCS_2;
3426                 break;
3427         case 8:
3428                 conf |= SAR_CFG_VPVCS_8;
3429                 break;
3430         }
3431
3432         writel(readl(SAR_REG_CFG) | conf, SAR_REG_CFG);
3433
3434         if (init_sram(card) < 0)
3435                 return -1;
3436
3437 /********************************************************************/
3438 /*  A L L O C   R A M   A N D   S E T   V A R I O U S   T H I N G S */
3439 /********************************************************************/
3440         /* Initialize TSQ */
3441         if (0 != init_tsq(card)) {
3442                 deinit_card(card);
3443                 return -1;
3444         }
3445         /* Initialize RSQ */
3446         if (0 != init_rsq(card)) {
3447                 deinit_card(card);
3448                 return -1;
3449         }
3450
3451         card->vpibits = vpibits;
3452         if (card->sramsize == (512 * 1024)) {
3453                 card->vcibits = 10 - card->vpibits;
3454         } else {
3455                 card->vcibits = 9 - card->vpibits;
3456         }
3457
3458         card->vcimask = 0;
3459         for (k = 0, i = 1; k < card->vcibits; k++) {
3460                 card->vcimask |= i;
3461                 i <<= 1;
3462         }
3463
3464         IPRINTK("%s: Setting VPI/VCI mask to zero.\n", card->name);
3465         writel(0, SAR_REG_VPM);
3466
3467         /* Little Endian Order   */
3468         writel(0, SAR_REG_GP);
3469
3470         /* Initialize RAW Cell Handle Register  */
3471         card->raw_cell_hnd = pci_alloc_consistent(card->pcidev, 2 * sizeof(u32),
3472                                                   &card->raw_cell_paddr);
3473         if (!card->raw_cell_hnd) {
3474                 printk("%s: memory allocation failure.\n", card->name);
3475                 deinit_card(card);
3476                 return -1;
3477         }
3478         memset(card->raw_cell_hnd, 0, 2 * sizeof(u32));
3479         writel(card->raw_cell_paddr, SAR_REG_RAWHND);
3480         IPRINTK("%s: raw cell handle is at 0x%p.\n", card->name,
3481                 card->raw_cell_hnd);
3482
3483         size = sizeof(struct vc_map *) * card->tct_size;
3484         IPRINTK("%s: allocate %d byte for VC map.\n", card->name, size);
3485         if (NULL == (card->vcs = vmalloc(size))) {
3486                 printk("%s: memory allocation failure.\n", card->name);
3487                 deinit_card(card);
3488                 return -1;
3489         }
3490         memset(card->vcs, 0, size);
3491
3492         size = sizeof(struct vc_map *) * card->scd_size;
3493         IPRINTK("%s: allocate %d byte for SCD to VC mapping.\n",
3494                 card->name, size);
3495         if (NULL == (card->scd2vc = vmalloc(size))) {
3496                 printk("%s: memory allocation failure.\n", card->name);
3497                 deinit_card(card);
3498                 return -1;
3499         }
3500         memset(card->scd2vc, 0, size);
3501
3502         size = sizeof(struct tst_info) * (card->tst_size - 2);
3503         IPRINTK("%s: allocate %d byte for TST to VC mapping.\n",
3504                 card->name, size);
3505         if (NULL == (card->soft_tst = vmalloc(size))) {
3506                 printk("%s: memory allocation failure.\n", card->name);
3507                 deinit_card(card);
3508                 return -1;
3509         }
3510         for (i = 0; i < card->tst_size - 2; i++) {
3511                 card->soft_tst[i].tste = TSTE_OPC_VAR;
3512                 card->soft_tst[i].vc = NULL;
3513         }
3514
3515         if (dev->phy == NULL) {
3516                 printk("%s: No LT device defined.\n", card->name);
3517                 deinit_card(card);
3518                 return -1;
3519         }
3520         if (dev->phy->ioctl == NULL) {
3521                 printk("%s: LT had no IOCTL funtion defined.\n", card->name);
3522                 deinit_card(card);
3523                 return -1;
3524         }
3525
3526 #ifdef  CONFIG_ATM_IDT77252_USE_SUNI
3527         /*
3528          * this is a jhs hack to get around special functionality in the
3529          * phy driver for the atecom hardware; the functionality doesn't
3530          * exist in the linux atm suni driver
3531          *
3532          * it isn't the right way to do things, but as the guy from NIST
3533          * said, talking about their measurement of the fine structure
3534          * constant, "it's good enough for government work."
3535          */
3536         linkrate = 149760000;
3537 #endif
3538
3539         card->link_pcr = (linkrate / 8 / 53);
3540         printk("%s: Linkrate on ATM line : %u bit/s, %u cell/s.\n",
3541                card->name, linkrate, card->link_pcr);
3542
3543 #ifdef CONFIG_ATM_IDT77252_SEND_IDLE
3544         card->utopia_pcr = card->link_pcr;
3545 #else
3546         card->utopia_pcr = (160000000 / 8 / 54);
3547 #endif
3548
3549         rsvdcr = 0;
3550         if (card->utopia_pcr > card->link_pcr)
3551                 rsvdcr = card->utopia_pcr - card->link_pcr;
3552
3553         tmpl = (unsigned long) rsvdcr * ((unsigned long) card->tst_size - 2);
3554         modl = tmpl % (unsigned long)card->utopia_pcr;
3555         tst_entries = (int) (tmpl / (unsigned long)card->utopia_pcr);
3556         if (modl)
3557                 tst_entries++;
3558         card->tst_free -= tst_entries;
3559         fill_tst(card, NULL, tst_entries, TSTE_OPC_NULL);
3560
3561 #ifdef HAVE_EEPROM
3562         idt77252_eeprom_init(card);
3563         printk("%s: EEPROM: %02x:", card->name,
3564                 idt77252_eeprom_read_status(card));
3565
3566         for (i = 0; i < 0x80; i++) {
3567                 printk(" %02x",
3568                 idt77252_eeprom_read_byte(card, i)
3569                 );
3570         }
3571         printk("\n");
3572 #endif /* HAVE_EEPROM */
3573
3574         /*
3575          * XXX: <hack>
3576          */
3577         sprintf(tname, "eth%d", card->index);
3578         tmp = dev_get_by_name(tname);   /* jhs: was "tmp = dev_get(tname);" */
3579         if (tmp) {
3580                 memcpy(card->atmdev->esi, tmp->dev_addr, 6);
3581
3582                 printk("%s: ESI %02x:%02x:%02x:%02x:%02x:%02x\n",
3583                        card->name, card->atmdev->esi[0], card->atmdev->esi[1],
3584                        card->atmdev->esi[2], card->atmdev->esi[3],
3585                        card->atmdev->esi[4], card->atmdev->esi[5]);
3586         }
3587         /*
3588          * XXX: </hack>
3589          */
3590
3591         /* Set Maximum Deficit Count for now. */
3592         writel(0xffff, SAR_REG_MDFCT);
3593
3594         set_bit(IDT77252_BIT_INIT, &card->flags);
3595
3596         XPRINTK("%s: IDT77252 ABR SAR initialization complete.\n", card->name);
3597         return 0;
3598 }
3599
3600
3601 /*****************************************************************************/
3602 /*                                                                           */
3603 /* Probing of IDT77252 ABR SAR                                               */
3604 /*                                                                           */
3605 /*****************************************************************************/
3606
3607
3608 static int __devinit
3609 idt77252_preset(struct idt77252_dev *card)
3610 {
3611         u16 pci_command;
3612
3613 /*****************************************************************/
3614 /*   P C I   C O N F I G U R A T I O N                           */
3615 /*****************************************************************/
3616
3617         XPRINTK("%s: Enable PCI master and memory access for SAR.\n",
3618                 card->name);
3619         if (pci_read_config_word(card->pcidev, PCI_COMMAND, &pci_command)) {
3620                 printk("%s: can't read PCI_COMMAND.\n", card->name);
3621                 deinit_card(card);
3622                 return -1;
3623         }
3624         if (!(pci_command & PCI_COMMAND_IO)) {
3625                 printk("%s: PCI_COMMAND: %04x (???)\n",
3626                        card->name, pci_command);
3627                 deinit_card(card);
3628                 return (-1);
3629         }
3630         pci_command |= (PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER);
3631         if (pci_write_config_word(card->pcidev, PCI_COMMAND, pci_command)) {
3632                 printk("%s: can't write PCI_COMMAND.\n", card->name);
3633                 deinit_card(card);
3634                 return -1;
3635         }
3636 /*****************************************************************/
3637 /*   G E N E R I C   R E S E T                                   */
3638 /*****************************************************************/
3639
3640         /* Software reset */
3641         writel(SAR_CFG_SWRST, SAR_REG_CFG);
3642         mdelay(1);
3643         writel(0, SAR_REG_CFG);
3644
3645         IPRINTK("%s: Software resetted.\n", card->name);
3646         return 0;
3647 }
3648
3649
3650 static unsigned long __devinit
3651 probe_sram(struct idt77252_dev *card)
3652 {
3653         u32 data, addr;
3654
3655         writel(0, SAR_REG_DR0);
3656         writel(SAR_CMD_WRITE_SRAM | (0 << 2), SAR_REG_CMD);
3657
3658         for (addr = 0x4000; addr < 0x80000; addr += 0x4000) {
3659                 writel(0xdeadbeef, SAR_REG_DR0);
3660                 writel(SAR_CMD_WRITE_SRAM | (addr << 2), SAR_REG_CMD);
3661
3662                 writel(SAR_CMD_READ_SRAM | (0 << 2), SAR_REG_CMD);
3663                 data = readl(SAR_REG_DR0);
3664
3665                 if (data != 0)
3666                         break;
3667         }
3668
3669         return addr * sizeof(u32);
3670 }
3671
3672 static int __devinit
3673 idt77252_init_one(struct pci_dev *pcidev, const struct pci_device_id *id)
3674 {
3675         static struct idt77252_dev **last = &idt77252_chain;
3676         static int index = 0;
3677
3678         unsigned long membase, srambase;
3679         struct idt77252_dev *card;
3680         struct atm_dev *dev;
3681         ushort revision = 0;
3682         int i, err;
3683
3684
3685         if ((err = pci_enable_device(pcidev))) {
3686                 printk("idt77252: can't enable PCI device at %s\n", pci_name(pcidev));
3687                 return err;
3688         }
3689
3690         if (pci_read_config_word(pcidev, PCI_REVISION_ID, &revision)) {
3691                 printk("idt77252-%d: can't read PCI_REVISION_ID\n", index);
3692                 err = -ENODEV;
3693                 goto err_out_disable_pdev;
3694         }
3695
3696         card = kmalloc(sizeof(struct idt77252_dev), GFP_KERNEL);
3697         if (!card) {
3698                 printk("idt77252-%d: can't allocate private data\n", index);
3699                 err = -ENOMEM;
3700                 goto err_out_disable_pdev;
3701         }
3702         memset(card, 0, sizeof(struct idt77252_dev));
3703
3704         card->revision = revision;
3705         card->index = index;
3706         card->pcidev = pcidev;
3707         sprintf(card->name, "idt77252-%d", card->index);
3708
3709         INIT_WORK(&card->tqueue, idt77252_softint, (void *)card);
3710
3711         membase = pci_resource_start(pcidev, 1);
3712         srambase = pci_resource_start(pcidev, 2);
3713
3714         init_MUTEX(&card->mutex);
3715         spin_lock_init(&card->cmd_lock);
3716         spin_lock_init(&card->tst_lock);
3717
3718         init_timer(&card->tst_timer);
3719         card->tst_timer.data = (unsigned long)card;
3720         card->tst_timer.function = tst_timer;
3721
3722         /* Do the I/O remapping... */
3723         card->membase = ioremap(membase, 1024);
3724         if (!card->membase) {
3725                 printk("%s: can't ioremap() membase\n", card->name);
3726                 err = -EIO;
3727                 goto err_out_free_card;
3728         }
3729
3730         if (idt77252_preset(card)) {
3731                 printk("%s: preset failed\n", card->name);
3732                 err = -EIO;
3733                 goto err_out_iounmap;
3734         }
3735
3736         dev = atm_dev_register("idt77252", &idt77252_ops, -1, NULL);
3737         if (!dev) {
3738                 printk("%s: can't register atm device\n", card->name);
3739                 err = -EIO;
3740                 goto err_out_iounmap;
3741         }
3742         dev->dev_data = card;
3743         card->atmdev = dev;
3744
3745 #ifdef  CONFIG_ATM_IDT77252_USE_SUNI
3746         suni_init(dev);
3747         if (!dev->phy) {
3748                 printk("%s: can't init SUNI\n", card->name);
3749                 err = -EIO;
3750                 goto err_out_deinit_card;
3751         }
3752 #endif  /* CONFIG_ATM_IDT77252_USE_SUNI */
3753
3754         card->sramsize = probe_sram(card);
3755
3756         for (i = 0; i < 4; i++) {
3757                 card->fbq[i] = ioremap(srambase | 0x200000 | (i << 18), 4);
3758                 if (!card->fbq[i]) {
3759                         printk("%s: can't ioremap() FBQ%d\n", card->name, i);
3760                         err = -EIO;
3761                         goto err_out_deinit_card;
3762                 }
3763         }
3764
3765         printk("%s: ABR SAR (Rev %c): MEM %08lx SRAM %08lx [%u KB]\n",
3766                card->name, ((revision > 1) && (revision < 25)) ?
3767                'A' + revision - 1 : '?', membase, srambase,
3768                card->sramsize / 1024);
3769
3770         if (init_card(dev)) {
3771                 printk("%s: init_card failed\n", card->name);
3772                 err = -EIO;
3773                 goto err_out_deinit_card;
3774         }
3775
3776         dev->ci_range.vpi_bits = card->vpibits;
3777         dev->ci_range.vci_bits = card->vcibits;
3778         dev->link_rate = card->link_pcr;
3779
3780         if (dev->phy->start)
3781                 dev->phy->start(dev);
3782
3783         if (idt77252_dev_open(card)) {
3784                 printk("%s: dev_open failed\n", card->name);
3785                 err = -EIO;
3786                 goto err_out_stop;
3787         }
3788
3789         *last = card;
3790         last = &card->next;
3791         index++;
3792
3793         return 0;
3794
3795 err_out_stop:
3796         if (dev->phy->stop)
3797                 dev->phy->stop(dev);
3798
3799 err_out_deinit_card:
3800         deinit_card(card);
3801
3802 err_out_iounmap:
3803         iounmap(card->membase);
3804
3805 err_out_free_card:
3806         kfree(card);
3807
3808 err_out_disable_pdev:
3809         pci_disable_device(pcidev);
3810         return err;
3811 }
3812
3813 static struct pci_device_id idt77252_pci_tbl[] =
3814 {
3815         { PCI_VENDOR_ID_IDT, PCI_DEVICE_ID_IDT_IDT77252,
3816           PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
3817         { 0, }
3818 };
3819
3820 MODULE_DEVICE_TABLE(pci, idt77252_pci_tbl);
3821
3822 static struct pci_driver idt77252_driver = {
3823         .name           = "idt77252",
3824         .id_table       = idt77252_pci_tbl,
3825         .probe          = idt77252_init_one,
3826 };
3827
3828 static int __init idt77252_init(void)
3829 {
3830         struct sk_buff *skb;
3831
3832         printk("%s: at %p\n", __FUNCTION__, idt77252_init);
3833
3834         if (sizeof(skb->cb) < sizeof(struct atm_skb_data) +
3835                               sizeof(struct idt77252_skb_prv)) {
3836                 printk(KERN_ERR "%s: skb->cb is too small (%lu < %lu)\n",
3837                        __FUNCTION__, (unsigned long) sizeof(skb->cb),
3838                        (unsigned long) sizeof(struct atm_skb_data) +
3839                                        sizeof(struct idt77252_skb_prv));
3840                 return -EIO;
3841         }
3842
3843         return pci_register_driver(&idt77252_driver);
3844 }
3845
3846 static void __exit idt77252_exit(void)
3847 {
3848         struct idt77252_dev *card;
3849         struct atm_dev *dev;
3850
3851         pci_unregister_driver(&idt77252_driver);
3852
3853         while (idt77252_chain) {
3854                 card = idt77252_chain;
3855                 dev = card->atmdev;
3856                 idt77252_chain = card->next;
3857
3858                 if (dev->phy->stop)
3859                         dev->phy->stop(dev);
3860                 deinit_card(card);
3861                 pci_disable_device(card->pcidev);
3862                 kfree(card);
3863         }
3864
3865         DIPRINTK("idt77252: finished cleanup-module().\n");
3866 }
3867
3868 module_init(idt77252_init);
3869 module_exit(idt77252_exit);
3870
3871 MODULE_LICENSE("GPL");
3872
3873 module_param(vpibits, uint, 0);
3874 MODULE_PARM_DESC(vpibits, "number of VPI bits supported (0, 1, or 2)");
3875 #ifdef CONFIG_ATM_IDT77252_DEBUG
3876 module_param(debug, ulong, 0644);
3877 MODULE_PARM_DESC(debug,   "debug bitmap, see drivers/atm/idt77252.h");
3878 #endif
3879
3880 MODULE_AUTHOR("Eddie C. Dost <ecd@atecom.com>");
3881 MODULE_DESCRIPTION("IDT77252 ABR SAR Driver");