drivers/atm/idt77252.c

   1 /*******************************************************************
   2  * ident "$Id: idt77252.c,v 1.2 2001/11/11 08:13:54 ecd Exp $"
   3  *
   4  * $Author: ecd $
   5  * $Date: 2001/11/11 08:13:54 $
   6  *
   7  * Copyright (c) 2000 ATecoM GmbH
   8  *
   9  * The author may be reached at ecd@atecom.com.
  10  *
  11  * This program is free software; you can redistribute  it and/or modify it
  12  * under  the terms of  the GNU General  Public License as published by the
  13  * Free Software Foundation;  either version 2 of the  License, or (at your
  14  * option) any later version.
  15  *
  16  * THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR   IMPLIED
  17  * WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
  18  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
  19  * NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT,  INDIRECT,
  20  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  21  * NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
  22  * USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
  23  * ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
  24  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  25  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  26  *
  27  * You should have received a copy of the  GNU General Public License along
  28  * with this program; if not, write  to the Free Software Foundation, Inc.,
  29  * 675 Mass Ave, Cambridge, MA 02139, USA.
  30  *
  31  *******************************************************************/
  32 static char const rcsid[] =
  33 "$Id: idt77252.c,v 1.2 2001/11/11 08:13:54 ecd Exp $";
  34
  35
  36 #include <linux/module.h>
  37 #include <linux/config.h>
  38 #include <linux/pci.h>
  39 #include <linux/skbuff.h>
  40 #include <linux/kernel.h>
  41 #include <linux/vmalloc.h>
  42 #include <linux/netdevice.h>
  43 #include <linux/atmdev.h>
  44 #include <linux/atm.h>
  45 #include <linux/delay.h>
  46 #include <linux/init.h>
  47 #include <linux/bitops.h>
  48 #include <linux/wait.h>
  49 #include <asm/semaphore.h>
  50 #include <asm/io.h>
  51 #include <asm/uaccess.h>
  52 #include <asm/atomic.h>
  53 #include <asm/byteorder.h>
  54
  55 #ifdef CONFIG_ATM_IDT77252_USE_SUNI
  56 #include "suni.h"
  57 #endif /* CONFIG_ATM_IDT77252_USE_SUNI */
  58
  59
  60 #include "idt77252.h"
  61 #include "idt77252_tables.h"
  62
  63 static unsigned int vpibits = 1;
  64
  65
  66 #define CONFIG_ATM_IDT77252_SEND_IDLE 1
  67
  68
  69 /*
  70  * Debug HACKs.
  71  */
  72 #define DEBUG_MODULE 1
  73 #undef HAVE_EEPROM      /* does not work, yet. */
  74
  75 #ifdef CONFIG_ATM_IDT77252_DEBUG
  76 static unsigned long debug = DBG_GENERAL;
  77 #endif
  78
  79
  80 #define SAR_RX_DELAY    (SAR_CFG_RXINT_NODELAY)
  81
  82
  83 /*
  84  * SCQ Handling.
  85  */
  86 static struct scq_info *alloc_scq(struct idt77252_dev *, int);
  87 static void free_scq(struct idt77252_dev *, struct scq_info *);
  88 static int queue_skb(struct idt77252_dev *, struct vc_map *,
  89                      struct sk_buff *, int oam);
  90 static void drain_scq(struct idt77252_dev *, struct vc_map *);
  91 static unsigned long get_free_scd(struct idt77252_dev *, struct vc_map *);
  92 static void fill_scd(struct idt77252_dev *, struct scq_info *, int);
  93
  94 /*
  95  * FBQ Handling.
  96  */
  97 static int push_rx_skb(struct idt77252_dev *,
  98                        struct sk_buff *, int queue);
  99 static void recycle_rx_skb(struct idt77252_dev *, struct sk_buff *);
 100 static void flush_rx_pool(struct idt77252_dev *, struct rx_pool *);
 101 static void recycle_rx_pool_skb(struct idt77252_dev *,
 102                                 struct rx_pool *);
 103 static void add_rx_skb(struct idt77252_dev *, int queue,
 104                        unsigned int size, unsigned int count);
 105
 106 /*
 107  * RSQ Handling.
 108  */
 109 static int init_rsq(struct idt77252_dev *);
 110 static void deinit_rsq(struct idt77252_dev *);
 111 static void idt77252_rx(struct idt77252_dev *);
 112
 113 /*
 114  * TSQ handling.
 115  */
 116 static int init_tsq(struct idt77252_dev *);
 117 static void deinit_tsq(struct idt77252_dev *);
 118 static void idt77252_tx(struct idt77252_dev *);
 119
 120
 121 /*
 122  * ATM Interface.
 123  */
 124 static void idt77252_dev_close(struct atm_dev *dev);
 125 static int idt77252_open(struct atm_vcc *vcc);
 126 static void idt77252_close(struct atm_vcc *vcc);
 127 static int idt77252_send(struct atm_vcc *vcc, struct sk_buff *skb);
 128 static int idt77252_send_oam(struct atm_vcc *vcc, void *cell,
 129                              int flags);
 130 static void idt77252_phy_put(struct atm_dev *dev, unsigned char value,
 131                              unsigned long addr);
 132 static unsigned char idt77252_phy_get(struct atm_dev *dev, unsigned long addr);
 133 static int idt77252_change_qos(struct atm_vcc *vcc, struct atm_qos *qos,
 134                                int flags);
 135 static int idt77252_proc_read(struct atm_dev *dev, loff_t * pos,
 136                               char *page);
 137 static void idt77252_softint(void *dev_id);
 138
 139
 140 static struct atmdev_ops idt77252_ops =
 141 {
 142         .dev_close      = idt77252_dev_close,
 143         .open           = idt77252_open,
 144         .close          = idt77252_close,
 145         .send           = idt77252_send,
 146         .send_oam       = idt77252_send_oam,
 147         .phy_put        = idt77252_phy_put,
 148         .phy_get        = idt77252_phy_get,
 149         .change_qos     = idt77252_change_qos,
 150         .proc_read      = idt77252_proc_read,
 151         .owner          = THIS_MODULE
 152 };
 153
 154 static struct idt77252_dev *idt77252_chain = NULL;
 155 static unsigned int idt77252_sram_write_errors = 0;
 156
 157 /*****************************************************************************/
 158 /*                                                                           */
 159 /* I/O and Utility Bus                                                       */
 160 /*                                                                           */
 161 /*****************************************************************************/
 162
 163 static void
 164 waitfor_idle(struct idt77252_dev *card)
 165 {
 166         u32 stat;
 167
 168         stat = readl(SAR_REG_STAT);
 169         while (stat & SAR_STAT_CMDBZ)
 170                 stat = readl(SAR_REG_STAT);
 171 }
 172
 173 static u32
 174 read_sram(struct idt77252_dev *card, unsigned long addr)
 175 {
 176         unsigned long flags;
 177         u32 value;
 178
 179         spin_lock_irqsave(&card->cmd_lock, flags);
 180         writel(SAR_CMD_READ_SRAM | (addr << 2), SAR_REG_CMD);
 181         waitfor_idle(card);
 182         value = readl(SAR_REG_DR0);
 183         spin_unlock_irqrestore(&card->cmd_lock, flags);
 184         return value;
 185 }
 186
 187 static void
 188 write_sram(struct idt77252_dev *card, unsigned long addr, u32 value)
 189 {
 190         unsigned long flags;
 191
 192         if ((idt77252_sram_write_errors == 0) &&
 193             (((addr > card->tst[0] + card->tst_size - 2) &&
 194               (addr < card->tst[0] + card->tst_size)) ||
 195              ((addr > card->tst[1] + card->tst_size - 2) &&
 196               (addr < card->tst[1] + card->tst_size)))) {
 197                 printk("%s: ERROR: TST JMP section at %08lx written: %08x\n",
 198                        card->name, addr, value);
 199         }
 200
 201         spin_lock_irqsave(&card->cmd_lock, flags);
 202         writel(value, SAR_REG_DR0);
 203         writel(SAR_CMD_WRITE_SRAM | (addr << 2), SAR_REG_CMD);
 204         waitfor_idle(card);
 205         spin_unlock_irqrestore(&card->cmd_lock, flags);
 206 }
 207
 208 static u8
 209 read_utility(void *dev, unsigned long ubus_addr)
 210 {
 211         struct idt77252_dev *card = dev;
 212         unsigned long flags;
 213         u8 value;
 214
 215         if (!card) {
 216                 printk("Error: No such device.\n");
 217                 return -1;
 218         }
 219
 220         spin_lock_irqsave(&card->cmd_lock, flags);
 221         writel(SAR_CMD_READ_UTILITY + ubus_addr, SAR_REG_CMD);
 222         waitfor_idle(card);
 223         value = readl(SAR_REG_DR0);
 224         spin_unlock_irqrestore(&card->cmd_lock, flags);
 225         return value;
 226 }
 227
 228 static void
 229 write_utility(void *dev, unsigned long ubus_addr, u8 value)
 230 {
 231         struct idt77252_dev *card = dev;
 232         unsigned long flags;
 233
 234         if (!card) {
 235                 printk("Error: No such device.\n");
 236                 return;
 237         }
 238
 239         spin_lock_irqsave(&card->cmd_lock, flags);
 240         writel((u32) value, SAR_REG_DR0);
 241         writel(SAR_CMD_WRITE_UTILITY + ubus_addr, SAR_REG_CMD);
 242         waitfor_idle(card);
 243         spin_unlock_irqrestore(&card->cmd_lock, flags);
 244 }
 245
 246 #ifdef HAVE_EEPROM
 247 static u32 rdsrtab[] =
 248 {
 249         SAR_GP_EECS | SAR_GP_EESCLK,
 250         0,
 251         SAR_GP_EESCLK,                  /* 0 */
 252         0,
 253         SAR_GP_EESCLK,                  /* 0 */
 254         0,
 255         SAR_GP_EESCLK,                  /* 0 */
 256         0,
 257         SAR_GP_EESCLK,                  /* 0 */
 258         0,
 259         SAR_GP_EESCLK,                  /* 0 */
 260         SAR_GP_EEDO,
 261         SAR_GP_EESCLK | SAR_GP_EEDO,    /* 1 */
 262         0,
 263         SAR_GP_EESCLK,                  /* 0 */
 264         SAR_GP_EEDO,
 265         SAR_GP_EESCLK | SAR_GP_EEDO     /* 1 */
 266 };
 267
 268 static u32 wrentab[] =
 269 {
 270         SAR_GP_EECS | SAR_GP_EESCLK,
 271         0,
 272         SAR_GP_EESCLK,                  /* 0 */
 273         0,
 274         SAR_GP_EESCLK,                  /* 0 */
 275         0,
 276         SAR_GP_EESCLK,                  /* 0 */
 277         0,
 278         SAR_GP_EESCLK,                  /* 0 */
 279         SAR_GP_EEDO,
 280         SAR_GP_EESCLK | SAR_GP_EEDO,    /* 1 */
 281         SAR_GP_EEDO,
 282         SAR_GP_EESCLK | SAR_GP_EEDO,    /* 1 */
 283         0,
 284         SAR_GP_EESCLK,                  /* 0 */
 285         0,
 286         SAR_GP_EESCLK                   /* 0 */
 287 };
 288
 289 static u32 rdtab[] =
 290 {
 291         SAR_GP_EECS | SAR_GP_EESCLK,
 292         0,
 293         SAR_GP_EESCLK,                  /* 0 */
 294         0,
 295         SAR_GP_EESCLK,                  /* 0 */
 296         0,
 297         SAR_GP_EESCLK,                  /* 0 */
 298         0,
 299         SAR_GP_EESCLK,                  /* 0 */
 300         0,
 301         SAR_GP_EESCLK,                  /* 0 */
 302         0,
 303         SAR_GP_EESCLK,                  /* 0 */
 304         SAR_GP_EEDO,
 305         SAR_GP_EESCLK | SAR_GP_EEDO,    /* 1 */
 306         SAR_GP_EEDO,
 307         SAR_GP_EESCLK | SAR_GP_EEDO     /* 1 */
 308 };
 309
 310 static u32 wrtab[] =
 311 {
 312         SAR_GP_EECS | SAR_GP_EESCLK,
 313         0,
 314         SAR_GP_EESCLK,                  /* 0 */
 315         0,
 316         SAR_GP_EESCLK,                  /* 0 */
 317         0,
 318         SAR_GP_EESCLK,                  /* 0 */
 319         0,
 320         SAR_GP_EESCLK,                  /* 0 */
 321         0,
 322         SAR_GP_EESCLK,                  /* 0 */
 323         0,
 324         SAR_GP_EESCLK,                  /* 0 */
 325         SAR_GP_EEDO,
 326         SAR_GP_EESCLK | SAR_GP_EEDO,    /* 1 */
 327         0,
 328         SAR_GP_EESCLK                   /* 0 */
 329 };
 330
 331 static u32 clktab[] =
 332 {
 333         0,
 334         SAR_GP_EESCLK,
 335         0,
 336         SAR_GP_EESCLK,
 337         0,
 338         SAR_GP_EESCLK,
 339         0,
 340         SAR_GP_EESCLK,
 341         0,
 342         SAR_GP_EESCLK,
 343         0,
 344         SAR_GP_EESCLK,
 345         0,
 346         SAR_GP_EESCLK,
 347         0,
 348         SAR_GP_EESCLK,
 349         0
 350 };
 351
 352 static u32
 353 idt77252_read_gp(struct idt77252_dev *card)
 354 {
 355         u32 gp;
 356
 357         gp = readl(SAR_REG_GP);
 358 #if 0
 359         printk("RD: %s\n", gp & SAR_GP_EEDI ? "1" : "0");
 360 #endif
 361         return gp;
 362 }
 363
 364 static void
 365 idt77252_write_gp(struct idt77252_dev *card, u32 value)
 366 {
 367         unsigned long flags;
 368
 369 #if 0
 370         printk("WR: %s %s %s\n", value & SAR_GP_EECS ? "   " : "/CS",
 371                value & SAR_GP_EESCLK ? "HIGH" : "LOW ",
 372                value & SAR_GP_EEDO   ? "1" : "0");
 373 #endif
 374
 375         spin_lock_irqsave(&card->cmd_lock, flags);
 376         waitfor_idle(card);
 377         writel(value, SAR_REG_GP);
 378         spin_unlock_irqrestore(&card->cmd_lock, flags);
 379 }
 380
 381 static u8
 382 idt77252_eeprom_read_status(struct idt77252_dev *card)
 383 {
 384         u8 byte;
 385         u32 gp;
 386         int i, j;
 387
 388         gp = idt77252_read_gp(card) & ~(SAR_GP_EESCLK|SAR_GP_EECS|SAR_GP_EEDO);
 389
 390         for (i = 0; i < sizeof(rdsrtab)/sizeof(rdsrtab[0]); i++) {
 391                 idt77252_write_gp(card, gp | rdsrtab[i]);
 392                 udelay(5);
 393         }
 394         idt77252_write_gp(card, gp | SAR_GP_EECS);
 395         udelay(5);
 396
 397         byte = 0;
 398         for (i = 0, j = 0; i < 8; i++) {
 399                 byte <<= 1;
 400
 401                 idt77252_write_gp(card, gp | clktab[j++]);
 402                 udelay(5);
 403
 404                 byte |= idt77252_read_gp(card) & SAR_GP_EEDI ? 1 : 0;
 405
 406                 idt77252_write_gp(card, gp | clktab[j++]);
 407                 udelay(5);
 408         }
 409         idt77252_write_gp(card, gp | SAR_GP_EECS);
 410         udelay(5);
 411
 412         return byte;
 413 }
 414
 415 static u8
 416 idt77252_eeprom_read_byte(struct idt77252_dev *card, u8 offset)
 417 {
 418         u8 byte;
 419         u32 gp;
 420         int i, j;
 421
 422         gp = idt77252_read_gp(card) & ~(SAR_GP_EESCLK|SAR_GP_EECS|SAR_GP_EEDO);
 423
 424         for (i = 0; i < sizeof(rdtab)/sizeof(rdtab[0]); i++) {
 425                 idt77252_write_gp(card, gp | rdtab[i]);
 426                 udelay(5);
 427         }
 428         idt77252_write_gp(card, gp | SAR_GP_EECS);
 429         udelay(5);
 430
 431         for (i = 0, j = 0; i < 8; i++) {
 432                 idt77252_write_gp(card, gp | clktab[j++] |
 433                                         (offset & 1 ? SAR_GP_EEDO : 0));
 434                 udelay(5);
 435
 436                 idt77252_write_gp(card, gp | clktab[j++] |
 437                                         (offset & 1 ? SAR_GP_EEDO : 0));
 438                 udelay(5);
 439
 440                 offset >>= 1;
 441         }
 442         idt77252_write_gp(card, gp | SAR_GP_EECS);
 443         udelay(5);
 444
 445         byte = 0;
 446         for (i = 0, j = 0; i < 8; i++) {
 447                 byte <<= 1;
 448
 449                 idt77252_write_gp(card, gp | clktab[j++]);
 450                 udelay(5);
 451
 452                 byte |= idt77252_read_gp(card) & SAR_GP_EEDI ? 1 : 0;
 453
 454                 idt77252_write_gp(card, gp | clktab[j++]);
 455                 udelay(5);
 456         }
 457         idt77252_write_gp(card, gp | SAR_GP_EECS);
 458         udelay(5);
 459
 460         return byte;
 461 }
 462
 463 static void
 464 idt77252_eeprom_write_byte(struct idt77252_dev *card, u8 offset, u8 data)
 465 {
 466         u32 gp;
 467         int i, j;
 468
 469         gp = idt77252_read_gp(card) & ~(SAR_GP_EESCLK|SAR_GP_EECS|SAR_GP_EEDO);
 470
 471         for (i = 0; i < sizeof(wrentab)/sizeof(wrentab[0]); i++) {
 472                 idt77252_write_gp(card, gp | wrentab[i]);
 473                 udelay(5);
 474         }
 475         idt77252_write_gp(card, gp | SAR_GP_EECS);
 476         udelay(5);
 477
 478         for (i = 0; i < sizeof(wrtab)/sizeof(wrtab[0]); i++) {
 479                 idt77252_write_gp(card, gp | wrtab[i]);
 480                 udelay(5);
 481         }
 482         idt77252_write_gp(card, gp | SAR_GP_EECS);
 483         udelay(5);
 484
 485         for (i = 0, j = 0; i < 8; i++) {
 486                 idt77252_write_gp(card, gp | clktab[j++] |
 487                                         (offset & 1 ? SAR_GP_EEDO : 0));
 488                 udelay(5);
 489
 490                 idt77252_write_gp(card, gp | clktab[j++] |
 491                                         (offset & 1 ? SAR_GP_EEDO : 0));
 492                 udelay(5);
 493
 494                 offset >>= 1;
 495         }
 496         idt77252_write_gp(card, gp | SAR_GP_EECS);
 497         udelay(5);
 498
 499         for (i = 0, j = 0; i < 8; i++) {
 500                 idt77252_write_gp(card, gp | clktab[j++] |
 501                                         (data & 1 ? SAR_GP_EEDO : 0));
 502                 udelay(5);
 503
 504                 idt77252_write_gp(card, gp | clktab[j++] |
 505                                         (data & 1 ? SAR_GP_EEDO : 0));
 506                 udelay(5);
 507
 508                 data >>= 1;
 509         }
 510         idt77252_write_gp(card, gp | SAR_GP_EECS);
 511         udelay(5);
 512 }
 513
 514 static void
 515 idt77252_eeprom_init(struct idt77252_dev *card)
 516 {
 517         u32 gp;
 518
 519         gp = idt77252_read_gp(card) & ~(SAR_GP_EESCLK|SAR_GP_EECS|SAR_GP_EEDO);
 520
 521         idt77252_write_gp(card, gp | SAR_GP_EECS | SAR_GP_EESCLK);
 522         udelay(5);
 523         idt77252_write_gp(card, gp | SAR_GP_EECS);
 524         udelay(5);
 525         idt77252_write_gp(card, gp | SAR_GP_EECS | SAR_GP_EESCLK);
 526         udelay(5);
 527         idt77252_write_gp(card, gp | SAR_GP_EECS);
 528         udelay(5);
 529 }
 530 #endif /* HAVE_EEPROM */
 531
 532
 533 #ifdef CONFIG_ATM_IDT77252_DEBUG
 534 static void
 535 dump_tct(struct idt77252_dev *card, int index)
 536 {
 537         unsigned long tct;
 538         int i;
 539
 540         tct = (unsigned long) (card->tct_base + index * SAR_SRAM_TCT_SIZE);
 541
 542         printk("%s: TCT %x:", card->name, index);
 543         for (i = 0; i < 8; i++) {
 544                 printk(" %08x", read_sram(card, tct + i));
 545         }
 546         printk("\n");
 547 }
 548
 549 static void
 550 idt77252_tx_dump(struct idt77252_dev *card)
 551 {
 552         struct atm_vcc *vcc;
 553         struct vc_map *vc;
 554         int i;
 555
 556         printk("%s\n", __FUNCTION__);
 557         for (i = 0; i < card->tct_size; i++) {
 558                 vc = card->vcs[i];
 559                 if (!vc)
 560                         continue;
 561
 562                 vcc = NULL;
 563                 if (vc->rx_vcc)
 564                         vcc = vc->rx_vcc;
 565                 else if (vc->tx_vcc)
 566                         vcc = vc->tx_vcc;
 567
 568                 if (!vcc)
 569                         continue;
 570
 571                 printk("%s: Connection %d:\n", card->name, vc->index);
 572                 dump_tct(card, vc->index);
 573         }
 574 }
 575 #endif
 576
 577
 578 /*****************************************************************************/
 579 /*                                                                           */
 580 /* SCQ Handling                                                              */
 581 /*                                                                           */
 582 /*****************************************************************************/
 583
 584 static int
 585 sb_pool_add(struct idt77252_dev *card, struct sk_buff *skb, int queue)
 586 {
 587         struct sb_pool *pool = &card->sbpool[queue];
 588         int index;
 589
 590         index = pool->index;
 591         while (pool->skb[index]) {
 592                 index = (index + 1) & FBQ_MASK;
 593                 if (index == pool->index)
 594                         return -ENOBUFS;
 595         }
 596
 597         pool->skb[index] = skb;
 598         IDT77252_PRV_POOL(skb) = POOL_HANDLE(queue, index);
 599
 600         pool->index = (index + 1) & FBQ_MASK;
 601         return 0;
 602 }
 603
 604 static void
 605 sb_pool_remove(struct idt77252_dev *card, struct sk_buff *skb)
 606 {
 607         unsigned int queue, index;
 608         u32 handle;
 609
 610         handle = IDT77252_PRV_POOL(skb);
 611
 612         queue = POOL_QUEUE(handle);
 613         if (queue > 3)
 614                 return;
 615
 616         index = POOL_INDEX(handle);
 617         if (index > FBQ_SIZE - 1)
 618                 return;
 619
 620         card->sbpool[queue].skb[index] = NULL;
 621 }
 622
 623 static struct sk_buff *
 624 sb_pool_skb(struct idt77252_dev *card, u32 handle)
 625 {
 626         unsigned int queue, index;
 627
 628         queue = POOL_QUEUE(handle);
 629         if (queue > 3)
 630                 return NULL;
 631
 632         index = POOL_INDEX(handle);
 633         if (index > FBQ_SIZE - 1)
 634                 return NULL;
 635
 636         return card->sbpool[queue].skb[index];
 637 }
 638
 639 static struct scq_info *
 640 alloc_scq(struct idt77252_dev *card, int class)
 641 {
 642         struct scq_info *scq;
 643
 644         scq = (struct scq_info *) kmalloc(sizeof(struct scq_info), GFP_KERNEL);
 645         if (!scq)
 646                 return NULL;
 647         memset(scq, 0, sizeof(struct scq_info));
 648
 649         scq->base = pci_alloc_consistent(card->pcidev, SCQ_SIZE,
 650                                          &scq->paddr);
 651         if (scq->base == NULL) {
 652                 kfree(scq);
 653                 return NULL;
 654         }
 655         memset(scq->base, 0, SCQ_SIZE);
 656
 657         scq->next = scq->base;
 658         scq->last = scq->base + (SCQ_ENTRIES - 1);
 659         atomic_set(&scq->used, 0);
 660
 661         spin_lock_init(&scq->lock);
 662         spin_lock_init(&scq->skblock);
 663
 664         skb_queue_head_init(&scq->transmit);
 665         skb_queue_head_init(&scq->pending);
 666
 667         TXPRINTK("idt77252: SCQ: base 0x%p, next 0x%p, last 0x%p, paddr %08llx\n",
 668                  scq->base, scq->next, scq->last, (unsigned long long)scq->paddr);
 669
 670         return scq;
 671 }
 672
 673 static void
 674 free_scq(struct idt77252_dev *card, struct scq_info *scq)
 675 {
 676         struct sk_buff *skb;
 677         struct atm_vcc *vcc;
 678
 679         pci_free_consistent(card->pcidev, SCQ_SIZE,
 680                             scq->base, scq->paddr);
 681
 682         while ((skb = skb_dequeue(&scq->transmit))) {
 683                 pci_unmap_single(card->pcidev, IDT77252_PRV_PADDR(skb),
 684                                  skb->len, PCI_DMA_TODEVICE);
 685
 686                 vcc = ATM_SKB(skb)->vcc;
 687                 if (vcc->pop)
 688                         vcc->pop(vcc, skb);
 689                 else
 690                         dev_kfree_skb(skb);
 691         }
 692
 693         while ((skb = skb_dequeue(&scq->pending))) {
 694                 pci_unmap_single(card->pcidev, IDT77252_PRV_PADDR(skb),
 695                                  skb->len, PCI_DMA_TODEVICE);
 696
 697                 vcc = ATM_SKB(skb)->vcc;
 698                 if (vcc->pop)
 699                         vcc->pop(vcc, skb);
 700                 else
 701                         dev_kfree_skb(skb);
 702         }
 703
 704         kfree(scq);
 705 }
 706
 707
 708 static int
 709 push_on_scq(struct idt77252_dev *card, struct vc_map *vc, struct sk_buff *skb)
 710 {
 711         struct scq_info *scq = vc->scq;
 712         unsigned long flags;
 713         struct scqe *tbd;
 714         int entries;
 715
 716         TXPRINTK("%s: SCQ: next 0x%p\n", card->name, scq->next);
 717
 718         atomic_inc(&scq->used);
 719         entries = atomic_read(&scq->used);
 720         if (entries > (SCQ_ENTRIES - 1)) {
 721                 atomic_dec(&scq->used);
 722                 goto out;
 723         }
 724
 725         skb_queue_tail(&scq->transmit, skb);
 726
 727         spin_lock_irqsave(&vc->lock, flags);
 728         if (vc->estimator) {
 729                 struct atm_vcc *vcc = vc->tx_vcc;
 730
 731                 vc->estimator->cells += (skb->len + 47) / 48;
 732                 if (atomic_read(&vcc->sk->sk_wmem_alloc) >
 733                     (vcc->sk->sk_sndbuf >> 1)) {
 734                         u32 cps = vc->estimator->maxcps;
 735
 736                         vc->estimator->cps = cps;
 737                         vc->estimator->avcps = cps << 5;
 738                         if (vc->lacr < vc->init_er) {
 739                                 vc->lacr = vc->init_er;
 740                                 writel(TCMDQ_LACR | (vc->lacr << 16) |
 741                                        vc->index, SAR_REG_TCMDQ);
 742                         }
 743                 }
 744         }
 745         spin_unlock_irqrestore(&vc->lock, flags);
 746
 747         tbd = &IDT77252_PRV_TBD(skb);
 748
 749         spin_lock_irqsave(&scq->lock, flags);
 750         scq->next->word_1 = cpu_to_le32(tbd->word_1 |
 751                                         SAR_TBD_TSIF | SAR_TBD_GTSI);
 752         scq->next->word_2 = cpu_to_le32(tbd->word_2);
 753         scq->next->word_3 = cpu_to_le32(tbd->word_3);
 754         scq->next->word_4 = cpu_to_le32(tbd->word_4);
 755
 756         if (scq->next == scq->last)
 757                 scq->next = scq->base;
 758         else
 759                 scq->next++;
 760
 761         write_sram(card, scq->scd,
 762                    scq->paddr +
 763                    (u32)((unsigned long)scq->next - (unsigned long)scq->base));
 764         spin_unlock_irqrestore(&scq->lock, flags);
 765
 766         scq->trans_start = jiffies;
 767
 768         if (test_and_clear_bit(VCF_IDLE, &vc->flags)) {
 769                 writel(TCMDQ_START_LACR | (vc->lacr << 16) | vc->index,
 770                        SAR_REG_TCMDQ);
 771         }
 772
 773         TXPRINTK("%d entries in SCQ used (push).\n", atomic_read(&scq->used));
 774
 775         XPRINTK("%s: SCQ (after push %2d) head = 0x%x, next = 0x%p.\n",
 776                 card->name, atomic_read(&scq->used),
 777                 read_sram(card, scq->scd + 1), scq->next);
 778
 779         return 0;
 780
 781 out:
 782         if (jiffies - scq->trans_start > HZ) {
 783                 printk("%s: Error pushing TBD for %d.%d\n",
 784                        card->name, vc->tx_vcc->vpi, vc->tx_vcc->vci);
 785 #ifdef CONFIG_ATM_IDT77252_DEBUG
 786                 idt77252_tx_dump(card);
 787 #endif
 788                 scq->trans_start = jiffies;
 789         }
 790
 791         return -ENOBUFS;
 792 }
 793
 794
 795 static void
 796 drain_scq(struct idt77252_dev *card, struct vc_map *vc)
 797 {
 798         struct scq_info *scq = vc->scq;
 799         struct sk_buff *skb;
 800         struct atm_vcc *vcc;
 801
 802         TXPRINTK("%s: SCQ (before drain %2d) next = 0x%p.\n",
 803                  card->name, atomic_read(&scq->used), scq->next);
 804
 805         skb = skb_dequeue(&scq->transmit);
 806         if (skb) {
 807                 TXPRINTK("%s: freeing skb at %p.\n", card->name, skb);
 808
 809                 pci_unmap_single(card->pcidev, IDT77252_PRV_PADDR(skb),
 810                                  skb->len, PCI_DMA_TODEVICE);
 811
 812                 vcc = ATM_SKB(skb)->vcc;
 813
 814                 if (vcc->pop)
 815                         vcc->pop(vcc, skb);
 816                 else
 817                         dev_kfree_skb(skb);
 818
 819                 atomic_inc(&vcc->stats->tx);
 820         }
 821
 822         atomic_dec(&scq->used);
 823
 824         spin_lock(&scq->skblock);
 825         while ((skb = skb_dequeue(&scq->pending))) {
 826                 if (push_on_scq(card, vc, skb)) {
 827                         skb_queue_head(&vc->scq->pending, skb);
 828                         break;
 829                 }
 830         }
 831         spin_unlock(&scq->skblock);
 832 }
 833
 834 static int
 835 queue_skb(struct idt77252_dev *card, struct vc_map *vc,
 836           struct sk_buff *skb, int oam)
 837 {
 838         struct atm_vcc *vcc;
 839         struct scqe *tbd;
 840         unsigned long flags;
 841         int error;
 842         int aal;
 843
 844         if (skb->len == 0) {
 845                 printk("%s: invalid skb->len (%d)\n", card->name, skb->len);
 846                 return -EINVAL;
 847         }
 848
 849         TXPRINTK("%s: Sending %d bytes of data.\n",
 850                  card->name, skb->len);
 851
 852         tbd = &IDT77252_PRV_TBD(skb);
 853         vcc = ATM_SKB(skb)->vcc;
 854
 855         IDT77252_PRV_PADDR(skb) = pci_map_single(card->pcidev, skb->data,
 856                                                  skb->len, PCI_DMA_TODEVICE);
 857
 858         error = -EINVAL;
 859
 860         if (oam) {
 861                 if (skb->len != 52)
 862                         goto errout;
 863
 864                 tbd->word_1 = SAR_TBD_OAM | ATM_CELL_PAYLOAD | SAR_TBD_EPDU;
 865                 tbd->word_2 = IDT77252_PRV_PADDR(skb) + 4;
 866                 tbd->word_3 = 0x00000000;
 867                 tbd->word_4 = (skb->data[0] << 24) | (skb->data[1] << 16) |
 868                               (skb->data[2] <<  8) | (skb->data[3] <<  0);
 869
 870                 if (test_bit(VCF_RSV, &vc->flags))
 871                         vc = card->vcs[0];
 872
 873                 goto done;
 874         }
 875
 876         if (test_bit(VCF_RSV, &vc->flags)) {
 877                 printk("%s: Trying to transmit on reserved VC\n", card->name);
 878                 goto errout;
 879         }
 880
 881         aal = vcc->qos.aal;
 882
 883         switch (aal) {
 884         case ATM_AAL0:
 885         case ATM_AAL34:
 886                 if (skb->len > 52)
 887                         goto errout;
 888
 889                 if (aal == ATM_AAL0)
 890                         tbd->word_1 = SAR_TBD_EPDU | SAR_TBD_AAL0 |
 891                                       ATM_CELL_PAYLOAD;
 892                 else
 893                         tbd->word_1 = SAR_TBD_EPDU | SAR_TBD_AAL34 |
 894                                       ATM_CELL_PAYLOAD;
 895
 896                 tbd->word_2 = IDT77252_PRV_PADDR(skb) + 4;
 897                 tbd->word_3 = 0x00000000;
 898                 tbd->word_4 = (skb->data[0] << 24) | (skb->data[1] << 16) |
 899                               (skb->data[2] <<  8) | (skb->data[3] <<  0);
 900                 break;
 901
 902         case ATM_AAL5:
 903                 tbd->word_1 = SAR_TBD_EPDU | SAR_TBD_AAL5 | skb->len;
 904                 tbd->word_2 = IDT77252_PRV_PADDR(skb);
 905                 tbd->word_3 = skb->len;
 906                 tbd->word_4 = (vcc->vpi << SAR_TBD_VPI_SHIFT) |
 907                               (vcc->vci << SAR_TBD_VCI_SHIFT);
 908                 break;
 909
 910         case ATM_AAL1:
 911         case ATM_AAL2:
 912         default:
 913                 printk("%s: Traffic type not supported.\n", card->name);
 914                 error = -EPROTONOSUPPORT;
 915                 goto errout;
 916         }
 917
 918 done:
 919         spin_lock_irqsave(&vc->scq->skblock, flags);
 920         skb_queue_tail(&vc->scq->pending, skb);
 921
 922         while ((skb = skb_dequeue(&vc->scq->pending))) {
 923                 if (push_on_scq(card, vc, skb)) {
 924                         skb_queue_head(&vc->scq->pending, skb);
 925                         break;
 926                 }
 927         }
 928         spin_unlock_irqrestore(&vc->scq->skblock, flags);
 929
 930         return 0;
 931
 932 errout:
 933         pci_unmap_single(card->pcidev, IDT77252_PRV_PADDR(skb),
 934                          skb->len, PCI_DMA_TODEVICE);
 935         return error;
 936 }
 937
 938 static unsigned long
 939 get_free_scd(struct idt77252_dev *card, struct vc_map *vc)
 940 {
 941         int i;
 942
 943         for (i = 0; i < card->scd_size; i++) {
 944                 if (!card->scd2vc[i]) {
 945                         card->scd2vc[i] = vc;
 946                         vc->scd_index = i;
 947                         return card->scd_base + i * SAR_SRAM_SCD_SIZE;
 948                 }
 949         }
 950         return 0;
 951 }
 952
 953 static void
 954 fill_scd(struct idt77252_dev *card, struct scq_info *scq, int class)
 955 {
 956         write_sram(card, scq->scd, scq->paddr);
 957         write_sram(card, scq->scd + 1, 0x00000000);
 958         write_sram(card, scq->scd + 2, 0xffffffff);
 959         write_sram(card, scq->scd + 3, 0x00000000);
 960 }
 961
 962 static void
 963 clear_scd(struct idt77252_dev *card, struct scq_info *scq, int class)
 964 {
 965         return;
 966 }
 967
 968 /*****************************************************************************/
 969 /*                                                                           */
 970 /* RSQ Handling                                                              */
 971 /*                                                                           */
 972 /*****************************************************************************/
 973
 974 static int
 975 init_rsq(struct idt77252_dev *card)
 976 {
 977         struct rsq_entry *rsqe;
 978
 979         card->rsq.base = pci_alloc_consistent(card->pcidev, RSQSIZE,
 980                                               &card->rsq.paddr);
 981         if (card->rsq.base == NULL) {
 982                 printk("%s: can't allocate RSQ.\n", card->name);
 983                 return -1;
 984         }
 985         memset(card->rsq.base, 0, RSQSIZE);
 986
 987         card->rsq.last = card->rsq.base + RSQ_NUM_ENTRIES - 1;
 988         card->rsq.next = card->rsq.last;
 989         for (rsqe = card->rsq.base; rsqe <= card->rsq.last; rsqe++)
 990                 rsqe->word_4 = 0;
 991
 992         writel((unsigned long) card->rsq.last - (unsigned long) card->rsq.base,
 993                SAR_REG_RSQH);
 994         writel(card->rsq.paddr, SAR_REG_RSQB);
 995
 996         IPRINTK("%s: RSQ base at 0x%lx (0x%x).\n", card->name,
 997                 (unsigned long) card->rsq.base,
 998                 readl(SAR_REG_RSQB));
 999         IPRINTK("%s: RSQ head = 0x%x, base = 0x%x, tail = 0x%x.\n",
1000                 card->name,
1001                 readl(SAR_REG_RSQH),
1002                 readl(SAR_REG_RSQB),
1003                 readl(SAR_REG_RSQT));
1004
1005         return 0;
1006 }
1007
1008 static void
1009 deinit_rsq(struct idt77252_dev *card)
1010 {
1011         pci_free_consistent(card->pcidev, RSQSIZE,
1012                             card->rsq.base, card->rsq.paddr);
1013 }
1014
1015 static void
1016 dequeue_rx(struct idt77252_dev *card, struct rsq_entry *rsqe)
1017 {
1018         struct atm_vcc *vcc;
1019         struct sk_buff *skb;
1020         struct rx_pool *rpp;
1021         struct vc_map *vc;
1022         u32 header, vpi, vci;
1023         u32 stat;
1024         int i;
1025
1026         stat = le32_to_cpu(rsqe->word_4);
1027
1028         if (stat & SAR_RSQE_IDLE) {
1029                 RXPRINTK("%s: message about inactive connection.\n",
1030                          card->name);
1031                 return;
1032         }
1033
1034         skb = sb_pool_skb(card, le32_to_cpu(rsqe->word_2));
1035         if (skb == NULL) {
1036                 printk("%s: NULL skb in %s, rsqe: %08x %08x %08x %08x\n",
1037                        card->name, __FUNCTION__,
1038                        le32_to_cpu(rsqe->word_1), le32_to_cpu(rsqe->word_2),
1039                        le32_to_cpu(rsqe->word_3), le32_to_cpu(rsqe->word_4));
1040                 return;
1041         }
1042
1043         header = le32_to_cpu(rsqe->word_1);
1044         vpi = (header >> 16) & 0x00ff;
1045         vci = (header >>  0) & 0xffff;
1046
1047         RXPRINTK("%s: SDU for %d.%d received in buffer 0x%p (data 0x%p).\n",
1048                  card->name, vpi, vci, skb, skb->data);
1049
1050         if ((vpi >= (1 << card->vpibits)) || (vci != (vci & card->vcimask))) {
1051                 printk("%s: SDU received for out-of-range vc %u.%u\n",
1052                        card->name, vpi, vci);
1053                 recycle_rx_skb(card, skb);
1054                 return;
1055         }
1056
1057         vc = card->vcs[VPCI2VC(card, vpi, vci)];
1058         if (!vc || !test_bit(VCF_RX, &vc->flags)) {
1059                 printk("%s: SDU received on non RX vc %u.%u\n",
1060                        card->name, vpi, vci);
1061                 recycle_rx_skb(card, skb);
1062                 return;
1063         }
1064
1065         vcc = vc->rx_vcc;
1066
1067         pci_dma_sync_single_for_cpu(card->pcidev, IDT77252_PRV_PADDR(skb),
1068                                     skb->end - skb->data, PCI_DMA_FROMDEVICE);
1069
1070         if ((vcc->qos.aal == ATM_AAL0) ||
1071             (vcc->qos.aal == ATM_AAL34)) {
1072                 struct sk_buff *sb;
1073                 unsigned char *cell;
1074                 u32 aal0;
1075
1076                 cell = skb->data;
1077                 for (i = (stat & SAR_RSQE_CELLCNT); i; i--) {
1078                         if ((sb = dev_alloc_skb(64)) == NULL) {
1079                                 printk("%s: Can't allocate buffers for aal0.\n",
1080                                        card->name);
1081                                 atomic_add(i, &vcc->stats->rx_drop);
1082                                 break;
1083                         }
1084                         if (!atm_charge(vcc, sb->truesize)) {
1085                                 RXPRINTK("%s: atm_charge() dropped aal0 packets.\n",
1086                                          card->name);
1087                                 atomic_add(i - 1, &vcc->stats->rx_drop);
1088                                 dev_kfree_skb(sb);
1089                                 break;
1090                         }
1091                         aal0 = (vpi << ATM_HDR_VPI_SHIFT) |
1092                                (vci << ATM_HDR_VCI_SHIFT);
1093                         aal0 |= (stat & SAR_RSQE_EPDU) ? 0x00000002 : 0;
1094                         aal0 |= (stat & SAR_RSQE_CLP)  ? 0x00000001 : 0;
1095
1096                         *((u32 *) sb->data) = aal0;
1097                         skb_put(sb, sizeof(u32));
1098                         memcpy(skb_put(sb, ATM_CELL_PAYLOAD),
1099                                cell, ATM_CELL_PAYLOAD);
1100
1101                         ATM_SKB(sb)->vcc = vcc;
1102                         do_gettimeofday(&sb->stamp);
1103                         vcc->push(vcc, sb);
1104                         atomic_inc(&vcc->stats->rx);
1105
1106                         cell += ATM_CELL_PAYLOAD;
1107                 }
1108
1109                 recycle_rx_skb(card, skb);
1110                 return;
1111         }
1112         if (vcc->qos.aal != ATM_AAL5) {
1113                 printk("%s: Unexpected AAL type in dequeue_rx(): %d.\n",
1114                        card->name, vcc->qos.aal);
1115                 recycle_rx_skb(card, skb);
1116                 return;
1117         }
1118         skb->len = (stat & SAR_RSQE_CELLCNT) * ATM_CELL_PAYLOAD;
1119
1120         rpp = &vc->rcv.rx_pool;
1121
1122         rpp->len += skb->len;
1123         if (!rpp->count++)
1124                 rpp->first = skb;
1125         *rpp->last = skb;
1126         rpp->last = &skb->next;
1127
1128         if (stat & SAR_RSQE_EPDU) {
1129                 unsigned char *l1l2;
1130                 unsigned int len;
1131
1132                 l1l2 = (unsigned char *) ((unsigned long) skb->data + skb->len - 6);
1133
1134                 len = (l1l2[0] << 8) | l1l2[1];
1135                 len = len ? len : 0x10000;
1136
1137                 RXPRINTK("%s: PDU has %d bytes.\n", card->name, len);
1138
1139                 if ((len + 8 > rpp->len) || (len + (47 + 8) < rpp->len)) {
1140                         RXPRINTK("%s: AAL5 PDU size mismatch: %d != %d. "
1141                                  "(CDC: %08x)\n",
1142                                  card->name, len, rpp->len, readl(SAR_REG_CDC));
1143                         recycle_rx_pool_skb(card, rpp);
1144                         atomic_inc(&vcc->stats->rx_err);
1145                         return;
1146                 }
1147                 if (stat & SAR_RSQE_CRC) {
1148                         RXPRINTK("%s: AAL5 CRC error.\n", card->name);
1149                         recycle_rx_pool_skb(card, rpp);
1150                         atomic_inc(&vcc->stats->rx_err);
1151                         return;
1152                 }
1153                 if (rpp->count > 1) {
1154                         struct sk_buff *sb;
1155
1156                         skb = dev_alloc_skb(rpp->len);
1157                         if (!skb) {
1158                                 RXPRINTK("%s: Can't alloc RX skb.\n",
1159                                          card->name);
1160                                 recycle_rx_pool_skb(card, rpp);
1161                                 atomic_inc(&vcc->stats->rx_err);
1162                                 return;
1163                         }
1164                         if (!atm_charge(vcc, skb->truesize)) {
1165                                 recycle_rx_pool_skb(card, rpp);
1166                                 dev_kfree_skb(skb);
1167                                 return;
1168                         }
1169                         sb = rpp->first;
1170                         for (i = 0; i < rpp->count; i++) {
1171                                 memcpy(skb_put(skb, sb->len),
1172                                        sb->data, sb->len);
1173                                 sb = sb->next;
1174                         }
1175
1176                         recycle_rx_pool_skb(card, rpp);
1177
1178                         skb_trim(skb, len);
1179                         ATM_SKB(skb)->vcc = vcc;
1180                         do_gettimeofday(&skb->stamp);
1181
1182                         vcc->push(vcc, skb);
1183                         atomic_inc(&vcc->stats->rx);
1184
1185                         return;
1186                 }
1187
1188                 skb->next = NULL;
1189                 flush_rx_pool(card, rpp);
1190
1191                 if (!atm_charge(vcc, skb->truesize)) {
1192                         recycle_rx_skb(card, skb);
1193                         return;
1194                 }
1195
1196                 pci_unmap_single(card->pcidev, IDT77252_PRV_PADDR(skb),
1197                                  skb->end - skb->data, PCI_DMA_FROMDEVICE);
1198                 sb_pool_remove(card, skb);
1199
1200                 skb_trim(skb, len);
1201                 ATM_SKB(skb)->vcc = vcc;
1202                 do_gettimeofday(&skb->stamp);
1203
1204                 vcc->push(vcc, skb);
1205                 atomic_inc(&vcc->stats->rx);
1206
1207                 if (skb->truesize > SAR_FB_SIZE_3)
1208                         add_rx_skb(card, 3, SAR_FB_SIZE_3, 1);
1209                 else if (skb->truesize > SAR_FB_SIZE_2)
1210                         add_rx_skb(card, 2, SAR_FB_SIZE_2, 1);
1211                 else if (skb->truesize > SAR_FB_SIZE_1)
1212                         add_rx_skb(card, 1, SAR_FB_SIZE_1, 1);
1213                 else
1214                         add_rx_skb(card, 0, SAR_FB_SIZE_0, 1);
1215                 return;
1216         }
1217 }
1218
1219 static void
1220 idt77252_rx(struct idt77252_dev *card)
1221 {
1222         struct rsq_entry *rsqe;
1223
1224         if (card->rsq.next == card->rsq.last)
1225                 rsqe = card->rsq.base;
1226         else
1227                 rsqe = card->rsq.next + 1;
1228
1229         if (!(le32_to_cpu(rsqe->word_4) & SAR_RSQE_VALID)) {
1230                 RXPRINTK("%s: no entry in RSQ.\n", card->name);
1231                 return;
1232         }
1233
1234         do {
1235                 dequeue_rx(card, rsqe);
1236                 rsqe->word_4 = 0;
1237                 card->rsq.next = rsqe;
1238                 if (card->rsq.next == card->rsq.last)
1239                         rsqe = card->rsq.base;
1240                 else
1241                         rsqe = card->rsq.next + 1;
1242         } while (le32_to_cpu(rsqe->word_4) & SAR_RSQE_VALID);
1243
1244         writel((unsigned long) card->rsq.next - (unsigned long) card->rsq.base,
1245                SAR_REG_RSQH);
1246 }
1247
1248 static void
1249 idt77252_rx_raw(struct idt77252_dev *card)
1250 {
1251         struct sk_buff  *queue;
1252         u32             head, tail;
1253         struct atm_vcc  *vcc;
1254         struct vc_map   *vc;
1255         struct sk_buff  *sb;
1256
1257         if (card->raw_cell_head == NULL) {
1258                 u32 handle = le32_to_cpu(*(card->raw_cell_hnd + 1));
1259                 card->raw_cell_head = sb_pool_skb(card, handle);
1260         }
1261
1262         queue = card->raw_cell_head;
1263         if (!queue)
1264                 return;
1265
1266         head = IDT77252_PRV_PADDR(queue) + (queue->data - queue->head - 16);
1267         tail = readl(SAR_REG_RAWCT);
1268
1269         pci_dma_sync_single(card->pcidev, IDT77252_PRV_PADDR(queue),
1270                             queue->end - queue->head - 16, PCI_DMA_FROMDEVICE);
1271
1272         while (head != tail) {
1273                 unsigned int vpi, vci, pti;
1274                 u32 header;
1275
1276                 header = le32_to_cpu(*(u32 *) &queue->data[0]);
1277
1278                 vpi = (header & ATM_HDR_VPI_MASK) >> ATM_HDR_VPI_SHIFT;
1279                 vci = (header & ATM_HDR_VCI_MASK) >> ATM_HDR_VCI_SHIFT;
1280                 pti = (header & ATM_HDR_PTI_MASK) >> ATM_HDR_PTI_SHIFT;
1281
1282 #ifdef CONFIG_ATM_IDT77252_DEBUG
1283                 if (debug & DBG_RAW_CELL) {
1284                         int i;
1285
1286                         printk("%s: raw cell %x.%02x.%04x.%x.%x\n",
1287                                card->name, (header >> 28) & 0x000f,
1288                                (header >> 20) & 0x00ff,
1289                                (header >>  4) & 0xffff,
1290                                (header >>  1) & 0x0007,
1291                                (header >>  0) & 0x0001);
1292                         for (i = 16; i < 64; i++)
1293                                 printk(" %02x", queue->data[i]);
1294                         printk("\n");
1295                 }
1296 #endif
1297
1298                 if (vpi >= (1<<card->vpibits) || vci >= (1<<card->vcibits)) {
1299                         RPRINTK("%s: SDU received for out-of-range vc %u.%u\n",
1300                                 card->name, vpi, vci);
1301                         goto drop;
1302                 }
1303
1304                 vc = card->vcs[VPCI2VC(card, vpi, vci)];
1305                 if (!vc || !test_bit(VCF_RX, &vc->flags)) {
1306                         RPRINTK("%s: SDU received on non RX vc %u.%u\n",
1307                                 card->name, vpi, vci);
1308                         goto drop;
1309                 }
1310
1311                 vcc = vc->rx_vcc;
1312
1313                 if (vcc->qos.aal != ATM_AAL0) {
1314                         RPRINTK("%s: raw cell for non AAL0 vc %u.%u\n",
1315                                 card->name, vpi, vci);
1316                         atomic_inc(&vcc->stats->rx_drop);
1317                         goto drop;
1318                 }
1319
1320                 if ((sb = dev_alloc_skb(64)) == NULL) {
1321                         printk("%s: Can't allocate buffers for AAL0.\n",
1322                                card->name);
1323                         atomic_inc(&vcc->stats->rx_err);
1324                         goto drop;
1325                 }
1326
1327                 if ((vcc->sk != NULL) && !atm_charge(vcc, sb->truesize)) {
1328                         RXPRINTK("%s: atm_charge() dropped AAL0 packets.\n",
1329                                  card->name);
1330                         dev_kfree_skb(sb);
1331                         goto drop;
1332                 }
1333
1334                 *((u32 *) sb->data) = header;
1335                 skb_put(sb, sizeof(u32));
1336                 memcpy(skb_put(sb, ATM_CELL_PAYLOAD), &(queue->data[16]),
1337                        ATM_CELL_PAYLOAD);
1338
1339                 ATM_SKB(sb)->vcc = vcc;
1340                 do_gettimeofday(&sb->stamp);
1341                 vcc->push(vcc, sb);
1342                 atomic_inc(&vcc->stats->rx);
1343
1344 drop:
1345                 skb_pull(queue, 64);
1346
1347                 head = IDT77252_PRV_PADDR(queue)
1348                                         + (queue->data - queue->head - 16);
1349
1350                 if (queue->len < 128) {
1351                         struct sk_buff *next;
1352                         u32 handle;
1353
1354                         head = le32_to_cpu(*(u32 *) &queue->data[0]);
1355                         handle = le32_to_cpu(*(u32 *) &queue->data[4]);
1356
1357                         next = sb_pool_skb(card, handle);
1358                         recycle_rx_skb(card, queue);
1359
1360                         if (next) {
1361                                 card->raw_cell_head = next;
1362                                 queue = card->raw_cell_head;
1363                                 pci_dma_sync_single(card->pcidev,
1364                                                     IDT77252_PRV_PADDR(queue),
1365                                                     queue->end - queue->data,
1366                                                     PCI_DMA_FROMDEVICE);
1367                         } else {
1368                                 card->raw_cell_head = NULL;
1369                                 printk("%s: raw cell queue overrun\n",
1370                                        card->name);
1371                                 break;
1372                         }
1373                 }
1374         }
1375 }
1376
1377
1378 /*****************************************************************************/
1379 /*                                                                           */
1380 /* TSQ Handling                                                              */
1381 /*                                                                           */
1382 /*****************************************************************************/
1383
1384 static int
1385 init_tsq(struct idt77252_dev *card)
1386 {
1387         struct tsq_entry *tsqe;
1388
1389         card->tsq.base = pci_alloc_consistent(card->pcidev, RSQSIZE,
1390                                               &card->tsq.paddr);
1391         if (card->tsq.base == NULL) {
1392                 printk("%s: can't allocate TSQ.\n", card->name);
1393                 return -1;
1394         }
1395         memset(card->tsq.base, 0, TSQSIZE);
1396
1397         card->tsq.last = card->tsq.base + TSQ_NUM_ENTRIES - 1;
1398         card->tsq.next = card->tsq.last;
1399         for (tsqe = card->tsq.base; tsqe <= card->tsq.last; tsqe++)
1400                 tsqe->word_2 = cpu_to_le32(SAR_TSQE_INVALID);
1401
1402         writel(card->tsq.paddr, SAR_REG_TSQB);
1403         writel((unsigned long) card->tsq.next - (unsigned long) card->tsq.base,
1404                SAR_REG_TSQH);
1405
1406         return 0;
1407 }
1408
1409 static void
1410 deinit_tsq(struct idt77252_dev *card)
1411 {
1412         pci_free_consistent(card->pcidev, TSQSIZE,
1413                             card->tsq.base, card->tsq.paddr);
1414 }
1415
1416 static void
1417 idt77252_tx(struct idt77252_dev *card)
1418 {
1419         struct tsq_entry *tsqe;
1420         unsigned int vpi, vci;
1421         struct vc_map *vc;
1422         u32 conn, stat;
1423
1424         if (card->tsq.next == card->tsq.last)
1425                 tsqe = card->tsq.base;
1426         else
1427                 tsqe = card->tsq.next + 1;
1428
1429         TXPRINTK("idt77252_tx: tsq  %p: base %p, next %p, last %p\n", tsqe,
1430                  card->tsq.base, card->tsq.next, card->tsq.last);
1431         TXPRINTK("idt77252_tx: tsqb %08x, tsqt %08x, tsqh %08x, \n",
1432                  readl(SAR_REG_TSQB),
1433                  readl(SAR_REG_TSQT),
1434                  readl(SAR_REG_TSQH));
1435
1436         stat = le32_to_cpu(tsqe->word_2);
1437
1438         if (stat & SAR_TSQE_INVALID)
1439                 return;
1440
1441         do {
1442                 TXPRINTK("tsqe: 0x%p [0x%08x 0x%08x]\n", tsqe,
1443                          le32_to_cpu(tsqe->word_1),
1444                          le32_to_cpu(tsqe->word_2));
1445
1446                 switch (stat & SAR_TSQE_TYPE) {
1447                 case SAR_TSQE_TYPE_TIMER:
1448                         TXPRINTK("%s: Timer RollOver detected.\n", card->name);
1449                         break;
1450
1451                 case SAR_TSQE_TYPE_IDLE:
1452
1453                         conn = le32_to_cpu(tsqe->word_1);
1454
1455                         if (SAR_TSQE_TAG(stat) == 0x10) {
1456 #ifdef  NOTDEF
1457                                 printk("%s: Connection %d halted.\n",
1458                                        card->name,
1459                                        le32_to_cpu(tsqe->word_1) & 0x1fff);
1460 #endif
1461                                 break;
1462                         }
1463
1464                         vc = card->vcs[conn & 0x1fff];
1465                         if (!vc) {
1466                                 printk("%s: could not find VC from conn %d\n",
1467                                        card->name, conn & 0x1fff);
1468                                 break;
1469                         }
1470
1471                         printk("%s: Connection %d IDLE.\n",
1472                                card->name, vc->index);
1473
1474                         set_bit(VCF_IDLE, &vc->flags);
1475                         break;
1476
1477                 case SAR_TSQE_TYPE_TSR:
1478
1479                         conn = le32_to_cpu(tsqe->word_1);
1480
1481                         vc = card->vcs[conn & 0x1fff];
1482                         if (!vc) {
1483                                 printk("%s: no VC at index %d\n",
1484                                        card->name,
1485                                        le32_to_cpu(tsqe->word_1) & 0x1fff);
1486                                 break;
1487                         }
1488
1489                         drain_scq(card, vc);
1490                         break;
1491
1492                 case SAR_TSQE_TYPE_TBD_COMP:
1493
1494                         conn = le32_to_cpu(tsqe->word_1);
1495
1496                         vpi = (conn >> SAR_TBD_VPI_SHIFT) & 0x00ff;
1497                         vci = (conn >> SAR_TBD_VCI_SHIFT) & 0xffff;
1498
1499                         if (vpi >= (1 << card->vpibits) ||
1500                             vci >= (1 << card->vcibits)) {
1501                                 printk("%s: TBD complete: "
1502                                        "out of range VPI.VCI %u.%u\n",
1503                                        card->name, vpi, vci);
1504                                 break;
1505                         }
1506
1507                         vc = card->vcs[VPCI2VC(card, vpi, vci)];
1508                         if (!vc) {
1509                                 printk("%s: TBD complete: "
1510                                        "no VC at VPI.VCI %u.%u\n",
1511                                        card->name, vpi, vci);
1512                                 break;
1513                         }
1514
1515                         drain_scq(card, vc);
1516                         break;
1517                 }
1518
1519                 tsqe->word_2 = cpu_to_le32(SAR_TSQE_INVALID);
1520
1521                 card->tsq.next = tsqe;
1522                 if (card->tsq.next == card->tsq.last)
1523                         tsqe = card->tsq.base;
1524                 else
1525                         tsqe = card->tsq.next + 1;
1526
1527                 TXPRINTK("tsqe: %p: base %p, next %p, last %p\n", tsqe,
1528                          card->tsq.base, card->tsq.next, card->tsq.last);
1529
1530                 stat = le32_to_cpu(tsqe->word_2);
1531
1532         } while (!(stat & SAR_TSQE_INVALID));
1533
1534         writel((unsigned long)card->tsq.next - (unsigned long)card->tsq.base,
1535                SAR_REG_TSQH);
1536
1537         XPRINTK("idt77252_tx-after writel%d: TSQ head = 0x%x, tail = 0x%x, next = 0x%p.\n",
1538                 card->index, readl(SAR_REG_TSQH),
1539                 readl(SAR_REG_TSQT), card->tsq.next);
1540 }
1541
1542
1543 static void
1544 tst_timer(unsigned long data)
1545 {
1546         struct idt77252_dev *card = (struct idt77252_dev *)data;
1547         unsigned long base, idle, jump;
1548         unsigned long flags;
1549         u32 pc;
1550         int e;
1551
1552         spin_lock_irqsave(&card->tst_lock, flags);
1553
1554         base = card->tst[card->tst_index];
1555         idle = card->tst[card->tst_index ^ 1];
1556
1557         if (test_bit(TST_SWITCH_WAIT, &card->tst_state)) {
1558                 jump = base + card->tst_size - 2;
1559
1560                 pc = readl(SAR_REG_NOW) >> 2;
1561                 if ((pc ^ idle) & ~(card->tst_size - 1)) {
1562                         mod_timer(&card->tst_timer, jiffies + 1);
1563                         goto out;
1564                 }
1565
1566                 clear_bit(TST_SWITCH_WAIT, &card->tst_state);
1567
1568                 card->tst_index ^= 1;
1569                 write_sram(card, jump, TSTE_OPC_JMP | (base << 2));
1570
1571                 base = card->tst[card->tst_index];
1572                 idle = card->tst[card->tst_index ^ 1];
1573
1574                 for (e = 0; e < card->tst_size - 2; e++) {
1575                         if (card->soft_tst[e].tste & TSTE_PUSH_IDLE) {
1576                                 write_sram(card, idle + e,
1577                                            card->soft_tst[e].tste & TSTE_MASK);
1578                                 card->soft_tst[e].tste &= ~(TSTE_PUSH_IDLE);
1579                         }
1580                 }
1581         }
1582
1583         if (test_and_clear_bit(TST_SWITCH_PENDING, &card->tst_state)) {
1584
1585                 for (e = 0; e < card->tst_size - 2; e++) {
1586                         if (card->soft_tst[e].tste & TSTE_PUSH_ACTIVE) {
1587                                 write_sram(card, idle + e,
1588                                            card->soft_tst[e].tste & TSTE_MASK);
1589                                 card->soft_tst[e].tste &= ~(TSTE_PUSH_ACTIVE);
1590                                 card->soft_tst[e].tste |= TSTE_PUSH_IDLE;
1591                         }
1592                 }
1593
1594                 jump = base + card->tst_size - 2;
1595
1596                 write_sram(card, jump, TSTE_OPC_NULL);
1597                 set_bit(TST_SWITCH_WAIT, &card->tst_state);
1598
1599                 mod_timer(&card->tst_timer, jiffies + 1);
1600         }
1601
1602 out:
1603         spin_unlock_irqrestore(&card->tst_lock, flags);
1604 }
1605
1606 static int
1607 __fill_tst(struct idt77252_dev *card, struct vc_map *vc,
1608            int n, unsigned int opc)
1609 {
1610         unsigned long cl, avail;
1611         unsigned long idle;
1612         int e, r;
1613         u32 data;
1614
1615         avail = card->tst_size - 2;
1616         for (e = 0; e < avail; e++) {
1617                 if (card->soft_tst[e].vc == NULL)
1618                         break;
1619         }
1620         if (e >= avail) {
1621                 printk("%s: No free TST entries found\n", card->name);
1622                 return -1;
1623         }
1624
1625         NPRINTK("%s: conn %d: first TST entry at %d.\n",
1626                 card->name, vc ? vc->index : -1, e);
1627
1628         r = n;
1629         cl = avail;
1630         data = opc & TSTE_OPC_MASK;
1631         if (vc && (opc != TSTE_OPC_NULL))
1632                 data = opc | vc->index;
1633
1634         idle = card->tst[card->tst_index ^ 1];
1635
1636         /*
1637          * Fill Soft TST.
1638          */
1639         while (r > 0) {
1640                 if ((cl >= avail) && (card->soft_tst[e].vc == NULL)) {
1641                         if (vc)
1642                                 card->soft_tst[e].vc = vc;
1643                         else
1644                                 card->soft_tst[e].vc = (void *)-1;
1645
1646                         card->soft_tst[e].tste = data;
1647                         if (timer_pending(&card->tst_timer))
1648                                 card->soft_tst[e].tste |= TSTE_PUSH_ACTIVE;
1649                         else {
1650                                 write_sram(card, idle + e, data);
1651                                 card->soft_tst[e].tste |= TSTE_PUSH_IDLE;
1652                         }
1653
1654                         cl -= card->tst_size;
1655                         r--;
1656                 }
1657
1658                 if (++e == avail)
1659                         e = 0;
1660                 cl += n;
1661         }
1662
1663         return 0;
1664 }
1665
1666 static int
1667 fill_tst(struct idt77252_dev *card, struct vc_map *vc, int n, unsigned int opc)
1668 {
1669         unsigned long flags;
1670         int res;
1671
1672         spin_lock_irqsave(&card->tst_lock, flags);
1673
1674         res = __fill_tst(card, vc, n, opc);
1675
1676         set_bit(TST_SWITCH_PENDING, &card->tst_state);
1677         if (!timer_pending(&card->tst_timer))
1678                 mod_timer(&card->tst_timer, jiffies + 1);
1679
1680         spin_unlock_irqrestore(&card->tst_lock, flags);
1681         return res;
1682 }
1683
1684 static int
1685 __clear_tst(struct idt77252_dev *card, struct vc_map *vc)
1686 {
1687         unsigned long idle;
1688         int e;
1689
1690         idle = card->tst[card->tst_index ^ 1];
1691
1692         for (e = 0; e < card->tst_size - 2; e++) {
1693                 if (card->soft_tst[e].vc == vc) {
1694                         card->soft_tst[e].vc = NULL;
1695
1696                         card->soft_tst[e].tste = TSTE_OPC_VAR;
1697                         if (timer_pending(&card->tst_timer))
1698                                 card->soft_tst[e].tste |= TSTE_PUSH_ACTIVE;
1699                         else {
1700                                 write_sram(card, idle + e, TSTE_OPC_VAR);
1701                                 card->soft_tst[e].tste |= TSTE_PUSH_IDLE;
1702                         }
1703                 }
1704         }
1705
1706         return 0;
1707 }
1708
1709 static int
1710 clear_tst(struct idt77252_dev *card, struct vc_map *vc)
1711 {
1712         unsigned long flags;
1713         int res;
1714
1715         spin_lock_irqsave(&card->tst_lock, flags);
1716
1717         res = __clear_tst(card, vc);
1718
1719         set_bit(TST_SWITCH_PENDING, &card->tst_state);
1720         if (!timer_pending(&card->tst_timer))
1721                 mod_timer(&card->tst_timer, jiffies + 1);
1722
1723         spin_unlock_irqrestore(&card->tst_lock, flags);
1724         return res;
1725 }
1726
1727 static int
1728 change_tst(struct idt77252_dev *card, struct vc_map *vc,
1729            int n, unsigned int opc)
1730 {
1731         unsigned long flags;
1732         int res;
1733
1734         spin_lock_irqsave(&card->tst_lock, flags);
1735
1736         __clear_tst(card, vc);
1737         res = __fill_tst(card, vc, n, opc);
1738
1739         set_bit(TST_SWITCH_PENDING, &card->tst_state);
1740         if (!timer_pending(&card->tst_timer))
1741                 mod_timer(&card->tst_timer, jiffies + 1);
1742
1743         spin_unlock_irqrestore(&card->tst_lock, flags);
1744         return res;
1745 }
1746
1747
1748 static int
1749 set_tct(struct idt77252_dev *card, struct vc_map *vc)
1750 {
1751         unsigned long tct;
1752
1753         tct = (unsigned long) (card->tct_base + vc->index * SAR_SRAM_TCT_SIZE);
1754
1755         switch (vc->class) {
1756         case SCHED_CBR:
1757                 OPRINTK("%s: writing TCT at 0x%lx, SCD 0x%lx.\n",
1758                         card->name, tct, vc->scq->scd);
1759
1760                 write_sram(card, tct + 0, TCT_CBR | vc->scq->scd);
1761                 write_sram(card, tct + 1, 0);
1762                 write_sram(card, tct + 2, 0);
1763                 write_sram(card, tct + 3, 0);
1764                 write_sram(card, tct + 4, 0);
1765                 write_sram(card, tct + 5, 0);
1766                 write_sram(card, tct + 6, 0);
1767                 write_sram(card, tct + 7, 0);
1768                 break;
1769
1770         case SCHED_UBR:
1771                 OPRINTK("%s: writing TCT at 0x%lx, SCD 0x%lx.\n",
1772                         card->name, tct, vc->scq->scd);
1773
1774                 write_sram(card, tct + 0, TCT_UBR | vc->scq->scd);
1775                 write_sram(card, tct + 1, 0);
1776                 write_sram(card, tct + 2, TCT_TSIF);
1777                 write_sram(card, tct + 3, TCT_HALT | TCT_IDLE);
1778                 write_sram(card, tct + 4, 0);
1779                 write_sram(card, tct + 5, vc->init_er);
1780                 write_sram(card, tct + 6, 0);
1781                 write_sram(card, tct + 7, TCT_FLAG_UBR);
1782                 break;
1783
1784         case SCHED_VBR:
1785         case SCHED_ABR:
1786         default:
1787                 return -ENOSYS;
1788         }
1789
1790         return 0;
1791 }
1792
1793 /*****************************************************************************/
1794 /*                                                                           */
1795 /* FBQ Handling                                                              */
1796 /*                                                                           */
1797 /*****************************************************************************/
1798
1799 static __inline__ int
1800 idt77252_fbq_level(struct idt77252_dev *card, int queue)
1801 {
1802         return (readl(SAR_REG_STAT) >> (16 + (queue << 2))) & 0x0f;
1803 }
1804
1805 static __inline__ int
1806 idt77252_fbq_full(struct idt77252_dev *card, int queue)
1807 {
1808         return (readl(SAR_REG_STAT) >> (16 + (queue << 2))) == 0x0f;
1809 }
1810
1811 static int
1812 push_rx_skb(struct idt77252_dev *card, struct sk_buff *skb, int queue)
1813 {
1814         unsigned long flags;
1815         u32 handle;
1816         u32 addr;
1817
1818         skb->data = skb->tail = skb->head;
1819         skb->len = 0;
1820
1821         skb_reserve(skb, 16);
1822
1823         switch (queue) {
1824         case 0:
1825                 skb_put(skb, SAR_FB_SIZE_0);
1826                 break;
1827         case 1:
1828                 skb_put(skb, SAR_FB_SIZE_1);
1829                 break;
1830         case 2:
1831                 skb_put(skb, SAR_FB_SIZE_2);
1832                 break;
1833         case 3:
1834                 skb_put(skb, SAR_FB_SIZE_3);
1835                 break;
1836         default:
1837                 dev_kfree_skb(skb);
1838                 return -1;
1839         }
1840
1841         if (idt77252_fbq_full(card, queue))
1842                 return -1;
1843
1844         memset(&skb->data[(skb->len & ~(0x3f)) - 64], 0, 2 * sizeof(u32));
1845
1846         handle = IDT77252_PRV_POOL(skb);
1847         addr = IDT77252_PRV_PADDR(skb);
1848
1849         spin_lock_irqsave(&card->cmd_lock, flags);
1850         writel(handle, card->fbq[queue]);
1851         writel(addr, card->fbq[queue]);
1852         spin_unlock_irqrestore(&card->cmd_lock, flags);
1853
1854         return 0;
1855 }
1856
1857 static void
1858 add_rx_skb(struct idt77252_dev *card, int queue,
1859            unsigned int size, unsigned int count)
1860 {
1861         struct sk_buff *skb;
1862         dma_addr_t paddr;
1863         u32 handle;
1864
1865         while (count--) {
1866                 skb = dev_alloc_skb(size);
1867                 if (!skb)
1868                         return;
1869
1870                 if (sb_pool_add(card, skb, queue)) {
1871                         printk("%s: SB POOL full\n", __FUNCTION__);
1872                         goto outfree;
1873                 }
1874
1875                 paddr = pci_map_single(card->pcidev, skb->data,
1876                                        skb->end - skb->data,
1877                                        PCI_DMA_FROMDEVICE);
1878                 IDT77252_PRV_PADDR(skb) = paddr;
1879
1880                 if (push_rx_skb(card, skb, queue)) {
1881                         printk("%s: FB QUEUE full\n", __FUNCTION__);
1882                         goto outunmap;
1883                 }
1884         }
1885
1886         return;
1887
1888 outunmap:
1889         pci_unmap_single(card->pcidev, IDT77252_PRV_PADDR(skb),
1890                          skb->end - skb->data, PCI_DMA_FROMDEVICE);
1891
1892         handle = IDT77252_PRV_POOL(skb);
1893         card->sbpool[POOL_QUEUE(handle)].skb[POOL_INDEX(handle)] = NULL;
1894
1895 outfree:
1896         dev_kfree_skb(skb);
1897 }
1898
1899
1900 static void
1901 recycle_rx_skb(struct idt77252_dev *card, struct sk_buff *skb)
1902 {
1903         u32 handle = IDT77252_PRV_POOL(skb);
1904         int err;
1905
1906         pci_dma_sync_single_for_device(card->pcidev, IDT77252_PRV_PADDR(skb),
1907                                        skb->end - skb->data, PCI_DMA_FROMDEVICE);
1908
1909         err = push_rx_skb(card, skb, POOL_QUEUE(handle));
1910         if (err) {
1911                 pci_unmap_single(card->pcidev, IDT77252_PRV_PADDR(skb),
1912                                  skb->end - skb->data, PCI_DMA_FROMDEVICE);
1913                 sb_pool_remove(card, skb);
1914                 dev_kfree_skb(skb);
1915         }
1916 }
1917
1918 static void
1919 flush_rx_pool(struct idt77252_dev *card, struct rx_pool *rpp)
1920 {
1921         rpp->len = 0;
1922         rpp->count = 0;
1923         rpp->first = NULL;
1924         rpp->last = &rpp->first;
1925 }
1926
1927 static void
1928 recycle_rx_pool_skb(struct idt77252_dev *card, struct rx_pool *rpp)
1929 {
1930         struct sk_buff *skb, *next;
1931         int i;
1932
1933         skb = rpp->first;
1934         for (i = 0; i < rpp->count; i++) {
1935                 next = skb->next;
1936                 skb->next = NULL;
1937                 recycle_rx_skb(card, skb);
1938                 skb = next;
1939         }
1940         flush_rx_pool(card, rpp);
1941 }
1942
1943 /*****************************************************************************/
1944 /*                                                                           */
1945 /* ATM Interface                                                             */
1946 /*                                                                           */
1947 /*****************************************************************************/
1948
1949 static void
1950 idt77252_phy_put(struct atm_dev *dev, unsigned char value, unsigned long addr)
1951 {
1952         write_utility(dev->dev_data, 0x100 + (addr & 0x1ff), value);
1953 }
1954
1955 static unsigned char
1956 idt77252_phy_get(struct atm_dev *dev, unsigned long addr)
1957 {
1958         return read_utility(dev->dev_data, 0x100 + (addr & 0x1ff));
1959 }
1960
1961 static inline int
1962 idt77252_send_skb(struct atm_vcc *vcc, struct sk_buff *skb, int oam)
1963 {
1964         struct atm_dev *dev = vcc->dev;
1965         struct idt77252_dev *card = dev->dev_data;
1966         struct vc_map *vc = vcc->dev_data;
1967         int err;
1968
1969         if (vc == NULL) {
1970                 printk("%s: NULL connection in send().\n", card->name);
1971                 atomic_inc(&vcc->stats->tx_err);
1972                 dev_kfree_skb(skb);
1973                 return -EINVAL;
1974         }
1975         if (!test_bit(VCF_TX, &vc->flags)) {
1976                 printk("%s: Trying to transmit on a non-tx VC.\n", card->name);
1977                 atomic_inc(&vcc->stats->tx_err);
1978                 dev_kfree_skb(skb);
1979                 return -EINVAL;
1980         }
1981
1982         switch (vcc->qos.aal) {
1983         case ATM_AAL0:
1984         case ATM_AAL1:
1985         case ATM_AAL5:
1986                 break;
1987         default:
1988                 printk("%s: Unsupported AAL: %d\n", card->name, vcc->qos.aal);
1989                 atomic_inc(&vcc->stats->tx_err);
1990                 dev_kfree_skb(skb);
1991                 return -EINVAL;
1992         }
1993
1994         if (skb_shinfo(skb)->nr_frags != 0) {
1995                 printk("%s: No scatter-gather yet.\n", card->name);
1996                 atomic_inc(&vcc->stats->tx_err);
1997                 dev_kfree_skb(skb);
1998                 return -EINVAL;
1999         }
2000         ATM_SKB(skb)->vcc = vcc;
2001
2002         err = queue_skb(card, vc, skb, oam);
2003         if (err) {
2004                 atomic_inc(&vcc->stats->tx_err);
2005                 dev_kfree_skb(skb);
2006                 return err;
2007         }
2008
2009         return 0;
2010 }
2011
2012 int
2013 idt77252_send(struct atm_vcc *vcc, struct sk_buff *skb)
2014 {
2015         return idt77252_send_skb(vcc, skb, 0);
2016 }
2017
2018 static int
2019 idt77252_send_oam(struct atm_vcc *vcc, void *cell, int flags)
2020 {
2021         struct atm_dev *dev = vcc->dev;
2022         struct idt77252_dev *card = dev->dev_data;
2023         struct sk_buff *skb;
2024
2025         skb = dev_alloc_skb(64);
2026         if (!skb) {
2027                 printk("%s: Out of memory in send_oam().\n", card->name);
2028                 atomic_inc(&vcc->stats->tx_err);
2029                 return -ENOMEM;
2030         }
2031         atomic_add(skb->truesize, &vcc->sk->sk_wmem_alloc);
2032
2033         memcpy(skb_put(skb, 52), cell, 52);
2034
2035         return idt77252_send_skb(vcc, skb, 1);
2036 }
2037
2038 static __inline__ unsigned int
2039 idt77252_fls(unsigned int x)
2040 {
2041         int r = 1;
2042
2043         if (x == 0)
2044                 return 0;
2045         if (x & 0xffff0000) {
2046                 x >>= 16;
2047                 r += 16;
2048         }
2049         if (x & 0xff00) {
2050                 x >>= 8;
2051                 r += 8;
2052         }
2053         if (x & 0xf0) {
2054                 x >>= 4;
2055                 r += 4;
2056         }
2057         if (x & 0xc) {
2058                 x >>= 2;
2059                 r += 2;
2060         }
2061         if (x & 0x2)
2062                 r += 1;
2063         return r;
2064 }
2065
2066 static u16
2067 idt77252_int_to_atmfp(unsigned int rate)
2068 {
2069         u16 m, e;
2070
2071         if (rate == 0)
2072                 return 0;
2073         e = idt77252_fls(rate) - 1;
2074         if (e < 9)
2075                 m = (rate - (1 << e)) << (9 - e);
2076         else if (e == 9)
2077                 m = (rate - (1 << e));
2078         else /* e > 9 */
2079                 m = (rate - (1 << e)) >> (e - 9);
2080         return 0x4000 | (e << 9) | m;
2081 }
2082
2083 static u8
2084 idt77252_rate_logindex(struct idt77252_dev *card, int pcr)
2085 {
2086         u16 afp;
2087
2088         afp = idt77252_int_to_atmfp(pcr < 0 ? -pcr : pcr);
2089         if (pcr < 0)
2090                 return rate_to_log[(afp >> 5) & 0x1ff];
2091         return rate_to_log[((afp >> 5) + 1) & 0x1ff];
2092 }
2093
2094 static void
2095 idt77252_est_timer(unsigned long data)
2096 {
2097         struct vc_map *vc = (struct vc_map *)data;
2098         struct idt77252_dev *card = vc->card;
2099         struct rate_estimator *est;
2100         unsigned long flags;
2101         u32 rate, cps;
2102         u64 ncells;
2103         u8 lacr;
2104
2105         spin_lock_irqsave(&vc->lock, flags);
2106         est = vc->estimator;
2107         if (!est)
2108                 goto out;
2109
2110         ncells = est->cells;
2111
2112         rate = ((u32)(ncells - est->last_cells)) << (7 - est->interval);
2113         est->last_cells = ncells;
2114         est->avcps += ((long)rate - (long)est->avcps) >> est->ewma_log;
2115         est->cps = (est->avcps + 0x1f) >> 5;
2116
2117         cps = est->cps;
2118         if (cps < (est->maxcps >> 4))
2119                 cps = est->maxcps >> 4;
2120
2121         lacr = idt77252_rate_logindex(card, cps);
2122         if (lacr > vc->max_er)
2123                 lacr = vc->max_er;
2124
2125         if (lacr != vc->lacr) {
2126                 vc->lacr = lacr;
2127                 writel(TCMDQ_LACR|(vc->lacr << 16)|vc->index, SAR_REG_TCMDQ);
2128         }
2129
2130         est->timer.expires = jiffies + ((HZ / 4) << est->interval);
2131         add_timer(&est->timer);
2132
2133 out:
2134         spin_unlock_irqrestore(&vc->lock, flags);
2135 }
2136
2137 static struct rate_estimator *
2138 idt77252_init_est(struct vc_map *vc, int pcr)
2139 {
2140         struct rate_estimator *est;
2141
2142         est = kmalloc(sizeof(struct rate_estimator), GFP_KERNEL);
2143         if (!est)
2144                 return NULL;
2145         memset(est, 0, sizeof(*est));
2146
2147         est->maxcps = pcr < 0 ? -pcr : pcr;
2148         est->cps = est->maxcps;
2149         est->avcps = est->cps << 5;
2150
2151         est->interval = 2;              /* XXX: make this configurable */
2152         est->ewma_log = 2;              /* XXX: make this configurable */
2153         init_timer(&est->timer);
2154         est->timer.data = (unsigned long)vc;
2155         est->timer.function = idt77252_est_timer;
2156
2157         est->timer.expires = jiffies + ((HZ / 4) << est->interval);
2158         add_timer(&est->timer);
2159
2160         return est;
2161 }
2162
2163 static int
2164 idt77252_init_cbr(struct idt77252_dev *card, struct vc_map *vc,
2165                   struct atm_vcc *vcc, struct atm_qos *qos)
2166 {
2167         int tst_free, tst_used, tst_entries;
2168         unsigned long tmpl, modl;
2169         int tcr, tcra;
2170
2171         if ((qos->txtp.max_pcr == 0) &&
2172             (qos->txtp.pcr == 0) && (qos->txtp.min_pcr == 0)) {
2173                 printk("%s: trying to open a CBR VC with cell rate = 0\n",
2174                        card->name);
2175                 return -EINVAL;
2176         }
2177
2178         tst_used = 0;
2179         tst_free = card->tst_free;
2180         if (test_bit(VCF_TX, &vc->flags))
2181                 tst_used = vc->ntste;
2182         tst_free += tst_used;
2183
2184         tcr = atm_pcr_goal(&qos->txtp);
2185         tcra = tcr >= 0 ? tcr : -tcr;
2186
2187         TXPRINTK("%s: CBR target cell rate = %d\n", card->name, tcra);
2188
2189         tmpl = (unsigned long) tcra * ((unsigned long) card->tst_size - 2);
2190         modl = tmpl % (unsigned long)card->utopia_pcr;
2191
2192         tst_entries = (int) (tmpl / card->utopia_pcr);
2193         if (tcr > 0) {
2194                 if (modl > 0)
2195                         tst_entries++;
2196         } else if (tcr == 0) {
2197                 tst_entries = tst_free - SAR_TST_RESERVED;
2198                 if (tst_entries <= 0) {
2199                         printk("%s: no CBR bandwidth free.\n", card->name);
2200                         return -ENOSR;
2201                 }
2202         }
2203
2204         if (tst_entries == 0) {
2205                 printk("%s: selected CBR bandwidth < granularity.\n",
2206                        card->name);
2207                 return -EINVAL;
2208         }
2209
2210         if (tst_entries > (tst_free - SAR_TST_RESERVED)) {
2211                 printk("%s: not enough CBR bandwidth free.\n", card->name);
2212                 return -ENOSR;
2213         }
2214
2215         vc->ntste = tst_entries;
2216
2217         card->tst_free = tst_free - tst_entries;
2218         if (test_bit(VCF_TX, &vc->flags)) {
2219                 if (tst_used == tst_entries)
2220                         return 0;
2221
2222                 OPRINTK("%s: modify %d -> %d entries in TST.\n",
2223                         card->name, tst_used, tst_entries);
2224                 change_tst(card, vc, tst_entries, TSTE_OPC_CBR);
2225                 return 0;
2226         }
2227
2228         OPRINTK("%s: setting %d entries in TST.\n", card->name, tst_entries);
2229         fill_tst(card, vc, tst_entries, TSTE_OPC_CBR);
2230         return 0;
2231 }
2232
2233 static int
2234 idt77252_init_ubr(struct idt77252_dev *card, struct vc_map *vc,
2235                   struct atm_vcc *vcc, struct atm_qos *qos)
2236 {
2237         unsigned long flags;
2238         int tcr;
2239
2240         spin_lock_irqsave(&vc->lock, flags);
2241         if (vc->estimator) {
2242                 del_timer(&vc->estimator->timer);
2243                 kfree(vc->estimator);
2244                 vc->estimator = NULL;
2245         }
2246         spin_unlock_irqrestore(&vc->lock, flags);
2247
2248         tcr = atm_pcr_goal(&qos->txtp);
2249         if (tcr == 0)
2250                 tcr = card->link_pcr;
2251
2252         vc->estimator = idt77252_init_est(vc, tcr);
2253
2254         vc->class = SCHED_UBR;
2255         vc->init_er = idt77252_rate_logindex(card, tcr);
2256         vc->lacr = vc->init_er;
2257         if (tcr < 0)
2258                 vc->max_er = vc->init_er;
2259         else
2260                 vc->max_er = 0xff;
2261
2262         return 0;
2263 }
2264
2265 static int
2266 idt77252_init_tx(struct idt77252_dev *card, struct vc_map *vc,
2267                  struct atm_vcc *vcc, struct atm_qos *qos)
2268 {
2269         int error;
2270
2271         if (test_bit(VCF_TX, &vc->flags))
2272                 return -EBUSY;
2273
2274         switch (qos->txtp.traffic_class) {
2275                 case ATM_CBR:
2276                         vc->class = SCHED_CBR;
2277                         break;
2278
2279                 case ATM_UBR:
2280                         vc->class = SCHED_UBR;
2281                         break;
2282
2283                 case ATM_VBR:
2284                 case ATM_ABR:
2285                 default:
2286                         return -EPROTONOSUPPORT;
2287         }
2288
2289         vc->scq = alloc_scq(card, vc->class);
2290         if (!vc->scq) {
2291                 printk("%s: can't get SCQ.\n", card->name);
2292                 return -ENOMEM;
2293         }
2294
2295         vc->scq->scd = get_free_scd(card, vc);
2296         if (vc->scq->scd == 0) {
2297                 printk("%s: no SCD available.\n", card->name);
2298                 free_scq(card, vc->scq);
2299                 return -ENOMEM;
2300         }
2301
2302         fill_scd(card, vc->scq, vc->class);
2303
2304         if (set_tct(card, vc)) {
2305                 printk("%s: class %d not supported.\n",
2306                        card->name, qos->txtp.traffic_class);
2307
2308                 card->scd2vc[vc->scd_index] = NULL;
2309                 free_scq(card, vc->scq);
2310                 return -EPROTONOSUPPORT;
2311         }
2312
2313         switch (vc->class) {
2314                 case SCHED_CBR:
2315                         error = idt77252_init_cbr(card, vc, vcc, qos);
2316                         if (error) {
2317                                 card->scd2vc[vc->scd_index] = NULL;
2318                                 free_scq(card, vc->scq);
2319                                 return error;
2320                         }
2321
2322                         clear_bit(VCF_IDLE, &vc->flags);
2323                         writel(TCMDQ_START | vc->index, SAR_REG_TCMDQ);
2324                         break;
2325
2326                 case SCHED_UBR:
2327                         error = idt77252_init_ubr(card, vc, vcc, qos);
2328                         if (error) {
2329                                 card->scd2vc[vc->scd_index] = NULL;
2330                                 free_scq(card, vc->scq);
2331                                 return error;
2332                         }
2333
2334                         set_bit(VCF_IDLE, &vc->flags);
2335                         break;
2336         }
2337
2338         vc->tx_vcc = vcc;
2339         set_bit(VCF_TX, &vc->flags);
2340         return 0;
2341 }
2342
2343 static int
2344 idt77252_init_rx(struct idt77252_dev *card, struct vc_map *vc,
2345                  struct atm_vcc *vcc, struct atm_qos *qos)
2346 {
2347         unsigned long flags;
2348         unsigned long addr;
2349         u32 rcte = 0;
2350
2351         if (test_bit(VCF_RX, &vc->flags))
2352                 return -EBUSY;
2353
2354         vc->rx_vcc = vcc;
2355         set_bit(VCF_RX, &vc->flags);
2356
2357         if ((vcc->vci == 3) || (vcc->vci == 4))
2358                 return 0;
2359
2360         flush_rx_pool(card, &vc->rcv.rx_pool);
2361
2362         rcte |= SAR_RCTE_CONNECTOPEN;
2363         rcte |= SAR_RCTE_RAWCELLINTEN;
2364
2365         switch (qos->aal) {
2366                 case ATM_AAL0:
2367                         rcte |= SAR_RCTE_RCQ;
2368                         break;
2369                 case ATM_AAL1:
2370                         rcte |= SAR_RCTE_OAM; /* Let SAR drop Video */
2371                         break;
2372                 case ATM_AAL34:
2373                         rcte |= SAR_RCTE_AAL34;
2374                         break;
2375                 case ATM_AAL5:
2376                         rcte |= SAR_RCTE_AAL5;
2377                         break;
2378                 default:
2379                         rcte |= SAR_RCTE_RCQ;
2380                         break;
2381         }
2382
2383         if (qos->aal != ATM_AAL5)
2384                 rcte |= SAR_RCTE_FBP_1;
2385         else if (qos->rxtp.max_sdu > SAR_FB_SIZE_2)
2386                 rcte |= SAR_RCTE_FBP_3;
2387         else if (qos->rxtp.max_sdu > SAR_FB_SIZE_1)
2388                 rcte |= SAR_RCTE_FBP_2;
2389         else if (qos->rxtp.max_sdu > SAR_FB_SIZE_0)
2390                 rcte |= SAR_RCTE_FBP_1;
2391         else
2392                 rcte |= SAR_RCTE_FBP_01;
2393
2394         addr = card->rct_base + (vc->index << 2);
2395
2396         OPRINTK("%s: writing RCT at 0x%lx\n", card->name, addr);
2397         write_sram(card, addr, rcte);
2398
2399         spin_lock_irqsave(&card->cmd_lock, flags);
2400         writel(SAR_CMD_OPEN_CONNECTION | (addr << 2), SAR_REG_CMD);
2401         waitfor_idle(card);
2402         spin_unlock_irqrestore(&card->cmd_lock, flags);
2403
2404         return 0;
2405 }
2406
2407 static int
2408 idt77252_open(struct atm_vcc *vcc)
2409 {
2410         struct atm_dev *dev = vcc->dev;
2411         struct idt77252_dev *card = dev->dev_data;
2412         struct vc_map *vc;
2413         unsigned int index;
2414         unsigned int inuse;
2415         int error;
2416         int vci = vcc->vci;
2417         short vpi = vcc->vpi;
2418
2419         if (vpi == ATM_VPI_UNSPEC || vci == ATM_VCI_UNSPEC)
2420                 return 0;
2421
2422         if (vpi >= (1 << card->vpibits)) {
2423                 printk("%s: unsupported VPI: %d\n", card->name, vpi);
2424                 return -EINVAL;
2425         }
2426
2427         if (vci >= (1 << card->vcibits)) {
2428                 printk("%s: unsupported VCI: %d\n", card->name, vci);
2429                 return -EINVAL;
2430         }
2431
2432         set_bit(ATM_VF_ADDR, &vcc->flags);
2433
2434         down(&card->mutex);
2435
2436         OPRINTK("%s: opening vpi.vci: %d.%d\n", card->name, vpi, vci);
2437
2438         switch (vcc->qos.aal) {
2439         case ATM_AAL0:
2440         case ATM_AAL1:
2441         case ATM_AAL5:
2442                 break;
2443         default:
2444                 printk("%s: Unsupported AAL: %d\n", card->name, vcc->qos.aal);
2445                 up(&card->mutex);
2446                 return -EPROTONOSUPPORT;
2447         }
2448
2449         index = VPCI2VC(card, vpi, vci);
2450         if (!card->vcs[index]) {
2451                 card->vcs[index] = kmalloc(sizeof(struct vc_map), GFP_KERNEL);
2452                 if (!card->vcs[index]) {
2453                         printk("%s: can't alloc vc in open()\n", card->name);
2454                         up(&card->mutex);
2455                         return -ENOMEM;
2456                 }
2457                 memset(card->vcs[index], 0, sizeof(struct vc_map));
2458
2459                 card->vcs[index]->card = card;
2460                 card->vcs[index]->index = index;
2461
2462                 spin_lock_init(&card->vcs[index]->lock);
2463         }
2464         vc = card->vcs[index];
2465
2466         vcc->dev_data = vc;
2467
2468         IPRINTK("%s: idt77252_open: vc = %d (%d.%d) %s/%s (max RX SDU: %u)\n",
2469                 card->name, vc->index, vcc->vpi, vcc->vci,
2470                 vcc->qos.rxtp.traffic_class != ATM_NONE ? "rx" : "--",
2471                 vcc->qos.txtp.traffic_class != ATM_NONE ? "tx" : "--",
2472                 vcc->qos.rxtp.max_sdu);
2473
2474         inuse = 0;
2475         if (vcc->qos.txtp.traffic_class != ATM_NONE &&
2476             test_bit(VCF_TX, &vc->flags))
2477                 inuse = 1;
2478         if (vcc->qos.rxtp.traffic_class != ATM_NONE &&
2479             test_bit(VCF_RX, &vc->flags))
2480                 inuse += 2;
2481
2482         if (inuse) {
2483                 printk("%s: %s vci already in use.\n", card->name,
2484                        inuse == 1 ? "tx" : inuse == 2 ? "rx" : "tx and rx");
2485                 up(&card->mutex);
2486                 return -EADDRINUSE;
2487         }
2488
2489         if (vcc->qos.txtp.traffic_class != ATM_NONE) {
2490                 error = idt77252_init_tx(card, vc, vcc, &vcc->qos);
2491                 if (error) {
2492                         up(&card->mutex);
2493                         return error;
2494                 }
2495         }
2496
2497         if (vcc->qos.rxtp.traffic_class != ATM_NONE) {
2498                 error = idt77252_init_rx(card, vc, vcc, &vcc->qos);
2499                 if (error) {
2500                         up(&card->mutex);
2501                         return error;
2502                 }
2503         }
2504
2505         set_bit(ATM_VF_READY, &vcc->flags);
2506
2507         up(&card->mutex);
2508         return 0;
2509 }
2510
2511 static void
2512 idt77252_close(struct atm_vcc *vcc)
2513 {
2514         struct atm_dev *dev = vcc->dev;
2515         struct idt77252_dev *card = dev->dev_data;
2516         struct vc_map *vc = vcc->dev_data;
2517         unsigned long flags;
2518         unsigned long addr;
2519         int timeout;
2520
2521         down(&card->mutex);
2522
2523         IPRINTK("%s: idt77252_close: vc = %d (%d.%d)\n",
2524                 card->name, vc->index, vcc->vpi, vcc->vci);
2525
2526         clear_bit(ATM_VF_READY, &vcc->flags);
2527
2528         if (vcc->qos.rxtp.traffic_class != ATM_NONE) {
2529
2530                 spin_lock_irqsave(&vc->lock, flags);
2531                 clear_bit(VCF_RX, &vc->flags);
2532                 vc->rx_vcc = NULL;
2533                 spin_unlock_irqrestore(&vc->lock, flags);
2534
2535                 if ((vcc->vci == 3) || (vcc->vci == 4))
2536                         goto done;
2537
2538                 addr = card->rct_base + vc->index * SAR_SRAM_RCT_SIZE;
2539
2540                 spin_lock_irqsave(&card->cmd_lock, flags);
2541                 writel(SAR_CMD_CLOSE_CONNECTION | (addr << 2), SAR_REG_CMD);
2542                 waitfor_idle(card);
2543                 spin_unlock_irqrestore(&card->cmd_lock, flags);
2544
2545                 if (vc->rcv.rx_pool.count) {
2546                         DPRINTK("%s: closing a VC with pending rx buffers.\n",
2547                                 card->name);
2548
2549                         recycle_rx_pool_skb(card, &vc->rcv.rx_pool);
2550                 }
2551         }
2552
2553 done:
2554         if (vcc->qos.txtp.traffic_class != ATM_NONE) {
2555
2556                 spin_lock_irqsave(&vc->lock, flags);
2557                 clear_bit(VCF_TX, &vc->flags);
2558                 clear_bit(VCF_IDLE, &vc->flags);
2559                 clear_bit(VCF_RSV, &vc->flags);
2560                 vc->tx_vcc = NULL;
2561
2562                 if (vc->estimator) {
2563                         del_timer(&vc->estimator->timer);
2564                         kfree(vc->estimator);
2565                         vc->estimator = NULL;
2566                 }
2567                 spin_unlock_irqrestore(&vc->lock, flags);
2568
2569                 timeout = 5 * HZ;
2570                 while (atomic_read(&vc->scq->used) > 0) {
2571                         timeout = schedule_timeout(timeout);
2572                         if (!timeout)
2573                                 break;
2574                 }
2575                 if (!timeout)
2576                         printk("%s: SCQ drain timeout: %u used\n",
2577                                card->name, atomic_read(&vc->scq->used));
2578
2579                 writel(TCMDQ_HALT | vc->index, SAR_REG_TCMDQ);
2580                 clear_scd(card, vc->scq, vc->class);
2581
2582                 if (vc->class == SCHED_CBR) {
2583                         clear_tst(card, vc);
2584                         card->tst_free += vc->ntste;
2585                         vc->ntste = 0;
2586                 }
2587
2588                 card->scd2vc[vc->scd_index] = NULL;
2589                 free_scq(card, vc->scq);
2590         }
2591
2592         up(&card->mutex);
2593 }
2594
2595 static int
2596 idt77252_change_qos(struct atm_vcc *vcc, struct atm_qos *qos, int flags)
2597 {
2598         struct atm_dev *dev = vcc->dev;
2599         struct idt77252_dev *card = dev->dev_data;
2600         struct vc_map *vc = vcc->dev_data;
2601         int error = 0;
2602
2603         down(&card->mutex);
2604
2605         if (qos->txtp.traffic_class != ATM_NONE) {
2606                 if (!test_bit(VCF_TX, &vc->flags)) {
2607                         error = idt77252_init_tx(card, vc, vcc, qos);
2608                         if (error)
2609                                 goto out;
2610                 } else {
2611                         switch (qos->txtp.traffic_class) {
2612                         case ATM_CBR:
2613                                 error = idt77252_init_cbr(card, vc, vcc, qos);
2614                                 if (error)
2615                                         goto out;
2616                                 break;
2617
2618                         case ATM_UBR:
2619                                 error = idt77252_init_ubr(card, vc, vcc, qos);
2620                                 if (error)
2621                                         goto out;
2622
2623                                 if (!test_bit(VCF_IDLE, &vc->flags)) {
2624                                         writel(TCMDQ_LACR | (vc->lacr << 16) |
2625                                                vc->index, SAR_REG_TCMDQ);
2626                                 }
2627                                 break;
2628
2629                         case ATM_VBR:
2630                         case ATM_ABR:
2631                                 error = -EOPNOTSUPP;
2632                                 goto out;
2633                         }
2634                 }
2635         }
2636
2637         if ((qos->rxtp.traffic_class != ATM_NONE) &&
2638             !test_bit(VCF_RX, &vc->flags)) {
2639                 error = idt77252_init_rx(card, vc, vcc, qos);
2640                 if (error)
2641                         goto out;
2642         }
2643
2644         memcpy(&vcc->qos, qos, sizeof(struct atm_qos));
2645
2646         set_bit(ATM_VF_HASQOS, &vcc->flags);
2647
2648 out:
2649         up(&card->mutex);
2650         return error;
2651 }
2652
2653 static int
2654 idt77252_proc_read(struct atm_dev *dev, loff_t * pos, char *page)
2655 {
2656         struct idt77252_dev *card = dev->dev_data;
2657         int i, left;
2658
2659         left = (int) *pos;
2660         if (!left--)
2661                 return sprintf(page, "IDT77252 Interrupts:\n");
2662         if (!left--)
2663                 return sprintf(page, "TSIF:  %lu\n", card->irqstat[15]);
2664         if (!left--)
2665                 return sprintf(page, "TXICP: %lu\n", card->irqstat[14]);
2666         if (!left--)
2667                 return sprintf(page, "TSQF:  %lu\n", card->irqstat[12]);
2668         if (!left--)
2669                 return sprintf(page, "TMROF: %lu\n", card->irqstat[11]);
2670         if (!left--)
2671                 return sprintf(page, "PHYI:  %lu\n", card->irqstat[10]);
2672         if (!left--)
2673                 return sprintf(page, "FBQ3A: %lu\n", card->irqstat[8]);
2674         if (!left--)
2675                 return sprintf(page, "FBQ2A: %lu\n", card->irqstat[7]);
2676         if (!left--)
2677                 return sprintf(page, "RSQF:  %lu\n", card->irqstat[6]);
2678         if (!left--)
2679                 return sprintf(page, "EPDU:  %lu\n", card->irqstat[5]);
2680         if (!left--)
2681                 return sprintf(page, "RAWCF: %lu\n", card->irqstat[4]);
2682         if (!left--)
2683                 return sprintf(page, "FBQ1A: %lu\n", card->irqstat[3]);
2684         if (!left--)
2685                 return sprintf(page, "FBQ0A: %lu\n", card->irqstat[2]);
2686         if (!left--)
2687                 return sprintf(page, "RSQAF: %lu\n", card->irqstat[1]);
2688         if (!left--)
2689                 return sprintf(page, "IDT77252 Transmit Connection Table:\n");
2690
2691         for (i = 0; i < card->tct_size; i++) {
2692                 unsigned long tct;
2693                 struct atm_vcc *vcc;
2694                 struct vc_map *vc;
2695                 char *p;
2696
2697                 vc = card->vcs[i];
2698                 if (!vc)
2699                         continue;
2700
2701                 vcc = NULL;
2702                 if (vc->tx_vcc)
2703                         vcc = vc->tx_vcc;
2704                 if (!vcc)
2705                         continue;
2706                 if (left--)
2707                         continue;
2708
2709                 p = page;
2710                 p += sprintf(p, "  %4u: %u.%u: ", i, vcc->vpi, vcc->vci);
2711                 tct = (unsigned long) (card->tct_base + i * SAR_SRAM_TCT_SIZE);
2712
2713                 for (i = 0; i < 8; i++)
2714                         p += sprintf(p, " %08x", read_sram(card, tct + i));
2715                 p += sprintf(p, "\n");
2716                 return p - page;
2717         }
2718         return 0;
2719 }
2720
2721 /*****************************************************************************/
2722 /*                                                                           */
2723 /* Interrupt handler                                                         */
2724 /*                                                                           */
2725 /*****************************************************************************/
2726
2727 static void
2728 idt77252_collect_stat(struct idt77252_dev *card)
2729 {
2730         u32 cdc, vpec, icc;
2731
2732         cdc = readl(SAR_REG_CDC);
2733         vpec = readl(SAR_REG_VPEC);
2734         icc = readl(SAR_REG_ICC);
2735
2736 #ifdef  NOTDEF
2737         printk("%s:", card->name);
2738
2739         if (cdc & 0x7f0000) {
2740                 char *s = "";
2741
2742                 printk(" [");
2743                 if (cdc & (1 << 22)) {
2744                         printk("%sRM ID", s);
2745                         s = " | ";
2746                 }
2747                 if (cdc & (1 << 21)) {
2748                         printk("%sCON TAB", s);
2749                         s = " | ";
2750                 }
2751                 if (cdc & (1 << 20)) {
2752                         printk("%sNO FB", s);
2753                         s = " | ";
2754                 }
2755                 if (cdc & (1 << 19)) {
2756                         printk("%sOAM CRC", s);
2757                         s = " | ";
2758                 }
2759                 if (cdc & (1 << 18)) {
2760                         printk("%sRM CRC", s);
2761                         s = " | ";
2762                 }
2763                 if (cdc & (1 << 17)) {
2764                         printk("%sRM FIFO", s);
2765                         s = " | ";
2766                 }
2767                 if (cdc & (1 << 16)) {
2768                         printk("%sRX FIFO", s);
2769                         s = " | ";
2770                 }
2771                 printk("]");
2772         }
2773
2774         printk(" CDC %04x, VPEC %04x, ICC: %04x\n",
2775                cdc & 0xffff, vpec & 0xffff, icc & 0xffff);
2776 #endif
2777 }
2778
2779 static irqreturn_t
2780 idt77252_interrupt(int irq, void *dev_id, struct pt_regs *ptregs)
2781 {
2782         struct idt77252_dev *card = dev_id;
2783         u32 stat;
2784
2785         stat = readl(SAR_REG_STAT) & 0xffff;
2786         if (!stat)      /* no interrupt for us */
2787                 return IRQ_NONE;
2788
2789         if (test_and_set_bit(IDT77252_BIT_INTERRUPT, &card->flags)) {
2790                 printk("%s: Re-entering irq_handler()\n", card->name);
2791                 goto out;
2792         }
2793
2794         writel(stat, SAR_REG_STAT);     /* reset interrupt */
2795
2796         if (stat & SAR_STAT_TSIF) {     /* entry written to TSQ  */
2797                 INTPRINTK("%s: TSIF\n", card->name);
2798                 card->irqstat[15]++;
2799                 idt77252_tx(card);
2800         }
2801         if (stat & SAR_STAT_TXICP) {    /* Incomplete CS-PDU has  */
2802                 INTPRINTK("%s: TXICP\n", card->name);
2803                 card->irqstat[14]++;
2804 #ifdef CONFIG_ATM_IDT77252_DEBUG
2805                 idt77252_tx_dump(card);
2806 #endif
2807         }
2808         if (stat & SAR_STAT_TSQF) {     /* TSQ 7/8 full           */
2809                 INTPRINTK("%s: TSQF\n", card->name);
2810                 card->irqstat[12]++;
2811                 idt77252_tx(card);
2812         }
2813         if (stat & SAR_STAT_TMROF) {    /* Timer overflow         */
2814                 INTPRINTK("%s: TMROF\n", card->name);
2815                 card->irqstat[11]++;
2816                 idt77252_collect_stat(card);
2817         }
2818
2819         if (stat & SAR_STAT_EPDU) {     /* Got complete CS-PDU    */
2820                 INTPRINTK("%s: EPDU\n", card->name);
2821                 card->irqstat[5]++;
2822                 idt77252_rx(card);
2823         }
2824         if (stat & SAR_STAT_RSQAF) {    /* RSQ is 7/8 full        */
2825                 INTPRINTK("%s: RSQAF\n", card->name);
2826                 card->irqstat[1]++;
2827                 idt77252_rx(card);
2828         }
2829         if (stat & SAR_STAT_RSQF) {     /* RSQ is full            */
2830                 INTPRINTK("%s: RSQF\n", card->name);
2831                 card->irqstat[6]++;
2832                 idt77252_rx(card);
2833         }
2834         if (stat & SAR_STAT_RAWCF) {    /* Raw cell received      */
2835                 INTPRINTK("%s: RAWCF\n", card->name);
2836                 card->irqstat[4]++;
2837                 idt77252_rx_raw(card);
2838         }
2839
2840         if (stat & SAR_STAT_PHYI) {     /* PHY device interrupt   */
2841                 INTPRINTK("%s: PHYI", card->name);
2842                 card->irqstat[10]++;
2843                 if (card->atmdev->phy && card->atmdev->phy->interrupt)
2844                         card->atmdev->phy->interrupt(card->atmdev);
2845         }
2846
2847         if (stat & (SAR_STAT_FBQ0A | SAR_STAT_FBQ1A |
2848                     SAR_STAT_FBQ2A | SAR_STAT_FBQ3A)) {
2849
2850                 writel(readl(SAR_REG_CFG) & ~(SAR_CFG_FBIE), SAR_REG_CFG);
2851
2852                 INTPRINTK("%s: FBQA: %04x\n", card->name, stat);
2853
2854                 if (stat & SAR_STAT_FBQ0A)
2855                         card->irqstat[2]++;
2856                 if (stat & SAR_STAT_FBQ1A)
2857                         card->irqstat[3]++;
2858                 if (stat & SAR_STAT_FBQ2A)
2859                         card->irqstat[7]++;
2860                 if (stat & SAR_STAT_FBQ3A)
2861                         card->irqstat[8]++;
2862
2863                 schedule_work(&card->tqueue);
2864         }
2865
2866 out:
2867         clear_bit(IDT77252_BIT_INTERRUPT, &card->flags);
2868         return IRQ_HANDLED;
2869 }
2870
2871 static void
2872 idt77252_softint(void *dev_id)
2873 {
2874         struct idt77252_dev *card = dev_id;
2875         u32 stat;
2876         int done;
2877
2878         for (done = 1; ; done = 1) {
2879                 stat = readl(SAR_REG_STAT) >> 16;
2880
2881                 if ((stat & 0x0f) < SAR_FBQ0_HIGH) {
2882                         add_rx_skb(card, 0, SAR_FB_SIZE_0, 32);
2883                         done = 0;
2884                 }
2885
2886                 stat >>= 4;
2887                 if ((stat & 0x0f) < SAR_FBQ1_HIGH) {
2888                         add_rx_skb(card, 1, SAR_FB_SIZE_1, 32);
2889                         done = 0;
2890                 }
2891
2892                 stat >>= 4;
2893                 if ((stat & 0x0f) < SAR_FBQ2_HIGH) {
2894                         add_rx_skb(card, 2, SAR_FB_SIZE_2, 32);
2895                         done = 0;
2896                 }
2897
2898                 stat >>= 4;
2899                 if ((stat & 0x0f) < SAR_FBQ3_HIGH) {
2900                         add_rx_skb(card, 3, SAR_FB_SIZE_3, 32);
2901                         done = 0;
2902                 }
2903
2904                 if (done)
2905                         break;
2906         }
2907
2908         writel(readl(SAR_REG_CFG) | SAR_CFG_FBIE, SAR_REG_CFG);
2909 }
2910
2911
2912 static int
2913 open_card_oam(struct idt77252_dev *card)
2914 {
2915         unsigned long flags;
2916         unsigned long addr;
2917         struct vc_map *vc;
2918         int vpi, vci;
2919         int index;
2920         u32 rcte;
2921
2922         for (vpi = 0; vpi < (1 << card->vpibits); vpi++) {
2923                 for (vci = 3; vci < 5; vci++) {
2924                         index = VPCI2VC(card, vpi, vci);
2925
2926                         vc = kmalloc(sizeof(struct vc_map), GFP_KERNEL);
2927                         if (!vc) {
2928                                 printk("%s: can't alloc vc\n", card->name);
2929                                 return -ENOMEM;
2930                         }
2931                         memset(vc, 0, sizeof(struct vc_map));
2932
2933                         vc->index = index;
2934                         card->vcs[index] = vc;
2935
2936                         flush_rx_pool(card, &vc->rcv.rx_pool);
2937
2938                         rcte = SAR_RCTE_CONNECTOPEN |
2939                                SAR_RCTE_RAWCELLINTEN |
2940                                SAR_RCTE_RCQ |
2941                                SAR_RCTE_FBP_1;
2942
2943                         addr = card->rct_base + (vc->index << 2);
2944                         write_sram(card, addr, rcte);
2945
2946                         spin_lock_irqsave(&card->cmd_lock, flags);
2947                         writel(SAR_CMD_OPEN_CONNECTION | (addr << 2),
2948                                SAR_REG_CMD);
2949                         waitfor_idle(card);
2950                         spin_unlock_irqrestore(&card->cmd_lock, flags);
2951                 }
2952         }
2953
2954         return 0;
2955 }
2956
2957 static void
2958 close_card_oam(struct idt77252_dev *card)
2959 {
2960         unsigned long flags;
2961         unsigned long addr;
2962         struct vc_map *vc;
2963         int vpi, vci;
2964         int index;
2965
2966         for (vpi = 0; vpi < (1 << card->vpibits); vpi++) {
2967                 for (vci = 3; vci < 5; vci++) {
2968                         index = VPCI2VC(card, vpi, vci);
2969                         vc = card->vcs[index];
2970
2971                         addr = card->rct_base + vc->index * SAR_SRAM_RCT_SIZE;
2972
2973                         spin_lock_irqsave(&card->cmd_lock, flags);
2974                         writel(SAR_CMD_CLOSE_CONNECTION | (addr << 2),
2975                                SAR_REG_CMD);
2976                         waitfor_idle(card);
2977                         spin_unlock_irqrestore(&card->cmd_lock, flags);
2978
2979                         if (vc->rcv.rx_pool.count) {
2980                                 DPRINTK("%s: closing a VC "
2981                                         "with pending rx buffers.\n",
2982                                         card->name);
2983
2984                                 recycle_rx_pool_skb(card, &vc->rcv.rx_pool);
2985                         }
2986                 }
2987         }
2988 }
2989
2990 static int
2991 open_card_ubr0(struct idt77252_dev *card)
2992 {
2993         struct vc_map *vc;
2994
2995         vc = kmalloc(sizeof(struct vc_map), GFP_KERNEL);
2996         if (!vc) {
2997                 printk("%s: can't alloc vc\n", card->name);
2998                 return -ENOMEM;
2999         }
3000         memset(vc, 0, sizeof(struct vc_map));
3001         card->vcs[0] = vc;
3002         vc->class = SCHED_UBR0;
3003
3004         vc->scq = alloc_scq(card, vc->class);
3005         if (!vc->scq) {
3006                 printk("%s: can't get SCQ.\n", card->name);
3007                 return -ENOMEM;
3008         }
3009
3010         card->scd2vc[0] = vc;
3011         vc->scd_index = 0;
3012         vc->scq->scd = card->scd_base;
3013
3014         fill_scd(card, vc->scq, vc->class);
3015
3016         write_sram(card, card->tct_base + 0, TCT_UBR | card->scd_base);
3017         write_sram(card, card->tct_base + 1, 0);
3018         write_sram(card, card->tct_base + 2, 0);
3019         write_sram(card, card->tct_base + 3, 0);
3020         write_sram(card, card->tct_base + 4, 0);
3021         write_sram(card, card->tct_base + 5, 0);
3022         write_sram(card, card->tct_base + 6, 0);
3023         write_sram(card, card->tct_base + 7, TCT_FLAG_UBR);
3024
3025         clear_bit(VCF_IDLE, &vc->flags);
3026         writel(TCMDQ_START | 0, SAR_REG_TCMDQ);
3027         return 0;
3028 }
3029
3030 static int
3031 idt77252_dev_open(struct idt77252_dev *card)
3032 {
3033         u32 conf;
3034
3035         if (!test_bit(IDT77252_BIT_INIT, &card->flags)) {
3036                 printk("%s: SAR not yet initialized.\n", card->name);
3037                 return -1;
3038         }
3039
3040         conf = SAR_CFG_RXPTH|   /* enable receive path                  */
3041             SAR_RX_DELAY |      /* interrupt on complete PDU            */
3042             SAR_CFG_RAWIE |     /* interrupt enable on raw cells        */
3043             SAR_CFG_RQFIE |     /* interrupt on RSQ almost full         */
3044             SAR_CFG_TMOIE |     /* interrupt on timer overflow          */
3045             SAR_CFG_FBIE |      /* interrupt on low free buffers        */
3046             SAR_CFG_TXEN |      /* transmit operation enable            */
3047             SAR_CFG_TXINT |     /* interrupt on transmit status         */
3048             SAR_CFG_TXUIE |     /* interrupt on transmit underrun       */
3049             SAR_CFG_TXSFI |     /* interrupt on TSQ almost full         */
3050             SAR_CFG_PHYIE       /* enable PHY interrupts                */
3051             ;
3052
3053 #ifdef CONFIG_ATM_IDT77252_RCV_ALL
3054         /* Test RAW cell receive. */
3055         conf |= SAR_CFG_VPECA;
3056 #endif
3057
3058         writel(readl(SAR_REG_CFG) | conf, SAR_REG_CFG);
3059
3060         if (open_card_oam(card)) {
3061                 printk("%s: Error initializing OAM.\n", card->name);
3062                 return -1;
3063         }
3064
3065         if (open_card_ubr0(card)) {
3066                 printk("%s: Error initializing UBR0.\n", card->name);
3067                 return -1;
3068         }
3069
3070         IPRINTK("%s: opened IDT77252 ABR SAR.\n", card->name);
3071         return 0;
3072 }
3073
3074 void
3075 idt77252_dev_close(struct atm_dev *dev)
3076 {
3077         struct idt77252_dev *card = dev->dev_data;
3078         u32 conf;
3079
3080         close_card_oam(card);
3081
3082         conf = SAR_CFG_RXPTH |  /* enable receive path           */
3083             SAR_RX_DELAY |      /* interrupt on complete PDU     */
3084             SAR_CFG_RAWIE |     /* interrupt enable on raw cells */
3085             SAR_CFG_RQFIE |     /* interrupt on RSQ almost full  */
3086             SAR_CFG_TMOIE |     /* interrupt on timer overflow   */
3087             SAR_CFG_FBIE |      /* interrupt on low free buffers */
3088             SAR_CFG_TXEN |      /* transmit operation enable     */
3089             SAR_CFG_TXINT |     /* interrupt on transmit status  */
3090             SAR_CFG_TXUIE |     /* interrupt on xmit underrun    */
3091             SAR_CFG_TXSFI       /* interrupt on TSQ almost full  */
3092             ;
3093
3094         writel(readl(SAR_REG_CFG) & ~(conf), SAR_REG_CFG);
3095
3096         DIPRINTK("%s: closed IDT77252 ABR SAR.\n", card->name);
3097 }
3098
3099
3100 /*****************************************************************************/
3101 /*                                                                           */
3102 /* Initialisation and Deinitialization of IDT77252                           */
3103 /*                                                                           */
3104 /*****************************************************************************/
3105
3106
3107 static void
3108 deinit_card(struct idt77252_dev *card)
3109 {
3110         struct sk_buff *skb;
3111         int i, j;
3112
3113         if (!test_bit(IDT77252_BIT_INIT, &card->flags)) {
3114                 printk("%s: SAR not yet initialized.\n", card->name);
3115                 return;
3116         }
3117         DIPRINTK("idt77252: deinitialize card %u\n", card->index);
3118
3119         writel(0, SAR_REG_CFG);
3120
3121         if (card->atmdev)
3122                 atm_dev_deregister(card->atmdev);
3123
3124         for (i = 0; i < 4; i++) {
3125                 for (j = 0; j < FBQ_SIZE; j++) {
3126                         skb = card->sbpool[i].skb[j];
3127                         if (skb) {
3128                                 pci_unmap_single(card->pcidev,
3129                                                  IDT77252_PRV_PADDR(skb),
3130                                                  skb->end - skb->data,
3131                                                  PCI_DMA_FROMDEVICE);
3132                                 card->sbpool[i].skb[j] = NULL;
3133                                 dev_kfree_skb(skb);
3134                         }
3135                 }
3136         }
3137
3138         if (card->soft_tst)
3139                 vfree(card->soft_tst);
3140
3141         if (card->scd2vc)
3142                 vfree(card->scd2vc);
3143
3144         if (card->vcs)
3145                 vfree(card->vcs);
3146
3147         if (card->raw_cell_hnd) {
3148                 pci_free_consistent(card->pcidev, 2 * sizeof(u32),
3149                                     card->raw_cell_hnd, card->raw_cell_paddr);
3150         }
3151
3152         if (card->rsq.base) {
3153                 DIPRINTK("%s: Release RSQ ...\n", card->name);
3154                 deinit_rsq(card);
3155         }
3156
3157         if (card->tsq.base) {
3158                 DIPRINTK("%s: Release TSQ ...\n", card->name);
3159                 deinit_tsq(card);
3160         }
3161
3162         DIPRINTK("idt77252: Release IRQ.\n");
3163         free_irq(card->pcidev->irq, card);
3164
3165         for (i = 0; i < 4; i++) {
3166                 if (card->fbq[i])
3167                         iounmap((void *) card->fbq[i]);
3168         }
3169
3170         if (card->membase)
3171                 iounmap((void *) card->membase);
3172
3173         clear_bit(IDT77252_BIT_INIT, &card->flags);
3174         DIPRINTK("%s: Card deinitialized.\n", card->name);
3175 }
3176
3177
3178 static int __devinit
3179 init_sram(struct idt77252_dev *card)
3180 {
3181         int i;
3182
3183         for (i = 0; i < card->sramsize; i += 4)
3184                 write_sram(card, (i >> 2), 0);
3185
3186         /* set SRAM layout for THIS card */
3187         if (card->sramsize == (512 * 1024)) {
3188                 card->tct_base = SAR_SRAM_TCT_128_BASE;
3189                 card->tct_size = (SAR_SRAM_TCT_128_TOP - card->tct_base + 1)
3190                     / SAR_SRAM_TCT_SIZE;
3191                 card->rct_base = SAR_SRAM_RCT_128_BASE;
3192                 card->rct_size = (SAR_SRAM_RCT_128_TOP - card->rct_base + 1)
3193                     / SAR_SRAM_RCT_SIZE;
3194                 card->rt_base = SAR_SRAM_RT_128_BASE;
3195                 card->scd_base = SAR_SRAM_SCD_128_BASE;
3196                 card->scd_size = (SAR_SRAM_SCD_128_TOP - card->scd_base + 1)
3197                     / SAR_SRAM_SCD_SIZE;
3198                 card->tst[0] = SAR_SRAM_TST1_128_BASE;
3199                 card->tst[1] = SAR_SRAM_TST2_128_BASE;
3200                 card->tst_size = SAR_SRAM_TST1_128_TOP - card->tst[0] + 1;
3201                 card->abrst_base = SAR_SRAM_ABRSTD_128_BASE;
3202                 card->abrst_size = SAR_ABRSTD_SIZE_8K;
3203                 card->fifo_base = SAR_SRAM_FIFO_128_BASE;
3204                 card->fifo_size = SAR_RXFD_SIZE_32K;
3205         } else {
3206                 card->tct_base = SAR_SRAM_TCT_32_BASE;
3207                 card->tct_size = (SAR_SRAM_TCT_32_TOP - card->tct_base + 1)
3208                     / SAR_SRAM_TCT_SIZE;
3209                 card->rct_base = SAR_SRAM_RCT_32_BASE;
3210                 card->rct_size = (SAR_SRAM_RCT_32_TOP - card->rct_base + 1)
3211                     / SAR_SRAM_RCT_SIZE;
3212                 card->rt_base = SAR_SRAM_RT_32_BASE;
3213                 card->scd_base = SAR_SRAM_SCD_32_BASE;
3214                 card->scd_size = (SAR_SRAM_SCD_32_TOP - card->scd_base + 1)
3215                     / SAR_SRAM_SCD_SIZE;
3216                 card->tst[0] = SAR_SRAM_TST1_32_BASE;
3217                 card->tst[1] = SAR_SRAM_TST2_32_BASE;
3218                 card->tst_size = (SAR_SRAM_TST1_32_TOP - card->tst[0] + 1);
3219                 card->abrst_base = SAR_SRAM_ABRSTD_32_BASE;
3220                 card->abrst_size = SAR_ABRSTD_SIZE_1K;
3221                 card->fifo_base = SAR_SRAM_FIFO_32_BASE;
3222                 card->fifo_size = SAR_RXFD_SIZE_4K;
3223         }
3224
3225         /* Initialize TCT */
3226         for (i = 0; i < card->tct_size; i++) {
3227                 write_sram(card, i * SAR_SRAM_TCT_SIZE + 0, 0);
3228                 write_sram(card, i * SAR_SRAM_TCT_SIZE + 1, 0);
3229                 write_sram(card, i * SAR_SRAM_TCT_SIZE + 2, 0);
3230                 write_sram(card, i * SAR_SRAM_TCT_SIZE + 3, 0);
3231                 write_sram(card, i * SAR_SRAM_TCT_SIZE + 4, 0);
3232                 write_sram(card, i * SAR_SRAM_TCT_SIZE + 5, 0);
3233                 write_sram(card, i * SAR_SRAM_TCT_SIZE + 6, 0);
3234                 write_sram(card, i * SAR_SRAM_TCT_SIZE + 7, 0);
3235         }
3236
3237         /* Initialize RCT */
3238         for (i = 0; i < card->rct_size; i++) {
3239                 write_sram(card, card->rct_base + i * SAR_SRAM_RCT_SIZE,
3240                                     (u32) SAR_RCTE_RAWCELLINTEN);
3241                 write_sram(card, card->rct_base + i * SAR_SRAM_RCT_SIZE + 1,
3242                                     (u32) 0);
3243                 write_sram(card, card->rct_base + i * SAR_SRAM_RCT_SIZE + 2,
3244                                     (u32) 0);
3245                 write_sram(card, card->rct_base + i * SAR_SRAM_RCT_SIZE + 3,
3246                                     (u32) 0xffffffff);
3247         }
3248
3249         writel((SAR_FBQ0_LOW << 28) | 0x00000000 | 0x00000000 |
3250                (SAR_FB_SIZE_0 / 48), SAR_REG_FBQS0);
3251         writel((SAR_FBQ1_LOW << 28) | 0x00000000 | 0x00000000 |
3252                (SAR_FB_SIZE_1 / 48), SAR_REG_FBQS1);
3253         writel((SAR_FBQ2_LOW << 28) | 0x00000000 | 0x00000000 |
3254                (SAR_FB_SIZE_2 / 48), SAR_REG_FBQS2);
3255         writel((SAR_FBQ3_LOW << 28) | 0x00000000 | 0x00000000 |
3256                (SAR_FB_SIZE_3 / 48), SAR_REG_FBQS3);
3257
3258         /* Initialize rate table  */
3259         for (i = 0; i < 256; i++) {
3260                 write_sram(card, card->rt_base + i, log_to_rate[i]);
3261         }
3262
3263         for (i = 0; i < 128; i++) {
3264                 unsigned int tmp;
3265
3266                 tmp  = rate_to_log[(i << 2) + 0] << 0;
3267                 tmp |= rate_to_log[(i << 2) + 1] << 8;
3268                 tmp |= rate_to_log[(i << 2) + 2] << 16;
3269                 tmp |= rate_to_log[(i << 2) + 3] << 24;
3270                 write_sram(card, card->rt_base + 256 + i, tmp);
3271         }
3272
3273 #if 0 /* Fill RDF and AIR tables. */
3274         for (i = 0; i < 128; i++) {
3275                 unsigned int tmp;
3276
3277                 tmp = RDF[0][(i << 1) + 0] << 16;
3278                 tmp |= RDF[0][(i << 1) + 1] << 0;
3279                 write_sram(card, card->rt_base + 512 + i, tmp);
3280         }
3281
3282         for (i = 0; i < 128; i++) {
3283                 unsigned int tmp;
3284
3285                 tmp = AIR[0][(i << 1) + 0] << 16;
3286                 tmp |= AIR[0][(i << 1) + 1] << 0;
3287                 write_sram(card, card->rt_base + 640 + i, tmp);
3288         }
3289 #endif
3290
3291         IPRINTK("%s: initialize rate table ...\n", card->name);
3292         writel(card->rt_base << 2, SAR_REG_RTBL);
3293
3294         /* Initialize TSTs */
3295         IPRINTK("%s: initialize TST ...\n", card->name);
3296         card->tst_free = card->tst_size - 2;    /* last two are jumps */
3297
3298         for (i = card->tst[0]; i < card->tst[0] + card->tst_size - 2; i++)
3299                 write_sram(card, i, TSTE_OPC_VAR);
3300         write_sram(card, i++, TSTE_OPC_JMP | (card->tst[0] << 2));
3301         idt77252_sram_write_errors = 1;
3302         write_sram(card, i++, TSTE_OPC_JMP | (card->tst[1] << 2));
3303         idt77252_sram_write_errors = 0;
3304         for (i = card->tst[1]; i < card->tst[1] + card->tst_size - 2; i++)
3305                 write_sram(card, i, TSTE_OPC_VAR);
3306         write_sram(card, i++, TSTE_OPC_JMP | (card->tst[1] << 2));
3307         idt77252_sram_write_errors = 1;
3308         write_sram(card, i++, TSTE_OPC_JMP | (card->tst[0] << 2));
3309         idt77252_sram_write_errors = 0;
3310
3311         card->tst_index = 0;
3312         writel(card->tst[0] << 2, SAR_REG_TSTB);
3313
3314         /* Initialize ABRSTD and Receive FIFO */
3315         IPRINTK("%s: initialize ABRSTD ...\n", card->name);
3316         writel(card->abrst_size | (card->abrst_base << 2),
3317                SAR_REG_ABRSTD);
3318
3319         IPRINTK("%s: initialize receive fifo ...\n", card->name);
3320         writel(card->fifo_size | (card->fifo_base << 2),
3321                SAR_REG_RXFD);
3322
3323         IPRINTK("%s: SRAM initialization complete.\n", card->name);
3324         return 0;
3325 }
3326
3327 static int __devinit
3328 init_card(struct atm_dev *dev)
3329 {
3330         struct idt77252_dev *card = dev->dev_data;
3331         struct pci_dev *pcidev = card->pcidev;
3332         unsigned long tmpl, modl;
3333         unsigned int linkrate, rsvdcr;
3334         unsigned int tst_entries;
3335         struct net_device *tmp;
3336         char tname[10];
3337
3338         u32 size;
3339         u_char pci_byte;
3340         u32 conf;
3341         int i, k;
3342
3343         if (test_bit(IDT77252_BIT_INIT, &card->flags)) {
3344                 printk("Error: SAR already initialized.\n");
3345                 return -1;
3346         }
3347
3348 /*****************************************************************/
3349 /*   P C I   C O N F I G U R A T I O N                           */
3350 /*****************************************************************/
3351
3352         /* Set PCI Retry-Timeout and TRDY timeout */
3353         IPRINTK("%s: Checking PCI retries.\n", card->name);
3354         if (pci_read_config_byte(pcidev, 0x40, &pci_byte) != 0) {
3355                 printk("%s: can't read PCI retry timeout.\n", card->name);
3356                 deinit_card(card);
3357                 return -1;
3358         }
3359         if (pci_byte != 0) {
3360                 IPRINTK("%s: PCI retry timeout: %d, set to 0.\n",
3361                         card->name, pci_byte);
3362                 if (pci_write_config_byte(pcidev, 0x40, 0) != 0) {
3363                         printk("%s: can't set PCI retry timeout.\n",
3364                                card->name);
3365                         deinit_card(card);
3366                         return -1;
3367                 }
3368         }
3369         IPRINTK("%s: Checking PCI TRDY.\n", card->name);
3370         if (pci_read_config_byte(pcidev, 0x41, &pci_byte) != 0) {
3371                 printk("%s: can't read PCI TRDY timeout.\n", card->name);
3372                 deinit_card(card);
3373                 return -1;
3374         }
3375         if (pci_byte != 0) {
3376                 IPRINTK("%s: PCI TRDY timeout: %d, set to 0.\n",
3377                         card->name, pci_byte);
3378                 if (pci_write_config_byte(pcidev, 0x41, 0) != 0) {
3379                         printk("%s: can't set PCI TRDY timeout.\n", card->name);
3380                         deinit_card(card);
3381                         return -1;
3382                 }
3383         }
3384         /* Reset Timer register */
3385         if (readl(SAR_REG_STAT) & SAR_STAT_TMROF) {
3386                 printk("%s: resetting timer overflow.\n", card->name);
3387                 writel(SAR_STAT_TMROF, SAR_REG_STAT);
3388         }
3389         IPRINTK("%s: Request IRQ ... ", card->name);
3390         if (request_irq(pcidev->irq, idt77252_interrupt, SA_INTERRUPT|SA_SHIRQ,
3391                         card->name, card) != 0) {
3392                 printk("%s: can't allocate IRQ.\n", card->name);
3393                 deinit_card(card);
3394                 return -1;
3395         }
3396         IPRINTK("got %d.\n", pcidev->irq);
3397
3398 /*****************************************************************/
3399 /*   C H E C K   A N D   I N I T   S R A M                       */
3400 /*****************************************************************/
3401
3402         IPRINTK("%s: Initializing SRAM\n", card->name);
3403
3404         /* preset size of connecton table, so that init_sram() knows about it */
3405         conf =  SAR_CFG_TX_FIFO_SIZE_9 |        /* Use maximum fifo size */
3406                 SAR_CFG_RXSTQ_SIZE_8k |         /* Receive Status Queue is 8k */
3407                 SAR_CFG_IDLE_CLP |              /* Set CLP on idle cells */
3408 #ifndef CONFIG_ATM_IDT77252_SEND_IDLE
3409                 SAR_CFG_NO_IDLE |               /* Do not send idle cells */
3410 #endif
3411                 0;
3412
3413         if (card->sramsize == (512 * 1024))
3414                 conf |= SAR_CFG_CNTBL_1k;
3415         else
3416                 conf |= SAR_CFG_CNTBL_512;
3417
3418         switch (vpibits) {
3419         case 0:
3420                 conf |= SAR_CFG_VPVCS_0;
3421                 break;
3422         default:
3423         case 1:
3424                 conf |= SAR_CFG_VPVCS_1;
3425                 break;
3426         case 2:
3427                 conf |= SAR_CFG_VPVCS_2;
3428                 break;
3429         case 8:
3430                 conf |= SAR_CFG_VPVCS_8;
3431                 break;
3432         }
3433
3434         writel(readl(SAR_REG_CFG) | conf, SAR_REG_CFG);
3435
3436         if (init_sram(card) < 0)
3437                 return -1;
3438
3439 /********************************************************************/
3440 /*  A L L O C   R A M   A N D   S E T   V A R I O U S   T H I N G S */
3441 /********************************************************************/
3442         /* Initialize TSQ */
3443         if (0 != init_tsq(card)) {
3444                 deinit_card(card);
3445                 return -1;
3446         }
3447         /* Initialize RSQ */
3448         if (0 != init_rsq(card)) {
3449                 deinit_card(card);
3450                 return -1;
3451         }
3452
3453         card->vpibits = vpibits;
3454         if (card->sramsize == (512 * 1024)) {
3455                 card->vcibits = 10 - card->vpibits;
3456         } else {
3457                 card->vcibits = 9 - card->vpibits;
3458         }
3459
3460         card->vcimask = 0;
3461         for (k = 0, i = 1; k < card->vcibits; k++) {
3462                 card->vcimask |= i;
3463                 i <<= 1;
3464         }
3465
3466         IPRINTK("%s: Setting VPI/VCI mask to zero.\n", card->name);
3467         writel(0, SAR_REG_VPM);
3468
3469         /* Little Endian Order   */
3470         writel(0, SAR_REG_GP);
3471
3472         /* Initialize RAW Cell Handle Register  */
3473         card->raw_cell_hnd = pci_alloc_consistent(card->pcidev, 2 * sizeof(u32),
3474                                                   &card->raw_cell_paddr);
3475         if (!card->raw_cell_hnd) {
3476                 printk("%s: memory allocation failure.\n", card->name);
3477                 deinit_card(card);
3478                 return -1;
3479         }
3480         memset(card->raw_cell_hnd, 0, 2 * sizeof(u32));
3481         writel(card->raw_cell_paddr, SAR_REG_RAWHND);
3482         IPRINTK("%s: raw cell handle is at 0x%p.\n", card->name,
3483                 card->raw_cell_hnd);
3484
3485         size = sizeof(struct vc_map *) * card->tct_size;
3486         IPRINTK("%s: allocate %d byte for VC map.\n", card->name, size);
3487         if (NULL == (card->vcs = vmalloc(size))) {
3488                 printk("%s: memory allocation failure.\n", card->name);
3489                 deinit_card(card);
3490                 return -1;
3491         }
3492         memset(card->vcs, 0, size);
3493
3494         size = sizeof(struct vc_map *) * card->scd_size;
3495         IPRINTK("%s: allocate %d byte for SCD to VC mapping.\n",
3496                 card->name, size);
3497         if (NULL == (card->scd2vc = vmalloc(size))) {
3498                 printk("%s: memory allocation failure.\n", card->name);
3499                 deinit_card(card);
3500                 return -1;
3501         }
3502         memset(card->scd2vc, 0, size);
3503
3504         size = sizeof(struct tst_info) * (card->tst_size - 2);
3505         IPRINTK("%s: allocate %d byte for TST to VC mapping.\n",
3506                 card->name, size);
3507         if (NULL == (card->soft_tst = vmalloc(size))) {
3508                 printk("%s: memory allocation failure.\n", card->name);
3509                 deinit_card(card);
3510                 return -1;
3511         }
3512         for (i = 0; i < card->tst_size - 2; i++) {
3513                 card->soft_tst[i].tste = TSTE_OPC_VAR;
3514                 card->soft_tst[i].vc = NULL;
3515         }
3516
3517         if (dev->phy == NULL) {
3518                 printk("%s: No LT device defined.\n", card->name);
3519                 deinit_card(card);
3520                 return -1;
3521         }
3522         if (dev->phy->ioctl == NULL) {
3523                 printk("%s: LT had no IOCTL funtion defined.\n", card->name);
3524                 deinit_card(card);
3525                 return -1;
3526         }
3527
3528 #ifdef  CONFIG_ATM_IDT77252_USE_SUNI
3529         /*
3530          * this is a jhs hack to get around special functionality in the
3531          * phy driver for the atecom hardware; the functionality doesn't
3532          * exist in the linux atm suni driver
3533          *
3534          * it isn't the right way to do things, but as the guy from NIST
3535          * said, talking about their measurement of the fine structure
3536          * constant, "it's good enough for government work."
3537          */
3538         linkrate = 149760000;
3539 #endif
3540
3541         card->link_pcr = (linkrate / 8 / 53);
3542         printk("%s: Linkrate on ATM line : %u bit/s, %u cell/s.\n",
3543                card->name, linkrate, card->link_pcr);
3544
3545 #ifdef CONFIG_ATM_IDT77252_SEND_IDLE
3546         card->utopia_pcr = card->link_pcr;
3547 #else
3548         card->utopia_pcr = (160000000 / 8 / 54);
3549 #endif
3550
3551         rsvdcr = 0;
3552         if (card->utopia_pcr > card->link_pcr)
3553                 rsvdcr = card->utopia_pcr - card->link_pcr;
3554
3555         tmpl = (unsigned long) rsvdcr * ((unsigned long) card->tst_size - 2);
3556         modl = tmpl % (unsigned long)card->utopia_pcr;
3557         tst_entries = (int) (tmpl / (unsigned long)card->utopia_pcr);
3558         if (modl)
3559                 tst_entries++;
3560         card->tst_free -= tst_entries;
3561         fill_tst(card, NULL, tst_entries, TSTE_OPC_NULL);
3562
3563 #ifdef HAVE_EEPROM
3564         idt77252_eeprom_init(card);
3565         printk("%s: EEPROM: %02x:", card->name,
3566                 idt77252_eeprom_read_status(card));
3567
3568         for (i = 0; i < 0x80; i++) {
3569                 printk(" %02x",
3570                 idt77252_eeprom_read_byte(card, i)
3571                 );
3572         }
3573         printk("\n");
3574 #endif /* HAVE_EEPROM */
3575
3576         /*
3577          * XXX: <hack>
3578          */
3579         sprintf(tname, "eth%d", card->index);
3580         tmp = dev_get_by_name(tname);   /* jhs: was "tmp = dev_get(tname);" */
3581         if (tmp) {
3582                 memcpy(card->atmdev->esi, tmp->dev_addr, 6);
3583
3584                 printk("%s: ESI %02x:%02x:%02x:%02x:%02x:%02x\n",
3585                        card->name, card->atmdev->esi[0], card->atmdev->esi[1],
3586                        card->atmdev->esi[2], card->atmdev->esi[3],
3587                        card->atmdev->esi[4], card->atmdev->esi[5]);
3588         }
3589         /*
3590          * XXX: </hack>
3591          */
3592
3593         /* Set Maximum Deficit Count for now. */
3594         writel(0xffff, SAR_REG_MDFCT);
3595
3596         set_bit(IDT77252_BIT_INIT, &card->flags);
3597
3598         XPRINTK("%s: IDT77252 ABR SAR initialization complete.\n", card->name);
3599         return 0;
3600 }
3601
3602
3603 /*****************************************************************************/
3604 /*                                                                           */
3605 /* Probing of IDT77252 ABR SAR                                               */
3606 /*                                                                           */
3607 /*****************************************************************************/
3608
3609
3610 static int __devinit
3611 idt77252_preset(struct idt77252_dev *card)
3612 {
3613         u16 pci_command;
3614
3615 /*****************************************************************/
3616 /*   P C I   C O N F I G U R A T I O N                           */
3617 /*****************************************************************/
3618
3619         XPRINTK("%s: Enable PCI master and memory access for SAR.\n",
3620                 card->name);
3621         if (pci_read_config_word(card->pcidev, PCI_COMMAND, &pci_command)) {
3622                 printk("%s: can't read PCI_COMMAND.\n", card->name);
3623                 deinit_card(card);
3624                 return -1;
3625         }
3626         if (!(pci_command & PCI_COMMAND_IO)) {
3627                 printk("%s: PCI_COMMAND: %04x (???)\n",
3628                        card->name, pci_command);
3629                 deinit_card(card);
3630                 return (-1);
3631         }
3632         pci_command |= (PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER);
3633         if (pci_write_config_word(card->pcidev, PCI_COMMAND, pci_command)) {
3634                 printk("%s: can't write PCI_COMMAND.\n", card->name);
3635                 deinit_card(card);
3636                 return -1;
3637         }
3638 /*****************************************************************/
3639 /*   G E N E R I C   R E S E T                                   */
3640 /*****************************************************************/
3641
3642         /* Software reset */
3643         writel(SAR_CFG_SWRST, SAR_REG_CFG);
3644         mdelay(1);
3645         writel(0, SAR_REG_CFG);
3646
3647         IPRINTK("%s: Software resetted.\n", card->name);
3648         return 0;
3649 }
3650
3651
3652 static unsigned long __devinit
3653 probe_sram(struct idt77252_dev *card)
3654 {
3655         u32 data, addr;
3656
3657         writel(0, SAR_REG_DR0);
3658         writel(SAR_CMD_WRITE_SRAM | (0 << 2), SAR_REG_CMD);
3659
3660         for (addr = 0x4000; addr < 0x80000; addr += 0x4000) {
3661                 writel(0xdeadbeef, SAR_REG_DR0);
3662                 writel(SAR_CMD_WRITE_SRAM | (addr << 2), SAR_REG_CMD);
3663
3664                 writel(SAR_CMD_READ_SRAM | (0 << 2), SAR_REG_CMD);
3665                 data = readl(SAR_REG_DR0);
3666
3667                 if (data != 0)
3668                         break;
3669         }
3670
3671         return addr * sizeof(u32);
3672 }
3673
3674 static int __devinit
3675 idt77252_init_one(struct pci_dev *pcidev, const struct pci_device_id *id)
3676 {
3677         static struct idt77252_dev **last = &idt77252_chain;
3678         static int index = 0;
3679
3680         unsigned long membase, srambase;
3681         struct idt77252_dev *card;
3682         struct atm_dev *dev;
3683         ushort revision = 0;
3684         int i;
3685
3686
3687         if (pci_read_config_word(pcidev, PCI_REVISION_ID, &revision)) {
3688                 printk("idt77252-%d: can't read PCI_REVISION_ID\n", index);
3689                 return -ENODEV;
3690         }
3691
3692         card = kmalloc(sizeof(struct idt77252_dev), GFP_KERNEL);
3693         if (!card) {
3694                 printk("idt77252-%d: can't allocate private data\n", index);
3695                 return -ENOMEM;
3696         }
3697         memset(card, 0, sizeof(struct idt77252_dev));
3698
3699         card->revision = revision;
3700         card->index = index;
3701         card->pcidev = pcidev;
3702         sprintf(card->name, "idt77252-%d", card->index);
3703
3704         INIT_WORK(&card->tqueue, idt77252_softint, (void *)card);
3705
3706         membase = pci_resource_start(pcidev, 1);
3707         srambase = pci_resource_start(pcidev, 2);
3708
3709         init_MUTEX(&card->mutex);
3710         spin_lock_init(&card->cmd_lock);
3711         spin_lock_init(&card->tst_lock);
3712
3713         init_timer(&card->tst_timer);
3714         card->tst_timer.data = (unsigned long)card;
3715         card->tst_timer.function = tst_timer;
3716
3717         /* Do the I/O remapping... */
3718         card->membase = (unsigned long) ioremap(membase, 1024);
3719         if (!card->membase) {
3720                 printk("%s: can't ioremap() membase\n", card->name);
3721                 kfree(card);
3722                 return -EIO;
3723         }
3724
3725         if (idt77252_preset(card)) {
3726                 printk("%s: preset failed\n", card->name);
3727                 iounmap((void *) card->membase);
3728                 kfree(card);
3729                 return -EIO;
3730         }
3731
3732         dev = atm_dev_register("idt77252", &idt77252_ops, -1, 0);
3733         if (!dev) {
3734                 printk("%s: can't register atm device\n", card->name);
3735                 iounmap((void *) card->membase);
3736                 kfree(card);
3737                 return -EIO;
3738         }
3739         dev->dev_data = card;
3740         card->atmdev = dev;
3741
3742 #ifdef  CONFIG_ATM_IDT77252_USE_SUNI
3743         suni_init(dev);
3744         if (!dev->phy) {
3745                 printk("%s: can't init SUNI\n", card->name);
3746                 deinit_card(card);
3747                 kfree(card);
3748                 return -EIO;
3749         }
3750 #endif  /* CONFIG_ATM_IDT77252_USE_SUNI */
3751
3752         card->sramsize = probe_sram(card);
3753
3754         for (i = 0; i < 4; i++) {
3755                 card->fbq[i] = (unsigned long)
3756                             ioremap(srambase | 0x200000 | (i << 18), 4);
3757                 if (!card->fbq[i]) {
3758                         printk("%s: can't ioremap() FBQ%d\n", card->name, i);
3759                         deinit_card(card);
3760                         kfree(card);
3761                         return -EIO;
3762                 }
3763         }
3764
3765         printk("%s: ABR SAR (Rev %c): MEM %08lx SRAM %08lx [%u KB]\n",
3766                card->name, ((revision > 1) && (revision < 25)) ?
3767                'A' + revision - 1 : '?', membase, srambase,
3768                card->sramsize / 1024);
3769
3770         if (init_card(dev)) {
3771                 printk("%s: init_card failed\n", card->name);
3772                 deinit_card(card);
3773                 kfree(card);
3774                 return -EIO;
3775         }
3776
3777         dev->ci_range.vpi_bits = card->vpibits;
3778         dev->ci_range.vci_bits = card->vcibits;
3779         dev->link_rate = card->link_pcr;
3780
3781         if (dev->phy->start)
3782                 dev->phy->start(dev);
3783
3784         if (idt77252_dev_open(card)) {
3785                 printk("%s: dev_open failed\n", card->name);
3786
3787                 if (dev->phy->stop)
3788                         dev->phy->stop(dev);
3789                 deinit_card(card);
3790                 kfree(card);
3791                 return -EIO;
3792         }
3793
3794         *last = card;
3795         last = &card->next;
3796         index++;
3797
3798         return 0;
3799 }
3800
3801 static struct pci_device_id idt77252_pci_tbl[] =
3802 {
3803         { PCI_VENDOR_ID_IDT, PCI_DEVICE_ID_IDT_IDT77252,
3804           PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
3805         { 0, }
3806 };
3807
3808 static struct pci_driver idt77252_driver = {
3809         .name           = "idt77252",
3810         .id_table       = idt77252_pci_tbl,
3811         .probe          = idt77252_init_one,
3812 };
3813
3814 static int __init idt77252_init(void)
3815 {
3816         struct sk_buff *skb;
3817
3818         printk("%s: at %p\n", __FUNCTION__, idt77252_init);
3819
3820         if (sizeof(skb->cb) < sizeof(struct atm_skb_data) +
3821                               sizeof(struct idt77252_skb_prv)) {
3822                 printk(KERN_ERR "%s: skb->cb is too small (%lu < %lu)\n",
3823                        __FUNCTION__, (unsigned long) sizeof(skb->cb),
3824                        (unsigned long) sizeof(struct atm_skb_data) +
3825                                        sizeof(struct idt77252_skb_prv));
3826                 return -EIO;
3827         }
3828
3829         if (pci_register_driver(&idt77252_driver) > 0)
3830                 return 0;
3831
3832         pci_unregister_driver(&idt77252_driver);
3833         return -ENODEV;
3834 }
3835
3836 static void __exit idt77252_exit(void)
3837 {
3838         struct idt77252_dev *card;
3839         struct atm_dev *dev;
3840
3841         pci_unregister_driver(&idt77252_driver);
3842
3843         while (idt77252_chain) {
3844                 card = idt77252_chain;
3845                 dev = card->atmdev;
3846                 idt77252_chain = card->next;
3847
3848                 if (dev->phy->stop)
3849                         dev->phy->stop(dev);
3850                 deinit_card(card);
3851                 kfree(card);
3852         }
3853
3854         DIPRINTK("idt77252: finished cleanup-module().\n");
3855 }
3856
3857 module_init(idt77252_init);
3858 module_exit(idt77252_exit);
3859
3860 MODULE_LICENSE("GPL");
3861
3862 MODULE_PARM(vpibits, "i");
3863 MODULE_PARM_DESC(vpibits, "number of VPI bits supported (0, 1, or 2)");
3864 #ifdef CONFIG_ATM_IDT77252_DEBUG
3865 MODULE_PARM(debug, "i");
3866 MODULE_PARM_DESC(debug,   "debug bitmap, see drivers/atm/idt77252.h");
3867 #endif
3868
3869 MODULE_AUTHOR("Eddie C. Dost <ecd@atecom.com>");
3870 MODULE_DESCRIPTION("IDT77252 ABR SAR Driver");