drivers/block/carmel.c

   1 /*
   2  *  carmel.c: Driver for Promise SATA SX8 looks-like-I2O hardware
   3  *
   4  *  Copyright 2004 Red Hat, Inc.
   5  *
   6  *  Author/maintainer:  Jeff Garzik <jgarzik@pobox.com>
   7  *
   8  *  This file is subject to the terms and conditions of the GNU General Public
   9  *  License.  See the file "COPYING" in the main directory of this archive
  10  *  for more details.
  11  */
  12
  13 #include <linux/kernel.h>
  14 #include <linux/module.h>
  15 #include <linux/init.h>
  16 #include <linux/pci.h>
  17 #include <linux/slab.h>
  18 #include <linux/spinlock.h>
  19 #include <linux/blkdev.h>
  20 #include <linux/sched.h>
  21 #include <linux/devfs_fs_kernel.h>
  22 #include <linux/interrupt.h>
  23 #include <linux/compiler.h>
  24 #include <linux/workqueue.h>
  25 #include <linux/bitops.h>
  26 #include <linux/delay.h>
  27 #include <linux/time.h>
  28 #include <linux/hdreg.h>
  29 #include <asm/io.h>
  30 #include <asm/semaphore.h>
  31 #include <asm/uaccess.h>
  32
  33 MODULE_AUTHOR("Jeff Garzik");
  34 MODULE_LICENSE("GPL");
  35 MODULE_DESCRIPTION("Promise SATA SX8 (carmel) block driver");
  36
  37 #if 0
  38 #define CARM_DEBUG
  39 #define CARM_VERBOSE_DEBUG
  40 #else
  41 #undef CARM_DEBUG
  42 #undef CARM_VERBOSE_DEBUG
  43 #endif
  44 #undef CARM_NDEBUG
  45
  46 #define DRV_NAME "carmel"
  47 #define DRV_VERSION "0.8"
  48 #define PFX DRV_NAME ": "
  49
  50 #define NEXT_RESP(idx)  ((idx + 1) % RMSG_Q_LEN)
  51
  52 /* 0xf is just arbitrary, non-zero noise; this is sorta like poisoning */
  53 #define TAG_ENCODE(tag) (((tag) << 16) | 0xf)
  54 #define TAG_DECODE(tag) (((tag) >> 16) & 0x1f)
  55 #define TAG_VALID(tag)  ((((tag) & 0xf) == 0xf) && (TAG_DECODE(tag) < 32))
  56
  57 /* note: prints function name for you */
  58 #ifdef CARM_DEBUG
  59 #define DPRINTK(fmt, args...) printk(KERN_ERR "%s: " fmt, __FUNCTION__, ## args)
  60 #ifdef CARM_VERBOSE_DEBUG
  61 #define VPRINTK(fmt, args...) printk(KERN_ERR "%s: " fmt, __FUNCTION__, ## args)
  62 #else
  63 #define VPRINTK(fmt, args...)
  64 #endif  /* CARM_VERBOSE_DEBUG */
  65 #else
  66 #define DPRINTK(fmt, args...)
  67 #define VPRINTK(fmt, args...)
  68 #endif  /* CARM_DEBUG */
  69
  70 #ifdef CARM_NDEBUG
  71 #define assert(expr)
  72 #else
  73 #define assert(expr) \
  74         if(unlikely(!(expr))) {                                   \
  75         printk(KERN_ERR "Assertion failed! %s,%s,%s,line=%d\n", \
  76         #expr,__FILE__,__FUNCTION__,__LINE__);          \
  77         }
  78 #endif
  79
  80 /* defines only for the constants which don't work well as enums */
  81 struct carm_host;
  82
  83 enum {
  84         /* adapter-wide limits */
  85         CARM_MAX_PORTS          = 8,
  86         CARM_SHM_SIZE           = (4096 << 7),
  87         CARM_MINORS_PER_MAJOR   = 256 / CARM_MAX_PORTS,
  88         CARM_MAX_WAIT_Q         = CARM_MAX_PORTS + 1,
  89
  90         /* command message queue limits */
  91         CARM_MAX_REQ            = 64,          /* max command msgs per host */
  92         CARM_MAX_Q              = 1,               /* one command at a time */
  93         CARM_MSG_LOW_WATER      = (CARM_MAX_REQ / 4),        /* refill mark */
  94
  95         /* S/G limits, host-wide and per-request */
  96         CARM_MAX_REQ_SG         = 32,        /* max s/g entries per request */
  97         CARM_SG_BOUNDARY        = 0xffffUL,         /* s/g segment boundary */
  98         CARM_MAX_HOST_SG        = 600,          /* max s/g entries per host */
  99         CARM_SG_LOW_WATER       = (CARM_MAX_HOST_SG / 4),   /* re-fill mark */
 100
 101         /* hardware registers */
 102         CARM_IHQP               = 0x1c,
 103         CARM_INT_STAT           = 0x10, /* interrupt status */
 104         CARM_INT_MASK           = 0x14, /* interrupt mask */
 105         CARM_HMUC               = 0x18, /* host message unit control */
 106         RBUF_ADDR_LO            = 0x20, /* response msg DMA buf low 32 bits */
 107         RBUF_ADDR_HI            = 0x24, /* response msg DMA buf high 32 bits */
 108         RBUF_BYTE_SZ            = 0x28,
 109         CARM_RESP_IDX           = 0x2c,
 110         CARM_CMS0               = 0x30, /* command message size reg 0 */
 111         CARM_LMUC               = 0x48,
 112         CARM_HMPHA              = 0x6c,
 113         CARM_INITC              = 0xb5,
 114
 115         /* bits in CARM_INT_{STAT,MASK} */
 116         INT_RESERVED            = 0xfffffff0,
 117         INT_WATCHDOG            = (1 << 3),     /* watchdog timer */
 118         INT_Q_OVERFLOW          = (1 << 2),     /* cmd msg q overflow */
 119         INT_Q_AVAILABLE         = (1 << 1),     /* cmd msg q has free space */
 120         INT_RESPONSE            = (1 << 0),     /* response msg available */
 121         INT_ACK_MASK            = INT_WATCHDOG | INT_Q_OVERFLOW,
 122         INT_DEF_MASK            = INT_RESERVED | INT_Q_OVERFLOW |
 123                                   INT_RESPONSE,
 124
 125         /* command messages, and related register bits */
 126         CARM_HAVE_RESP          = 0x01,
 127         CARM_MSG_READ           = 1,
 128         CARM_MSG_WRITE          = 2,
 129         CARM_MSG_VERIFY         = 3,
 130         CARM_MSG_GET_CAPACITY   = 4,
 131         CARM_MSG_FLUSH          = 5,
 132         CARM_MSG_IOCTL          = 6,
 133         CARM_MSG_ARRAY          = 8,
 134         CARM_MSG_MISC           = 9,
 135         CARM_CME                = (1 << 2),
 136         CARM_RME                = (1 << 1),
 137         CARM_WZBC               = (1 << 0),
 138         CARM_RMI                = (1 << 0),
 139         CARM_Q_FULL             = (1 << 3),
 140         CARM_MSG_SIZE           = 288,
 141         CARM_Q_LEN              = 48,
 142
 143         /* CARM_MSG_IOCTL messages */
 144         CARM_IOC_SCAN_CHAN      = 5,    /* scan channels for devices */
 145         CARM_IOC_GET_TCQ        = 13,   /* get tcq/ncq depth */
 146         CARM_IOC_SET_TCQ        = 14,   /* set tcq/ncq depth */
 147
 148         IOC_SCAN_CHAN_NODEV     = 0x1f,
 149         IOC_SCAN_CHAN_OFFSET    = 0x40,
 150
 151         /* CARM_MSG_ARRAY messages */
 152         CARM_ARRAY_INFO         = 0,
 153
 154         ARRAY_NO_EXIST          = (1 << 31),
 155
 156         /* response messages */
 157         RMSG_SZ                 = 8,    /* sizeof(struct carm_response) */
 158         RMSG_Q_LEN              = 48,   /* resp. msg list length */
 159         RMSG_OK                 = 1,    /* bit indicating msg was successful */
 160                                         /* length of entire resp. msg buffer */
 161         RBUF_LEN                = RMSG_SZ * RMSG_Q_LEN,
 162
 163         PDC_SHM_SIZE            = (4096 << 7), /* length of entire h/w buffer */
 164
 165         /* CARM_MSG_MISC messages */
 166         MISC_GET_FW_VER         = 2,
 167         MISC_ALLOC_MEM          = 3,
 168         MISC_SET_TIME           = 5,
 169
 170         /* MISC_GET_FW_VER feature bits */
 171         FW_VER_4PORT            = (1 << 2), /* 1=4 ports, 0=8 ports */
 172         FW_VER_NON_RAID         = (1 << 1), /* 1=non-RAID firmware, 0=RAID */
 173         FW_VER_ZCR              = (1 << 0), /* zero channel RAID (whatever that is) */
 174
 175         /* carm_host flags */
 176         FL_NON_RAID             = FW_VER_NON_RAID,
 177         FL_4PORT                = FW_VER_4PORT,
 178         FL_FW_VER_MASK          = (FW_VER_NON_RAID | FW_VER_4PORT),
 179         FL_DAC                  = (1 << 16),
 180         FL_DYN_MAJOR            = (1 << 17),
 181 };
 182
 183 enum scatter_gather_types {
 184         SGT_32BIT               = 0,
 185         SGT_64BIT               = 1,
 186 };
 187
 188 enum host_states {
 189         HST_INVALID,            /* invalid state; never used */
 190         HST_ALLOC_BUF,          /* setting up master SHM area */
 191         HST_ERROR,              /* we never leave here */
 192         HST_PORT_SCAN,          /* start dev scan */
 193         HST_DEV_SCAN_START,     /* start per-device probe */
 194         HST_DEV_SCAN,           /* continue per-device probe */
 195         HST_DEV_ACTIVATE,       /* activate devices we found */
 196         HST_PROBE_FINISHED,     /* probe is complete */
 197         HST_PROBE_START,        /* initiate probe */
 198         HST_SYNC_TIME,          /* tell firmware what time it is */
 199         HST_GET_FW_VER,         /* get firmware version, adapter port cnt */
 200 };
 201
 202 #ifdef CARM_DEBUG
 203 static const char *state_name[] = {
 204         "HST_INVALID",
 205         "HST_ALLOC_BUF",
 206         "HST_ERROR",
 207         "HST_PORT_SCAN",
 208         "HST_DEV_SCAN_START",
 209         "HST_DEV_SCAN",
 210         "HST_DEV_ACTIVATE",
 211         "HST_PROBE_FINISHED",
 212         "HST_PROBE_START",
 213         "HST_SYNC_TIME",
 214         "HST_GET_FW_VER",
 215 };
 216 #endif
 217
 218 struct carm_port {
 219         unsigned int                    port_no;
 220         unsigned int                    n_queued;
 221         struct gendisk                  *disk;
 222         struct carm_host                *host;
 223
 224         /* attached device characteristics */
 225         u64                             capacity;
 226         char                            name[41];
 227         u16                             dev_geom_head;
 228         u16                             dev_geom_sect;
 229         u16                             dev_geom_cyl;
 230 };
 231
 232 struct carm_request {
 233         unsigned int                    tag;
 234         int                             n_elem;
 235         unsigned int                    msg_type;
 236         unsigned int                    msg_subtype;
 237         unsigned int                    msg_bucket;
 238         struct request                  *rq;
 239         struct carm_port                *port;
 240         struct scatterlist              sg[CARM_MAX_REQ_SG];
 241 };
 242
 243 struct carm_host {
 244         unsigned long                   flags;
 245         void                            *mmio;
 246         void                            *shm;
 247         dma_addr_t                      shm_dma;
 248
 249         int                             major;
 250         int                             id;
 251         char                            name[32];
 252
 253         spinlock_t                      lock;
 254         struct pci_dev                  *pdev;
 255         unsigned int                    state;
 256         u32                             fw_ver;
 257
 258         request_queue_t                 *oob_q;
 259         unsigned int                    n_oob;
 260
 261         unsigned int                    hw_sg_used;
 262
 263         unsigned int                    resp_idx;
 264
 265         unsigned int                    wait_q_prod;
 266         unsigned int                    wait_q_cons;
 267         request_queue_t                 *wait_q[CARM_MAX_WAIT_Q];
 268
 269         unsigned int                    n_msgs;
 270         u64                             msg_alloc;
 271         struct carm_request             req[CARM_MAX_REQ];
 272         void                            *msg_base;
 273         dma_addr_t                      msg_dma;
 274
 275         int                             cur_scan_dev;
 276         unsigned long                   dev_active;
 277         unsigned long                   dev_present;
 278         struct carm_port                port[CARM_MAX_PORTS];
 279
 280         struct work_struct              fsm_task;
 281
 282         struct semaphore                probe_sem;
 283 };
 284
 285 struct carm_response {
 286         u32 ret_handle;
 287         u32 status;
 288 }  __attribute__((packed));
 289
 290 struct carm_msg_sg {
 291         u32 start;
 292         u32 len;
 293 }  __attribute__((packed));
 294
 295 struct carm_msg_rw {
 296         u8 type;
 297         u8 id;
 298         u8 sg_count;
 299         u8 sg_type;
 300         u32 handle;
 301         u32 lba;
 302         u16 lba_count;
 303         u16 lba_high;
 304         struct carm_msg_sg sg[32];
 305 }  __attribute__((packed));
 306
 307 struct carm_msg_allocbuf {
 308         u8 type;
 309         u8 subtype;
 310         u8 n_sg;
 311         u8 sg_type;
 312         u32 handle;
 313         u32 addr;
 314         u32 len;
 315         u32 evt_pool;
 316         u32 n_evt;
 317         u32 rbuf_pool;
 318         u32 n_rbuf;
 319         u32 msg_pool;
 320         u32 n_msg;
 321         struct carm_msg_sg sg[8];
 322 }  __attribute__((packed));
 323
 324 struct carm_msg_ioctl {
 325         u8 type;
 326         u8 subtype;
 327         u8 array_id;
 328         u8 reserved1;
 329         u32 handle;
 330         u32 data_addr;
 331         u32 reserved2;
 332 }  __attribute__((packed));
 333
 334 struct carm_msg_sync_time {
 335         u8 type;
 336         u8 subtype;
 337         u16 reserved1;
 338         u32 handle;
 339         u32 reserved2;
 340         u32 timestamp;
 341 }  __attribute__((packed));
 342
 343 struct carm_msg_get_fw_ver {
 344         u8 type;
 345         u8 subtype;
 346         u16 reserved1;
 347         u32 handle;
 348         u32 data_addr;
 349         u32 reserved2;
 350 }  __attribute__((packed));
 351
 352 struct carm_fw_ver {
 353         u32 version;
 354         u8 features;
 355         u8 reserved1;
 356         u16 reserved2;
 357 }  __attribute__((packed));
 358
 359 struct carm_array_info {
 360         u32 size;
 361
 362         u16 size_hi;
 363         u16 stripe_size;
 364
 365         u32 mode;
 366
 367         u16 stripe_blk_sz;
 368         u16 reserved1;
 369
 370         u16 cyl;
 371         u16 head;
 372
 373         u16 sect;
 374         u8 array_id;
 375         u8 reserved2;
 376
 377         char name[40];
 378
 379         u32 array_status;
 380
 381         /* device list continues beyond this point? */
 382 }  __attribute__((packed));
 383
 384 static int carm_init_one (struct pci_dev *pdev, const struct pci_device_id *ent);
 385 static void carm_remove_one (struct pci_dev *pdev);
 386 static int carm_bdev_ioctl(struct inode *ino, struct file *fil,
 387                            unsigned int cmd, unsigned long arg);
 388
 389 static struct pci_device_id carm_pci_tbl[] = {
 390         { PCI_VENDOR_ID_PROMISE, 0x8000, PCI_ANY_ID, PCI_ANY_ID, 0, 0, },
 391         { PCI_VENDOR_ID_PROMISE, 0x8002, PCI_ANY_ID, PCI_ANY_ID, 0, 0, },
 392         { }     /* terminate list */
 393 };
 394 MODULE_DEVICE_TABLE(pci, carm_pci_tbl);
 395
 396 static struct pci_driver carm_driver = {
 397         .name           = DRV_NAME,
 398         .id_table       = carm_pci_tbl,
 399         .probe          = carm_init_one,
 400         .remove         = carm_remove_one,
 401 };
 402
 403 static struct block_device_operations carm_bd_ops = {
 404         .owner          = THIS_MODULE,
 405         .ioctl          = carm_bdev_ioctl,
 406 };
 407
 408 static unsigned int carm_host_id;
 409 static unsigned long carm_major_alloc;
 410
 411
 412
 413 static int carm_bdev_ioctl(struct inode *ino, struct file *fil,
 414                            unsigned int cmd, unsigned long arg)
 415 {
 416         void __user *usermem = (void *) arg;
 417         struct carm_port *port = ino->i_bdev->bd_disk->private_data;
 418         struct hd_geometry geom;
 419
 420         switch (cmd) {
 421         case HDIO_GETGEO:
 422                 if (!usermem)
 423                         return -EINVAL;
 424
 425                 geom.heads = (u8) port->dev_geom_head;
 426                 geom.sectors = (u8) port->dev_geom_sect;
 427                 geom.cylinders = port->dev_geom_cyl;
 428                 geom.start = get_start_sect(ino->i_bdev);
 429
 430                 if (copy_to_user(usermem, &geom, sizeof(geom)))
 431                         return -EFAULT;
 432                 return 0;
 433
 434         default:
 435                 break;
 436         }
 437
 438         return -EOPNOTSUPP;
 439 }
 440
 441 static inline unsigned long msecs_to_jiffies(unsigned long msecs)
 442 {
 443         return ((HZ * msecs + 999) / 1000);
 444 }
 445
 446 static void msleep(unsigned long msecs)
 447 {
 448         set_current_state(TASK_UNINTERRUPTIBLE);
 449         schedule_timeout(msecs_to_jiffies(msecs));
 450 }
 451
 452 static const u32 msg_sizes[] = { 32, 64, 128, CARM_MSG_SIZE };
 453
 454 static inline int carm_lookup_bucket(u32 msg_size)
 455 {
 456         int i;
 457
 458         for (i = 0; i < ARRAY_SIZE(msg_sizes); i++)
 459                 if (msg_size <= msg_sizes[i])
 460                         return i;
 461
 462         return -ENOENT;
 463 }
 464
 465 static void carm_init_buckets(void *mmio)
 466 {
 467         unsigned int i;
 468
 469         for (i = 0; i < ARRAY_SIZE(msg_sizes); i++)
 470                 writel(msg_sizes[i], mmio + CARM_CMS0 + (4 * i));
 471 }
 472
 473 static inline void *carm_ref_msg(struct carm_host *host,
 474                                  unsigned int msg_idx)
 475 {
 476         return host->msg_base + (msg_idx * CARM_MSG_SIZE);
 477 }
 478
 479 static inline dma_addr_t carm_ref_msg_dma(struct carm_host *host,
 480                                           unsigned int msg_idx)
 481 {
 482         return host->msg_dma + (msg_idx * CARM_MSG_SIZE);
 483 }
 484
 485 static int carm_send_msg(struct carm_host *host,
 486                          struct carm_request *crq)
 487 {
 488         void *mmio = host->mmio;
 489         u32 msg = (u32) carm_ref_msg_dma(host, crq->tag);
 490         u32 cm_bucket = crq->msg_bucket;
 491         u32 tmp;
 492         int rc = 0;
 493
 494         VPRINTK("ENTER\n");
 495
 496         tmp = readl(mmio + CARM_HMUC);
 497         if (tmp & CARM_Q_FULL) {
 498 #if 0
 499                 tmp = readl(mmio + CARM_INT_MASK);
 500                 tmp |= INT_Q_AVAILABLE;
 501                 writel(tmp, mmio + CARM_INT_MASK);
 502                 readl(mmio + CARM_INT_MASK);    /* flush */
 503 #endif
 504                 DPRINTK("host msg queue full\n");
 505                 rc = -EBUSY;
 506         } else {
 507                 writel(msg | (cm_bucket << 1), mmio + CARM_IHQP);
 508                 readl(mmio + CARM_IHQP);        /* flush */
 509         }
 510
 511         return rc;
 512 }
 513
 514 static struct carm_request *carm_get_request(struct carm_host *host)
 515 {
 516         unsigned int i;
 517
 518         /* obey global hardware limit on S/G entries */
 519         if (host->hw_sg_used >= (CARM_MAX_HOST_SG - CARM_MAX_REQ_SG))
 520                 return NULL;
 521
 522         for (i = 0; i < CARM_MAX_Q; i++)
 523                 if ((host->msg_alloc & (1ULL << i)) == 0) {
 524                         struct carm_request *crq = &host->req[i];
 525                         crq->port = NULL;
 526                         crq->n_elem = 0;
 527
 528                         host->msg_alloc |= (1ULL << i);
 529                         host->n_msgs++;
 530
 531                         assert(host->n_msgs <= CARM_MAX_REQ);
 532                         return crq;
 533                 }
 534
 535         DPRINTK("no request available, returning NULL\n");
 536         return NULL;
 537 }
 538
 539 static int carm_put_request(struct carm_host *host, struct carm_request *crq)
 540 {
 541         assert(crq->tag < CARM_MAX_Q);
 542
 543         if (unlikely((host->msg_alloc & (1ULL << crq->tag)) == 0))
 544                 return -EINVAL; /* tried to clear a tag that was not active */
 545
 546         assert(host->hw_sg_used >= crq->n_elem);
 547
 548         host->msg_alloc &= ~(1ULL << crq->tag);
 549         host->hw_sg_used -= crq->n_elem;
 550         host->n_msgs--;
 551
 552         return 0;
 553 }
 554
 555 static struct carm_request *carm_get_special(struct carm_host *host)
 556 {
 557         unsigned long flags;
 558         struct carm_request *crq = NULL;
 559         struct request *rq;
 560         int tries = 5000;
 561
 562         while (tries-- > 0) {
 563                 spin_lock_irqsave(&host->lock, flags);
 564                 crq = carm_get_request(host);
 565                 spin_unlock_irqrestore(&host->lock, flags);
 566
 567                 if (crq)
 568                         break;
 569                 msleep(10);
 570         }
 571
 572         if (!crq)
 573                 return NULL;
 574
 575         rq = blk_get_request(host->oob_q, WRITE /* bogus */, GFP_KERNEL);
 576         if (!rq) {
 577                 spin_lock_irqsave(&host->lock, flags);
 578                 carm_put_request(host, crq);
 579                 spin_unlock_irqrestore(&host->lock, flags);
 580                 return NULL;
 581         }
 582
 583         crq->rq = rq;
 584         return crq;
 585 }
 586
 587 static int carm_array_info (struct carm_host *host, unsigned int array_idx)
 588 {
 589         struct carm_msg_ioctl *ioc;
 590         unsigned int idx;
 591         u32 msg_data;
 592         dma_addr_t msg_dma;
 593         struct carm_request *crq;
 594         int rc;
 595
 596         crq = carm_get_special(host);
 597         if (!crq) {
 598                 rc = -ENOMEM;
 599                 goto err_out;
 600         }
 601
 602         idx = crq->tag;
 603
 604         ioc = carm_ref_msg(host, idx);
 605         msg_dma = carm_ref_msg_dma(host, idx);
 606         msg_data = (u32) (msg_dma + sizeof(struct carm_array_info));
 607
 608         crq->msg_type = CARM_MSG_ARRAY;
 609         crq->msg_subtype = CARM_ARRAY_INFO;
 610         rc = carm_lookup_bucket(sizeof(struct carm_msg_ioctl) +
 611                                 sizeof(struct carm_array_info));
 612         BUG_ON(rc < 0);
 613         crq->msg_bucket = (u32) rc;
 614
 615         memset(ioc, 0, sizeof(*ioc));
 616         ioc->type       = CARM_MSG_ARRAY;
 617         ioc->subtype    = CARM_ARRAY_INFO;
 618         ioc->array_id   = (u8) array_idx;
 619         ioc->handle     = cpu_to_le32(TAG_ENCODE(idx));
 620         ioc->data_addr  = cpu_to_le32(msg_data);
 621
 622         spin_lock_irq(&host->lock);
 623         assert(host->state == HST_DEV_SCAN_START ||
 624                host->state == HST_DEV_SCAN);
 625         spin_unlock_irq(&host->lock);
 626
 627         DPRINTK("blk_insert_request, tag == %u\n", idx);
 628         blk_insert_request(host->oob_q, crq->rq, 1, crq, 0);
 629
 630         return 0;
 631
 632 err_out:
 633         spin_lock_irq(&host->lock);
 634         host->state = HST_ERROR;
 635         spin_unlock_irq(&host->lock);
 636         return rc;
 637 }
 638
 639 typedef unsigned int (*carm_sspc_t)(struct carm_host *, unsigned int, void *);
 640
 641 static int carm_send_special (struct carm_host *host, carm_sspc_t func)
 642 {
 643         struct carm_request *crq;
 644         struct carm_msg_ioctl *ioc;
 645         void *mem;
 646         unsigned int idx, msg_size;
 647         int rc;
 648
 649         crq = carm_get_special(host);
 650         if (!crq)
 651                 return -ENOMEM;
 652
 653         idx = crq->tag;
 654
 655         mem = carm_ref_msg(host, idx);
 656
 657         msg_size = func(host, idx, mem);
 658
 659         ioc = mem;
 660         crq->msg_type = ioc->type;
 661         crq->msg_subtype = ioc->subtype;
 662         rc = carm_lookup_bucket(msg_size);
 663         BUG_ON(rc < 0);
 664         crq->msg_bucket = (u32) rc;
 665
 666         DPRINTK("blk_insert_request, tag == %u\n", idx);
 667         blk_insert_request(host->oob_q, crq->rq, 1, crq, 0);
 668
 669         return 0;
 670 }
 671
 672 static unsigned int carm_fill_sync_time(struct carm_host *host,
 673                                         unsigned int idx, void *mem)
 674 {
 675         struct timeval tv;
 676         struct carm_msg_sync_time *st = mem;
 677
 678         do_gettimeofday(&tv);
 679
 680         memset(st, 0, sizeof(*st));
 681         st->type        = CARM_MSG_MISC;
 682         st->subtype     = MISC_SET_TIME;
 683         st->handle      = cpu_to_le32(TAG_ENCODE(idx));
 684         st->timestamp   = cpu_to_le32(tv.tv_sec);
 685
 686         return sizeof(struct carm_msg_sync_time);
 687 }
 688
 689 static unsigned int carm_fill_alloc_buf(struct carm_host *host,
 690                                         unsigned int idx, void *mem)
 691 {
 692         struct carm_msg_allocbuf *ab = mem;
 693
 694         memset(ab, 0, sizeof(*ab));
 695         ab->type        = CARM_MSG_MISC;
 696         ab->subtype     = MISC_ALLOC_MEM;
 697         ab->handle      = cpu_to_le32(TAG_ENCODE(idx));
 698         ab->n_sg        = 1;
 699         ab->sg_type     = SGT_32BIT;
 700         ab->addr        = cpu_to_le32(host->shm_dma + (PDC_SHM_SIZE >> 1));
 701         ab->len         = cpu_to_le32(PDC_SHM_SIZE >> 1);
 702         ab->evt_pool    = cpu_to_le32(host->shm_dma + (16 * 1024));
 703         ab->n_evt       = cpu_to_le32(1024);
 704         ab->rbuf_pool   = cpu_to_le32(host->shm_dma);
 705         ab->n_rbuf      = cpu_to_le32(RMSG_Q_LEN);
 706         ab->msg_pool    = cpu_to_le32(host->shm_dma + RBUF_LEN);
 707         ab->n_msg       = cpu_to_le32(CARM_Q_LEN);
 708         ab->sg[0].start = cpu_to_le32(host->shm_dma + (PDC_SHM_SIZE >> 1));
 709         ab->sg[0].len   = cpu_to_le32(65536);
 710
 711         return sizeof(struct carm_msg_allocbuf);
 712 }
 713
 714 static unsigned int carm_fill_scan_channels(struct carm_host *host,
 715                                             unsigned int idx, void *mem)
 716 {
 717         struct carm_msg_ioctl *ioc = mem;
 718         u32 msg_data = (u32) (carm_ref_msg_dma(host, idx) +
 719                               IOC_SCAN_CHAN_OFFSET);
 720
 721         memset(ioc, 0, sizeof(*ioc));
 722         ioc->type       = CARM_MSG_IOCTL;
 723         ioc->subtype    = CARM_IOC_SCAN_CHAN;
 724         ioc->handle     = cpu_to_le32(TAG_ENCODE(idx));
 725         ioc->data_addr  = cpu_to_le32(msg_data);
 726
 727         /* fill output data area with "no device" default values */
 728         mem += IOC_SCAN_CHAN_OFFSET;
 729         memset(mem, IOC_SCAN_CHAN_NODEV, CARM_MAX_PORTS);
 730
 731         return IOC_SCAN_CHAN_OFFSET + CARM_MAX_PORTS;
 732 }
 733
 734 static unsigned int carm_fill_get_fw_ver(struct carm_host *host,
 735                                          unsigned int idx, void *mem)
 736 {
 737         struct carm_msg_get_fw_ver *ioc = mem;
 738         u32 msg_data = (u32) (carm_ref_msg_dma(host, idx) + sizeof(*ioc));
 739
 740         memset(ioc, 0, sizeof(*ioc));
 741         ioc->type       = CARM_MSG_MISC;
 742         ioc->subtype    = MISC_GET_FW_VER;
 743         ioc->handle     = cpu_to_le32(TAG_ENCODE(idx));
 744         ioc->data_addr  = cpu_to_le32(msg_data);
 745
 746         return sizeof(struct carm_msg_get_fw_ver) +
 747                sizeof(struct carm_fw_ver);
 748 }
 749
 750 static inline void carm_end_request_queued(struct carm_host *host,
 751                                            struct carm_request *crq,
 752                                            int uptodate)
 753 {
 754         struct request *req = crq->rq;
 755         int rc;
 756
 757         rc = end_that_request_first(req, uptodate, req->hard_nr_sectors);
 758         assert(rc == 0);
 759
 760         end_that_request_last(req);
 761
 762         rc = carm_put_request(host, crq);
 763         assert(rc == 0);
 764 }
 765
 766 static inline void carm_push_q (struct carm_host *host, request_queue_t *q)
 767 {
 768         unsigned int idx = host->wait_q_prod % CARM_MAX_WAIT_Q;
 769
 770         blk_stop_queue(q);
 771         VPRINTK("STOPPED QUEUE %p\n", q);
 772
 773         host->wait_q[idx] = q;
 774         host->wait_q_prod++;
 775         BUG_ON(host->wait_q_prod == host->wait_q_cons); /* overrun */
 776 }
 777
 778 static inline request_queue_t *carm_pop_q(struct carm_host *host)
 779 {
 780         unsigned int idx;
 781
 782         if (host->wait_q_prod == host->wait_q_cons)
 783                 return NULL;
 784
 785         idx = host->wait_q_cons % CARM_MAX_WAIT_Q;
 786         host->wait_q_cons++;
 787
 788         return host->wait_q[idx];
 789 }
 790
 791 static inline void carm_round_robin(struct carm_host *host)
 792 {
 793         request_queue_t *q = carm_pop_q(host);
 794         if (q) {
 795                 blk_start_queue(q);
 796                 VPRINTK("STARTED QUEUE %p\n", q);
 797         }
 798 }
 799
 800 static inline void carm_end_rq(struct carm_host *host, struct carm_request *crq,
 801                         int is_ok)
 802 {
 803         carm_end_request_queued(host, crq, is_ok);
 804         if (CARM_MAX_Q == 1)
 805                 carm_round_robin(host);
 806         else if ((host->n_msgs <= CARM_MSG_LOW_WATER) &&
 807                  (host->hw_sg_used <= CARM_SG_LOW_WATER)) {
 808                 carm_round_robin(host);
 809         }
 810 }
 811
 812 static void carm_oob_rq_fn(request_queue_t *q)
 813 {
 814         struct carm_host *host = q->queuedata;
 815         struct carm_request *crq;
 816         struct request *rq;
 817         int rc;
 818
 819         while (1) {
 820                 DPRINTK("get req\n");
 821                 rq = elv_next_request(q);
 822                 if (!rq)
 823                         break;
 824
 825                 blkdev_dequeue_request(rq);
 826
 827                 crq = rq->special;
 828                 assert(crq != NULL);
 829                 assert(crq->rq == rq);
 830
 831                 crq->n_elem = 0;
 832
 833                 DPRINTK("send req\n");
 834                 rc = carm_send_msg(host, crq);
 835                 if (rc) {
 836                         blk_requeue_request(q, rq);
 837                         carm_push_q(host, q);
 838                         return;         /* call us again later, eventually */
 839                 }
 840         }
 841 }
 842
 843 static void carm_rq_fn(request_queue_t *q)
 844 {
 845         struct carm_port *port = q->queuedata;
 846         struct carm_host *host = port->host;
 847         struct carm_msg_rw *msg;
 848         struct carm_request *crq;
 849         struct request *rq;
 850         struct scatterlist *sg;
 851         int writing = 0, pci_dir, i, n_elem, rc;
 852         u32 tmp;
 853         unsigned int msg_size;
 854
 855 queue_one_request:
 856         VPRINTK("get req\n");
 857         rq = elv_next_request(q);
 858         if (!rq)
 859                 return;
 860
 861         crq = carm_get_request(host);
 862         if (!crq) {
 863                 carm_push_q(host, q);
 864                 return;         /* call us again later, eventually */
 865         }
 866         crq->rq = rq;
 867
 868         blkdev_dequeue_request(rq);
 869
 870         if (rq_data_dir(rq) == WRITE) {
 871                 writing = 1;
 872                 pci_dir = PCI_DMA_TODEVICE;
 873         } else {
 874                 pci_dir = PCI_DMA_FROMDEVICE;
 875         }
 876
 877         /* get scatterlist from block layer */
 878         sg = &crq->sg[0];
 879         n_elem = blk_rq_map_sg(q, rq, sg);
 880         if (n_elem <= 0) {
 881                 carm_end_rq(host, crq, 0);
 882                 return;         /* request with no s/g entries? */
 883         }
 884
 885         /* map scatterlist to PCI bus addresses */
 886         n_elem = pci_map_sg(host->pdev, sg, n_elem, pci_dir);
 887         if (n_elem <= 0) {
 888                 carm_end_rq(host, crq, 0);
 889                 return;         /* request with no s/g entries? */
 890         }
 891         crq->n_elem = n_elem;
 892         crq->port = port;
 893         host->hw_sg_used += n_elem;
 894
 895         /*
 896          * build read/write message
 897          */
 898
 899         VPRINTK("build msg\n");
 900         msg = (struct carm_msg_rw *) carm_ref_msg(host, crq->tag);
 901
 902         if (writing) {
 903                 msg->type = CARM_MSG_WRITE;
 904                 crq->msg_type = CARM_MSG_WRITE;
 905         } else {
 906                 msg->type = CARM_MSG_READ;
 907                 crq->msg_type = CARM_MSG_READ;
 908         }
 909
 910         msg->id         = port->port_no;
 911         msg->sg_count   = n_elem;
 912         msg->sg_type    = SGT_32BIT;
 913         msg->handle     = cpu_to_le32(TAG_ENCODE(crq->tag));
 914         msg->lba        = cpu_to_le32(rq->sector & 0xffffffff);
 915         tmp             = (rq->sector >> 16) >> 16;
 916         msg->lba_high   = cpu_to_le16( (u16) tmp );
 917         msg->lba_count  = cpu_to_le16(rq->nr_sectors);
 918
 919         msg_size = sizeof(struct carm_msg_rw) - sizeof(msg->sg);
 920         for (i = 0; i < n_elem; i++) {
 921                 struct carm_msg_sg *carm_sg = &msg->sg[i];
 922                 carm_sg->start = cpu_to_le32(sg_dma_address(&crq->sg[i]));
 923                 carm_sg->len = cpu_to_le32(sg_dma_len(&crq->sg[i]));
 924                 msg_size += sizeof(struct carm_msg_sg);
 925         }
 926
 927         rc = carm_lookup_bucket(msg_size);
 928         BUG_ON(rc < 0);
 929         crq->msg_bucket = (u32) rc;
 930
 931         /*
 932          * queue read/write message to hardware
 933          */
 934
 935         VPRINTK("send msg, tag == %u\n", crq->tag);
 936         rc = carm_send_msg(host, crq);
 937         if (rc) {
 938                 carm_put_request(host, crq);
 939                 blk_requeue_request(q, rq);
 940                 carm_push_q(host, q);
 941                 return;         /* call us again later, eventually */
 942         }
 943
 944         goto queue_one_request;
 945 }
 946
 947 static void carm_handle_array_info(struct carm_host *host,
 948                                    struct carm_request *crq, u8 *mem,
 949                                    int is_ok)
 950 {
 951         struct carm_port *port;
 952         u8 *msg_data = mem + sizeof(struct carm_array_info);
 953         struct carm_array_info *desc = (struct carm_array_info *) msg_data;
 954         u64 lo, hi;
 955         int cur_port;
 956         size_t slen;
 957
 958         DPRINTK("ENTER\n");
 959
 960         carm_end_rq(host, crq, is_ok);
 961
 962         if (!is_ok)
 963                 goto out;
 964         if (le32_to_cpu(desc->array_status) & ARRAY_NO_EXIST)
 965                 goto out;
 966
 967         cur_port = host->cur_scan_dev;
 968
 969         /* should never occur */
 970         if ((cur_port < 0) || (cur_port >= CARM_MAX_PORTS)) {
 971                 printk(KERN_ERR PFX "BUG: cur_scan_dev==%d, array_id==%d\n",
 972                        cur_port, (int) desc->array_id);
 973                 goto out;
 974         }
 975
 976         port = &host->port[cur_port];
 977
 978         lo = (u64) le32_to_cpu(desc->size);
 979         hi = (u64) le32_to_cpu(desc->size_hi);
 980
 981         port->capacity = lo | (hi << 32);
 982         port->dev_geom_head = le16_to_cpu(desc->head);
 983         port->dev_geom_sect = le16_to_cpu(desc->sect);
 984         port->dev_geom_cyl = le16_to_cpu(desc->cyl);
 985
 986         host->dev_active |= (1 << cur_port);
 987
 988         strncpy(port->name, desc->name, sizeof(port->name));
 989         port->name[sizeof(port->name) - 1] = 0;
 990         slen = strlen(port->name);
 991         while (slen && (port->name[slen - 1] == ' ')) {
 992                 port->name[slen - 1] = 0;
 993                 slen--;
 994         }
 995
 996         printk(KERN_INFO DRV_NAME "(%s): port %u device %Lu sectors\n",
 997                pci_name(host->pdev), port->port_no,
 998                (unsigned long long) port->capacity);
 999         printk(KERN_INFO DRV_NAME "(%s): port %u device \"%s\"\n",
1000                pci_name(host->pdev), port->port_no, port->name);
1001
1002 out:
1003         assert(host->state == HST_DEV_SCAN);
1004         schedule_work(&host->fsm_task);
1005 }
1006
1007 static void carm_handle_scan_chan(struct carm_host *host,
1008                                   struct carm_request *crq, u8 *mem,
1009                                   int is_ok)
1010 {
1011         u8 *msg_data = mem + IOC_SCAN_CHAN_OFFSET;
1012         unsigned int i, dev_count = 0;
1013         int new_state = HST_DEV_SCAN_START;
1014
1015         DPRINTK("ENTER\n");
1016
1017         carm_end_rq(host, crq, is_ok);
1018
1019         if (!is_ok) {
1020                 new_state = HST_ERROR;
1021                 goto out;
1022         }
1023
1024         /* TODO: scan and support non-disk devices */
1025         for (i = 0; i < 8; i++)
1026                 if (msg_data[i] == 0) { /* direct-access device (disk) */
1027                         host->dev_present |= (1 << i);
1028                         dev_count++;
1029                 }
1030
1031         printk(KERN_INFO DRV_NAME "(%s): found %u interesting devices\n",
1032                pci_name(host->pdev), dev_count);
1033
1034 out:
1035         assert(host->state == HST_PORT_SCAN);
1036         host->state = new_state;
1037         schedule_work(&host->fsm_task);
1038 }
1039
1040 static void carm_handle_generic(struct carm_host *host,
1041                                 struct carm_request *crq, int is_ok,
1042                                 int cur_state, int next_state)
1043 {
1044         DPRINTK("ENTER\n");
1045
1046         carm_end_rq(host, crq, is_ok);
1047
1048         assert(host->state == cur_state);
1049         if (is_ok)
1050                 host->state = next_state;
1051         else
1052                 host->state = HST_ERROR;
1053         schedule_work(&host->fsm_task);
1054 }
1055
1056 static inline void carm_handle_rw(struct carm_host *host,
1057                                   struct carm_request *crq, int is_ok)
1058 {
1059         int pci_dir;
1060
1061         VPRINTK("ENTER\n");
1062
1063         if (rq_data_dir(crq->rq) == WRITE)
1064                 pci_dir = PCI_DMA_TODEVICE;
1065         else
1066                 pci_dir = PCI_DMA_FROMDEVICE;
1067
1068         pci_unmap_sg(host->pdev, &crq->sg[0], crq->n_elem, pci_dir);
1069
1070         carm_end_rq(host, crq, is_ok);
1071 }
1072
1073 static inline void carm_handle_resp(struct carm_host *host,
1074                                     u32 ret_handle_le, u32 status)
1075 {
1076         u32 handle = le32_to_cpu(ret_handle_le);
1077         unsigned int msg_idx;
1078         struct carm_request *crq;
1079         int is_ok = (status == RMSG_OK);
1080         u8 *mem;
1081
1082         VPRINTK("ENTER, handle == 0x%x\n", handle);
1083
1084         if (unlikely(!TAG_VALID(handle))) {
1085                 printk(KERN_ERR DRV_NAME "(%s): BUG: invalid tag 0x%x\n",
1086                        pci_name(host->pdev), handle);
1087                 return;
1088         }
1089
1090         msg_idx = TAG_DECODE(handle);
1091         VPRINTK("tag == %u\n", msg_idx);
1092
1093         crq = &host->req[msg_idx];
1094
1095         /* fast path */
1096         if (likely(crq->msg_type == CARM_MSG_READ ||
1097                    crq->msg_type == CARM_MSG_WRITE)) {
1098                 carm_handle_rw(host, crq, is_ok);
1099                 return;
1100         }
1101
1102         mem = carm_ref_msg(host, msg_idx);
1103
1104         switch (crq->msg_type) {
1105         case CARM_MSG_IOCTL: {
1106                 switch (crq->msg_subtype) {
1107                 case CARM_IOC_SCAN_CHAN:
1108                         carm_handle_scan_chan(host, crq, mem, is_ok);
1109                         break;
1110                 default:
1111                         /* unknown / invalid response */
1112                         goto err_out;
1113                 }
1114                 break;
1115         }
1116
1117         case CARM_MSG_MISC: {
1118                 switch (crq->msg_subtype) {
1119                 case MISC_ALLOC_MEM:
1120                         carm_handle_generic(host, crq, is_ok,
1121                                             HST_ALLOC_BUF, HST_SYNC_TIME);
1122                         break;
1123                 case MISC_SET_TIME:
1124                         carm_handle_generic(host, crq, is_ok,
1125                                             HST_SYNC_TIME, HST_GET_FW_VER);
1126                         break;
1127                 case MISC_GET_FW_VER: {
1128                         struct carm_fw_ver *ver = (struct carm_fw_ver *)
1129                                 mem + sizeof(struct carm_msg_get_fw_ver);
1130                         if (is_ok) {
1131                                 host->fw_ver = le32_to_cpu(ver->version);
1132                                 host->flags |= (ver->features & FL_FW_VER_MASK);
1133                         }
1134                         carm_handle_generic(host, crq, is_ok,
1135                                             HST_GET_FW_VER, HST_PORT_SCAN);
1136                         break;
1137                 }
1138                 default:
1139                         /* unknown / invalid response */
1140                         goto err_out;
1141                 }
1142                 break;
1143         }
1144
1145         case CARM_MSG_ARRAY: {
1146                 switch (crq->msg_subtype) {
1147                 case CARM_ARRAY_INFO:
1148                         carm_handle_array_info(host, crq, mem, is_ok);
1149                         break;
1150                 default:
1151                         /* unknown / invalid response */
1152                         goto err_out;
1153                 }
1154                 break;
1155         }
1156
1157         default:
1158                 /* unknown / invalid response */
1159                 goto err_out;
1160         }
1161
1162         return;
1163
1164 err_out:
1165         printk(KERN_WARNING DRV_NAME "(%s): BUG: unhandled message type %d/%d\n",
1166                pci_name(host->pdev), crq->msg_type, crq->msg_subtype);
1167         carm_end_rq(host, crq, 0);
1168 }
1169
1170 static inline void carm_handle_responses(struct carm_host *host)
1171 {
1172         void *mmio = host->mmio;
1173         struct carm_response *resp = (struct carm_response *) host->shm;
1174         unsigned int work = 0;
1175         unsigned int idx = host->resp_idx % RMSG_Q_LEN;
1176
1177         while (1) {
1178                 u32 status = le32_to_cpu(resp[idx].status);
1179
1180                 if (status == 0xffffffff) {
1181                         VPRINTK("ending response on index %u\n", idx);
1182                         writel(idx << 3, mmio + CARM_RESP_IDX);
1183                         break;
1184                 }
1185
1186                 /* response to a message we sent */
1187                 else if ((status & (1 << 31)) == 0) {
1188                         VPRINTK("handling msg response on index %u\n", idx);
1189                         carm_handle_resp(host, resp[idx].ret_handle, status);
1190                         resp[idx].status = 0xffffffff;
1191                 }
1192
1193                 /* asynchronous events the hardware throws our way */
1194                 else if ((status & 0xff000000) == (1 << 31)) {
1195                         u8 *evt_type_ptr = (u8 *) &resp[idx];
1196                         u8 evt_type = *evt_type_ptr;
1197                         printk(KERN_WARNING DRV_NAME "(%s): unhandled event type %d\n",
1198                                pci_name(host->pdev), (int) evt_type);
1199                         resp[idx].status = 0xffffffff;
1200                 }
1201
1202                 idx = NEXT_RESP(idx);
1203                 work++;
1204         }
1205
1206         VPRINTK("EXIT, work==%u\n", work);
1207         host->resp_idx += work;
1208 }
1209
1210 static irqreturn_t carm_interrupt(int irq, void *__host, struct pt_regs *regs)
1211 {
1212         struct carm_host *host = __host;
1213         void *mmio;
1214         u32 mask;
1215         int handled = 0;
1216         unsigned long flags;
1217
1218         if (!host) {
1219                 VPRINTK("no host\n");
1220                 return IRQ_NONE;
1221         }
1222
1223         spin_lock_irqsave(&host->lock, flags);
1224
1225         mmio = host->mmio;
1226
1227         /* reading should also clear interrupts */
1228         mask = readl(mmio + CARM_INT_STAT);
1229
1230         if (mask == 0 || mask == 0xffffffff) {
1231                 VPRINTK("no work, mask == 0x%x\n", mask);
1232                 goto out;
1233         }
1234
1235         if (mask & INT_ACK_MASK)
1236                 writel(mask, mmio + CARM_INT_STAT);
1237
1238         if (unlikely(host->state == HST_INVALID)) {
1239                 VPRINTK("not initialized yet, mask = 0x%x\n", mask);
1240                 goto out;
1241         }
1242
1243         if (mask & CARM_HAVE_RESP) {
1244                 handled = 1;
1245                 carm_handle_responses(host);
1246         }
1247
1248 out:
1249         spin_unlock_irqrestore(&host->lock, flags);
1250         VPRINTK("EXIT\n");
1251         return IRQ_RETVAL(handled);
1252 }
1253
1254 static void carm_fsm_task (void *_data)
1255 {
1256         struct carm_host *host = _data;
1257         unsigned long flags;
1258         unsigned int state;
1259         int rc, i, next_dev;
1260         int reschedule = 0;
1261         int new_state = HST_INVALID;
1262
1263         spin_lock_irqsave(&host->lock, flags);
1264         state = host->state;
1265         spin_unlock_irqrestore(&host->lock, flags);
1266
1267         DPRINTK("ENTER, state == %s\n", state_name[state]);
1268
1269         switch (state) {
1270         case HST_PROBE_START:
1271                 new_state = HST_ALLOC_BUF;
1272                 reschedule = 1;
1273                 break;
1274
1275         case HST_ALLOC_BUF:
1276                 rc = carm_send_special(host, carm_fill_alloc_buf);
1277                 if (rc) {
1278                         new_state = HST_ERROR;
1279                         reschedule = 1;
1280                 }
1281                 break;
1282
1283         case HST_SYNC_TIME:
1284                 rc = carm_send_special(host, carm_fill_sync_time);
1285                 if (rc) {
1286                         new_state = HST_ERROR;
1287                         reschedule = 1;
1288                 }
1289                 break;
1290
1291         case HST_GET_FW_VER:
1292                 rc = carm_send_special(host, carm_fill_get_fw_ver);
1293                 if (rc) {
1294                         new_state = HST_ERROR;
1295                         reschedule = 1;
1296                 }
1297                 break;
1298
1299         case HST_PORT_SCAN:
1300                 rc = carm_send_special(host, carm_fill_scan_channels);
1301                 if (rc) {
1302                         new_state = HST_ERROR;
1303                         reschedule = 1;
1304                 }
1305                 break;
1306
1307         case HST_DEV_SCAN_START:
1308                 host->cur_scan_dev = -1;
1309                 new_state = HST_DEV_SCAN;
1310                 reschedule = 1;
1311                 break;
1312
1313         case HST_DEV_SCAN:
1314                 next_dev = -1;
1315                 for (i = host->cur_scan_dev + 1; i < CARM_MAX_PORTS; i++)
1316                         if (host->dev_present & (1 << i)) {
1317                                 next_dev = i;
1318                                 break;
1319                         }
1320
1321                 if (next_dev >= 0) {
1322                         host->cur_scan_dev = next_dev;
1323                         rc = carm_array_info(host, next_dev);
1324                         if (rc) {
1325                                 new_state = HST_ERROR;
1326                                 reschedule = 1;
1327                         }
1328                 } else {
1329                         new_state = HST_DEV_ACTIVATE;
1330                         reschedule = 1;
1331                 }
1332                 break;
1333
1334         case HST_DEV_ACTIVATE: {
1335                 int activated = 0;
1336                 for (i = 0; i < CARM_MAX_PORTS; i++)
1337                         if (host->dev_active & (1 << i)) {
1338                                 struct carm_port *port = &host->port[i];
1339                                 struct gendisk *disk = port->disk;
1340
1341                                 set_capacity(disk, port->capacity);
1342                                 add_disk(disk);
1343                                 activated++;
1344                         }
1345
1346                 printk(KERN_INFO DRV_NAME "(%s): %d ports activated\n",
1347                        pci_name(host->pdev), activated);
1348
1349                 new_state = HST_PROBE_FINISHED;
1350                 reschedule = 1;
1351                 break;
1352         }
1353
1354         case HST_PROBE_FINISHED:
1355                 up(&host->probe_sem);
1356                 break;
1357
1358         case HST_ERROR:
1359                 /* FIXME: TODO */
1360                 break;
1361
1362         default:
1363                 /* should never occur */
1364                 printk(KERN_ERR PFX "BUG: unknown state %d\n", state);
1365                 assert(0);
1366                 break;
1367         }
1368
1369         if (new_state != HST_INVALID) {
1370                 spin_lock_irqsave(&host->lock, flags);
1371                 host->state = new_state;
1372                 spin_unlock_irqrestore(&host->lock, flags);
1373         }
1374         if (reschedule)
1375                 schedule_work(&host->fsm_task);
1376 }
1377
1378 static int carm_init_wait(void *mmio, u32 bits, unsigned int test_bit)
1379 {
1380         unsigned int i;
1381
1382         for (i = 0; i < 50000; i++) {
1383                 u32 tmp = readl(mmio + CARM_LMUC);
1384                 udelay(100);
1385
1386                 if (test_bit) {
1387                         if ((tmp & bits) == bits)
1388                                 return 0;
1389                 } else {
1390                         if ((tmp & bits) == 0)
1391                                 return 0;
1392                 }
1393
1394                 cond_resched();
1395         }
1396
1397         printk(KERN_ERR PFX "carm_init_wait timeout, bits == 0x%x, test_bit == %s\n",
1398                bits, test_bit ? "yes" : "no");
1399         return -EBUSY;
1400 }
1401
1402 static void carm_init_responses(struct carm_host *host)
1403 {
1404         void *mmio = host->mmio;
1405         unsigned int i;
1406         struct carm_response *resp = (struct carm_response *) host->shm;
1407
1408         for (i = 0; i < RMSG_Q_LEN; i++)
1409                 resp[i].status = 0xffffffff;
1410
1411         writel(0, mmio + CARM_RESP_IDX);
1412 }
1413
1414 static int carm_init_host(struct carm_host *host)
1415 {
1416         void *mmio = host->mmio;
1417         u32 tmp;
1418         u8 tmp8;
1419         int rc;
1420
1421         DPRINTK("ENTER\n");
1422
1423         writel(0, mmio + CARM_INT_MASK);
1424
1425         tmp8 = readb(mmio + CARM_INITC);
1426         if (tmp8 & 0x01) {
1427                 tmp8 &= ~0x01;
1428                 writeb(tmp8, CARM_INITC);
1429                 readb(mmio + CARM_INITC);       /* flush */
1430
1431                 DPRINTK("snooze...\n");
1432                 msleep(5000);
1433         }
1434
1435         tmp = readl(mmio + CARM_HMUC);
1436         if (tmp & CARM_CME) {
1437                 DPRINTK("CME bit present, waiting\n");
1438                 rc = carm_init_wait(mmio, CARM_CME, 1);
1439                 if (rc) {
1440                         DPRINTK("EXIT, carm_init_wait 1 failed\n");
1441                         return rc;
1442                 }
1443         }
1444         if (tmp & CARM_RME) {
1445                 DPRINTK("RME bit present, waiting\n");
1446                 rc = carm_init_wait(mmio, CARM_RME, 1);
1447                 if (rc) {
1448                         DPRINTK("EXIT, carm_init_wait 2 failed\n");
1449                         return rc;
1450                 }
1451         }
1452
1453         tmp &= ~(CARM_RME | CARM_CME);
1454         writel(tmp, mmio + CARM_HMUC);
1455         readl(mmio + CARM_HMUC);        /* flush */
1456
1457         rc = carm_init_wait(mmio, CARM_RME | CARM_CME, 0);
1458         if (rc) {
1459                 DPRINTK("EXIT, carm_init_wait 3 failed\n");
1460                 return rc;
1461         }
1462
1463         carm_init_buckets(mmio);
1464
1465         writel(host->shm_dma & 0xffffffff, mmio + RBUF_ADDR_LO);
1466         writel((host->shm_dma >> 16) >> 16, mmio + RBUF_ADDR_HI);
1467         writel(RBUF_LEN, mmio + RBUF_BYTE_SZ);
1468
1469         tmp = readl(mmio + CARM_HMUC);
1470         tmp |= (CARM_RME | CARM_CME | CARM_WZBC);
1471         writel(tmp, mmio + CARM_HMUC);
1472         readl(mmio + CARM_HMUC);        /* flush */
1473
1474         rc = carm_init_wait(mmio, CARM_RME | CARM_CME, 1);
1475         if (rc) {
1476                 DPRINTK("EXIT, carm_init_wait 4 failed\n");
1477                 return rc;
1478         }
1479
1480         writel(0, mmio + CARM_HMPHA);
1481         writel(INT_DEF_MASK, mmio + CARM_INT_MASK);
1482
1483         carm_init_responses(host);
1484
1485         /* start initialization, probing state machine */
1486         spin_lock_irq(&host->lock);
1487         assert(host->state == HST_INVALID);
1488         host->state = HST_PROBE_START;
1489         spin_unlock_irq(&host->lock);
1490         schedule_work(&host->fsm_task);
1491
1492         DPRINTK("EXIT\n");
1493         return 0;
1494 }
1495
1496 static int carm_init_disks(struct carm_host *host)
1497 {
1498         unsigned int i;
1499         int rc = 0;
1500
1501         for (i = 0; i < CARM_MAX_PORTS; i++) {
1502                 struct gendisk *disk;
1503                 request_queue_t *q;
1504                 struct carm_port *port;
1505
1506                 port = &host->port[i];
1507                 port->host = host;
1508                 port->port_no = i;
1509
1510                 disk = alloc_disk(CARM_MINORS_PER_MAJOR);
1511                 if (!disk) {
1512                         rc = -ENOMEM;
1513                         break;
1514                 }
1515
1516                 port->disk = disk;
1517                 sprintf(disk->disk_name, DRV_NAME "%u_%u", host->id, i);
1518                 sprintf(disk->devfs_name, DRV_NAME "/%u_%u", host->id, i);
1519                 disk->major = host->major;
1520                 disk->first_minor = i * CARM_MINORS_PER_MAJOR;
1521                 disk->fops = &carm_bd_ops;
1522                 disk->private_data = port;
1523
1524                 q = blk_init_queue(carm_rq_fn, &host->lock);
1525                 if (!q) {
1526                         rc = -ENOMEM;
1527                         break;
1528                 }
1529                 disk->queue = q;
1530                 blk_queue_max_hw_segments(q, CARM_MAX_REQ_SG);
1531                 blk_queue_max_phys_segments(q, CARM_MAX_REQ_SG);
1532                 blk_queue_segment_boundary(q, CARM_SG_BOUNDARY);
1533
1534                 q->queuedata = port;
1535         }
1536
1537         return rc;
1538 }
1539
1540 static void carm_free_disks(struct carm_host *host)
1541 {
1542         unsigned int i;
1543
1544         for (i = 0; i < CARM_MAX_PORTS; i++) {
1545                 struct gendisk *disk = host->port[i].disk;
1546                 if (disk) {
1547                         request_queue_t *q = disk->queue;
1548
1549                         if (disk->flags & GENHD_FL_UP)
1550                                 del_gendisk(disk);
1551                         if (q)
1552                                 blk_cleanup_queue(q);
1553                         put_disk(disk);
1554                 }
1555         }
1556 }
1557
1558 static int carm_init_shm(struct carm_host *host)
1559 {
1560         host->shm = pci_alloc_consistent(host->pdev, CARM_SHM_SIZE,
1561                                          &host->shm_dma);
1562         if (!host->shm)
1563                 return -ENOMEM;
1564
1565         host->msg_base = host->shm + RBUF_LEN;
1566         host->msg_dma = host->shm_dma + RBUF_LEN;
1567
1568         memset(host->shm, 0xff, RBUF_LEN);
1569         memset(host->msg_base, 0, PDC_SHM_SIZE - RBUF_LEN);
1570
1571         return 0;
1572 }
1573
1574 static int carm_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
1575 {
1576         static unsigned int printed_version;
1577         struct carm_host *host;
1578         unsigned int pci_dac;
1579         int rc;
1580         request_queue_t *q;
1581         unsigned int i;
1582
1583         if (!printed_version++)
1584                 printk(KERN_DEBUG DRV_NAME " version " DRV_VERSION "\n");
1585
1586         rc = pci_enable_device(pdev);
1587         if (rc)
1588                 return rc;
1589
1590         rc = pci_request_regions(pdev, DRV_NAME);
1591         if (rc)
1592                 goto err_out;
1593
1594 #if IF_64BIT_DMA_IS_POSSIBLE /* grrrr... */
1595         rc = pci_set_dma_mask(pdev, 0xffffffffffffffffULL);
1596         if (!rc) {
1597                 rc = pci_set_consistent_dma_mask(pdev, 0xffffffffffffffffULL);
1598                 if (rc) {
1599                         printk(KERN_ERR DRV_NAME "(%s): consistent DMA mask failure\n",
1600                                 pci_name(pdev));
1601                         goto err_out_regions;
1602                 }
1603                 pci_dac = 1;
1604         } else {
1605 #endif
1606                 rc = pci_set_dma_mask(pdev, 0xffffffffULL);
1607                 if (rc) {
1608                         printk(KERN_ERR DRV_NAME "(%s): DMA mask failure\n",
1609                                 pci_name(pdev));
1610                         goto err_out_regions;
1611                 }
1612                 pci_dac = 0;
1613 #if IF_64BIT_DMA_IS_POSSIBLE /* grrrr... */
1614         }
1615 #endif
1616
1617         host = kmalloc(sizeof(*host), GFP_KERNEL);
1618         if (!host) {
1619                 printk(KERN_ERR DRV_NAME "(%s): memory alloc failure\n",
1620                        pci_name(pdev));
1621                 rc = -ENOMEM;
1622                 goto err_out_regions;
1623         }
1624
1625         memset(host, 0, sizeof(*host));
1626         host->pdev = pdev;
1627         host->flags = pci_dac ? FL_DAC : 0;
1628         spin_lock_init(&host->lock);
1629         INIT_WORK(&host->fsm_task, carm_fsm_task, host);
1630         init_MUTEX_LOCKED(&host->probe_sem);
1631
1632         for (i = 0; i < ARRAY_SIZE(host->req); i++)
1633                 host->req[i].tag = i;
1634
1635         host->mmio = ioremap(pci_resource_start(pdev, 0),
1636                              pci_resource_len(pdev, 0));
1637         if (!host->mmio) {
1638                 printk(KERN_ERR DRV_NAME "(%s): MMIO alloc failure\n",
1639                        pci_name(pdev));
1640                 rc = -ENOMEM;
1641                 goto err_out_kfree;
1642         }
1643
1644         rc = carm_init_shm(host);
1645         if (rc) {
1646                 printk(KERN_ERR DRV_NAME "(%s): DMA SHM alloc failure\n",
1647                        pci_name(pdev));
1648                 goto err_out_iounmap;
1649         }
1650
1651         q = blk_init_queue(carm_oob_rq_fn, &host->lock);
1652         if (!q) {
1653                 printk(KERN_ERR DRV_NAME "(%s): OOB queue alloc failure\n",
1654                        pci_name(pdev));
1655                 rc = -ENOMEM;
1656                 goto err_out_pci_free;
1657         }
1658         host->oob_q = q;
1659         q->queuedata = host;
1660
1661         /*
1662          * Figure out which major to use: 160, 161, or dynamic
1663          */
1664         if (!test_and_set_bit(0, &carm_major_alloc))
1665                 host->major = 160;
1666         else if (!test_and_set_bit(1, &carm_major_alloc))
1667                 host->major = 161;
1668         else
1669                 host->flags |= FL_DYN_MAJOR;
1670
1671         host->id = carm_host_id;
1672         sprintf(host->name, DRV_NAME "%d", carm_host_id);
1673
1674         rc = register_blkdev(host->major, host->name);
1675         if (rc < 0)
1676                 goto err_out_free_majors;
1677         if (host->flags & FL_DYN_MAJOR)
1678                 host->major = rc;
1679
1680         devfs_mk_dir(DRV_NAME);
1681
1682         rc = carm_init_disks(host);
1683         if (rc)
1684                 goto err_out_blkdev_disks;
1685
1686         pci_set_master(pdev);
1687
1688         rc = request_irq(pdev->irq, carm_interrupt, SA_SHIRQ, DRV_NAME, host);
1689         if (rc) {
1690                 printk(KERN_ERR DRV_NAME "(%s): irq alloc failure\n",
1691                        pci_name(pdev));
1692                 goto err_out_blkdev_disks;
1693         }
1694
1695         rc = carm_init_host(host);
1696         if (rc)
1697                 goto err_out_free_irq;
1698
1699         DPRINTK("waiting for probe_sem\n");
1700         down(&host->probe_sem);
1701
1702         printk(KERN_INFO "%s: pci %s, ports %d, io %lx, irq %u, major %d\n",
1703                host->name, pci_name(pdev), (int) CARM_MAX_PORTS,
1704                pci_resource_start(pdev, 0), pdev->irq, host->major);
1705
1706         carm_host_id++;
1707         pci_set_drvdata(pdev, host);
1708         return 0;
1709
1710 err_out_free_irq:
1711         free_irq(pdev->irq, host);
1712 err_out_blkdev_disks:
1713         carm_free_disks(host);
1714         unregister_blkdev(host->major, host->name);
1715 err_out_free_majors:
1716         if (host->major == 160)
1717                 clear_bit(0, &carm_major_alloc);
1718         else if (host->major == 161)
1719                 clear_bit(1, &carm_major_alloc);
1720         blk_cleanup_queue(host->oob_q);
1721 err_out_pci_free:
1722         pci_free_consistent(pdev, CARM_SHM_SIZE, host->shm, host->shm_dma);
1723 err_out_iounmap:
1724         iounmap(host->mmio);
1725 err_out_kfree:
1726         kfree(host);
1727 err_out_regions:
1728         pci_release_regions(pdev);
1729 err_out:
1730         pci_disable_device(pdev);
1731         return rc;
1732 }
1733
1734 static void carm_remove_one (struct pci_dev *pdev)
1735 {
1736         struct carm_host *host = pci_get_drvdata(pdev);
1737
1738         if (!host) {
1739                 printk(KERN_ERR PFX "BUG: no host data for PCI(%s)\n",
1740                        pci_name(pdev));
1741                 return;
1742         }
1743
1744         free_irq(pdev->irq, host);
1745         carm_free_disks(host);
1746         devfs_remove(DRV_NAME);
1747         unregister_blkdev(host->major, host->name);
1748         if (host->major == 160)
1749                 clear_bit(0, &carm_major_alloc);
1750         else if (host->major == 161)
1751                 clear_bit(1, &carm_major_alloc);
1752         blk_cleanup_queue(host->oob_q);
1753         pci_free_consistent(pdev, CARM_SHM_SIZE, host->shm, host->shm_dma);
1754         iounmap(host->mmio);
1755         kfree(host);
1756         pci_release_regions(pdev);
1757         pci_disable_device(pdev);
1758         pci_set_drvdata(pdev, NULL);
1759 }
1760
1761 static int __init carm_init(void)
1762 {
1763         return pci_module_init(&carm_driver);
1764 }
1765
1766 static void __exit carm_exit(void)
1767 {
1768         pci_unregister_driver(&carm_driver);
1769 }
1770
1771 module_init(carm_init);
1772 module_exit(carm_exit);
1773
1774