drivers/block/cpqarray.c

   1 /*
   2  *    Disk Array driver for Compaq SMART2 Controllers
   3  *    Copyright 1998 Compaq Computer Corporation
   4  *
   5  *    This program is free software; you can redistribute it and/or modify
   6  *    it under the terms of the GNU General Public License as published by
   7  *    the Free Software Foundation; either version 2 of the License, or
   8  *    (at your option) any later version.
   9  *
  10  *    This program is distributed in the hope that it will be useful,
  11  *    but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  *    MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
  13  *    NON INFRINGEMENT.  See the GNU General Public License for more details.
  14  *
  15  *    You should have received a copy of the GNU General Public License
  16  *    along with this program; if not, write to the Free Software
  17  *    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  18  *
  19  *    Questions/Comments/Bugfixes to Cpqarray-discuss@lists.sourceforge.net
  20  *
  21  */
  22 #include <linux/config.h>       /* CONFIG_PROC_FS */
  23 #include <linux/module.h>
  24 #include <linux/version.h>
  25 #include <linux/types.h>
  26 #include <linux/pci.h>
  27 #include <linux/bio.h>
  28 #include <linux/interrupt.h>
  29 #include <linux/kernel.h>
  30 #include <linux/slab.h>
  31 #include <linux/delay.h>
  32 #include <linux/major.h>
  33 #include <linux/fs.h>
  34 #include <linux/blkpg.h>
  35 #include <linux/timer.h>
  36 #include <linux/proc_fs.h>
  37 #include <linux/devfs_fs_kernel.h>
  38 #include <linux/init.h>
  39 #include <linux/hdreg.h>
  40 #include <linux/spinlock.h>
  41 #include <linux/blkdev.h>
  42 #include <linux/genhd.h>
  43 #include <asm/uaccess.h>
  44 #include <asm/io.h>
  45
  46
  47 #define SMART2_DRIVER_VERSION(maj,min,submin) ((maj<<16)|(min<<8)|(submin))
  48
  49 #define DRIVER_NAME "Compaq SMART2 Driver (v 2.6.0)"
  50 #define DRIVER_VERSION SMART2_DRIVER_VERSION(2,6,0)
  51
  52 /* Embedded module documentation macros - see modules.h */
  53 /* Original author Chris Frantz - Compaq Computer Corporation */
  54 MODULE_AUTHOR("Compaq Computer Corporation");
  55 MODULE_DESCRIPTION("Driver for Compaq Smart2 Array Controllers version 2.6.0");
  56 MODULE_LICENSE("GPL");
  57
  58 #include "cpqarray.h"
  59 #include "ida_cmd.h"
  60 #include "smart1,2.h"
  61 #include "ida_ioctl.h"
  62
  63 #define READ_AHEAD      128
  64 #define NR_CMDS         128 /* This could probably go as high as ~400 */
  65
  66 #define MAX_CTLR        8
  67 #define CTLR_SHIFT      8
  68
  69 #define CPQARRAY_DMA_MASK       0xFFFFFFFF      /* 32 bit DMA */
  70
  71 static int nr_ctlr;
  72 static ctlr_info_t *hba[MAX_CTLR];
  73
  74 static int eisa[8];
  75
  76 #define NR_PRODUCTS (sizeof(products)/sizeof(struct board_type))
  77
  78 /*  board_id = Subsystem Device ID & Vendor ID
  79  *  product = Marketing Name for the board
  80  *  access = Address of the struct of function pointers
  81  */
  82 static struct board_type products[] = {
  83         { 0x0040110E, "IDA",                    &smart1_access },
  84         { 0x0140110E, "IDA-2",                  &smart1_access },
  85         { 0x1040110E, "IAES",                   &smart1_access },
  86         { 0x2040110E, "SMART",                  &smart1_access },
  87         { 0x3040110E, "SMART-2/E",              &smart2e_access },
  88         { 0x40300E11, "SMART-2/P",              &smart2_access },
  89         { 0x40310E11, "SMART-2SL",              &smart2_access },
  90         { 0x40320E11, "Smart Array 3200",       &smart2_access },
  91         { 0x40330E11, "Smart Array 3100ES",     &smart2_access },
  92         { 0x40340E11, "Smart Array 221",        &smart2_access },
  93         { 0x40400E11, "Integrated Array",       &smart4_access },
  94         { 0x40480E11, "Compaq Raid LC2",        &smart4_access },
  95         { 0x40500E11, "Smart Array 4200",       &smart4_access },
  96         { 0x40510E11, "Smart Array 4250ES",     &smart4_access },
  97         { 0x40580E11, "Smart Array 431",        &smart4_access },
  98 };
  99
 100 /* define the PCI info for the PCI cards this driver can control */
 101 const struct pci_device_id cpqarray_pci_device_id[] =
 102 {
 103         { PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_COMPAQ_42XX,
 104                 0x0E11, 0x4058, 0, 0, 0},       /* SA431 */
 105         { PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_COMPAQ_42XX,
 106                 0x0E11, 0x4051, 0, 0, 0},      /* SA4250ES */
 107         { PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_COMPAQ_42XX,
 108                 0x0E11, 0x4050, 0, 0, 0},      /* SA4200 */
 109         { PCI_VENDOR_ID_NCR, PCI_DEVICE_ID_NCR_53C1510,
 110                 0x0E11, 0x4048, 0, 0, 0},       /* LC2 */
 111         { PCI_VENDOR_ID_NCR, PCI_DEVICE_ID_NCR_53C1510,
 112                 0x0E11, 0x4040, 0, 0, 0},      /* Integrated Array */
 113         { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_SMART2P,
 114                 0x0E11, 0x4034, 0, 0, 0},       /* SA 221 */
 115         { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_SMART2P,
 116                 0x0E11, 0x4033, 0, 0, 0},       /* SA 3100ES*/
 117         { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_SMART2P,
 118                 0x0E11, 0x4032, 0, 0, 0},       /* SA 3200*/
 119         { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_SMART2P,
 120                 0x0E11, 0x4031, 0, 0, 0},       /* SA 2SL*/
 121         { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_SMART2P,
 122                 0x0E11, 0x4030, 0, 0, 0},       /* SA 2P */
 123         { 0 }
 124 };
 125
 126 MODULE_DEVICE_TABLE(pci, cpqarray_pci_device_id);
 127
 128 static struct gendisk *ida_gendisk[MAX_CTLR][NWD];
 129
 130 /* Debug... */
 131 #define DBG(s)  do { s } while(0)
 132 /* Debug (general info)... */
 133 #define DBGINFO(s) do { } while(0)
 134 /* Debug Paranoid... */
 135 #define DBGP(s)  do { } while(0)
 136 /* Debug Extra Paranoid... */
 137 #define DBGPX(s) do { } while(0)
 138
 139 int cpqarray_init_step2(void);
 140 static int cpqarray_pci_init(ctlr_info_t *c, struct pci_dev *pdev);
 141 static void *remap_pci_mem(ulong base, ulong size);
 142 static int cpqarray_eisa_detect(void);
 143 static int pollcomplete(int ctlr);
 144 static void getgeometry(int ctlr);
 145 static void start_fwbk(int ctlr);
 146
 147 static cmdlist_t * cmd_alloc(ctlr_info_t *h, int get_from_pool);
 148 static void cmd_free(ctlr_info_t *h, cmdlist_t *c, int got_from_pool);
 149
 150 static void free_hba(int i);
 151 static int alloc_cpqarray_hba(void);
 152
 153 static int sendcmd(
 154         __u8    cmd,
 155         int     ctlr,
 156         void    *buff,
 157         size_t  size,
 158         unsigned int blk,
 159         unsigned int blkcnt,
 160         unsigned int log_unit );
 161
 162 static int ida_open(struct inode *inode, struct file *filep);
 163 static int ida_release(struct inode *inode, struct file *filep);
 164 static int ida_ioctl(struct inode *inode, struct file *filep, unsigned int cmd, unsigned long arg);
 165 static int ida_ctlr_ioctl(ctlr_info_t *h, int dsk, ida_ioctl_t *io);
 166
 167 static void do_ida_request(request_queue_t *q);
 168 static void start_io(ctlr_info_t *h);
 169
 170 static inline void addQ(cmdlist_t **Qptr, cmdlist_t *c);
 171 static inline cmdlist_t *removeQ(cmdlist_t **Qptr, cmdlist_t *c);
 172 static inline void complete_buffers(struct bio *bio, int ok);
 173 static inline void complete_command(cmdlist_t *cmd, int timeout);
 174
 175 static irqreturn_t do_ida_intr(int irq, void *dev_id, struct pt_regs * regs);
 176 static void ida_timer(unsigned long tdata);
 177 static int ida_revalidate(struct gendisk *disk);
 178 static int revalidate_allvol(ctlr_info_t *host);
 179 static int cpqarray_register_ctlr(int ctlr, struct pci_dev *pdev);
 180
 181 #ifdef CONFIG_PROC_FS
 182 static void ida_procinit(int i);
 183 static int ida_proc_get_info(char *buffer, char **start, off_t offset, int length, int *eof, void *data);
 184 #else
 185 static void ida_procinit(int i) {}
 186 #endif
 187
 188 static inline drv_info_t *get_drv(struct gendisk *disk)
 189 {
 190         return disk->private_data;
 191 }
 192
 193 static inline ctlr_info_t *get_host(struct gendisk *disk)
 194 {
 195         return disk->queue->queuedata;
 196 }
 197
 198
 199 static struct block_device_operations ida_fops  = {
 200         .owner          = THIS_MODULE,
 201         .open           = ida_open,
 202         .release        = ida_release,
 203         .ioctl          = ida_ioctl,
 204         .revalidate_disk= ida_revalidate,
 205 };
 206
 207
 208 #ifdef CONFIG_PROC_FS
 209
 210 static struct proc_dir_entry *proc_array;
 211
 212 /*
 213  * Get us a file in /proc/array that says something about each controller.
 214  * Create /proc/array if it doesn't exist yet.
 215  */
 216 static void __init ida_procinit(int i)
 217 {
 218         if (proc_array == NULL) {
 219                 proc_array = proc_mkdir("cpqarray", proc_root_driver);
 220                 if (!proc_array) return;
 221         }
 222
 223         create_proc_read_entry(hba[i]->devname, 0, proc_array,
 224                                ida_proc_get_info, hba[i]);
 225 }
 226
 227 /*
 228  * Report information about this controller.
 229  */
 230 static int ida_proc_get_info(char *buffer, char **start, off_t offset, int length, int *eof, void *data)
 231 {
 232         off_t pos = 0;
 233         off_t len = 0;
 234         int size, i, ctlr;
 235         ctlr_info_t *h = (ctlr_info_t*)data;
 236         drv_info_t *drv;
 237 #ifdef CPQ_PROC_PRINT_QUEUES
 238         cmdlist_t *c;
 239         unsigned long flags;
 240 #endif
 241
 242         ctlr = h->ctlr;
 243         size = sprintf(buffer, "%s:  Compaq %s Controller\n"
 244                 "       Board ID: 0x%08lx\n"
 245                 "       Firmware Revision: %c%c%c%c\n"
 246                 "       Controller Sig: 0x%08lx\n"
 247                 "       Memory Address: 0x%08lx\n"
 248                 "       I/O Port: 0x%04x\n"
 249                 "       IRQ: %d\n"
 250                 "       Logical drives: %d\n"
 251                 "       Physical drives: %d\n\n"
 252                 "       Current Q depth: %d\n"
 253                 "       Max Q depth since init: %d\n\n",
 254                 h->devname,
 255                 h->product_name,
 256                 (unsigned long)h->board_id,
 257                 h->firm_rev[0], h->firm_rev[1], h->firm_rev[2], h->firm_rev[3],
 258                 (unsigned long)h->ctlr_sig, (unsigned long)h->vaddr,
 259                 (unsigned int) h->io_mem_addr, (unsigned int)h->intr,
 260                 h->log_drives, h->phys_drives,
 261                 h->Qdepth, h->maxQsinceinit);
 262
 263         pos += size; len += size;
 264
 265         size = sprintf(buffer+len, "Logical Drive Info:\n");
 266         pos += size; len += size;
 267
 268         for(i=0; i<h->log_drives; i++) {
 269                 drv = &h->drv[i];
 270                 size = sprintf(buffer+len, "ida/c%dd%d: blksz=%d nr_blks=%d\n",
 271                                 ctlr, i, drv->blk_size, drv->nr_blks);
 272                 pos += size; len += size;
 273         }
 274
 275 #ifdef CPQ_PROC_PRINT_QUEUES
 276         spin_lock_irqsave(IDA_LOCK(h->ctlr), flags);
 277         size = sprintf(buffer+len, "\nCurrent Queues:\n");
 278         pos += size; len += size;
 279
 280         c = h->reqQ;
 281         size = sprintf(buffer+len, "reqQ = %p", c); pos += size; len += size;
 282         if (c) c=c->next;
 283         while(c && c != h->reqQ) {
 284                 size = sprintf(buffer+len, "->%p", c);
 285                 pos += size; len += size;
 286                 c=c->next;
 287         }
 288
 289         c = h->cmpQ;
 290         size = sprintf(buffer+len, "\ncmpQ = %p", c); pos += size; len += size;
 291         if (c) c=c->next;
 292         while(c && c != h->cmpQ) {
 293                 size = sprintf(buffer+len, "->%p", c);
 294                 pos += size; len += size;
 295                 c=c->next;
 296         }
 297
 298         size = sprintf(buffer+len, "\n"); pos += size; len += size;
 299         spin_unlock_irqrestore(IDA_LOCK(h->ctlr), flags);
 300 #endif
 301         size = sprintf(buffer+len, "nr_allocs = %d\nnr_frees = %d\n",
 302                         h->nr_allocs, h->nr_frees);
 303         pos += size; len += size;
 304
 305         *eof = 1;
 306         *start = buffer+offset;
 307         len -= offset;
 308         if (len>length)
 309                 len = length;
 310         return len;
 311 }
 312 #endif /* CONFIG_PROC_FS */
 313
 314 MODULE_PARM(eisa, "1-8i");
 315
 316 /* This is a bit of a hack,
 317  * necessary to support both eisa and pci
 318  */
 319 int __init cpqarray_init(void)
 320 {
 321         return (cpqarray_init_step2());
 322 }
 323
 324 static void release_io_mem(ctlr_info_t *c)
 325 {
 326         /* if IO mem was not protected do nothing */
 327         if( c->io_mem_addr == 0)
 328                 return;
 329         release_region(c->io_mem_addr, c->io_mem_length);
 330         c->io_mem_addr = 0;
 331         c->io_mem_length = 0;
 332 }
 333
 334 static void __devexit cpqarray_remove_one(int i)
 335 {
 336         int j;
 337         char buff[4];
 338
 339         /* sendcmd will turn off interrupt, and send the flush...
 340          * To write all data in the battery backed cache to disks
 341          * no data returned, but don't want to send NULL to sendcmd */
 342         if( sendcmd(FLUSH_CACHE, i, buff, 4, 0, 0, 0))
 343         {
 344                 printk(KERN_WARNING "Unable to flush cache on controller %d\n",
 345                                 i);
 346         }
 347         free_irq(hba[i]->intr, hba[i]);
 348         iounmap(hba[i]->vaddr);
 349         unregister_blkdev(COMPAQ_SMART2_MAJOR+i, hba[i]->devname);
 350         del_timer(&hba[i]->timer);
 351         remove_proc_entry(hba[i]->devname, proc_array);
 352         pci_free_consistent(hba[i]->pci_dev,
 353                         NR_CMDS * sizeof(cmdlist_t), (hba[i]->cmd_pool),
 354                         hba[i]->cmd_pool_dhandle);
 355         kfree(hba[i]->cmd_pool_bits);
 356         for(j = 0; j < NWD; j++) {
 357                 if (ida_gendisk[i][j]->flags & GENHD_FL_UP)
 358                         del_gendisk(ida_gendisk[i][j]);
 359                 devfs_remove("ida/c%dd%d",i,j);
 360                 put_disk(ida_gendisk[i][j]);
 361         }
 362         blk_cleanup_queue(hba[i]->queue);
 363         release_io_mem(hba[i]);
 364         free_hba(i);
 365 }
 366
 367 static void __devexit cpqarray_remove_one_pci (struct pci_dev *pdev)
 368 {
 369         int i;
 370         ctlr_info_t *tmp_ptr;
 371
 372         if (pci_get_drvdata(pdev) == NULL) {
 373                 printk( KERN_ERR "cpqarray: Unable to remove device \n");
 374                 return;
 375         }
 376
 377         tmp_ptr = pci_get_drvdata(pdev);
 378         i = tmp_ptr->ctlr;
 379         if (hba[i] == NULL) {
 380                 printk(KERN_ERR "cpqarray: controller %d appears to have"
 381                         "already been removed \n", i);
 382                 return;
 383         }
 384         pci_set_drvdata(pdev, NULL);
 385
 386         cpqarray_remove_one(i);
 387 }
 388
 389 /* removing an instance that was not removed automatically..
 390  * must be an eisa card.
 391  */
 392 static void __devexit cpqarray_remove_one_eisa (int i)
 393 {
 394         if (hba[i] == NULL) {
 395                 printk(KERN_ERR "cpqarray: controller %d appears to have"
 396                         "already been removed \n", i);
 397                 return;
 398         }
 399         cpqarray_remove_one(i);
 400 }
 401
 402 /* pdev is NULL for eisa */
 403 static int cpqarray_register_ctlr( int i, struct pci_dev *pdev)
 404 {
 405         request_queue_t *q;
 406         int j;
 407
 408         /*
 409          * register block devices
 410          * Find disks and fill in structs
 411          * Get an interrupt, set the Q depth and get into /proc
 412          */
 413
 414         /* If this successful it should insure that we are the only */
 415         /* instance of the driver */
 416         if (register_blkdev(COMPAQ_SMART2_MAJOR+i, hba[i]->devname)) {
 417                 goto Enomem4;
 418         }
 419         hba[i]->access.set_intr_mask(hba[i], 0);
 420         if (request_irq(hba[i]->intr, do_ida_intr,
 421                 SA_INTERRUPT|SA_SHIRQ, hba[i]->devname, hba[i]))
 422         {
 423                 printk(KERN_ERR "cpqarray: Unable to get irq %d for %s\n",
 424                                 hba[i]->intr, hba[i]->devname);
 425                 goto Enomem3;
 426         }
 427
 428         for (j=0; j<NWD; j++) {
 429                 ida_gendisk[i][j] = alloc_disk(1 << NWD_SHIFT);
 430                 if (!ida_gendisk[i][j])
 431                         goto Enomem2;
 432         }
 433
 434         hba[i]->cmd_pool = (cmdlist_t *)pci_alloc_consistent(
 435                 hba[i]->pci_dev, NR_CMDS * sizeof(cmdlist_t),
 436                 &(hba[i]->cmd_pool_dhandle));
 437         hba[i]->cmd_pool_bits = kmalloc(
 438                 ((NR_CMDS+BITS_PER_LONG-1)/BITS_PER_LONG)*sizeof(unsigned long),
 439                 GFP_KERNEL);
 440
 441         if (!hba[i]->cmd_pool_bits || !hba[i]->cmd_pool)
 442                         goto Enomem1;
 443
 444         memset(hba[i]->cmd_pool, 0, NR_CMDS * sizeof(cmdlist_t));
 445         memset(hba[i]->cmd_pool_bits, 0, ((NR_CMDS+BITS_PER_LONG-1)/BITS_PER_LONG)*sizeof(unsigned long));
 446         printk(KERN_INFO "cpqarray: Finding drives on %s",
 447                 hba[i]->devname);
 448
 449         spin_lock_init(&hba[i]->lock);
 450         q = blk_init_queue(do_ida_request, &hba[i]->lock);
 451         if (!q)
 452                 goto Enomem1;
 453
 454         hba[i]->queue = q;
 455         q->queuedata = hba[i];
 456
 457         getgeometry(i);
 458         start_fwbk(i);
 459
 460         ida_procinit(i);
 461
 462         if (pdev)
 463                 blk_queue_bounce_limit(q, hba[i]->pci_dev->dma_mask);
 464
 465         /* This is a hardware imposed limit. */
 466         blk_queue_max_hw_segments(q, SG_MAX);
 467
 468         /* This is a driver limit and could be eliminated. */
 469         blk_queue_max_phys_segments(q, SG_MAX);
 470
 471         init_timer(&hba[i]->timer);
 472         hba[i]->timer.expires = jiffies + IDA_TIMER;
 473         hba[i]->timer.data = (unsigned long)hba[i];
 474         hba[i]->timer.function = ida_timer;
 475         add_timer(&hba[i]->timer);
 476
 477         /* Enable IRQ now that spinlock and rate limit timer are set up */
 478         hba[i]->access.set_intr_mask(hba[i], FIFO_NOT_EMPTY);
 479
 480         for(j=0; j<NWD; j++) {
 481                 struct gendisk *disk = ida_gendisk[i][j];
 482                 drv_info_t *drv = &hba[i]->drv[j];
 483                 sprintf(disk->disk_name, "ida/c%dd%d", i, j);
 484                 disk->major = COMPAQ_SMART2_MAJOR + i;
 485                 disk->first_minor = j<<NWD_SHIFT;
 486                 disk->fops = &ida_fops;
 487                 if (j && !drv->nr_blks)
 488                         continue;
 489                 blk_queue_hardsect_size(hba[i]->queue, drv->blk_size);
 490                 set_capacity(disk, drv->nr_blks);
 491                 disk->queue = hba[i]->queue;
 492                 disk->private_data = drv;
 493                 add_disk(disk);
 494         }
 495
 496         /* done ! */
 497         return(i);
 498
 499 Enomem1:
 500         nr_ctlr = i;
 501         kfree(hba[i]->cmd_pool_bits);
 502         if (hba[i]->cmd_pool)
 503                 pci_free_consistent(hba[i]->pci_dev, NR_CMDS*sizeof(cmdlist_t),
 504                                     hba[i]->cmd_pool, hba[i]->cmd_pool_dhandle);
 505 Enomem2:
 506         while (j--) {
 507                 put_disk(ida_gendisk[i][j]);
 508                 ida_gendisk[i][j] = NULL;
 509         }
 510         free_irq(hba[i]->intr, hba[i]);
 511 Enomem3:
 512         unregister_blkdev(COMPAQ_SMART2_MAJOR+i, hba[i]->devname);
 513 Enomem4:
 514         if (pdev)
 515                 pci_set_drvdata(pdev, NULL);
 516         release_io_mem(hba[i]);
 517         free_hba(i);
 518
 519         printk( KERN_ERR "cpqarray: out of memory");
 520
 521         return -1;
 522 }
 523
 524 static int __init cpqarray_init_one( struct pci_dev *pdev,
 525         const struct pci_device_id *ent)
 526 {
 527         int i;
 528
 529         printk(KERN_DEBUG "cpqarray: Device 0x%x has been found at"
 530                         " bus %d dev %d func %d\n",
 531                         pdev->device, pdev->bus->number, PCI_SLOT(pdev->devfn),
 532                         PCI_FUNC(pdev->devfn));
 533         i = alloc_cpqarray_hba();
 534         if( i < 0 )
 535                 return (-1);
 536         memset(hba[i], 0, sizeof(ctlr_info_t));
 537         sprintf(hba[i]->devname, "ida%d", i);
 538         hba[i]->ctlr = i;
 539         /* Initialize the pdev driver private data */
 540         pci_set_drvdata(pdev, hba[i]);
 541
 542         if (cpqarray_pci_init(hba[i], pdev) != 0) {
 543                 pci_set_drvdata(pdev, NULL);
 544                 release_io_mem(hba[i]);
 545                 free_hba(i);
 546                 return -1;
 547         }
 548
 549         return (cpqarray_register_ctlr(i, pdev));
 550 }
 551
 552 static struct pci_driver cpqarray_pci_driver = {
 553         name:   "cpqarray",
 554         probe:  cpqarray_init_one,
 555         remove:  __devexit_p(cpqarray_remove_one_pci),
 556         id_table:  cpqarray_pci_device_id,
 557 };
 558
 559 /*
 560  *  This is it.  Find all the controllers and register them.
 561  *  returns the number of block devices registered.
 562  */
 563 int __init cpqarray_init_step2(void)
 564 {
 565         int num_cntlrs_reg = 0;
 566         int i;
 567         int rc = 0;
 568
 569         /* detect controllers */
 570         printk(DRIVER_NAME "\n");
 571 /* TODO: If it's an eisa only system, will rc return negative? */
 572         rc = pci_register_driver(&cpqarray_pci_driver);
 573         if (rc < 0)
 574                 return rc;
 575         cpqarray_eisa_detect();
 576
 577         for (i=0; i < MAX_CTLR; i++) {
 578                 if (hba[i] != NULL)
 579                         num_cntlrs_reg++;
 580         }
 581
 582         return(num_cntlrs_reg);
 583 }
 584
 585 /* Function to find the first free pointer into our hba[] array */
 586 /* Returns -1 if no free entries are left.  */
 587 static int alloc_cpqarray_hba(void)
 588 {
 589         int i;
 590
 591         for(i=0; i< MAX_CTLR; i++) {
 592                 if (hba[i] == NULL) {
 593                         hba[i] = kmalloc(sizeof(ctlr_info_t), GFP_KERNEL);
 594                         if(hba[i]==NULL) {
 595                                 printk(KERN_ERR "cpqarray: out of memory.\n");
 596                                 return (-1);
 597                         }
 598                         return (i);
 599                 }
 600         }
 601         printk(KERN_WARNING "cpqarray: This driver supports a maximum"
 602                 " of 8 controllers.\n");
 603         return(-1);
 604 }
 605
 606 static void free_hba(int i)
 607 {
 608         kfree(hba[i]);
 609         hba[i]=NULL;
 610 }
 611
 612 /*
 613  * Find the IO address of the controller, its IRQ and so forth.  Fill
 614  * in some basic stuff into the ctlr_info_t structure.
 615  */
 616 static int cpqarray_pci_init(ctlr_info_t *c, struct pci_dev *pdev)
 617 {
 618         ushort vendor_id, device_id, command;
 619         unchar cache_line_size, latency_timer;
 620         unchar irq, revision;
 621         unsigned long addr[6];
 622         __u32 board_id;
 623
 624         int i;
 625
 626         c->pci_dev = pdev;
 627         if (pci_enable_device(pdev)) {
 628                 printk(KERN_ERR "cpqarray: Unable to Enable PCI device\n");
 629                 return -1;
 630         }
 631         vendor_id = pdev->vendor;
 632         device_id = pdev->device;
 633         irq = pdev->irq;
 634
 635         for(i=0; i<6; i++)
 636                 addr[i] = pci_resource_start(pdev, i);
 637
 638         if (pci_set_dma_mask(pdev, CPQARRAY_DMA_MASK) != 0)
 639         {
 640                 printk(KERN_ERR "cpqarray: Unable to set DMA mask\n");
 641                 return -1;
 642         }
 643
 644         pci_read_config_word(pdev, PCI_COMMAND, &command);
 645         pci_read_config_byte(pdev, PCI_CLASS_REVISION, &revision);
 646         pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &cache_line_size);
 647         pci_read_config_byte(pdev, PCI_LATENCY_TIMER, &latency_timer);
 648
 649         pci_read_config_dword(pdev, 0x2c, &board_id);
 650
 651         /* check to see if controller has been disabled */
 652         if(!(command & 0x02)) {
 653                 printk(KERN_WARNING
 654                         "cpqarray: controller appears to be disabled\n");
 655                 return(-1);
 656         }
 657
 658 DBGINFO(
 659         printk("vendor_id = %x\n", vendor_id);
 660         printk("device_id = %x\n", device_id);
 661         printk("command = %x\n", command);
 662         for(i=0; i<6; i++)
 663                 printk("addr[%d] = %lx\n", i, addr[i]);
 664         printk("revision = %x\n", revision);
 665         printk("irq = %x\n", irq);
 666         printk("cache_line_size = %x\n", cache_line_size);
 667         printk("latency_timer = %x\n", latency_timer);
 668         printk("board_id = %x\n", board_id);
 669 );
 670
 671         c->intr = irq;
 672
 673         for(i=0; i<6; i++) {
 674                 if (pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE_IO)
 675                 { /* IO space */
 676                         c->io_mem_addr = addr[i];
 677                         c->io_mem_length = pci_resource_end(pdev, i)
 678                                 - pci_resource_start(pdev, i) + 1;
 679                         if(!request_region( c->io_mem_addr, c->io_mem_length,
 680                                 "cpqarray"))
 681                         {
 682                                 printk( KERN_WARNING "cpqarray I/O memory range already in use addr %lx length = %ld\n", c->io_mem_addr, c->io_mem_length);
 683                                 c->io_mem_addr = 0;
 684                                 c->io_mem_length = 0;
 685                         }
 686                         break;
 687                 }
 688         }
 689
 690         c->paddr = 0;
 691         for(i=0; i<6; i++)
 692                 if (!(pci_resource_flags(pdev, i) &
 693                                 PCI_BASE_ADDRESS_SPACE_IO)) {
 694                         c->paddr = pci_resource_start (pdev, i);
 695                         break;
 696                 }
 697         if (!c->paddr)
 698                 return -1;
 699         c->vaddr = remap_pci_mem(c->paddr, 128);
 700         if (!c->vaddr)
 701                 return -1;
 702         c->board_id = board_id;
 703
 704         for(i=0; i<NR_PRODUCTS; i++) {
 705                 if (board_id == products[i].board_id) {
 706                         c->product_name = products[i].product_name;
 707                         c->access = *(products[i].access);
 708                         break;
 709                 }
 710         }
 711         if (i == NR_PRODUCTS) {
 712                 printk(KERN_WARNING "cpqarray: Sorry, I don't know how"
 713                         " to access the SMART Array controller %08lx\n",
 714                                 (unsigned long)board_id);
 715                 return -1;
 716         }
 717
 718         return 0;
 719 }
 720
 721 /*
 722  * Map (physical) PCI mem into (virtual) kernel space
 723  */
 724 static void *remap_pci_mem(ulong base, ulong size)
 725 {
 726         ulong page_base        = ((ulong) base) & PAGE_MASK;
 727         ulong page_offs        = ((ulong) base) - page_base;
 728         void *page_remapped    = ioremap(page_base, page_offs+size);
 729
 730         return (page_remapped ? (page_remapped + page_offs) : NULL);
 731 }
 732
 733 #ifndef MODULE
 734 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,3,13)
 735 /*
 736  * Config string is a comma separated set of i/o addresses of EISA cards.
 737  */
 738 static int cpqarray_setup(char *str)
 739 {
 740         int i, ints[9];
 741
 742         (void)get_options(str, ARRAY_SIZE(ints), ints);
 743
 744         for(i=0; i<ints[0] && i<8; i++)
 745                 eisa[i] = ints[i+1];
 746         return 1;
 747 }
 748
 749 __setup("smart2=", cpqarray_setup);
 750
 751 #else
 752
 753 /*
 754  * Copy the contents of the ints[] array passed to us by init.
 755  */
 756 void cpqarray_setup(char *str, int *ints)
 757 {
 758         int i;
 759         for(i=0; i<ints[0] && i<8; i++)
 760                 eisa[i] = ints[i+1];
 761 }
 762 #endif
 763 #endif
 764
 765 /*
 766  * Find an EISA controller's signature.  Set up an hba if we find it.
 767  */
 768 static int cpqarray_eisa_detect(void)
 769 {
 770         int i=0, j;
 771         __u32 board_id;
 772         int intr;
 773         int ctlr;
 774         int num_ctlr = 0;
 775
 776         while(i<8 && eisa[i]) {
 777                 ctlr = alloc_cpqarray_hba();
 778                 if(ctlr == -1)
 779                         break;
 780                 board_id = inl(eisa[i]+0xC80);
 781                 for(j=0; j < NR_PRODUCTS; j++)
 782                         if (board_id == products[j].board_id)
 783                                 break;
 784
 785                 if (j == NR_PRODUCTS) {
 786                         printk(KERN_WARNING "cpqarray: Sorry, I don't know how"
 787                                 " to access the SMART Array controller %08lx\n",                                 (unsigned long)board_id);
 788                         continue;
 789                 }
 790
 791                 memset(hba[ctlr], 0, sizeof(ctlr_info_t));
 792                 hba[ctlr]->io_mem_addr = eisa[i];
 793                 hba[ctlr]->io_mem_length = 0x7FF;
 794                 if(!request_region(hba[ctlr]->io_mem_addr,
 795                                 hba[ctlr]->io_mem_length,
 796                                 "cpqarray"))
 797                 {
 798                         printk(KERN_WARNING "cpqarray: I/O range already in "
 799                                         "use addr = %lx length = %ld\n",
 800                                         hba[ctlr]->io_mem_addr,
 801                                         hba[ctlr]->io_mem_length);
 802                         free_hba(ctlr);
 803                         continue;
 804                 }
 805
 806                 /*
 807                  * Read the config register to find our interrupt
 808                  */
 809                 intr = inb(eisa[i]+0xCC0) >> 4;
 810                 if (intr & 1) intr = 11;
 811                 else if (intr & 2) intr = 10;
 812                 else if (intr & 4) intr = 14;
 813                 else if (intr & 8) intr = 15;
 814
 815                 hba[ctlr]->intr = intr;
 816                 sprintf(hba[ctlr]->devname, "ida%d", nr_ctlr);
 817                 hba[ctlr]->product_name = products[j].product_name;
 818                 hba[ctlr]->access = *(products[j].access);
 819                 hba[ctlr]->ctlr = ctlr;
 820                 hba[ctlr]->board_id = board_id;
 821                 hba[ctlr]->pci_dev = NULL; /* not PCI */
 822
 823 DBGINFO(
 824         printk("i = %d, j = %d\n", i, j);
 825         printk("irq = %x\n", intr);
 826         printk("product name = %s\n", products[j].product_name);
 827         printk("board_id = %x\n", board_id);
 828 );
 829
 830                 num_ctlr++;
 831                 i++;
 832
 833                 if (cpqarray_register_ctlr(ctlr, NULL) == -1)
 834                         printk(KERN_WARNING
 835                                 "cpqarray: Can't register EISA controller %d\n",
 836                                 ctlr);
 837
 838         }
 839
 840         return num_ctlr;
 841 }
 842
 843 /*
 844  * Open.  Make sure the device is really there.
 845  */
 846 static int ida_open(struct inode *inode, struct file *filep)
 847 {
 848         drv_info_t *drv = get_drv(inode->i_bdev->bd_disk);
 849         ctlr_info_t *host = get_host(inode->i_bdev->bd_disk);
 850
 851         DBGINFO(printk("ida_open %s\n", inode->i_bdev->bd_disk->disk_name));
 852         /*
 853          * Root is allowed to open raw volume zero even if it's not configured
 854          * so array config can still work.  I don't think I really like this,
 855          * but I'm already using way to many device nodes to claim another one
 856          * for "raw controller".
 857          */
 858         if (!drv->nr_blks) {
 859                 if (!capable(CAP_SYS_RAWIO))
 860                         return -ENXIO;
 861                 if (!capable(CAP_SYS_ADMIN) && drv != host->drv)
 862                         return -ENXIO;
 863         }
 864         host->usage_count++;
 865         return 0;
 866 }
 867
 868 /*
 869  * Close.  Sync first.
 870  */
 871 static int ida_release(struct inode *inode, struct file *filep)
 872 {
 873         ctlr_info_t *host = get_host(inode->i_bdev->bd_disk);
 874         host->usage_count--;
 875         return 0;
 876 }
 877
 878 /*
 879  * Enqueuing and dequeuing functions for cmdlists.
 880  */
 881 static inline void addQ(cmdlist_t **Qptr, cmdlist_t *c)
 882 {
 883         if (*Qptr == NULL) {
 884                 *Qptr = c;
 885                 c->next = c->prev = c;
 886         } else {
 887                 c->prev = (*Qptr)->prev;
 888                 c->next = (*Qptr);
 889                 (*Qptr)->prev->next = c;
 890                 (*Qptr)->prev = c;
 891         }
 892 }
 893
 894 static inline cmdlist_t *removeQ(cmdlist_t **Qptr, cmdlist_t *c)
 895 {
 896         if (c && c->next != c) {
 897                 if (*Qptr == c) *Qptr = c->next;
 898                 c->prev->next = c->next;
 899                 c->next->prev = c->prev;
 900         } else {
 901                 *Qptr = NULL;
 902         }
 903         return c;
 904 }
 905
 906 /*
 907  * Get a request and submit it to the controller.
 908  * This routine needs to grab all the requests it possibly can from the
 909  * req Q and submit them.  Interrupts are off (and need to be off) when you
 910  * are in here (either via the dummy do_ida_request functions or by being
 911  * called from the interrupt handler
 912  */
 913 static void do_ida_request(request_queue_t *q)
 914 {
 915         ctlr_info_t *h = q->queuedata;
 916         cmdlist_t *c;
 917         struct request *creq;
 918         struct scatterlist tmp_sg[SG_MAX];
 919         int i, dir, seg;
 920
 921         if (blk_queue_plugged(q))
 922                 goto startio;
 923
 924 queue_next:
 925         creq = elv_next_request(q);
 926         if (!creq)
 927                 goto startio;
 928
 929         if (creq->nr_phys_segments > SG_MAX)
 930                 BUG();
 931
 932         if ((c = cmd_alloc(h,1)) == NULL)
 933                 goto startio;
 934
 935         blkdev_dequeue_request(creq);
 936
 937         c->ctlr = h->ctlr;
 938         c->hdr.unit = (drv_info_t *)(creq->rq_disk->private_data) - h->drv;
 939         c->hdr.size = sizeof(rblk_t) >> 2;
 940         c->size += sizeof(rblk_t);
 941
 942         c->req.hdr.blk = creq->sector;
 943         c->rq = creq;
 944 DBGPX(
 945         printk("sector=%d, nr_sectors=%d\n", creq->sector, creq->nr_sectors);
 946 );
 947         seg = blk_rq_map_sg(q, creq, tmp_sg);
 948
 949         /* Now do all the DMA Mappings */
 950         if (rq_data_dir(creq) == READ)
 951                 dir = PCI_DMA_FROMDEVICE;
 952         else
 953                 dir = PCI_DMA_TODEVICE;
 954         for( i=0; i < seg; i++)
 955         {
 956                 c->req.sg[i].size = tmp_sg[i].length;
 957                 c->req.sg[i].addr = (__u32) pci_map_page(h->pci_dev,
 958                                                  tmp_sg[i].page,
 959                                                  tmp_sg[i].offset,
 960                                                  tmp_sg[i].length, dir);
 961         }
 962 DBGPX(  printk("Submitting %d sectors in %d segments\n", creq->nr_sectors, seg); );
 963         c->req.hdr.sg_cnt = seg;
 964         c->req.hdr.blk_cnt = creq->nr_sectors;
 965         c->req.hdr.cmd = (rq_data_dir(creq) == READ) ? IDA_READ : IDA_WRITE;
 966         c->type = CMD_RWREQ;
 967
 968         /* Put the request on the tail of the request queue */
 969         addQ(&h->reqQ, c);
 970         h->Qdepth++;
 971         if (h->Qdepth > h->maxQsinceinit)
 972                 h->maxQsinceinit = h->Qdepth;
 973
 974         goto queue_next;
 975
 976 startio:
 977         start_io(h);
 978 }
 979
 980 /*
 981  * start_io submits everything on a controller's request queue
 982  * and moves it to the completion queue.
 983  *
 984  * Interrupts had better be off if you're in here
 985  */
 986 static void start_io(ctlr_info_t *h)
 987 {
 988         cmdlist_t *c;
 989
 990         while((c = h->reqQ) != NULL) {
 991                 /* Can't do anything if we're busy */
 992                 if (h->access.fifo_full(h) == 0)
 993                         return;
 994
 995                 /* Get the first entry from the request Q */
 996                 removeQ(&h->reqQ, c);
 997                 h->Qdepth--;
 998
 999                 /* Tell the controller to do our bidding */
1000                 h->access.submit_command(h, c);
1001
1002                 /* Get onto the completion Q */
1003                 addQ(&h->cmpQ, c);
1004         }
1005 }
1006
1007 static inline void complete_buffers(struct bio *bio, int ok)
1008 {
1009         struct bio *xbh;
1010         while(bio) {
1011                 int nr_sectors = bio_sectors(bio);
1012
1013                 xbh = bio->bi_next;
1014                 bio->bi_next = NULL;
1015
1016                 blk_finished_io(nr_sectors);
1017                 bio_endio(bio, nr_sectors << 9, ok ? 0 : -EIO);
1018
1019                 bio = xbh;
1020         }
1021 }
1022 /*
1023  * Mark all buffers that cmd was responsible for
1024  */
1025 static inline void complete_command(cmdlist_t *cmd, int timeout)
1026 {
1027         int ok=1;
1028         int i, ddir;
1029
1030         if (cmd->req.hdr.rcode & RCODE_NONFATAL &&
1031            (hba[cmd->ctlr]->misc_tflags & MISC_NONFATAL_WARN) == 0) {
1032                 printk(KERN_NOTICE "Non Fatal error on ida/c%dd%d\n",
1033                                 cmd->ctlr, cmd->hdr.unit);
1034                 hba[cmd->ctlr]->misc_tflags |= MISC_NONFATAL_WARN;
1035         }
1036         if (cmd->req.hdr.rcode & RCODE_FATAL) {
1037                 printk(KERN_WARNING "Fatal error on ida/c%dd%d\n",
1038                                 cmd->ctlr, cmd->hdr.unit);
1039                 ok = 0;
1040         }
1041         if (cmd->req.hdr.rcode & RCODE_INVREQ) {
1042                                 printk(KERN_WARNING "Invalid request on ida/c%dd%d = (cmd=%x sect=%d cnt=%d sg=%d ret=%x)\n",
1043                                 cmd->ctlr, cmd->hdr.unit, cmd->req.hdr.cmd,
1044                                 cmd->req.hdr.blk, cmd->req.hdr.blk_cnt,
1045                                 cmd->req.hdr.sg_cnt, cmd->req.hdr.rcode);
1046                 ok = 0;
1047         }
1048         if (timeout) ok = 0;
1049         /* unmap the DMA mapping for all the scatter gather elements */
1050         if (cmd->req.hdr.cmd == IDA_READ)
1051                 ddir = PCI_DMA_FROMDEVICE;
1052         else
1053                 ddir = PCI_DMA_TODEVICE;
1054         for(i=0; i<cmd->req.hdr.sg_cnt; i++)
1055                 pci_unmap_page(hba[cmd->ctlr]->pci_dev, cmd->req.sg[i].addr,
1056                                 cmd->req.sg[i].size, ddir);
1057
1058         complete_buffers(cmd->rq->bio, ok);
1059
1060         DBGPX(printk("Done with %p\n", cmd->rq););
1061         end_that_request_last(cmd->rq);
1062 }
1063
1064 /*
1065  *  The controller will interrupt us upon completion of commands.
1066  *  Find the command on the completion queue, remove it, tell the OS and
1067  *  try to queue up more IO
1068  */
1069 static irqreturn_t do_ida_intr(int irq, void *dev_id, struct pt_regs *regs)
1070 {
1071         ctlr_info_t *h = dev_id;
1072         cmdlist_t *c;
1073         unsigned long istat;
1074         unsigned long flags;
1075         __u32 a,a1;
1076
1077         istat = h->access.intr_pending(h);
1078         /* Is this interrupt for us? */
1079         if (istat == 0)
1080                 return IRQ_NONE;
1081
1082         /*
1083          * If there are completed commands in the completion queue,
1084          * we had better do something about it.
1085          */
1086         spin_lock_irqsave(IDA_LOCK(h->ctlr), flags);
1087         if (istat & FIFO_NOT_EMPTY) {
1088                 while((a = h->access.command_completed(h))) {
1089                         a1 = a; a &= ~3;
1090                         if ((c = h->cmpQ) == NULL)
1091                         {
1092                                 printk(KERN_WARNING "cpqarray: Completion of %08lx ignored\n", (unsigned long)a1);
1093                                 continue;
1094                         }
1095                         while(c->busaddr != a) {
1096                                 c = c->next;
1097                                 if (c == h->cmpQ)
1098                                         break;
1099                         }
1100                         /*
1101                          * If we've found the command, take it off the
1102                          * completion Q and free it
1103                          */
1104                         if (c->busaddr == a) {
1105                                 removeQ(&h->cmpQ, c);
1106                                 /*  Check for invalid command.
1107                                  *  Controller returns command error,
1108                                  *  But rcode = 0.
1109                                  */
1110
1111                                 if((a1 & 0x03) && (c->req.hdr.rcode == 0))
1112                                 {
1113                                         c->req.hdr.rcode = RCODE_INVREQ;
1114                                 }
1115                                 if (c->type == CMD_RWREQ) {
1116                                         complete_command(c, 0);
1117                                         cmd_free(h, c, 1);
1118                                 } else if (c->type == CMD_IOCTL_PEND) {
1119                                         c->type = CMD_IOCTL_DONE;
1120                                 }
1121                                 continue;
1122                         }
1123                 }
1124         }
1125
1126         /*
1127          * See if we can queue up some more IO
1128          */
1129         do_ida_request(h->queue);
1130         spin_unlock_irqrestore(IDA_LOCK(h->ctlr), flags);
1131         return IRQ_HANDLED;
1132 }
1133
1134 /*
1135  * This timer was for timing out requests that haven't happened after
1136  * IDA_TIMEOUT.  That wasn't such a good idea.  This timer is used to
1137  * reset a flags structure so we don't flood the user with
1138  * "Non-Fatal error" messages.
1139  */
1140 static void ida_timer(unsigned long tdata)
1141 {
1142         ctlr_info_t *h = (ctlr_info_t*)tdata;
1143
1144         h->timer.expires = jiffies + IDA_TIMER;
1145         add_timer(&h->timer);
1146         h->misc_tflags = 0;
1147 }
1148
1149 /*
1150  *  ida_ioctl does some miscellaneous stuff like reporting drive geometry,
1151  *  setting readahead and submitting commands from userspace to the controller.
1152  */
1153 static int ida_ioctl(struct inode *inode, struct file *filep, unsigned int cmd, unsigned long arg)
1154 {
1155         drv_info_t *drv = get_drv(inode->i_bdev->bd_disk);
1156         ctlr_info_t *host = get_host(inode->i_bdev->bd_disk);
1157         int error;
1158         int diskinfo[4];
1159         struct hd_geometry *geo = (struct hd_geometry *)arg;
1160         ida_ioctl_t *io = (ida_ioctl_t*)arg;
1161         ida_ioctl_t *my_io;
1162
1163         switch(cmd) {
1164         case HDIO_GETGEO:
1165                 if (drv->cylinders) {
1166                         diskinfo[0] = drv->heads;
1167                         diskinfo[1] = drv->sectors;
1168                         diskinfo[2] = drv->cylinders;
1169                 } else {
1170                         diskinfo[0] = 0xff;
1171                         diskinfo[1] = 0x3f;
1172                         diskinfo[2] = drv->nr_blks / (0xff*0x3f);
1173                 }
1174                 put_user(diskinfo[0], &geo->heads);
1175                 put_user(diskinfo[1], &geo->sectors);
1176                 put_user(diskinfo[2], &geo->cylinders);
1177                 put_user(get_start_sect(inode->i_bdev), &geo->start);
1178                 return 0;
1179         case IDAGETDRVINFO:
1180                 if (copy_to_user(&io->c.drv, drv, sizeof(drv_info_t)))
1181                         return -EFAULT;
1182                 return 0;
1183         case IDAPASSTHRU:
1184                 if (!capable(CAP_SYS_RAWIO))
1185                         return -EPERM;
1186                 my_io = kmalloc(sizeof(ida_ioctl_t), GFP_KERNEL);
1187                 if (!my_io)
1188                         return -ENOMEM;
1189                 error = -EFAULT;
1190                 if (copy_from_user(my_io, io, sizeof(*my_io)))
1191                         goto out_passthru;
1192                 error = ida_ctlr_ioctl(host, drv - host->drv, my_io);
1193                 if (error)
1194                         goto out_passthru;
1195                 error = -EFAULT;
1196                 if (copy_to_user(io, &my_io, sizeof(*my_io)))
1197                         goto out_passthru;
1198                 error = 0;
1199 out_passthru:
1200                 kfree(my_io);
1201                 return error;
1202         case IDAGETCTLRSIG:
1203                 if (!arg) return -EINVAL;
1204                 put_user(host->ctlr_sig, (int*)arg);
1205                 return 0;
1206         case IDAREVALIDATEVOLS:
1207                 if (iminor(inode) != 0)
1208                         return -ENXIO;
1209                 return revalidate_allvol(host);
1210         case IDADRIVERVERSION:
1211                 if (!arg) return -EINVAL;
1212                 put_user(DRIVER_VERSION, (unsigned long*)arg);
1213                 return 0;
1214         case IDAGETPCIINFO:
1215         {
1216
1217                 ida_pci_info_struct pciinfo;
1218
1219                 if (!arg) return -EINVAL;
1220                 pciinfo.bus = host->pci_dev->bus->number;
1221                 pciinfo.dev_fn = host->pci_dev->devfn;
1222                 pciinfo.board_id = host->board_id;
1223                 if(copy_to_user((void *) arg, &pciinfo,
1224                         sizeof( ida_pci_info_struct)))
1225                                 return -EFAULT;
1226                 return(0);
1227         }
1228
1229         default:
1230                 return -EINVAL;
1231         }
1232
1233 }
1234 /*
1235  * ida_ctlr_ioctl is for passing commands to the controller from userspace.
1236  * The command block (io) has already been copied to kernel space for us,
1237  * however, any elements in the sglist need to be copied to kernel space
1238  * or copied back to userspace.
1239  *
1240  * Only root may perform a controller passthru command, however I'm not doing
1241  * any serious sanity checking on the arguments.  Doing an IDA_WRITE_MEDIA and
1242  * putting a 64M buffer in the sglist is probably a *bad* idea.
1243  */
1244 static int ida_ctlr_ioctl(ctlr_info_t *h, int dsk, ida_ioctl_t *io)
1245 {
1246         int ctlr = h->ctlr;
1247         cmdlist_t *c;
1248         void *p = NULL;
1249         unsigned long flags;
1250         int error;
1251
1252         if ((c = cmd_alloc(h, 0)) == NULL)
1253                 return -ENOMEM;
1254         c->ctlr = ctlr;
1255         c->hdr.unit = (io->unit & UNITVALID) ? (io->unit & ~UNITVALID) : dsk;
1256         c->hdr.size = sizeof(rblk_t) >> 2;
1257         c->size += sizeof(rblk_t);
1258
1259         c->req.hdr.cmd = io->cmd;
1260         c->req.hdr.blk = io->blk;
1261         c->req.hdr.blk_cnt = io->blk_cnt;
1262         c->type = CMD_IOCTL_PEND;
1263
1264         /* Pre submit processing */
1265         switch(io->cmd) {
1266         case PASSTHRU_A:
1267                 p = kmalloc(io->sg[0].size, GFP_KERNEL);
1268                 if (!p)
1269                 {
1270                         error = -ENOMEM;
1271                         cmd_free(h, c, 0);
1272                         return(error);
1273                 }
1274                 if (copy_from_user(p, (void*)io->sg[0].addr, io->sg[0].size)) {
1275                         kfree(p);
1276                         cmd_free(h, c, 0);
1277                         return -EFAULT;
1278                 }
1279                 c->req.hdr.blk = pci_map_single(h->pci_dev, &(io->c),
1280                                 sizeof(ida_ioctl_t),
1281                                 PCI_DMA_BIDIRECTIONAL);
1282                 c->req.sg[0].size = io->sg[0].size;
1283                 c->req.sg[0].addr = pci_map_single(h->pci_dev, p,
1284                         c->req.sg[0].size, PCI_DMA_BIDIRECTIONAL);
1285                 c->req.hdr.sg_cnt = 1;
1286                 break;
1287         case IDA_READ:
1288         case READ_FLASH_ROM:
1289         case SENSE_CONTROLLER_PERFORMANCE:
1290                 p = kmalloc(io->sg[0].size, GFP_KERNEL);
1291                 if (!p)
1292                 {
1293                         error = -ENOMEM;
1294                         cmd_free(h, c, 0);
1295                         return(error);
1296                 }
1297
1298                 c->req.sg[0].size = io->sg[0].size;
1299                 c->req.sg[0].addr = pci_map_single(h->pci_dev, p,
1300                         c->req.sg[0].size, PCI_DMA_BIDIRECTIONAL);
1301                 c->req.hdr.sg_cnt = 1;
1302                 break;
1303         case IDA_WRITE:
1304         case IDA_WRITE_MEDIA:
1305         case DIAG_PASS_THRU:
1306         case COLLECT_BUFFER:
1307         case WRITE_FLASH_ROM:
1308                 p = kmalloc(io->sg[0].size, GFP_KERNEL);
1309                 if (!p)
1310                 {
1311                         error = -ENOMEM;
1312                         cmd_free(h, c, 0);
1313                         return(error);
1314                 }
1315                 if (copy_from_user(p, (void*)io->sg[0].addr, io->sg[0].size)) {
1316                         kfree(p);
1317                         cmd_free(h, c, 0);
1318                         return -EFAULT;
1319                 }
1320                 c->req.sg[0].size = io->sg[0].size;
1321                 c->req.sg[0].addr = pci_map_single(h->pci_dev, p,
1322                         c->req.sg[0].size, PCI_DMA_BIDIRECTIONAL);
1323                 c->req.hdr.sg_cnt = 1;
1324                 break;
1325         default:
1326                 c->req.sg[0].size = sizeof(io->c);
1327                 c->req.sg[0].addr = pci_map_single(h->pci_dev,&io->c,
1328                         c->req.sg[0].size, PCI_DMA_BIDIRECTIONAL);
1329                 c->req.hdr.sg_cnt = 1;
1330         }
1331
1332         /* Put the request on the tail of the request queue */
1333         spin_lock_irqsave(IDA_LOCK(ctlr), flags);
1334         addQ(&h->reqQ, c);
1335         h->Qdepth++;
1336         start_io(h);
1337         spin_unlock_irqrestore(IDA_LOCK(ctlr), flags);
1338
1339         /* Wait for completion */
1340         while(c->type != CMD_IOCTL_DONE)
1341                 schedule();
1342
1343         /* Unmap the DMA  */
1344         pci_unmap_single(h->pci_dev, c->req.sg[0].addr, c->req.sg[0].size,
1345                 PCI_DMA_BIDIRECTIONAL);
1346         /* Post submit processing */
1347         switch(io->cmd) {
1348         case PASSTHRU_A:
1349                 pci_unmap_single(h->pci_dev, c->req.hdr.blk,
1350                                 sizeof(ida_ioctl_t),
1351                                 PCI_DMA_BIDIRECTIONAL);
1352         case IDA_READ:
1353         case DIAG_PASS_THRU:
1354         case SENSE_CONTROLLER_PERFORMANCE:
1355         case READ_FLASH_ROM:
1356                 if (copy_to_user((void*)io->sg[0].addr, p, io->sg[0].size)) {
1357                         kfree(p);
1358                         return -EFAULT;
1359                 }
1360                 /* fall through and free p */
1361         case IDA_WRITE:
1362         case IDA_WRITE_MEDIA:
1363         case COLLECT_BUFFER:
1364         case WRITE_FLASH_ROM:
1365                 kfree(p);
1366                 break;
1367         default:;
1368                 /* Nothing to do */
1369         }
1370
1371         io->rcode = c->req.hdr.rcode;
1372         cmd_free(h, c, 0);
1373         return(0);
1374 }
1375
1376 /*
1377  * Commands are pre-allocated in a large block.  Here we use a simple bitmap
1378  * scheme to suballocte them to the driver.  Operations that are not time
1379  * critical (and can wait for kmalloc and possibly sleep) can pass in NULL
1380  * as the first argument to get a new command.
1381  */
1382 static cmdlist_t * cmd_alloc(ctlr_info_t *h, int get_from_pool)
1383 {
1384         cmdlist_t * c;
1385         int i;
1386         dma_addr_t cmd_dhandle;
1387
1388         if (!get_from_pool) {
1389                 c = (cmdlist_t*)pci_alloc_consistent(h->pci_dev,
1390                         sizeof(cmdlist_t), &cmd_dhandle);
1391                 if(c==NULL)
1392                         return NULL;
1393         } else {
1394                 do {
1395                         i = find_first_zero_bit(h->cmd_pool_bits, NR_CMDS);
1396                         if (i == NR_CMDS)
1397                                 return NULL;
1398                 } while(test_and_set_bit(i&(BITS_PER_LONG-1), h->cmd_pool_bits+(i/BITS_PER_LONG)) != 0);
1399                 c = h->cmd_pool + i;
1400                 cmd_dhandle = h->cmd_pool_dhandle + i*sizeof(cmdlist_t);
1401                 h->nr_allocs++;
1402         }
1403
1404         memset(c, 0, sizeof(cmdlist_t));
1405         c->busaddr = cmd_dhandle;
1406         return c;
1407 }
1408
1409 static void cmd_free(ctlr_info_t *h, cmdlist_t *c, int got_from_pool)
1410 {
1411         int i;
1412
1413         if (!got_from_pool) {
1414                 pci_free_consistent(h->pci_dev, sizeof(cmdlist_t), c,
1415                         c->busaddr);
1416         } else {
1417                 i = c - h->cmd_pool;
1418                 clear_bit(i&(BITS_PER_LONG-1), h->cmd_pool_bits+(i/BITS_PER_LONG));
1419                 h->nr_frees++;
1420         }
1421 }
1422
1423 /***********************************************************************
1424     name:        sendcmd
1425     Send a command to an IDA using the memory mapped FIFO interface
1426     and wait for it to complete.
1427     This routine should only be called at init time.
1428 ***********************************************************************/
1429 static int sendcmd(
1430         __u8    cmd,
1431         int     ctlr,
1432         void    *buff,
1433         size_t  size,
1434         unsigned int blk,
1435         unsigned int blkcnt,
1436         unsigned int log_unit )
1437 {
1438         cmdlist_t *c;
1439         int complete;
1440         unsigned long temp;
1441         unsigned long i;
1442         ctlr_info_t *info_p = hba[ctlr];
1443
1444         c = cmd_alloc(info_p, 1);
1445         if(!c)
1446                 return IO_ERROR;
1447         c->ctlr = ctlr;
1448         c->hdr.unit = log_unit;
1449         c->hdr.prio = 0;
1450         c->hdr.size = sizeof(rblk_t) >> 2;
1451         c->size += sizeof(rblk_t);
1452
1453         /* The request information. */
1454         c->req.hdr.next = 0;
1455         c->req.hdr.rcode = 0;
1456         c->req.bp = 0;
1457         c->req.hdr.sg_cnt = 1;
1458         c->req.hdr.reserved = 0;
1459
1460         if (size == 0)
1461                 c->req.sg[0].size = 512;
1462         else
1463                 c->req.sg[0].size = size;
1464
1465         c->req.hdr.blk = blk;
1466         c->req.hdr.blk_cnt = blkcnt;
1467         c->req.hdr.cmd = (unsigned char) cmd;
1468         c->req.sg[0].addr = (__u32) pci_map_single(info_p->pci_dev,
1469                 buff, c->req.sg[0].size, PCI_DMA_BIDIRECTIONAL);
1470         /*
1471          * Disable interrupt
1472          */
1473         info_p->access.set_intr_mask(info_p, 0);
1474         /* Make sure there is room in the command FIFO */
1475         /* Actually it should be completely empty at this time. */
1476         for (i = 200000; i > 0; i--) {
1477                 temp = info_p->access.fifo_full(info_p);
1478                 if (temp != 0) {
1479                         break;
1480                 }
1481                 udelay(10);
1482 DBG(
1483                 printk(KERN_WARNING "cpqarray ida%d: idaSendPciCmd FIFO full,"
1484                         " waiting!\n", ctlr);
1485 );
1486         }
1487         /*
1488          * Send the cmd
1489          */
1490         info_p->access.submit_command(info_p, c);
1491         complete = pollcomplete(ctlr);
1492
1493         pci_unmap_single(info_p->pci_dev, (dma_addr_t) c->req.sg[0].addr,
1494                 c->req.sg[0].size, PCI_DMA_BIDIRECTIONAL);
1495         if (complete != 1) {
1496                 if (complete != c->busaddr) {
1497                         printk( KERN_WARNING
1498                         "cpqarray ida%d: idaSendPciCmd "
1499                       "Invalid command list address returned! (%08lx)\n",
1500                                 ctlr, (unsigned long)complete);
1501                         cmd_free(info_p, c, 1);
1502                         return (IO_ERROR);
1503                 }
1504         } else {
1505                 printk( KERN_WARNING
1506                         "cpqarray ida%d: idaSendPciCmd Timeout out, "
1507                         "No command list address returned!\n",
1508                         ctlr);
1509                 cmd_free(info_p, c, 1);
1510                 return (IO_ERROR);
1511         }
1512
1513         if (c->req.hdr.rcode & 0x00FE) {
1514                 if (!(c->req.hdr.rcode & BIG_PROBLEM)) {
1515                         printk( KERN_WARNING
1516                         "cpqarray ida%d: idaSendPciCmd, error: "
1517                                 "Controller failed at init time "
1518                                 "cmd: 0x%x, return code = 0x%x\n",
1519                                 ctlr, c->req.hdr.cmd, c->req.hdr.rcode);
1520
1521                         cmd_free(info_p, c, 1);
1522                         return (IO_ERROR);
1523                 }
1524         }
1525         cmd_free(info_p, c, 1);
1526         return (IO_OK);
1527 }
1528
1529 /*
1530  * revalidate_allvol is for online array config utilities.  After a
1531  * utility reconfigures the drives in the array, it can use this function
1532  * (through an ioctl) to make the driver zap any previous disk structs for
1533  * that controller and get new ones.
1534  *
1535  * Right now I'm using the getgeometry() function to do this, but this
1536  * function should probably be finer grained and allow you to revalidate one
1537  * particualar logical volume (instead of all of them on a particular
1538  * controller).
1539  */
1540 static int revalidate_allvol(ctlr_info_t *host)
1541 {
1542         int ctlr = host->ctlr;
1543         int i;
1544         unsigned long flags;
1545
1546         spin_lock_irqsave(IDA_LOCK(ctlr), flags);
1547         if (host->usage_count > 1) {
1548                 spin_unlock_irqrestore(IDA_LOCK(ctlr), flags);
1549                 printk(KERN_WARNING "cpqarray: Device busy for volume"
1550                         " revalidation (usage=%d)\n", host->usage_count);
1551                 return -EBUSY;
1552         }
1553         host->usage_count++;
1554         spin_unlock_irqrestore(IDA_LOCK(ctlr), flags);
1555
1556         /*
1557          * Set the partition and block size structures for all volumes
1558          * on this controller to zero.  We will reread all of this data
1559          */
1560         set_capacity(ida_gendisk[ctlr][0], 0);
1561         for (i = 1; i < NWD; i++) {
1562                 struct gendisk *disk = ida_gendisk[ctlr][i];
1563                 if (disk->flags & GENHD_FL_UP)
1564                         del_gendisk(disk);
1565         }
1566         memset(host->drv, 0, sizeof(drv_info_t)*NWD);
1567
1568         /*
1569          * Tell the array controller not to give us any interrupts while
1570          * we check the new geometry.  Then turn interrupts back on when
1571          * we're done.
1572          */
1573         host->access.set_intr_mask(host, 0);
1574         getgeometry(ctlr);
1575         host->access.set_intr_mask(host, FIFO_NOT_EMPTY);
1576
1577         for(i=0; i<NWD; i++) {
1578                 struct gendisk *disk = ida_gendisk[ctlr][i];
1579                 drv_info_t *drv = &host->drv[i];
1580                 if (i && !drv->nr_blks)
1581                         continue;
1582                 blk_queue_hardsect_size(host->queue, drv->blk_size);
1583                 set_capacity(disk, drv->nr_blks);
1584                 disk->queue = host->queue;
1585                 disk->private_data = drv;
1586                 if (i)
1587                         add_disk(disk);
1588         }
1589
1590         host->usage_count--;
1591         return 0;
1592 }
1593
1594 static int ida_revalidate(struct gendisk *disk)
1595 {
1596         drv_info_t *drv = disk->private_data;
1597         set_capacity(disk, drv->nr_blks);
1598         return 0;
1599 }
1600
1601 /********************************************************************
1602     name: pollcomplete
1603     Wait polling for a command to complete.
1604     The memory mapped FIFO is polled for the completion.
1605     Used only at init time, interrupts disabled.
1606  ********************************************************************/
1607 static int pollcomplete(int ctlr)
1608 {
1609         int done;
1610         int i;
1611
1612         /* Wait (up to 2 seconds) for a command to complete */
1613
1614         for (i = 200000; i > 0; i--) {
1615                 done = hba[ctlr]->access.command_completed(hba[ctlr]);
1616                 if (done == 0) {
1617                         udelay(10);     /* a short fixed delay */
1618                 } else
1619                         return (done);
1620         }
1621         /* Invalid address to tell caller we ran out of time */
1622         return 1;
1623 }
1624 /*****************************************************************
1625     start_fwbk
1626     Starts controller firmwares background processing.
1627     Currently only the Integrated Raid controller needs this done.
1628     If the PCI mem address registers are written to after this,
1629          data corruption may occur
1630 *****************************************************************/
1631 static void start_fwbk(int ctlr)
1632 {
1633                 id_ctlr_t *id_ctlr_buf;
1634         int ret_code;
1635
1636         if(     (hba[ctlr]->board_id != 0x40400E11)
1637                 && (hba[ctlr]->board_id != 0x40480E11) )
1638
1639         /* Not a Integrated Raid, so there is nothing for us to do */
1640                 return;
1641         printk(KERN_DEBUG "cpqarray: Starting firmware's background"
1642                 " processing\n");
1643         /* Command does not return anything, but idasend command needs a
1644                 buffer */
1645         id_ctlr_buf = (id_ctlr_t *)kmalloc(sizeof(id_ctlr_t), GFP_KERNEL);
1646         if(id_ctlr_buf==NULL)
1647         {
1648                 printk(KERN_WARNING "cpqarray: Out of memory. "
1649                         "Unable to start background processing.\n");
1650                 return;
1651         }
1652         ret_code = sendcmd(RESUME_BACKGROUND_ACTIVITY, ctlr,
1653                 id_ctlr_buf, 0, 0, 0, 0);
1654         if(ret_code != IO_OK)
1655                 printk(KERN_WARNING "cpqarray: Unable to start"
1656                         " background processing\n");
1657
1658         kfree(id_ctlr_buf);
1659 }
1660 /*****************************************************************
1661     getgeometry
1662     Get ida logical volume geometry from the controller
1663     This is a large bit of code which once existed in two flavors,
1664     It is used only at init time.
1665 *****************************************************************/
1666 static void getgeometry(int ctlr)
1667 {
1668         id_log_drv_t *id_ldrive;
1669         id_ctlr_t *id_ctlr_buf;
1670         sense_log_drv_stat_t *id_lstatus_buf;
1671         config_t *sense_config_buf;
1672         unsigned int log_unit, log_index;
1673         int ret_code, size;
1674         drv_info_t *drv;
1675         ctlr_info_t *info_p = hba[ctlr];
1676         int i;
1677
1678         info_p->log_drv_map = 0;
1679
1680         id_ldrive = (id_log_drv_t *)kmalloc(sizeof(id_log_drv_t), GFP_KERNEL);
1681         if(id_ldrive == NULL)
1682         {
1683                 printk( KERN_ERR "cpqarray:  out of memory.\n");
1684                 return;
1685         }
1686
1687         id_ctlr_buf = (id_ctlr_t *)kmalloc(sizeof(id_ctlr_t), GFP_KERNEL);
1688         if(id_ctlr_buf == NULL)
1689         {
1690                 kfree(id_ldrive);
1691                 printk( KERN_ERR "cpqarray:  out of memory.\n");
1692                 return;
1693         }
1694
1695         id_lstatus_buf = (sense_log_drv_stat_t *)kmalloc(sizeof(sense_log_drv_stat_t), GFP_KERNEL);
1696         if(id_lstatus_buf == NULL)
1697         {
1698                 kfree(id_ctlr_buf);
1699                 kfree(id_ldrive);
1700                 printk( KERN_ERR "cpqarray:  out of memory.\n");
1701                 return;
1702         }
1703
1704         sense_config_buf = (config_t *)kmalloc(sizeof(config_t), GFP_KERNEL);
1705         if(sense_config_buf == NULL)
1706         {
1707                 kfree(id_lstatus_buf);
1708                 kfree(id_ctlr_buf);
1709                 kfree(id_ldrive);
1710                 printk( KERN_ERR "cpqarray:  out of memory.\n");
1711                 return;
1712         }
1713
1714         memset(id_ldrive, 0, sizeof(id_log_drv_t));
1715         memset(id_ctlr_buf, 0, sizeof(id_ctlr_t));
1716         memset(id_lstatus_buf, 0, sizeof(sense_log_drv_stat_t));
1717         memset(sense_config_buf, 0, sizeof(config_t));
1718
1719         info_p->phys_drives = 0;
1720         info_p->log_drv_map = 0;
1721         info_p->drv_assign_map = 0;
1722         info_p->drv_spare_map = 0;
1723         info_p->mp_failed_drv_map = 0;  /* only initialized here */
1724         /* Get controllers info for this logical drive */
1725         ret_code = sendcmd(ID_CTLR, ctlr, id_ctlr_buf, 0, 0, 0, 0);
1726         if (ret_code == IO_ERROR) {
1727                 /*
1728                  * If can't get controller info, set the logical drive map to 0,
1729                  * so the idastubopen will fail on all logical drives
1730                  * on the controller.
1731                  */
1732                  /* Free all the buffers and return */
1733                 printk(KERN_ERR "cpqarray: error sending ID controller\n");
1734                 kfree(sense_config_buf);
1735                 kfree(id_lstatus_buf);
1736                 kfree(id_ctlr_buf);
1737                 kfree(id_ldrive);
1738                 return;
1739         }
1740
1741         info_p->log_drives = id_ctlr_buf->nr_drvs;
1742         for(i=0;i<4;i++)
1743                 info_p->firm_rev[i] = id_ctlr_buf->firm_rev[i];
1744         info_p->ctlr_sig = id_ctlr_buf->cfg_sig;
1745
1746         printk(" (%s)\n", info_p->product_name);
1747         /*
1748          * Initialize logical drive map to zero
1749          */
1750         log_index = 0;
1751         /*
1752          * Get drive geometry for all logical drives
1753          */
1754         if (id_ctlr_buf->nr_drvs > 16)
1755                 printk(KERN_WARNING "cpqarray ida%d:  This driver supports "
1756                         "16 logical drives per controller.\n.  "
1757                         " Additional drives will not be "
1758                         "detected\n", ctlr);
1759
1760         for (log_unit = 0;
1761              (log_index < id_ctlr_buf->nr_drvs)
1762              && (log_unit < NWD);
1763              log_unit++) {
1764                 struct gendisk *disk = ida_gendisk[ctlr][log_unit];
1765
1766                 size = sizeof(sense_log_drv_stat_t);
1767
1768                 /*
1769                    Send "Identify logical drive status" cmd
1770                  */
1771                 ret_code = sendcmd(SENSE_LOG_DRV_STAT,
1772                              ctlr, id_lstatus_buf, size, 0, 0, log_unit);
1773                 if (ret_code == IO_ERROR) {
1774                         /*
1775                            If can't get logical drive status, set
1776                            the logical drive map to 0, so the
1777                            idastubopen will fail for all logical drives
1778                            on the controller.
1779                          */
1780                         info_p->log_drv_map = 0;
1781                         printk( KERN_WARNING
1782                              "cpqarray ida%d: idaGetGeometry - Controller"
1783                                 " failed to report status of logical drive %d\n"
1784                          "Access to this controller has been disabled\n",
1785                                 ctlr, log_unit);
1786                         /* Free all the buffers and return */
1787                         kfree(sense_config_buf);
1788                         kfree(id_lstatus_buf);
1789                         kfree(id_ctlr_buf);
1790                         kfree(id_ldrive);
1791                         return;
1792                 }
1793                 /*
1794                    Make sure the logical drive is configured
1795                  */
1796                 if (id_lstatus_buf->status != LOG_NOT_CONF) {
1797                         ret_code = sendcmd(ID_LOG_DRV, ctlr, id_ldrive,
1798                                sizeof(id_log_drv_t), 0, 0, log_unit);
1799                         /*
1800                            If error, the bit for this
1801                            logical drive won't be set and
1802                            idastubopen will return error.
1803                          */
1804                         if (ret_code != IO_ERROR) {
1805                                 drv = &info_p->drv[log_unit];
1806                                 drv->blk_size = id_ldrive->blk_size;
1807                                 drv->nr_blks = id_ldrive->nr_blks;
1808                                 drv->cylinders = id_ldrive->drv.cyl;
1809                                 drv->heads = id_ldrive->drv.heads;
1810                                 drv->sectors = id_ldrive->drv.sect_per_track;
1811                                 info_p->log_drv_map |=  (1 << log_unit);
1812
1813         printk(KERN_INFO "cpqarray ida/c%dd%d: blksz=%d nr_blks=%d\n",
1814                 ctlr, log_unit, drv->blk_size, drv->nr_blks);
1815                                 ret_code = sendcmd(SENSE_CONFIG,
1816                                                   ctlr, sense_config_buf,
1817                                  sizeof(config_t), 0, 0, log_unit);
1818                                 if (ret_code == IO_ERROR) {
1819                                         info_p->log_drv_map = 0;
1820                                         /* Free all the buffers and return */
1821                                         printk(KERN_ERR "cpqarray: error sending sense config\n");
1822                                         kfree(sense_config_buf);
1823                                         kfree(id_lstatus_buf);
1824                                         kfree(id_ctlr_buf);
1825                                         kfree(id_ldrive);
1826                                         return;
1827
1828                                 }
1829
1830                                 sprintf(disk->devfs_name, "ida/c%dd%d", ctlr, log_unit);
1831
1832                                 info_p->phys_drives =
1833                                     sense_config_buf->ctlr_phys_drv;
1834                                 info_p->drv_assign_map
1835                                     |= sense_config_buf->drv_asgn_map;
1836                                 info_p->drv_assign_map
1837                                     |= sense_config_buf->spare_asgn_map;
1838                                 info_p->drv_spare_map
1839                                     |= sense_config_buf->spare_asgn_map;
1840                         }       /* end of if no error on id_ldrive */
1841                         log_index = log_index + 1;
1842                 }               /* end of if logical drive configured */
1843         }                       /* end of for log_unit */
1844         kfree(sense_config_buf);
1845         kfree(id_ldrive);
1846         kfree(id_lstatus_buf);
1847         kfree(id_ctlr_buf);
1848         return;
1849
1850 }
1851
1852 static void __exit cpqarray_exit(void)
1853 {
1854         int i;
1855
1856         pci_unregister_driver(&cpqarray_pci_driver);
1857
1858         /* Double check that all controller entries have been removed */
1859         for(i=0; i<MAX_CTLR; i++) {
1860                 if (hba[i] != NULL) {
1861                         printk(KERN_WARNING "cpqarray: Removing EISA "
1862                                         "controller %d\n", i);
1863                         cpqarray_remove_one_eisa(i);
1864                 }
1865         }
1866
1867         devfs_remove("ida");
1868         remove_proc_entry("cpqarray", proc_root_driver);
1869 }
1870
1871 module_init(cpqarray_init)
1872 module_exit(cpqarray_exit)