drivers/block/cpqarray.c

   1 /*
   2  *    Disk Array driver for Compaq SMART2 Controllers
   3  *    Copyright 1998 Compaq Computer Corporation
   4  *
   5  *    This program is free software; you can redistribute it and/or modify
   6  *    it under the terms of the GNU General Public License as published by
   7  *    the Free Software Foundation; either version 2 of the License, or
   8  *    (at your option) any later version.
   9  *
  10  *    This program is distributed in the hope that it will be useful,
  11  *    but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  *    MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
  13  *    NON INFRINGEMENT.  See the GNU General Public License for more details.
  14  *
  15  *    You should have received a copy of the GNU General Public License
  16  *    along with this program; if not, write to the Free Software
  17  *    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  18  *
  19  *    Questions/Comments/Bugfixes to Cpqarray-discuss@lists.sourceforge.net
  20  *
  21  */
  22 #include <linux/config.h>       /* CONFIG_PROC_FS */
  23 #include <linux/module.h>
  24 #include <linux/version.h>
  25 #include <linux/types.h>
  26 #include <linux/pci.h>
  27 #include <linux/bio.h>
  28 #include <linux/interrupt.h>
  29 #include <linux/kernel.h>
  30 #include <linux/slab.h>
  31 #include <linux/delay.h>
  32 #include <linux/major.h>
  33 #include <linux/fs.h>
  34 #include <linux/blkpg.h>
  35 #include <linux/timer.h>
  36 #include <linux/proc_fs.h>
  37 #include <linux/devfs_fs_kernel.h>
  38 #include <linux/init.h>
  39 #include <linux/hdreg.h>
  40 #include <linux/spinlock.h>
  41 #include <linux/blkdev.h>
  42 #include <linux/genhd.h>
  43 #include <asm/uaccess.h>
  44 #include <asm/io.h>
  45
  46
  47 #define SMART2_DRIVER_VERSION(maj,min,submin) ((maj<<16)|(min<<8)|(submin))
  48
  49 #define DRIVER_NAME "Compaq SMART2 Driver (v 2.6.0)"
  50 #define DRIVER_VERSION SMART2_DRIVER_VERSION(2,6,0)
  51
  52 /* Embedded module documentation macros - see modules.h */
  53 /* Original author Chris Frantz - Compaq Computer Corporation */
  54 MODULE_AUTHOR("Compaq Computer Corporation");
  55 MODULE_DESCRIPTION("Driver for Compaq Smart2 Array Controllers version 2.6.0");
  56 MODULE_LICENSE("GPL");
  57
  58 #include "cpqarray.h"
  59 #include "ida_cmd.h"
  60 #include "smart1,2.h"
  61 #include "ida_ioctl.h"
  62
  63 #define READ_AHEAD      128
  64 #define NR_CMDS         128 /* This could probably go as high as ~400 */
  65
  66 #define MAX_CTLR        8
  67 #define CTLR_SHIFT      8
  68
  69 #define CPQARRAY_DMA_MASK       0xFFFFFFFF      /* 32 bit DMA */
  70
  71 static int nr_ctlr;
  72 static ctlr_info_t *hba[MAX_CTLR];
  73
  74 static int eisa[8];
  75
  76 #define NR_PRODUCTS (sizeof(products)/sizeof(struct board_type))
  77
  78 /*  board_id = Subsystem Device ID & Vendor ID
  79  *  product = Marketing Name for the board
  80  *  access = Address of the struct of function pointers
  81  */
  82 static struct board_type products[] = {
  83         { 0x0040110E, "IDA",                    &smart1_access },
  84         { 0x0140110E, "IDA-2",                  &smart1_access },
  85         { 0x1040110E, "IAES",                   &smart1_access },
  86         { 0x2040110E, "SMART",                  &smart1_access },
  87         { 0x3040110E, "SMART-2/E",              &smart2e_access },
  88         { 0x40300E11, "SMART-2/P",              &smart2_access },
  89         { 0x40310E11, "SMART-2SL",              &smart2_access },
  90         { 0x40320E11, "Smart Array 3200",       &smart2_access },
  91         { 0x40330E11, "Smart Array 3100ES",     &smart2_access },
  92         { 0x40340E11, "Smart Array 221",        &smart2_access },
  93         { 0x40400E11, "Integrated Array",       &smart4_access },
  94         { 0x40480E11, "Compaq Raid LC2",        &smart4_access },
  95         { 0x40500E11, "Smart Array 4200",       &smart4_access },
  96         { 0x40510E11, "Smart Array 4250ES",     &smart4_access },
  97         { 0x40580E11, "Smart Array 431",        &smart4_access },
  98 };
  99
 100 /* define the PCI info for the PCI cards this driver can control */
 101 const struct pci_device_id cpqarray_pci_device_id[] =
 102 {
 103         { PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_COMPAQ_42XX,
 104                 0x0E11, 0x4058, 0, 0, 0},       /* SA431 */
 105         { PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_COMPAQ_42XX,
 106                 0x0E11, 0x4051, 0, 0, 0},      /* SA4250ES */
 107         { PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_COMPAQ_42XX,
 108                 0x0E11, 0x4050, 0, 0, 0},      /* SA4200 */
 109         { PCI_VENDOR_ID_NCR, PCI_DEVICE_ID_NCR_53C1510,
 110                 0x0E11, 0x4048, 0, 0, 0},       /* LC2 */
 111         { PCI_VENDOR_ID_NCR, PCI_DEVICE_ID_NCR_53C1510,
 112                 0x0E11, 0x4040, 0, 0, 0},      /* Integrated Array */
 113         { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_SMART2P,
 114                 0x0E11, 0x4034, 0, 0, 0},       /* SA 221 */
 115         { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_SMART2P,
 116                 0x0E11, 0x4033, 0, 0, 0},       /* SA 3100ES*/
 117         { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_SMART2P,
 118                 0x0E11, 0x4032, 0, 0, 0},       /* SA 3200*/
 119         { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_SMART2P,
 120                 0x0E11, 0x4031, 0, 0, 0},       /* SA 2SL*/
 121         { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_SMART2P,
 122                 0x0E11, 0x4030, 0, 0, 0},       /* SA 2P */
 123         { 0 }
 124 };
 125
 126 MODULE_DEVICE_TABLE(pci, cpqarray_pci_device_id);
 127
 128 static struct gendisk *ida_gendisk[MAX_CTLR][NWD];
 129
 130 /* Debug... */
 131 #define DBG(s)  do { s } while(0)
 132 /* Debug (general info)... */
 133 #define DBGINFO(s) do { } while(0)
 134 /* Debug Paranoid... */
 135 #define DBGP(s)  do { } while(0)
 136 /* Debug Extra Paranoid... */
 137 #define DBGPX(s) do { } while(0)
 138
 139 int cpqarray_init_step2(void);
 140 static int cpqarray_pci_init(ctlr_info_t *c, struct pci_dev *pdev);
 141 static void *remap_pci_mem(ulong base, ulong size);
 142 static int cpqarray_eisa_detect(void);
 143 static int pollcomplete(int ctlr);
 144 static void getgeometry(int ctlr);
 145 static void start_fwbk(int ctlr);
 146
 147 static cmdlist_t * cmd_alloc(ctlr_info_t *h, int get_from_pool);
 148 static void cmd_free(ctlr_info_t *h, cmdlist_t *c, int got_from_pool);
 149
 150 static void free_hba(int i);
 151 static int alloc_cpqarray_hba(void);
 152
 153 static int sendcmd(
 154         __u8    cmd,
 155         int     ctlr,
 156         void    *buff,
 157         size_t  size,
 158         unsigned int blk,
 159         unsigned int blkcnt,
 160         unsigned int log_unit );
 161
 162 static int ida_open(struct inode *inode, struct file *filep);
 163 static int ida_release(struct inode *inode, struct file *filep);
 164 static int ida_ioctl(struct inode *inode, struct file *filep, unsigned int cmd, unsigned long arg);
 165 static int ida_ctlr_ioctl(ctlr_info_t *h, int dsk, ida_ioctl_t *io);
 166
 167 static void do_ida_request(request_queue_t *q);
 168 static void start_io(ctlr_info_t *h);
 169
 170 static inline void addQ(cmdlist_t **Qptr, cmdlist_t *c);
 171 static inline cmdlist_t *removeQ(cmdlist_t **Qptr, cmdlist_t *c);
 172 static inline void complete_buffers(struct bio *bio, int ok);
 173 static inline void complete_command(cmdlist_t *cmd, int timeout);
 174
 175 static irqreturn_t do_ida_intr(int irq, void *dev_id, struct pt_regs * regs);
 176 static void ida_timer(unsigned long tdata);
 177 static int ida_revalidate(struct gendisk *disk);
 178 static int revalidate_allvol(ctlr_info_t *host);
 179 static int cpqarray_register_ctlr(int ctlr, struct pci_dev *pdev);
 180
 181 #ifdef CONFIG_PROC_FS
 182 static void ida_procinit(int i);
 183 static int ida_proc_get_info(char *buffer, char **start, off_t offset, int length, int *eof, void *data);
 184 #else
 185 static void ida_procinit(int i) {}
 186 #endif
 187
 188 static inline drv_info_t *get_drv(struct gendisk *disk)
 189 {
 190         return disk->private_data;
 191 }
 192
 193 static inline ctlr_info_t *get_host(struct gendisk *disk)
 194 {
 195         return disk->queue->queuedata;
 196 }
 197
 198
 199 static struct block_device_operations ida_fops  = {
 200         .owner          = THIS_MODULE,
 201         .open           = ida_open,
 202         .release        = ida_release,
 203         .ioctl          = ida_ioctl,
 204         .revalidate_disk= ida_revalidate,
 205 };
 206
 207
 208 #ifdef CONFIG_PROC_FS
 209
 210 static struct proc_dir_entry *proc_array;
 211
 212 /*
 213  * Get us a file in /proc/array that says something about each controller.
 214  * Create /proc/array if it doesn't exist yet.
 215  */
 216 static void __init ida_procinit(int i)
 217 {
 218         if (proc_array == NULL) {
 219                 proc_array = proc_mkdir("cpqarray", proc_root_driver);
 220                 if (!proc_array) return;
 221         }
 222
 223         create_proc_read_entry(hba[i]->devname, 0, proc_array,
 224                                ida_proc_get_info, hba[i]);
 225 }
 226
 227 /*
 228  * Report information about this controller.
 229  */
 230 static int ida_proc_get_info(char *buffer, char **start, off_t offset, int length, int *eof, void *data)
 231 {
 232         off_t pos = 0;
 233         off_t len = 0;
 234         int size, i, ctlr;
 235         ctlr_info_t *h = (ctlr_info_t*)data;
 236         drv_info_t *drv;
 237 #ifdef CPQ_PROC_PRINT_QUEUES
 238         cmdlist_t *c;
 239         unsigned long flags;
 240 #endif
 241
 242         ctlr = h->ctlr;
 243         size = sprintf(buffer, "%s:  Compaq %s Controller\n"
 244                 "       Board ID: 0x%08lx\n"
 245                 "       Firmware Revision: %c%c%c%c\n"
 246                 "       Controller Sig: 0x%08lx\n"
 247                 "       Memory Address: 0x%08lx\n"
 248                 "       I/O Port: 0x%04x\n"
 249                 "       IRQ: %d\n"
 250                 "       Logical drives: %d\n"
 251                 "       Physical drives: %d\n\n"
 252                 "       Current Q depth: %d\n"
 253                 "       Max Q depth since init: %d\n\n",
 254                 h->devname,
 255                 h->product_name,
 256                 (unsigned long)h->board_id,
 257                 h->firm_rev[0], h->firm_rev[1], h->firm_rev[2], h->firm_rev[3],
 258                 (unsigned long)h->ctlr_sig, (unsigned long)h->vaddr,
 259                 (unsigned int) h->io_mem_addr, (unsigned int)h->intr,
 260                 h->log_drives, h->phys_drives,
 261                 h->Qdepth, h->maxQsinceinit);
 262
 263         pos += size; len += size;
 264
 265         size = sprintf(buffer+len, "Logical Drive Info:\n");
 266         pos += size; len += size;
 267
 268         for(i=0; i<h->log_drives; i++) {
 269                 drv = &h->drv[i];
 270                 size = sprintf(buffer+len, "ida/c%dd%d: blksz=%d nr_blks=%d\n",
 271                                 ctlr, i, drv->blk_size, drv->nr_blks);
 272                 pos += size; len += size;
 273         }
 274
 275 #ifdef CPQ_PROC_PRINT_QUEUES
 276         spin_lock_irqsave(IDA_LOCK(h->ctlr), flags);
 277         size = sprintf(buffer+len, "\nCurrent Queues:\n");
 278         pos += size; len += size;
 279
 280         c = h->reqQ;
 281         size = sprintf(buffer+len, "reqQ = %p", c); pos += size; len += size;
 282         if (c) c=c->next;
 283         while(c && c != h->reqQ) {
 284                 size = sprintf(buffer+len, "->%p", c);
 285                 pos += size; len += size;
 286                 c=c->next;
 287         }
 288
 289         c = h->cmpQ;
 290         size = sprintf(buffer+len, "\ncmpQ = %p", c); pos += size; len += size;
 291         if (c) c=c->next;
 292         while(c && c != h->cmpQ) {
 293                 size = sprintf(buffer+len, "->%p", c);
 294                 pos += size; len += size;
 295                 c=c->next;
 296         }
 297
 298         size = sprintf(buffer+len, "\n"); pos += size; len += size;
 299         spin_unlock_irqrestore(IDA_LOCK(h->ctlr), flags);
 300 #endif
 301         size = sprintf(buffer+len, "nr_allocs = %d\nnr_frees = %d\n",
 302                         h->nr_allocs, h->nr_frees);
 303         pos += size; len += size;
 304
 305         *eof = 1;
 306         *start = buffer+offset;
 307         len -= offset;
 308         if (len>length)
 309                 len = length;
 310         return len;
 311 }
 312 #endif /* CONFIG_PROC_FS */
 313
 314 MODULE_PARM(eisa, "1-8i");
 315
 316 /* This is a bit of a hack,
 317  * necessary to support both eisa and pci
 318  */
 319 int __init cpqarray_init(void)
 320 {
 321         return (cpqarray_init_step2());
 322 }
 323
 324 static void release_io_mem(ctlr_info_t *c)
 325 {
 326         /* if IO mem was not protected do nothing */
 327         if( c->io_mem_addr == 0)
 328                 return;
 329         release_region(c->io_mem_addr, c->io_mem_length);
 330         c->io_mem_addr = 0;
 331         c->io_mem_length = 0;
 332 }
 333
 334 static void __devexit cpqarray_remove_one(int i)
 335 {
 336         int j;
 337         char buff[4];
 338
 339         /* sendcmd will turn off interrupt, and send the flush...
 340          * To write all data in the battery backed cache to disks
 341          * no data returned, but don't want to send NULL to sendcmd */
 342         if( sendcmd(FLUSH_CACHE, i, buff, 4, 0, 0, 0))
 343         {
 344                 printk(KERN_WARNING "Unable to flush cache on controller %d\n",
 345                                 i);
 346         }
 347         free_irq(hba[i]->intr, hba[i]);
 348         iounmap(hba[i]->vaddr);
 349         unregister_blkdev(COMPAQ_SMART2_MAJOR+i, hba[i]->devname);
 350         del_timer(&hba[i]->timer);
 351         remove_proc_entry(hba[i]->devname, proc_array);
 352         pci_free_consistent(hba[i]->pci_dev,
 353                         NR_CMDS * sizeof(cmdlist_t), (hba[i]->cmd_pool),
 354                         hba[i]->cmd_pool_dhandle);
 355         kfree(hba[i]->cmd_pool_bits);
 356         for(j = 0; j < NWD; j++) {
 357                 if (ida_gendisk[i][j]->flags & GENHD_FL_UP)
 358                         del_gendisk(ida_gendisk[i][j]);
 359                 devfs_remove("ida/c%dd%d",i,j);
 360                 put_disk(ida_gendisk[i][j]);
 361         }
 362         blk_cleanup_queue(hba[i]->queue);
 363         release_io_mem(hba[i]);
 364         free_hba(i);
 365 }
 366
 367 static void __devexit cpqarray_remove_one_pci (struct pci_dev *pdev)
 368 {
 369         int i;
 370         ctlr_info_t *tmp_ptr;
 371
 372         if (pci_get_drvdata(pdev) == NULL) {
 373                 printk( KERN_ERR "cpqarray: Unable to remove device \n");
 374                 return;
 375         }
 376
 377         tmp_ptr = pci_get_drvdata(pdev);
 378         i = tmp_ptr->ctlr;
 379         if (hba[i] == NULL) {
 380                 printk(KERN_ERR "cpqarray: controller %d appears to have"
 381                         "already been removed \n", i);
 382                 return;
 383         }
 384         pci_set_drvdata(pdev, NULL);
 385
 386         cpqarray_remove_one(i);
 387 }
 388
 389 /* removing an instance that was not removed automatically..
 390  * must be an eisa card.
 391  */
 392 static void __devexit cpqarray_remove_one_eisa (int i)
 393 {
 394         if (hba[i] == NULL) {
 395                 printk(KERN_ERR "cpqarray: controller %d appears to have"
 396                         "already been removed \n", i);
 397                 return;
 398         }
 399         cpqarray_remove_one(i);
 400 }
 401
 402 /* pdev is NULL for eisa */
 403 static int cpqarray_register_ctlr( int i, struct pci_dev *pdev)
 404 {
 405         request_queue_t *q;
 406         int j;
 407
 408         /*
 409          * register block devices
 410          * Find disks and fill in structs
 411          * Get an interrupt, set the Q depth and get into /proc
 412          */
 413
 414         /* If this successful it should insure that we are the only */
 415         /* instance of the driver */
 416         if (register_blkdev(COMPAQ_SMART2_MAJOR+i, hba[i]->devname)) {
 417                 goto Enomem4;
 418         }
 419         hba[i]->access.set_intr_mask(hba[i], 0);
 420         if (request_irq(hba[i]->intr, do_ida_intr,
 421                 SA_INTERRUPT|SA_SHIRQ|SA_SAMPLE_RANDOM,
 422                 hba[i]->devname, hba[i]))
 423         {
 424                 printk(KERN_ERR "cpqarray: Unable to get irq %d for %s\n",
 425                                 hba[i]->intr, hba[i]->devname);
 426                 goto Enomem3;
 427         }
 428
 429         for (j=0; j<NWD; j++) {
 430                 ida_gendisk[i][j] = alloc_disk(1 << NWD_SHIFT);
 431                 if (!ida_gendisk[i][j])
 432                         goto Enomem2;
 433         }
 434
 435         hba[i]->cmd_pool = (cmdlist_t *)pci_alloc_consistent(
 436                 hba[i]->pci_dev, NR_CMDS * sizeof(cmdlist_t),
 437                 &(hba[i]->cmd_pool_dhandle));
 438         hba[i]->cmd_pool_bits = kmalloc(
 439                 ((NR_CMDS+BITS_PER_LONG-1)/BITS_PER_LONG)*sizeof(unsigned long),
 440                 GFP_KERNEL);
 441
 442         if (!hba[i]->cmd_pool_bits || !hba[i]->cmd_pool)
 443                         goto Enomem1;
 444
 445         memset(hba[i]->cmd_pool, 0, NR_CMDS * sizeof(cmdlist_t));
 446         memset(hba[i]->cmd_pool_bits, 0, ((NR_CMDS+BITS_PER_LONG-1)/BITS_PER_LONG)*sizeof(unsigned long));
 447         printk(KERN_INFO "cpqarray: Finding drives on %s",
 448                 hba[i]->devname);
 449
 450         spin_lock_init(&hba[i]->lock);
 451         q = blk_init_queue(do_ida_request, &hba[i]->lock);
 452         if (!q)
 453                 goto Enomem1;
 454
 455         hba[i]->queue = q;
 456         q->queuedata = hba[i];
 457
 458         getgeometry(i);
 459         start_fwbk(i);
 460
 461         ida_procinit(i);
 462
 463         if (pdev)
 464                 blk_queue_bounce_limit(q, hba[i]->pci_dev->dma_mask);
 465
 466         /* This is a hardware imposed limit. */
 467         blk_queue_max_hw_segments(q, SG_MAX);
 468
 469         /* This is a driver limit and could be eliminated. */
 470         blk_queue_max_phys_segments(q, SG_MAX);
 471
 472         init_timer(&hba[i]->timer);
 473         hba[i]->timer.expires = jiffies + IDA_TIMER;
 474         hba[i]->timer.data = (unsigned long)hba[i];
 475         hba[i]->timer.function = ida_timer;
 476         add_timer(&hba[i]->timer);
 477
 478         /* Enable IRQ now that spinlock and rate limit timer are set up */
 479         hba[i]->access.set_intr_mask(hba[i], FIFO_NOT_EMPTY);
 480
 481         for(j=0; j<NWD; j++) {
 482                 struct gendisk *disk = ida_gendisk[i][j];
 483                 drv_info_t *drv = &hba[i]->drv[j];
 484                 sprintf(disk->disk_name, "ida/c%dd%d", i, j);
 485                 disk->major = COMPAQ_SMART2_MAJOR + i;
 486                 disk->first_minor = j<<NWD_SHIFT;
 487                 disk->fops = &ida_fops;
 488                 if (j && !drv->nr_blks)
 489                         continue;
 490                 blk_queue_hardsect_size(hba[i]->queue, drv->blk_size);
 491                 set_capacity(disk, drv->nr_blks);
 492                 disk->queue = hba[i]->queue;
 493                 disk->private_data = drv;
 494                 add_disk(disk);
 495         }
 496
 497         /* done ! */
 498         return(i);
 499
 500 Enomem1:
 501         nr_ctlr = i;
 502         kfree(hba[i]->cmd_pool_bits);
 503         if (hba[i]->cmd_pool)
 504                 pci_free_consistent(hba[i]->pci_dev, NR_CMDS*sizeof(cmdlist_t),
 505                                     hba[i]->cmd_pool, hba[i]->cmd_pool_dhandle);
 506 Enomem2:
 507         while (j--) {
 508                 put_disk(ida_gendisk[i][j]);
 509                 ida_gendisk[i][j] = NULL;
 510         }
 511         free_irq(hba[i]->intr, hba[i]);
 512 Enomem3:
 513         unregister_blkdev(COMPAQ_SMART2_MAJOR+i, hba[i]->devname);
 514 Enomem4:
 515         if (pdev)
 516                 pci_set_drvdata(pdev, NULL);
 517         release_io_mem(hba[i]);
 518         free_hba(i);
 519
 520         printk( KERN_ERR "cpqarray: out of memory");
 521
 522         return -1;
 523 }
 524
 525 static int __init cpqarray_init_one( struct pci_dev *pdev,
 526         const struct pci_device_id *ent)
 527 {
 528         int i;
 529
 530         printk(KERN_DEBUG "cpqarray: Device 0x%x has been found at"
 531                         " bus %d dev %d func %d\n",
 532                         pdev->device, pdev->bus->number, PCI_SLOT(pdev->devfn),
 533                         PCI_FUNC(pdev->devfn));
 534         i = alloc_cpqarray_hba();
 535         if( i < 0 )
 536                 return (-1);
 537         memset(hba[i], 0, sizeof(ctlr_info_t));
 538         sprintf(hba[i]->devname, "ida%d", i);
 539         hba[i]->ctlr = i;
 540         /* Initialize the pdev driver private data */
 541         pci_set_drvdata(pdev, hba[i]);
 542
 543         if (cpqarray_pci_init(hba[i], pdev) != 0) {
 544                 pci_set_drvdata(pdev, NULL);
 545                 release_io_mem(hba[i]);
 546                 free_hba(i);
 547                 return -1;
 548         }
 549
 550         return (cpqarray_register_ctlr(i, pdev));
 551 }
 552
 553 static struct pci_driver cpqarray_pci_driver = {
 554         name:   "cpqarray",
 555         probe:  cpqarray_init_one,
 556         remove:  __devexit_p(cpqarray_remove_one_pci),
 557         id_table:  cpqarray_pci_device_id,
 558 };
 559
 560 /*
 561  *  This is it.  Find all the controllers and register them.
 562  *  returns the number of block devices registered.
 563  */
 564 int __init cpqarray_init_step2(void)
 565 {
 566         int num_cntlrs_reg = 0;
 567         int i;
 568         int rc = 0;
 569
 570         /* detect controllers */
 571         printk(DRIVER_NAME "\n");
 572 /* TODO: If it's an eisa only system, will rc return negative? */
 573         rc = pci_register_driver(&cpqarray_pci_driver);
 574         if (rc < 0)
 575                 return rc;
 576         cpqarray_eisa_detect();
 577
 578         for (i=0; i < MAX_CTLR; i++) {
 579                 if (hba[i] != NULL)
 580                         num_cntlrs_reg++;
 581         }
 582
 583         return(num_cntlrs_reg);
 584 }
 585
 586 /* Function to find the first free pointer into our hba[] array */
 587 /* Returns -1 if no free entries are left.  */
 588 static int alloc_cpqarray_hba(void)
 589 {
 590         int i;
 591
 592         for(i=0; i< MAX_CTLR; i++) {
 593                 if (hba[i] == NULL) {
 594                         hba[i] = kmalloc(sizeof(ctlr_info_t), GFP_KERNEL);
 595                         if(hba[i]==NULL) {
 596                                 printk(KERN_ERR "cpqarray: out of memory.\n");
 597                                 return (-1);
 598                         }
 599                         return (i);
 600                 }
 601         }
 602         printk(KERN_WARNING "cpqarray: This driver supports a maximum"
 603                 " of 8 controllers.\n");
 604         return(-1);
 605 }
 606
 607 static void free_hba(int i)
 608 {
 609         kfree(hba[i]);
 610         hba[i]=NULL;
 611 }
 612
 613 /*
 614  * Find the IO address of the controller, its IRQ and so forth.  Fill
 615  * in some basic stuff into the ctlr_info_t structure.
 616  */
 617 static int cpqarray_pci_init(ctlr_info_t *c, struct pci_dev *pdev)
 618 {
 619         ushort vendor_id, device_id, command;
 620         unchar cache_line_size, latency_timer;
 621         unchar irq, revision;
 622         unsigned long addr[6];
 623         __u32 board_id;
 624
 625         int i;
 626
 627         c->pci_dev = pdev;
 628         if (pci_enable_device(pdev)) {
 629                 printk(KERN_ERR "cpqarray: Unable to Enable PCI device\n");
 630                 return -1;
 631         }
 632         vendor_id = pdev->vendor;
 633         device_id = pdev->device;
 634         irq = pdev->irq;
 635
 636         for(i=0; i<6; i++)
 637                 addr[i] = pci_resource_start(pdev, i);
 638
 639         if (pci_set_dma_mask(pdev, CPQARRAY_DMA_MASK) != 0)
 640         {
 641                 printk(KERN_ERR "cpqarray: Unable to set DMA mask\n");
 642                 return -1;
 643         }
 644
 645         pci_read_config_word(pdev, PCI_COMMAND, &command);
 646         pci_read_config_byte(pdev, PCI_CLASS_REVISION, &revision);
 647         pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &cache_line_size);
 648         pci_read_config_byte(pdev, PCI_LATENCY_TIMER, &latency_timer);
 649
 650         pci_read_config_dword(pdev, 0x2c, &board_id);
 651
 652         /* check to see if controller has been disabled */
 653         if(!(command & 0x02)) {
 654                 printk(KERN_WARNING
 655                         "cpqarray: controller appears to be disabled\n");
 656                 return(-1);
 657         }
 658
 659 DBGINFO(
 660         printk("vendor_id = %x\n", vendor_id);
 661         printk("device_id = %x\n", device_id);
 662         printk("command = %x\n", command);
 663         for(i=0; i<6; i++)
 664                 printk("addr[%d] = %lx\n", i, addr[i]);
 665         printk("revision = %x\n", revision);
 666         printk("irq = %x\n", irq);
 667         printk("cache_line_size = %x\n", cache_line_size);
 668         printk("latency_timer = %x\n", latency_timer);
 669         printk("board_id = %x\n", board_id);
 670 );
 671
 672         c->intr = irq;
 673
 674         for(i=0; i<6; i++) {
 675                 if (pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE_IO)
 676                 { /* IO space */
 677                         c->io_mem_addr = addr[i];
 678                         c->io_mem_length = pci_resource_end(pdev, i)
 679                                 - pci_resource_start(pdev, i) + 1;
 680                         if(!request_region( c->io_mem_addr, c->io_mem_length,
 681                                 "cpqarray"))
 682                         {
 683                                 printk( KERN_WARNING "cpqarray I/O memory range already in use addr %lx length = %ld\n", c->io_mem_addr, c->io_mem_length);
 684                                 c->io_mem_addr = 0;
 685                                 c->io_mem_length = 0;
 686                         }
 687                         break;
 688                 }
 689         }
 690
 691         c->paddr = 0;
 692         for(i=0; i<6; i++)
 693                 if (!(pci_resource_flags(pdev, i) &
 694                                 PCI_BASE_ADDRESS_SPACE_IO)) {
 695                         c->paddr = pci_resource_start (pdev, i);
 696                         break;
 697                 }
 698         if (!c->paddr)
 699                 return -1;
 700         c->vaddr = remap_pci_mem(c->paddr, 128);
 701         if (!c->vaddr)
 702                 return -1;
 703         c->board_id = board_id;
 704
 705         for(i=0; i<NR_PRODUCTS; i++) {
 706                 if (board_id == products[i].board_id) {
 707                         c->product_name = products[i].product_name;
 708                         c->access = *(products[i].access);
 709                         break;
 710                 }
 711         }
 712         if (i == NR_PRODUCTS) {
 713                 printk(KERN_WARNING "cpqarray: Sorry, I don't know how"
 714                         " to access the SMART Array controller %08lx\n",
 715                                 (unsigned long)board_id);
 716                 return -1;
 717         }
 718
 719         return 0;
 720 }
 721
 722 /*
 723  * Map (physical) PCI mem into (virtual) kernel space
 724  */
 725 static void *remap_pci_mem(ulong base, ulong size)
 726 {
 727         ulong page_base        = ((ulong) base) & PAGE_MASK;
 728         ulong page_offs        = ((ulong) base) - page_base;
 729         void *page_remapped    = ioremap(page_base, page_offs+size);
 730
 731         return (page_remapped ? (page_remapped + page_offs) : NULL);
 732 }
 733
 734 #ifndef MODULE
 735 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,3,13)
 736 /*
 737  * Config string is a comma separated set of i/o addresses of EISA cards.
 738  */
 739 static int cpqarray_setup(char *str)
 740 {
 741         int i, ints[9];
 742
 743         (void)get_options(str, ARRAY_SIZE(ints), ints);
 744
 745         for(i=0; i<ints[0] && i<8; i++)
 746                 eisa[i] = ints[i+1];
 747         return 1;
 748 }
 749
 750 __setup("smart2=", cpqarray_setup);
 751
 752 #else
 753
 754 /*
 755  * Copy the contents of the ints[] array passed to us by init.
 756  */
 757 void cpqarray_setup(char *str, int *ints)
 758 {
 759         int i;
 760         for(i=0; i<ints[0] && i<8; i++)
 761                 eisa[i] = ints[i+1];
 762 }
 763 #endif
 764 #endif
 765
 766 /*
 767  * Find an EISA controller's signature.  Set up an hba if we find it.
 768  */
 769 static int cpqarray_eisa_detect(void)
 770 {
 771         int i=0, j;
 772         __u32 board_id;
 773         int intr;
 774         int ctlr;
 775         int num_ctlr = 0;
 776
 777         while(i<8 && eisa[i]) {
 778                 ctlr = alloc_cpqarray_hba();
 779                 if(ctlr == -1)
 780                         break;
 781                 board_id = inl(eisa[i]+0xC80);
 782                 for(j=0; j < NR_PRODUCTS; j++)
 783                         if (board_id == products[j].board_id)
 784                                 break;
 785
 786                 if (j == NR_PRODUCTS) {
 787                         printk(KERN_WARNING "cpqarray: Sorry, I don't know how"
 788                                 " to access the SMART Array controller %08lx\n",                                 (unsigned long)board_id);
 789                         continue;
 790                 }
 791
 792                 memset(hba[ctlr], 0, sizeof(ctlr_info_t));
 793                 hba[ctlr]->io_mem_addr = eisa[i];
 794                 hba[ctlr]->io_mem_length = 0x7FF;
 795                 if(!request_region(hba[ctlr]->io_mem_addr,
 796                                 hba[ctlr]->io_mem_length,
 797                                 "cpqarray"))
 798                 {
 799                         printk(KERN_WARNING "cpqarray: I/O range already in "
 800                                         "use addr = %lx length = %ld\n",
 801                                         hba[ctlr]->io_mem_addr,
 802                                         hba[ctlr]->io_mem_length);
 803                         free_hba(ctlr);
 804                         continue;
 805                 }
 806
 807                 /*
 808                  * Read the config register to find our interrupt
 809                  */
 810                 intr = inb(eisa[i]+0xCC0) >> 4;
 811                 if (intr & 1) intr = 11;
 812                 else if (intr & 2) intr = 10;
 813                 else if (intr & 4) intr = 14;
 814                 else if (intr & 8) intr = 15;
 815
 816                 hba[ctlr]->intr = intr;
 817                 sprintf(hba[ctlr]->devname, "ida%d", nr_ctlr);
 818                 hba[ctlr]->product_name = products[j].product_name;
 819                 hba[ctlr]->access = *(products[j].access);
 820                 hba[ctlr]->ctlr = ctlr;
 821                 hba[ctlr]->board_id = board_id;
 822                 hba[ctlr]->pci_dev = NULL; /* not PCI */
 823
 824 DBGINFO(
 825         printk("i = %d, j = %d\n", i, j);
 826         printk("irq = %x\n", intr);
 827         printk("product name = %s\n", products[j].product_name);
 828         printk("board_id = %x\n", board_id);
 829 );
 830
 831                 num_ctlr++;
 832                 i++;
 833
 834                 if (cpqarray_register_ctlr(ctlr, NULL) == -1)
 835                         printk(KERN_WARNING
 836                                 "cpqarray: Can't register EISA controller %d\n",
 837                                 ctlr);
 838
 839         }
 840
 841         return num_ctlr;
 842 }
 843
 844 /*
 845  * Open.  Make sure the device is really there.
 846  */
 847 static int ida_open(struct inode *inode, struct file *filep)
 848 {
 849         drv_info_t *drv = get_drv(inode->i_bdev->bd_disk);
 850         ctlr_info_t *host = get_host(inode->i_bdev->bd_disk);
 851
 852         DBGINFO(printk("ida_open %s\n", inode->i_bdev->bd_disk->disk_name));
 853         /*
 854          * Root is allowed to open raw volume zero even if it's not configured
 855          * so array config can still work.  I don't think I really like this,
 856          * but I'm already using way to many device nodes to claim another one
 857          * for "raw controller".
 858          */
 859         if (!drv->nr_blks) {
 860                 if (!capable(CAP_SYS_RAWIO))
 861                         return -ENXIO;
 862                 if (!capable(CAP_SYS_ADMIN) && drv != host->drv)
 863                         return -ENXIO;
 864         }
 865         host->usage_count++;
 866         return 0;
 867 }
 868
 869 /*
 870  * Close.  Sync first.
 871  */
 872 static int ida_release(struct inode *inode, struct file *filep)
 873 {
 874         ctlr_info_t *host = get_host(inode->i_bdev->bd_disk);
 875         host->usage_count--;
 876         return 0;
 877 }
 878
 879 /*
 880  * Enqueuing and dequeuing functions for cmdlists.
 881  */
 882 static inline void addQ(cmdlist_t **Qptr, cmdlist_t *c)
 883 {
 884         if (*Qptr == NULL) {
 885                 *Qptr = c;
 886                 c->next = c->prev = c;
 887         } else {
 888                 c->prev = (*Qptr)->prev;
 889                 c->next = (*Qptr);
 890                 (*Qptr)->prev->next = c;
 891                 (*Qptr)->prev = c;
 892         }
 893 }
 894
 895 static inline cmdlist_t *removeQ(cmdlist_t **Qptr, cmdlist_t *c)
 896 {
 897         if (c && c->next != c) {
 898                 if (*Qptr == c) *Qptr = c->next;
 899                 c->prev->next = c->next;
 900                 c->next->prev = c->prev;
 901         } else {
 902                 *Qptr = NULL;
 903         }
 904         return c;
 905 }
 906
 907 /*
 908  * Get a request and submit it to the controller.
 909  * This routine needs to grab all the requests it possibly can from the
 910  * req Q and submit them.  Interrupts are off (and need to be off) when you
 911  * are in here (either via the dummy do_ida_request functions or by being
 912  * called from the interrupt handler
 913  */
 914 static void do_ida_request(request_queue_t *q)
 915 {
 916         ctlr_info_t *h = q->queuedata;
 917         cmdlist_t *c;
 918         struct request *creq;
 919         struct scatterlist tmp_sg[SG_MAX];
 920         int i, dir, seg;
 921
 922         if (blk_queue_plugged(q))
 923                 goto startio;
 924
 925 queue_next:
 926         creq = elv_next_request(q);
 927         if (!creq)
 928                 goto startio;
 929
 930         if (creq->nr_phys_segments > SG_MAX)
 931                 BUG();
 932
 933         if ((c = cmd_alloc(h,1)) == NULL)
 934                 goto startio;
 935
 936         blkdev_dequeue_request(creq);
 937
 938         c->ctlr = h->ctlr;
 939         c->hdr.unit = (drv_info_t *)(creq->rq_disk->private_data) - h->drv;
 940         c->hdr.size = sizeof(rblk_t) >> 2;
 941         c->size += sizeof(rblk_t);
 942
 943         c->req.hdr.blk = creq->sector;
 944         c->rq = creq;
 945 DBGPX(
 946         printk("sector=%d, nr_sectors=%d\n", creq->sector, creq->nr_sectors);
 947 );
 948         seg = blk_rq_map_sg(q, creq, tmp_sg);
 949
 950         /* Now do all the DMA Mappings */
 951         if (rq_data_dir(creq) == READ)
 952                 dir = PCI_DMA_FROMDEVICE;
 953         else
 954                 dir = PCI_DMA_TODEVICE;
 955         for( i=0; i < seg; i++)
 956         {
 957                 c->req.sg[i].size = tmp_sg[i].length;
 958                 c->req.sg[i].addr = (__u32) pci_map_page(h->pci_dev,
 959                                                  tmp_sg[i].page,
 960                                                  tmp_sg[i].offset,
 961                                                  tmp_sg[i].length, dir);
 962         }
 963 DBGPX(  printk("Submitting %d sectors in %d segments\n", creq->nr_sectors, seg); );
 964         c->req.hdr.sg_cnt = seg;
 965         c->req.hdr.blk_cnt = creq->nr_sectors;
 966         c->req.hdr.cmd = (rq_data_dir(creq) == READ) ? IDA_READ : IDA_WRITE;
 967         c->type = CMD_RWREQ;
 968
 969         /* Put the request on the tail of the request queue */
 970         addQ(&h->reqQ, c);
 971         h->Qdepth++;
 972         if (h->Qdepth > h->maxQsinceinit)
 973                 h->maxQsinceinit = h->Qdepth;
 974
 975         goto queue_next;
 976
 977 startio:
 978         start_io(h);
 979 }
 980
 981 /*
 982  * start_io submits everything on a controller's request queue
 983  * and moves it to the completion queue.
 984  *
 985  * Interrupts had better be off if you're in here
 986  */
 987 static void start_io(ctlr_info_t *h)
 988 {
 989         cmdlist_t *c;
 990
 991         while((c = h->reqQ) != NULL) {
 992                 /* Can't do anything if we're busy */
 993                 if (h->access.fifo_full(h) == 0)
 994                         return;
 995
 996                 /* Get the first entry from the request Q */
 997                 removeQ(&h->reqQ, c);
 998                 h->Qdepth--;
 999
1000                 /* Tell the controller to do our bidding */
1001                 h->access.submit_command(h, c);
1002
1003                 /* Get onto the completion Q */
1004                 addQ(&h->cmpQ, c);
1005         }
1006 }
1007
1008 static inline void complete_buffers(struct bio *bio, int ok)
1009 {
1010         struct bio *xbh;
1011         while(bio) {
1012                 int nr_sectors = bio_sectors(bio);
1013
1014                 xbh = bio->bi_next;
1015                 bio->bi_next = NULL;
1016
1017                 blk_finished_io(nr_sectors);
1018                 bio_endio(bio, nr_sectors << 9, ok ? 0 : -EIO);
1019
1020                 bio = xbh;
1021         }
1022 }
1023 /*
1024  * Mark all buffers that cmd was responsible for
1025  */
1026 static inline void complete_command(cmdlist_t *cmd, int timeout)
1027 {
1028         int ok=1;
1029         int i, ddir;
1030
1031         if (cmd->req.hdr.rcode & RCODE_NONFATAL &&
1032            (hba[cmd->ctlr]->misc_tflags & MISC_NONFATAL_WARN) == 0) {
1033                 printk(KERN_NOTICE "Non Fatal error on ida/c%dd%d\n",
1034                                 cmd->ctlr, cmd->hdr.unit);
1035                 hba[cmd->ctlr]->misc_tflags |= MISC_NONFATAL_WARN;
1036         }
1037         if (cmd->req.hdr.rcode & RCODE_FATAL) {
1038                 printk(KERN_WARNING "Fatal error on ida/c%dd%d\n",
1039                                 cmd->ctlr, cmd->hdr.unit);
1040                 ok = 0;
1041         }
1042         if (cmd->req.hdr.rcode & RCODE_INVREQ) {
1043                                 printk(KERN_WARNING "Invalid request on ida/c%dd%d = (cmd=%x sect=%d cnt=%d sg=%d ret=%x)\n",
1044                                 cmd->ctlr, cmd->hdr.unit, cmd->req.hdr.cmd,
1045                                 cmd->req.hdr.blk, cmd->req.hdr.blk_cnt,
1046                                 cmd->req.hdr.sg_cnt, cmd->req.hdr.rcode);
1047                 ok = 0;
1048         }
1049         if (timeout) ok = 0;
1050         /* unmap the DMA mapping for all the scatter gather elements */
1051         if (cmd->req.hdr.cmd == IDA_READ)
1052                 ddir = PCI_DMA_FROMDEVICE;
1053         else
1054                 ddir = PCI_DMA_TODEVICE;
1055         for(i=0; i<cmd->req.hdr.sg_cnt; i++)
1056                 pci_unmap_page(hba[cmd->ctlr]->pci_dev, cmd->req.sg[i].addr,
1057                                 cmd->req.sg[i].size, ddir);
1058
1059         complete_buffers(cmd->rq->bio, ok);
1060
1061         DBGPX(printk("Done with %p\n", cmd->rq););
1062         end_that_request_last(cmd->rq);
1063 }
1064
1065 /*
1066  *  The controller will interrupt us upon completion of commands.
1067  *  Find the command on the completion queue, remove it, tell the OS and
1068  *  try to queue up more IO
1069  */
1070 static irqreturn_t do_ida_intr(int irq, void *dev_id, struct pt_regs *regs)
1071 {
1072         ctlr_info_t *h = dev_id;
1073         cmdlist_t *c;
1074         unsigned long istat;
1075         unsigned long flags;
1076         __u32 a,a1;
1077
1078         istat = h->access.intr_pending(h);
1079         /* Is this interrupt for us? */
1080         if (istat == 0)
1081                 return IRQ_NONE;
1082
1083         /*
1084          * If there are completed commands in the completion queue,
1085          * we had better do something about it.
1086          */
1087         spin_lock_irqsave(IDA_LOCK(h->ctlr), flags);
1088         if (istat & FIFO_NOT_EMPTY) {
1089                 while((a = h->access.command_completed(h))) {
1090                         a1 = a; a &= ~3;
1091                         if ((c = h->cmpQ) == NULL)
1092                         {
1093                                 printk(KERN_WARNING "cpqarray: Completion of %08lx ignored\n", (unsigned long)a1);
1094                                 continue;
1095                         }
1096                         while(c->busaddr != a) {
1097                                 c = c->next;
1098                                 if (c == h->cmpQ)
1099                                         break;
1100                         }
1101                         /*
1102                          * If we've found the command, take it off the
1103                          * completion Q and free it
1104                          */
1105                         if (c->busaddr == a) {
1106                                 removeQ(&h->cmpQ, c);
1107                                 /*  Check for invalid command.
1108                                  *  Controller returns command error,
1109                                  *  But rcode = 0.
1110                                  */
1111
1112                                 if((a1 & 0x03) && (c->req.hdr.rcode == 0))
1113                                 {
1114                                         c->req.hdr.rcode = RCODE_INVREQ;
1115                                 }
1116                                 if (c->type == CMD_RWREQ) {
1117                                         complete_command(c, 0);
1118                                         cmd_free(h, c, 1);
1119                                 } else if (c->type == CMD_IOCTL_PEND) {
1120                                         c->type = CMD_IOCTL_DONE;
1121                                 }
1122                                 continue;
1123                         }
1124                 }
1125         }
1126
1127         /*
1128          * See if we can queue up some more IO
1129          */
1130         do_ida_request(h->queue);
1131         spin_unlock_irqrestore(IDA_LOCK(h->ctlr), flags);
1132         return IRQ_HANDLED;
1133 }
1134
1135 /*
1136  * This timer was for timing out requests that haven't happened after
1137  * IDA_TIMEOUT.  That wasn't such a good idea.  This timer is used to
1138  * reset a flags structure so we don't flood the user with
1139  * "Non-Fatal error" messages.
1140  */
1141 static void ida_timer(unsigned long tdata)
1142 {
1143         ctlr_info_t *h = (ctlr_info_t*)tdata;
1144
1145         h->timer.expires = jiffies + IDA_TIMER;
1146         add_timer(&h->timer);
1147         h->misc_tflags = 0;
1148 }
1149
1150 /*
1151  *  ida_ioctl does some miscellaneous stuff like reporting drive geometry,
1152  *  setting readahead and submitting commands from userspace to the controller.
1153  */
1154 static int ida_ioctl(struct inode *inode, struct file *filep, unsigned int cmd, unsigned long arg)
1155 {
1156         drv_info_t *drv = get_drv(inode->i_bdev->bd_disk);
1157         ctlr_info_t *host = get_host(inode->i_bdev->bd_disk);
1158         int error;
1159         int diskinfo[4];
1160         struct hd_geometry __user *geo = (struct hd_geometry __user *)arg;
1161         ida_ioctl_t __user *io = (ida_ioctl_t __user *)arg;
1162         ida_ioctl_t *my_io;
1163
1164         switch(cmd) {
1165         case HDIO_GETGEO:
1166                 if (drv->cylinders) {
1167                         diskinfo[0] = drv->heads;
1168                         diskinfo[1] = drv->sectors;
1169                         diskinfo[2] = drv->cylinders;
1170                 } else {
1171                         diskinfo[0] = 0xff;
1172                         diskinfo[1] = 0x3f;
1173                         diskinfo[2] = drv->nr_blks / (0xff*0x3f);
1174                 }
1175                 put_user(diskinfo[0], &geo->heads);
1176                 put_user(diskinfo[1], &geo->sectors);
1177                 put_user(diskinfo[2], &geo->cylinders);
1178                 put_user(get_start_sect(inode->i_bdev), &geo->start);
1179                 return 0;
1180         case IDAGETDRVINFO:
1181                 if (copy_to_user(&io->c.drv, drv, sizeof(drv_info_t)))
1182                         return -EFAULT;
1183                 return 0;
1184         case IDAPASSTHRU:
1185                 if (!capable(CAP_SYS_RAWIO))
1186                         return -EPERM;
1187                 my_io = kmalloc(sizeof(ida_ioctl_t), GFP_KERNEL);
1188                 if (!my_io)
1189                         return -ENOMEM;
1190                 error = -EFAULT;
1191                 if (copy_from_user(my_io, io, sizeof(*my_io)))
1192                         goto out_passthru;
1193                 error = ida_ctlr_ioctl(host, drv - host->drv, my_io);
1194                 if (error)
1195                         goto out_passthru;
1196                 error = -EFAULT;
1197                 if (copy_to_user(io, my_io, sizeof(*my_io)))
1198                         goto out_passthru;
1199                 error = 0;
1200 out_passthru:
1201                 kfree(my_io);
1202                 return error;
1203         case IDAGETCTLRSIG:
1204                 if (!arg) return -EINVAL;
1205                 put_user(host->ctlr_sig, (int __user *)arg);
1206                 return 0;
1207         case IDAREVALIDATEVOLS:
1208                 if (iminor(inode) != 0)
1209                         return -ENXIO;
1210                 return revalidate_allvol(host);
1211         case IDADRIVERVERSION:
1212                 if (!arg) return -EINVAL;
1213                 put_user(DRIVER_VERSION, (unsigned long __user *)arg);
1214                 return 0;
1215         case IDAGETPCIINFO:
1216         {
1217
1218                 ida_pci_info_struct pciinfo;
1219
1220                 if (!arg) return -EINVAL;
1221                 pciinfo.bus = host->pci_dev->bus->number;
1222                 pciinfo.dev_fn = host->pci_dev->devfn;
1223                 pciinfo.board_id = host->board_id;
1224                 if(copy_to_user((void __user *) arg, &pciinfo,
1225                         sizeof( ida_pci_info_struct)))
1226                                 return -EFAULT;
1227                 return(0);
1228         }
1229
1230         default:
1231                 return -EINVAL;
1232         }
1233
1234 }
1235 /*
1236  * ida_ctlr_ioctl is for passing commands to the controller from userspace.
1237  * The command block (io) has already been copied to kernel space for us,
1238  * however, any elements in the sglist need to be copied to kernel space
1239  * or copied back to userspace.
1240  *
1241  * Only root may perform a controller passthru command, however I'm not doing
1242  * any serious sanity checking on the arguments.  Doing an IDA_WRITE_MEDIA and
1243  * putting a 64M buffer in the sglist is probably a *bad* idea.
1244  */
1245 static int ida_ctlr_ioctl(ctlr_info_t *h, int dsk, ida_ioctl_t *io)
1246 {
1247         int ctlr = h->ctlr;
1248         cmdlist_t *c;
1249         void *p = NULL;
1250         unsigned long flags;
1251         int error;
1252
1253         if ((c = cmd_alloc(h, 0)) == NULL)
1254                 return -ENOMEM;
1255         c->ctlr = ctlr;
1256         c->hdr.unit = (io->unit & UNITVALID) ? (io->unit & ~UNITVALID) : dsk;
1257         c->hdr.size = sizeof(rblk_t) >> 2;
1258         c->size += sizeof(rblk_t);
1259
1260         c->req.hdr.cmd = io->cmd;
1261         c->req.hdr.blk = io->blk;
1262         c->req.hdr.blk_cnt = io->blk_cnt;
1263         c->type = CMD_IOCTL_PEND;
1264
1265         /* Pre submit processing */
1266         switch(io->cmd) {
1267         case PASSTHRU_A:
1268                 p = kmalloc(io->sg[0].size, GFP_KERNEL);
1269                 if (!p)
1270                 {
1271                         error = -ENOMEM;
1272                         cmd_free(h, c, 0);
1273                         return(error);
1274                 }
1275                 if (copy_from_user(p, io->sg[0].addr, io->sg[0].size)) {
1276                         kfree(p);
1277                         cmd_free(h, c, 0);
1278                         return -EFAULT;
1279                 }
1280                 c->req.hdr.blk = pci_map_single(h->pci_dev, &(io->c),
1281                                 sizeof(ida_ioctl_t),
1282                                 PCI_DMA_BIDIRECTIONAL);
1283                 c->req.sg[0].size = io->sg[0].size;
1284                 c->req.sg[0].addr = pci_map_single(h->pci_dev, p,
1285                         c->req.sg[0].size, PCI_DMA_BIDIRECTIONAL);
1286                 c->req.hdr.sg_cnt = 1;
1287                 break;
1288         case IDA_READ:
1289         case READ_FLASH_ROM:
1290         case SENSE_CONTROLLER_PERFORMANCE:
1291                 p = kmalloc(io->sg[0].size, GFP_KERNEL);
1292                 if (!p)
1293                 {
1294                         error = -ENOMEM;
1295                         cmd_free(h, c, 0);
1296                         return(error);
1297                 }
1298
1299                 c->req.sg[0].size = io->sg[0].size;
1300                 c->req.sg[0].addr = pci_map_single(h->pci_dev, p,
1301                         c->req.sg[0].size, PCI_DMA_BIDIRECTIONAL);
1302                 c->req.hdr.sg_cnt = 1;
1303                 break;
1304         case IDA_WRITE:
1305         case IDA_WRITE_MEDIA:
1306         case DIAG_PASS_THRU:
1307         case COLLECT_BUFFER:
1308         case WRITE_FLASH_ROM:
1309                 p = kmalloc(io->sg[0].size, GFP_KERNEL);
1310                 if (!p)
1311                 {
1312                         error = -ENOMEM;
1313                         cmd_free(h, c, 0);
1314                         return(error);
1315                 }
1316                 if (copy_from_user(p, io->sg[0].addr, io->sg[0].size)) {
1317                         kfree(p);
1318                         cmd_free(h, c, 0);
1319                         return -EFAULT;
1320                 }
1321                 c->req.sg[0].size = io->sg[0].size;
1322                 c->req.sg[0].addr = pci_map_single(h->pci_dev, p,
1323                         c->req.sg[0].size, PCI_DMA_BIDIRECTIONAL);
1324                 c->req.hdr.sg_cnt = 1;
1325                 break;
1326         default:
1327                 c->req.sg[0].size = sizeof(io->c);
1328                 c->req.sg[0].addr = pci_map_single(h->pci_dev,&io->c,
1329                         c->req.sg[0].size, PCI_DMA_BIDIRECTIONAL);
1330                 c->req.hdr.sg_cnt = 1;
1331         }
1332
1333         /* Put the request on the tail of the request queue */
1334         spin_lock_irqsave(IDA_LOCK(ctlr), flags);
1335         addQ(&h->reqQ, c);
1336         h->Qdepth++;
1337         start_io(h);
1338         spin_unlock_irqrestore(IDA_LOCK(ctlr), flags);
1339
1340         /* Wait for completion */
1341         while(c->type != CMD_IOCTL_DONE)
1342                 schedule();
1343
1344         /* Unmap the DMA  */
1345         pci_unmap_single(h->pci_dev, c->req.sg[0].addr, c->req.sg[0].size,
1346                 PCI_DMA_BIDIRECTIONAL);
1347         /* Post submit processing */
1348         switch(io->cmd) {
1349         case PASSTHRU_A:
1350                 pci_unmap_single(h->pci_dev, c->req.hdr.blk,
1351                                 sizeof(ida_ioctl_t),
1352                                 PCI_DMA_BIDIRECTIONAL);
1353         case IDA_READ:
1354         case DIAG_PASS_THRU:
1355         case SENSE_CONTROLLER_PERFORMANCE:
1356         case READ_FLASH_ROM:
1357                 if (copy_to_user(io->sg[0].addr, p, io->sg[0].size)) {
1358                         kfree(p);
1359                         return -EFAULT;
1360                 }
1361                 /* fall through and free p */
1362         case IDA_WRITE:
1363         case IDA_WRITE_MEDIA:
1364         case COLLECT_BUFFER:
1365         case WRITE_FLASH_ROM:
1366                 kfree(p);
1367                 break;
1368         default:;
1369                 /* Nothing to do */
1370         }
1371
1372         io->rcode = c->req.hdr.rcode;
1373         cmd_free(h, c, 0);
1374         return(0);
1375 }
1376
1377 /*
1378  * Commands are pre-allocated in a large block.  Here we use a simple bitmap
1379  * scheme to suballocte them to the driver.  Operations that are not time
1380  * critical (and can wait for kmalloc and possibly sleep) can pass in NULL
1381  * as the first argument to get a new command.
1382  */
1383 static cmdlist_t * cmd_alloc(ctlr_info_t *h, int get_from_pool)
1384 {
1385         cmdlist_t * c;
1386         int i;
1387         dma_addr_t cmd_dhandle;
1388
1389         if (!get_from_pool) {
1390                 c = (cmdlist_t*)pci_alloc_consistent(h->pci_dev,
1391                         sizeof(cmdlist_t), &cmd_dhandle);
1392                 if(c==NULL)
1393                         return NULL;
1394         } else {
1395                 do {
1396                         i = find_first_zero_bit(h->cmd_pool_bits, NR_CMDS);
1397                         if (i == NR_CMDS)
1398                                 return NULL;
1399                 } while(test_and_set_bit(i&(BITS_PER_LONG-1), h->cmd_pool_bits+(i/BITS_PER_LONG)) != 0);
1400                 c = h->cmd_pool + i;
1401                 cmd_dhandle = h->cmd_pool_dhandle + i*sizeof(cmdlist_t);
1402                 h->nr_allocs++;
1403         }
1404
1405         memset(c, 0, sizeof(cmdlist_t));
1406         c->busaddr = cmd_dhandle;
1407         return c;
1408 }
1409
1410 static void cmd_free(ctlr_info_t *h, cmdlist_t *c, int got_from_pool)
1411 {
1412         int i;
1413
1414         if (!got_from_pool) {
1415                 pci_free_consistent(h->pci_dev, sizeof(cmdlist_t), c,
1416                         c->busaddr);
1417         } else {
1418                 i = c - h->cmd_pool;
1419                 clear_bit(i&(BITS_PER_LONG-1), h->cmd_pool_bits+(i/BITS_PER_LONG));
1420                 h->nr_frees++;
1421         }
1422 }
1423
1424 /***********************************************************************
1425     name:        sendcmd
1426     Send a command to an IDA using the memory mapped FIFO interface
1427     and wait for it to complete.
1428     This routine should only be called at init time.
1429 ***********************************************************************/
1430 static int sendcmd(
1431         __u8    cmd,
1432         int     ctlr,
1433         void    *buff,
1434         size_t  size,
1435         unsigned int blk,
1436         unsigned int blkcnt,
1437         unsigned int log_unit )
1438 {
1439         cmdlist_t *c;
1440         int complete;
1441         unsigned long temp;
1442         unsigned long i;
1443         ctlr_info_t *info_p = hba[ctlr];
1444
1445         c = cmd_alloc(info_p, 1);
1446         if(!c)
1447                 return IO_ERROR;
1448         c->ctlr = ctlr;
1449         c->hdr.unit = log_unit;
1450         c->hdr.prio = 0;
1451         c->hdr.size = sizeof(rblk_t) >> 2;
1452         c->size += sizeof(rblk_t);
1453
1454         /* The request information. */
1455         c->req.hdr.next = 0;
1456         c->req.hdr.rcode = 0;
1457         c->req.bp = 0;
1458         c->req.hdr.sg_cnt = 1;
1459         c->req.hdr.reserved = 0;
1460
1461         if (size == 0)
1462                 c->req.sg[0].size = 512;
1463         else
1464                 c->req.sg[0].size = size;
1465
1466         c->req.hdr.blk = blk;
1467         c->req.hdr.blk_cnt = blkcnt;
1468         c->req.hdr.cmd = (unsigned char) cmd;
1469         c->req.sg[0].addr = (__u32) pci_map_single(info_p->pci_dev,
1470                 buff, c->req.sg[0].size, PCI_DMA_BIDIRECTIONAL);
1471         /*
1472          * Disable interrupt
1473          */
1474         info_p->access.set_intr_mask(info_p, 0);
1475         /* Make sure there is room in the command FIFO */
1476         /* Actually it should be completely empty at this time. */
1477         for (i = 200000; i > 0; i--) {
1478                 temp = info_p->access.fifo_full(info_p);
1479                 if (temp != 0) {
1480                         break;
1481                 }
1482                 udelay(10);
1483 DBG(
1484                 printk(KERN_WARNING "cpqarray ida%d: idaSendPciCmd FIFO full,"
1485                         " waiting!\n", ctlr);
1486 );
1487         }
1488         /*
1489          * Send the cmd
1490          */
1491         info_p->access.submit_command(info_p, c);
1492         complete = pollcomplete(ctlr);
1493
1494         pci_unmap_single(info_p->pci_dev, (dma_addr_t) c->req.sg[0].addr,
1495                 c->req.sg[0].size, PCI_DMA_BIDIRECTIONAL);
1496         if (complete != 1) {
1497                 if (complete != c->busaddr) {
1498                         printk( KERN_WARNING
1499                         "cpqarray ida%d: idaSendPciCmd "
1500                       "Invalid command list address returned! (%08lx)\n",
1501                                 ctlr, (unsigned long)complete);
1502                         cmd_free(info_p, c, 1);
1503                         return (IO_ERROR);
1504                 }
1505         } else {
1506                 printk( KERN_WARNING
1507                         "cpqarray ida%d: idaSendPciCmd Timeout out, "
1508                         "No command list address returned!\n",
1509                         ctlr);
1510                 cmd_free(info_p, c, 1);
1511                 return (IO_ERROR);
1512         }
1513
1514         if (c->req.hdr.rcode & 0x00FE) {
1515                 if (!(c->req.hdr.rcode & BIG_PROBLEM)) {
1516                         printk( KERN_WARNING
1517                         "cpqarray ida%d: idaSendPciCmd, error: "
1518                                 "Controller failed at init time "
1519                                 "cmd: 0x%x, return code = 0x%x\n",
1520                                 ctlr, c->req.hdr.cmd, c->req.hdr.rcode);
1521
1522                         cmd_free(info_p, c, 1);
1523                         return (IO_ERROR);
1524                 }
1525         }
1526         cmd_free(info_p, c, 1);
1527         return (IO_OK);
1528 }
1529
1530 /*
1531  * revalidate_allvol is for online array config utilities.  After a
1532  * utility reconfigures the drives in the array, it can use this function
1533  * (through an ioctl) to make the driver zap any previous disk structs for
1534  * that controller and get new ones.
1535  *
1536  * Right now I'm using the getgeometry() function to do this, but this
1537  * function should probably be finer grained and allow you to revalidate one
1538  * particualar logical volume (instead of all of them on a particular
1539  * controller).
1540  */
1541 static int revalidate_allvol(ctlr_info_t *host)
1542 {
1543         int ctlr = host->ctlr;
1544         int i;
1545         unsigned long flags;
1546
1547         spin_lock_irqsave(IDA_LOCK(ctlr), flags);
1548         if (host->usage_count > 1) {
1549                 spin_unlock_irqrestore(IDA_LOCK(ctlr), flags);
1550                 printk(KERN_WARNING "cpqarray: Device busy for volume"
1551                         " revalidation (usage=%d)\n", host->usage_count);
1552                 return -EBUSY;
1553         }
1554         host->usage_count++;
1555         spin_unlock_irqrestore(IDA_LOCK(ctlr), flags);
1556
1557         /*
1558          * Set the partition and block size structures for all volumes
1559          * on this controller to zero.  We will reread all of this data
1560          */
1561         set_capacity(ida_gendisk[ctlr][0], 0);
1562         for (i = 1; i < NWD; i++) {
1563                 struct gendisk *disk = ida_gendisk[ctlr][i];
1564                 if (disk->flags & GENHD_FL_UP)
1565                         del_gendisk(disk);
1566         }
1567         memset(host->drv, 0, sizeof(drv_info_t)*NWD);
1568
1569         /*
1570          * Tell the array controller not to give us any interrupts while
1571          * we check the new geometry.  Then turn interrupts back on when
1572          * we're done.
1573          */
1574         host->access.set_intr_mask(host, 0);
1575         getgeometry(ctlr);
1576         host->access.set_intr_mask(host, FIFO_NOT_EMPTY);
1577
1578         for(i=0; i<NWD; i++) {
1579                 struct gendisk *disk = ida_gendisk[ctlr][i];
1580                 drv_info_t *drv = &host->drv[i];
1581                 if (i && !drv->nr_blks)
1582                         continue;
1583                 blk_queue_hardsect_size(host->queue, drv->blk_size);
1584                 set_capacity(disk, drv->nr_blks);
1585                 disk->queue = host->queue;
1586                 disk->private_data = drv;
1587                 if (i)
1588                         add_disk(disk);
1589         }
1590
1591         host->usage_count--;
1592         return 0;
1593 }
1594
1595 static int ida_revalidate(struct gendisk *disk)
1596 {
1597         drv_info_t *drv = disk->private_data;
1598         set_capacity(disk, drv->nr_blks);
1599         return 0;
1600 }
1601
1602 /********************************************************************
1603     name: pollcomplete
1604     Wait polling for a command to complete.
1605     The memory mapped FIFO is polled for the completion.
1606     Used only at init time, interrupts disabled.
1607  ********************************************************************/
1608 static int pollcomplete(int ctlr)
1609 {
1610         int done;
1611         int i;
1612
1613         /* Wait (up to 2 seconds) for a command to complete */
1614
1615         for (i = 200000; i > 0; i--) {
1616                 done = hba[ctlr]->access.command_completed(hba[ctlr]);
1617                 if (done == 0) {
1618                         udelay(10);     /* a short fixed delay */
1619                 } else
1620                         return (done);
1621         }
1622         /* Invalid address to tell caller we ran out of time */
1623         return 1;
1624 }
1625 /*****************************************************************
1626     start_fwbk
1627     Starts controller firmwares background processing.
1628     Currently only the Integrated Raid controller needs this done.
1629     If the PCI mem address registers are written to after this,
1630          data corruption may occur
1631 *****************************************************************/
1632 static void start_fwbk(int ctlr)
1633 {
1634                 id_ctlr_t *id_ctlr_buf;
1635         int ret_code;
1636
1637         if(     (hba[ctlr]->board_id != 0x40400E11)
1638                 && (hba[ctlr]->board_id != 0x40480E11) )
1639
1640         /* Not a Integrated Raid, so there is nothing for us to do */
1641                 return;
1642         printk(KERN_DEBUG "cpqarray: Starting firmware's background"
1643                 " processing\n");
1644         /* Command does not return anything, but idasend command needs a
1645                 buffer */
1646         id_ctlr_buf = (id_ctlr_t *)kmalloc(sizeof(id_ctlr_t), GFP_KERNEL);
1647         if(id_ctlr_buf==NULL)
1648         {
1649                 printk(KERN_WARNING "cpqarray: Out of memory. "
1650                         "Unable to start background processing.\n");
1651                 return;
1652         }
1653         ret_code = sendcmd(RESUME_BACKGROUND_ACTIVITY, ctlr,
1654                 id_ctlr_buf, 0, 0, 0, 0);
1655         if(ret_code != IO_OK)
1656                 printk(KERN_WARNING "cpqarray: Unable to start"
1657                         " background processing\n");
1658
1659         kfree(id_ctlr_buf);
1660 }
1661 /*****************************************************************
1662     getgeometry
1663     Get ida logical volume geometry from the controller
1664     This is a large bit of code which once existed in two flavors,
1665     It is used only at init time.
1666 *****************************************************************/
1667 static void getgeometry(int ctlr)
1668 {
1669         id_log_drv_t *id_ldrive;
1670         id_ctlr_t *id_ctlr_buf;
1671         sense_log_drv_stat_t *id_lstatus_buf;
1672         config_t *sense_config_buf;
1673         unsigned int log_unit, log_index;
1674         int ret_code, size;
1675         drv_info_t *drv;
1676         ctlr_info_t *info_p = hba[ctlr];
1677         int i;
1678
1679         info_p->log_drv_map = 0;
1680
1681         id_ldrive = (id_log_drv_t *)kmalloc(sizeof(id_log_drv_t), GFP_KERNEL);
1682         if(id_ldrive == NULL)
1683         {
1684                 printk( KERN_ERR "cpqarray:  out of memory.\n");
1685                 return;
1686         }
1687
1688         id_ctlr_buf = (id_ctlr_t *)kmalloc(sizeof(id_ctlr_t), GFP_KERNEL);
1689         if(id_ctlr_buf == NULL)
1690         {
1691                 kfree(id_ldrive);
1692                 printk( KERN_ERR "cpqarray:  out of memory.\n");
1693                 return;
1694         }
1695
1696         id_lstatus_buf = (sense_log_drv_stat_t *)kmalloc(sizeof(sense_log_drv_stat_t), GFP_KERNEL);
1697         if(id_lstatus_buf == NULL)
1698         {
1699                 kfree(id_ctlr_buf);
1700                 kfree(id_ldrive);
1701                 printk( KERN_ERR "cpqarray:  out of memory.\n");
1702                 return;
1703         }
1704
1705         sense_config_buf = (config_t *)kmalloc(sizeof(config_t), GFP_KERNEL);
1706         if(sense_config_buf == NULL)
1707         {
1708                 kfree(id_lstatus_buf);
1709                 kfree(id_ctlr_buf);
1710                 kfree(id_ldrive);
1711                 printk( KERN_ERR "cpqarray:  out of memory.\n");
1712                 return;
1713         }
1714
1715         memset(id_ldrive, 0, sizeof(id_log_drv_t));
1716         memset(id_ctlr_buf, 0, sizeof(id_ctlr_t));
1717         memset(id_lstatus_buf, 0, sizeof(sense_log_drv_stat_t));
1718         memset(sense_config_buf, 0, sizeof(config_t));
1719
1720         info_p->phys_drives = 0;
1721         info_p->log_drv_map = 0;
1722         info_p->drv_assign_map = 0;
1723         info_p->drv_spare_map = 0;
1724         info_p->mp_failed_drv_map = 0;  /* only initialized here */
1725         /* Get controllers info for this logical drive */
1726         ret_code = sendcmd(ID_CTLR, ctlr, id_ctlr_buf, 0, 0, 0, 0);
1727         if (ret_code == IO_ERROR) {
1728                 /*
1729                  * If can't get controller info, set the logical drive map to 0,
1730                  * so the idastubopen will fail on all logical drives
1731                  * on the controller.
1732                  */
1733                  /* Free all the buffers and return */
1734                 printk(KERN_ERR "cpqarray: error sending ID controller\n");
1735                 kfree(sense_config_buf);
1736                 kfree(id_lstatus_buf);
1737                 kfree(id_ctlr_buf);
1738                 kfree(id_ldrive);
1739                 return;
1740         }
1741
1742         info_p->log_drives = id_ctlr_buf->nr_drvs;
1743         for(i=0;i<4;i++)
1744                 info_p->firm_rev[i] = id_ctlr_buf->firm_rev[i];
1745         info_p->ctlr_sig = id_ctlr_buf->cfg_sig;
1746
1747         printk(" (%s)\n", info_p->product_name);
1748         /*
1749          * Initialize logical drive map to zero
1750          */
1751         log_index = 0;
1752         /*
1753          * Get drive geometry for all logical drives
1754          */
1755         if (id_ctlr_buf->nr_drvs > 16)
1756                 printk(KERN_WARNING "cpqarray ida%d:  This driver supports "
1757                         "16 logical drives per controller.\n.  "
1758                         " Additional drives will not be "
1759                         "detected\n", ctlr);
1760
1761         for (log_unit = 0;
1762              (log_index < id_ctlr_buf->nr_drvs)
1763              && (log_unit < NWD);
1764              log_unit++) {
1765                 struct gendisk *disk = ida_gendisk[ctlr][log_unit];
1766
1767                 size = sizeof(sense_log_drv_stat_t);
1768
1769                 /*
1770                    Send "Identify logical drive status" cmd
1771                  */
1772                 ret_code = sendcmd(SENSE_LOG_DRV_STAT,
1773                              ctlr, id_lstatus_buf, size, 0, 0, log_unit);
1774                 if (ret_code == IO_ERROR) {
1775                         /*
1776                            If can't get logical drive status, set
1777                            the logical drive map to 0, so the
1778                            idastubopen will fail for all logical drives
1779                            on the controller.
1780                          */
1781                         info_p->log_drv_map = 0;
1782                         printk( KERN_WARNING
1783                              "cpqarray ida%d: idaGetGeometry - Controller"
1784                                 " failed to report status of logical drive %d\n"
1785                          "Access to this controller has been disabled\n",
1786                                 ctlr, log_unit);
1787                         /* Free all the buffers and return */
1788                         kfree(sense_config_buf);
1789                         kfree(id_lstatus_buf);
1790                         kfree(id_ctlr_buf);
1791                         kfree(id_ldrive);
1792                         return;
1793                 }
1794                 /*
1795                    Make sure the logical drive is configured
1796                  */
1797                 if (id_lstatus_buf->status != LOG_NOT_CONF) {
1798                         ret_code = sendcmd(ID_LOG_DRV, ctlr, id_ldrive,
1799                                sizeof(id_log_drv_t), 0, 0, log_unit);
1800                         /*
1801                            If error, the bit for this
1802                            logical drive won't be set and
1803                            idastubopen will return error.
1804                          */
1805                         if (ret_code != IO_ERROR) {
1806                                 drv = &info_p->drv[log_unit];
1807                                 drv->blk_size = id_ldrive->blk_size;
1808                                 drv->nr_blks = id_ldrive->nr_blks;
1809                                 drv->cylinders = id_ldrive->drv.cyl;
1810                                 drv->heads = id_ldrive->drv.heads;
1811                                 drv->sectors = id_ldrive->drv.sect_per_track;
1812                                 info_p->log_drv_map |=  (1 << log_unit);
1813
1814         printk(KERN_INFO "cpqarray ida/c%dd%d: blksz=%d nr_blks=%d\n",
1815                 ctlr, log_unit, drv->blk_size, drv->nr_blks);
1816                                 ret_code = sendcmd(SENSE_CONFIG,
1817                                                   ctlr, sense_config_buf,
1818                                  sizeof(config_t), 0, 0, log_unit);
1819                                 if (ret_code == IO_ERROR) {
1820                                         info_p->log_drv_map = 0;
1821                                         /* Free all the buffers and return */
1822                                         printk(KERN_ERR "cpqarray: error sending sense config\n");
1823                                         kfree(sense_config_buf);
1824                                         kfree(id_lstatus_buf);
1825                                         kfree(id_ctlr_buf);
1826                                         kfree(id_ldrive);
1827                                         return;
1828
1829                                 }
1830
1831                                 sprintf(disk->devfs_name, "ida/c%dd%d", ctlr, log_unit);
1832
1833                                 info_p->phys_drives =
1834                                     sense_config_buf->ctlr_phys_drv;
1835                                 info_p->drv_assign_map
1836                                     |= sense_config_buf->drv_asgn_map;
1837                                 info_p->drv_assign_map
1838                                     |= sense_config_buf->spare_asgn_map;
1839                                 info_p->drv_spare_map
1840                                     |= sense_config_buf->spare_asgn_map;
1841                         }       /* end of if no error on id_ldrive */
1842                         log_index = log_index + 1;
1843                 }               /* end of if logical drive configured */
1844         }                       /* end of for log_unit */
1845         kfree(sense_config_buf);
1846         kfree(id_ldrive);
1847         kfree(id_lstatus_buf);
1848         kfree(id_ctlr_buf);
1849         return;
1850
1851 }
1852
1853 static void __exit cpqarray_exit(void)
1854 {
1855         int i;
1856
1857         pci_unregister_driver(&cpqarray_pci_driver);
1858
1859         /* Double check that all controller entries have been removed */
1860         for(i=0; i<MAX_CTLR; i++) {
1861                 if (hba[i] != NULL) {
1862                         printk(KERN_WARNING "cpqarray: Removing EISA "
1863                                         "controller %d\n", i);
1864                         cpqarray_remove_one_eisa(i);
1865                 }
1866         }
1867
1868         devfs_remove("ida");
1869         remove_proc_entry("cpqarray", proc_root_driver);
1870 }
1871
1872 module_init(cpqarray_init)
1873 module_exit(cpqarray_exit)