drivers/block/cpqarray.c

   1 /*
   2  *    Disk Array driver for Compaq SMART2 Controllers
   3  *    Copyright 1998 Compaq Computer Corporation
   4  *
   5  *    This program is free software; you can redistribute it and/or modify
   6  *    it under the terms of the GNU General Public License as published by
   7  *    the Free Software Foundation; either version 2 of the License, or
   8  *    (at your option) any later version.
   9  *
  10  *    This program is distributed in the hope that it will be useful,
  11  *    but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  *    MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
  13  *    NON INFRINGEMENT.  See the GNU General Public License for more details.
  14  *
  15  *    You should have received a copy of the GNU General Public License
  16  *    along with this program; if not, write to the Free Software
  17  *    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  18  *
  19  *    Questions/Comments/Bugfixes to iss_storagedev@hp.com
  20  *
  21  */
  22 #include <linux/module.h>
  23 #include <linux/types.h>
  24 #include <linux/pci.h>
  25 #include <linux/bio.h>
  26 #include <linux/interrupt.h>
  27 #include <linux/kernel.h>
  28 #include <linux/slab.h>
  29 #include <linux/delay.h>
  30 #include <linux/major.h>
  31 #include <linux/fs.h>
  32 #include <linux/blkpg.h>
  33 #include <linux/timer.h>
  34 #include <linux/proc_fs.h>
  35 #include <linux/init.h>
  36 #include <linux/hdreg.h>
  37 #include <linux/spinlock.h>
  38 #include <linux/blkdev.h>
  39 #include <linux/genhd.h>
  40 #include <asm/uaccess.h>
  41 #include <asm/io.h>
  42
  43
  44 #define SMART2_DRIVER_VERSION(maj,min,submin) ((maj<<16)|(min<<8)|(submin))
  45
  46 #define DRIVER_NAME "Compaq SMART2 Driver (v 2.6.0)"
  47 #define DRIVER_VERSION SMART2_DRIVER_VERSION(2,6,0)
  48
  49 /* Embedded module documentation macros - see modules.h */
  50 /* Original author Chris Frantz - Compaq Computer Corporation */
  51 MODULE_AUTHOR("Compaq Computer Corporation");
  52 MODULE_DESCRIPTION("Driver for Compaq Smart2 Array Controllers version 2.6.0");
  53 MODULE_VERSION("2.6.0");
  54 MODULE_LICENSE("GPL");
  55
  56 #include "cpqarray.h"
  57 #include "ida_cmd.h"
  58 #include "smart1,2.h"
  59 #include "ida_ioctl.h"
  60
  61 #define READ_AHEAD      128
  62 #define NR_CMDS         128 /* This could probably go as high as ~400 */
  63
  64 #define MAX_CTLR        8
  65 #define CTLR_SHIFT      8
  66
  67 #define CPQARRAY_DMA_MASK       0xFFFFFFFF      /* 32 bit DMA */
  68
  69 static int nr_ctlr;
  70 static ctlr_info_t *hba[MAX_CTLR];
  71
  72 static int eisa[8];
  73
  74 #define NR_PRODUCTS ARRAY_SIZE(products)
  75
  76 /*  board_id = Subsystem Device ID & Vendor ID
  77  *  product = Marketing Name for the board
  78  *  access = Address of the struct of function pointers
  79  */
  80 static struct board_type products[] = {
  81         { 0x0040110E, "IDA",                    &smart1_access },
  82         { 0x0140110E, "IDA-2",                  &smart1_access },
  83         { 0x1040110E, "IAES",                   &smart1_access },
  84         { 0x2040110E, "SMART",                  &smart1_access },
  85         { 0x3040110E, "SMART-2/E",              &smart2e_access },
  86         { 0x40300E11, "SMART-2/P",              &smart2_access },
  87         { 0x40310E11, "SMART-2SL",              &smart2_access },
  88         { 0x40320E11, "Smart Array 3200",       &smart2_access },
  89         { 0x40330E11, "Smart Array 3100ES",     &smart2_access },
  90         { 0x40340E11, "Smart Array 221",        &smart2_access },
  91         { 0x40400E11, "Integrated Array",       &smart4_access },
  92         { 0x40480E11, "Compaq Raid LC2",        &smart4_access },
  93         { 0x40500E11, "Smart Array 4200",       &smart4_access },
  94         { 0x40510E11, "Smart Array 4250ES",     &smart4_access },
  95         { 0x40580E11, "Smart Array 431",        &smart4_access },
  96 };
  97
  98 /* define the PCI info for the PCI cards this driver can control */
  99 static const struct pci_device_id cpqarray_pci_device_id[] =
 100 {
 101         { PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_COMPAQ_42XX,
 102                 0x0E11, 0x4058, 0, 0, 0},       /* SA431 */
 103         { PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_COMPAQ_42XX,
 104                 0x0E11, 0x4051, 0, 0, 0},      /* SA4250ES */
 105         { PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_COMPAQ_42XX,
 106                 0x0E11, 0x4050, 0, 0, 0},      /* SA4200 */
 107         { PCI_VENDOR_ID_NCR, PCI_DEVICE_ID_NCR_53C1510,
 108                 0x0E11, 0x4048, 0, 0, 0},       /* LC2 */
 109         { PCI_VENDOR_ID_NCR, PCI_DEVICE_ID_NCR_53C1510,
 110                 0x0E11, 0x4040, 0, 0, 0},      /* Integrated Array */
 111         { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_SMART2P,
 112                 0x0E11, 0x4034, 0, 0, 0},       /* SA 221 */
 113         { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_SMART2P,
 114                 0x0E11, 0x4033, 0, 0, 0},       /* SA 3100ES*/
 115         { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_SMART2P,
 116                 0x0E11, 0x4032, 0, 0, 0},       /* SA 3200*/
 117         { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_SMART2P,
 118                 0x0E11, 0x4031, 0, 0, 0},       /* SA 2SL*/
 119         { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_SMART2P,
 120                 0x0E11, 0x4030, 0, 0, 0},       /* SA 2P */
 121         { 0 }
 122 };
 123
 124 MODULE_DEVICE_TABLE(pci, cpqarray_pci_device_id);
 125
 126 static struct gendisk *ida_gendisk[MAX_CTLR][NWD];
 127
 128 /* Debug... */
 129 #define DBG(s)  do { s } while(0)
 130 /* Debug (general info)... */
 131 #define DBGINFO(s) do { } while(0)
 132 /* Debug Paranoid... */
 133 #define DBGP(s)  do { } while(0)
 134 /* Debug Extra Paranoid... */
 135 #define DBGPX(s) do { } while(0)
 136
 137 static int cpqarray_pci_init(ctlr_info_t *c, struct pci_dev *pdev);
 138 static void __iomem *remap_pci_mem(ulong base, ulong size);
 139 static int cpqarray_eisa_detect(void);
 140 static int pollcomplete(int ctlr);
 141 static void getgeometry(int ctlr);
 142 static void start_fwbk(int ctlr);
 143
 144 static cmdlist_t * cmd_alloc(ctlr_info_t *h, int get_from_pool);
 145 static void cmd_free(ctlr_info_t *h, cmdlist_t *c, int got_from_pool);
 146
 147 static void free_hba(int i);
 148 static int alloc_cpqarray_hba(void);
 149
 150 static int sendcmd(
 151         __u8    cmd,
 152         int     ctlr,
 153         void    *buff,
 154         size_t  size,
 155         unsigned int blk,
 156         unsigned int blkcnt,
 157         unsigned int log_unit );
 158
 159 static int ida_open(struct inode *inode, struct file *filep);
 160 static int ida_release(struct inode *inode, struct file *filep);
 161 static int ida_ioctl(struct inode *inode, struct file *filep, unsigned int cmd, unsigned long arg);
 162 static int ida_getgeo(struct block_device *bdev, struct hd_geometry *geo);
 163 static int ida_ctlr_ioctl(ctlr_info_t *h, int dsk, ida_ioctl_t *io);
 164
 165 static void do_ida_request(request_queue_t *q);
 166 static void start_io(ctlr_info_t *h);
 167
 168 static inline void addQ(cmdlist_t **Qptr, cmdlist_t *c);
 169 static inline cmdlist_t *removeQ(cmdlist_t **Qptr, cmdlist_t *c);
 170 static inline void complete_buffers(struct bio *bio, int ok);
 171 static inline void complete_command(cmdlist_t *cmd, int timeout);
 172
 173 static irqreturn_t do_ida_intr(int irq, void *dev_id, struct pt_regs * regs);
 174 static void ida_timer(unsigned long tdata);
 175 static int ida_revalidate(struct gendisk *disk);
 176 static int revalidate_allvol(ctlr_info_t *host);
 177 static int cpqarray_register_ctlr(int ctlr, struct pci_dev *pdev);
 178
 179 #ifdef CONFIG_PROC_FS
 180 static void ida_procinit(int i);
 181 static int ida_proc_get_info(char *buffer, char **start, off_t offset, int length, int *eof, void *data);
 182 #else
 183 static void ida_procinit(int i) {}
 184 #endif
 185
 186 static inline drv_info_t *get_drv(struct gendisk *disk)
 187 {
 188         return disk->private_data;
 189 }
 190
 191 static inline ctlr_info_t *get_host(struct gendisk *disk)
 192 {
 193         return disk->queue->queuedata;
 194 }
 195
 196
 197 static struct block_device_operations ida_fops  = {
 198         .owner          = THIS_MODULE,
 199         .open           = ida_open,
 200         .release        = ida_release,
 201         .ioctl          = ida_ioctl,
 202         .getgeo         = ida_getgeo,
 203         .revalidate_disk= ida_revalidate,
 204 };
 205
 206
 207 #ifdef CONFIG_PROC_FS
 208
 209 static struct proc_dir_entry *proc_array;
 210
 211 /*
 212  * Get us a file in /proc/array that says something about each controller.
 213  * Create /proc/array if it doesn't exist yet.
 214  */
 215 static void __init ida_procinit(int i)
 216 {
 217         if (proc_array == NULL) {
 218                 proc_array = proc_mkdir("cpqarray", proc_root_driver);
 219                 if (!proc_array) return;
 220         }
 221
 222         create_proc_read_entry(hba[i]->devname, 0, proc_array,
 223                                ida_proc_get_info, hba[i]);
 224 }
 225
 226 /*
 227  * Report information about this controller.
 228  */
 229 static int ida_proc_get_info(char *buffer, char **start, off_t offset, int length, int *eof, void *data)
 230 {
 231         off_t pos = 0;
 232         off_t len = 0;
 233         int size, i, ctlr;
 234         ctlr_info_t *h = (ctlr_info_t*)data;
 235         drv_info_t *drv;
 236 #ifdef CPQ_PROC_PRINT_QUEUES
 237         cmdlist_t *c;
 238         unsigned long flags;
 239 #endif
 240
 241         ctlr = h->ctlr;
 242         size = sprintf(buffer, "%s:  Compaq %s Controller\n"
 243                 "       Board ID: 0x%08lx\n"
 244                 "       Firmware Revision: %c%c%c%c\n"
 245                 "       Controller Sig: 0x%08lx\n"
 246                 "       Memory Address: 0x%08lx\n"
 247                 "       I/O Port: 0x%04x\n"
 248                 "       IRQ: %d\n"
 249                 "       Logical drives: %d\n"
 250                 "       Physical drives: %d\n\n"
 251                 "       Current Q depth: %d\n"
 252                 "       Max Q depth since init: %d\n\n",
 253                 h->devname,
 254                 h->product_name,
 255                 (unsigned long)h->board_id,
 256                 h->firm_rev[0], h->firm_rev[1], h->firm_rev[2], h->firm_rev[3],
 257                 (unsigned long)h->ctlr_sig, (unsigned long)h->vaddr,
 258                 (unsigned int) h->io_mem_addr, (unsigned int)h->intr,
 259                 h->log_drives, h->phys_drives,
 260                 h->Qdepth, h->maxQsinceinit);
 261
 262         pos += size; len += size;
 263
 264         size = sprintf(buffer+len, "Logical Drive Info:\n");
 265         pos += size; len += size;
 266
 267         for(i=0; i<h->log_drives; i++) {
 268                 drv = &h->drv[i];
 269                 size = sprintf(buffer+len, "ida/c%dd%d: blksz=%d nr_blks=%d\n",
 270                                 ctlr, i, drv->blk_size, drv->nr_blks);
 271                 pos += size; len += size;
 272         }
 273
 274 #ifdef CPQ_PROC_PRINT_QUEUES
 275         spin_lock_irqsave(IDA_LOCK(h->ctlr), flags);
 276         size = sprintf(buffer+len, "\nCurrent Queues:\n");
 277         pos += size; len += size;
 278
 279         c = h->reqQ;
 280         size = sprintf(buffer+len, "reqQ = %p", c); pos += size; len += size;
 281         if (c) c=c->next;
 282         while(c && c != h->reqQ) {
 283                 size = sprintf(buffer+len, "->%p", c);
 284                 pos += size; len += size;
 285                 c=c->next;
 286         }
 287
 288         c = h->cmpQ;
 289         size = sprintf(buffer+len, "\ncmpQ = %p", c); pos += size; len += size;
 290         if (c) c=c->next;
 291         while(c && c != h->cmpQ) {
 292                 size = sprintf(buffer+len, "->%p", c);
 293                 pos += size; len += size;
 294                 c=c->next;
 295         }
 296
 297         size = sprintf(buffer+len, "\n"); pos += size; len += size;
 298         spin_unlock_irqrestore(IDA_LOCK(h->ctlr), flags);
 299 #endif
 300         size = sprintf(buffer+len, "nr_allocs = %d\nnr_frees = %d\n",
 301                         h->nr_allocs, h->nr_frees);
 302         pos += size; len += size;
 303
 304         *eof = 1;
 305         *start = buffer+offset;
 306         len -= offset;
 307         if (len>length)
 308                 len = length;
 309         return len;
 310 }
 311 #endif /* CONFIG_PROC_FS */
 312
 313 module_param_array(eisa, int, NULL, 0);
 314
 315 static void release_io_mem(ctlr_info_t *c)
 316 {
 317         /* if IO mem was not protected do nothing */
 318         if( c->io_mem_addr == 0)
 319                 return;
 320         release_region(c->io_mem_addr, c->io_mem_length);
 321         c->io_mem_addr = 0;
 322         c->io_mem_length = 0;
 323 }
 324
 325 static void __devexit cpqarray_remove_one(int i)
 326 {
 327         int j;
 328         char buff[4];
 329
 330         /* sendcmd will turn off interrupt, and send the flush...
 331          * To write all data in the battery backed cache to disks
 332          * no data returned, but don't want to send NULL to sendcmd */
 333         if( sendcmd(FLUSH_CACHE, i, buff, 4, 0, 0, 0))
 334         {
 335                 printk(KERN_WARNING "Unable to flush cache on controller %d\n",
 336                                 i);
 337         }
 338         free_irq(hba[i]->intr, hba[i]);
 339         iounmap(hba[i]->vaddr);
 340         unregister_blkdev(COMPAQ_SMART2_MAJOR+i, hba[i]->devname);
 341         del_timer(&hba[i]->timer);
 342         remove_proc_entry(hba[i]->devname, proc_array);
 343         pci_free_consistent(hba[i]->pci_dev,
 344                         NR_CMDS * sizeof(cmdlist_t), (hba[i]->cmd_pool),
 345                         hba[i]->cmd_pool_dhandle);
 346         kfree(hba[i]->cmd_pool_bits);
 347         for(j = 0; j < NWD; j++) {
 348                 if (ida_gendisk[i][j]->flags & GENHD_FL_UP)
 349                         del_gendisk(ida_gendisk[i][j]);
 350                 put_disk(ida_gendisk[i][j]);
 351         }
 352         blk_cleanup_queue(hba[i]->queue);
 353         release_io_mem(hba[i]);
 354         free_hba(i);
 355 }
 356
 357 static void __devexit cpqarray_remove_one_pci (struct pci_dev *pdev)
 358 {
 359         int i;
 360         ctlr_info_t *tmp_ptr;
 361
 362         if (pci_get_drvdata(pdev) == NULL) {
 363                 printk( KERN_ERR "cpqarray: Unable to remove device \n");
 364                 return;
 365         }
 366
 367         tmp_ptr = pci_get_drvdata(pdev);
 368         i = tmp_ptr->ctlr;
 369         if (hba[i] == NULL) {
 370                 printk(KERN_ERR "cpqarray: controller %d appears to have"
 371                         "already been removed \n", i);
 372                 return;
 373         }
 374         pci_set_drvdata(pdev, NULL);
 375
 376         cpqarray_remove_one(i);
 377 }
 378
 379 /* removing an instance that was not removed automatically..
 380  * must be an eisa card.
 381  */
 382 static void __devexit cpqarray_remove_one_eisa (int i)
 383 {
 384         if (hba[i] == NULL) {
 385                 printk(KERN_ERR "cpqarray: controller %d appears to have"
 386                         "already been removed \n", i);
 387                 return;
 388         }
 389         cpqarray_remove_one(i);
 390 }
 391
 392 /* pdev is NULL for eisa */
 393 static int __init cpqarray_register_ctlr( int i, struct pci_dev *pdev)
 394 {
 395         request_queue_t *q;
 396         int j;
 397
 398         /*
 399          * register block devices
 400          * Find disks and fill in structs
 401          * Get an interrupt, set the Q depth and get into /proc
 402          */
 403
 404         /* If this successful it should insure that we are the only */
 405         /* instance of the driver */
 406         if (register_blkdev(COMPAQ_SMART2_MAJOR+i, hba[i]->devname)) {
 407                 goto Enomem4;
 408         }
 409         hba[i]->access.set_intr_mask(hba[i], 0);
 410         if (request_irq(hba[i]->intr, do_ida_intr,
 411                 IRQF_DISABLED|IRQF_SHARED, hba[i]->devname, hba[i]))
 412         {
 413                 printk(KERN_ERR "cpqarray: Unable to get irq %d for %s\n",
 414                                 hba[i]->intr, hba[i]->devname);
 415                 goto Enomem3;
 416         }
 417
 418         for (j=0; j<NWD; j++) {
 419                 ida_gendisk[i][j] = alloc_disk(1 << NWD_SHIFT);
 420                 if (!ida_gendisk[i][j])
 421                         goto Enomem2;
 422         }
 423
 424         hba[i]->cmd_pool = (cmdlist_t *)pci_alloc_consistent(
 425                 hba[i]->pci_dev, NR_CMDS * sizeof(cmdlist_t),
 426                 &(hba[i]->cmd_pool_dhandle));
 427         hba[i]->cmd_pool_bits = kmalloc(
 428                 ((NR_CMDS+BITS_PER_LONG-1)/BITS_PER_LONG)*sizeof(unsigned long),
 429                 GFP_KERNEL);
 430
 431         if (!hba[i]->cmd_pool_bits || !hba[i]->cmd_pool)
 432                         goto Enomem1;
 433
 434         memset(hba[i]->cmd_pool, 0, NR_CMDS * sizeof(cmdlist_t));
 435         memset(hba[i]->cmd_pool_bits, 0, ((NR_CMDS+BITS_PER_LONG-1)/BITS_PER_LONG)*sizeof(unsigned long));
 436         printk(KERN_INFO "cpqarray: Finding drives on %s",
 437                 hba[i]->devname);
 438
 439         spin_lock_init(&hba[i]->lock);
 440         q = blk_init_queue(do_ida_request, &hba[i]->lock);
 441         if (!q)
 442                 goto Enomem1;
 443
 444         hba[i]->queue = q;
 445         q->queuedata = hba[i];
 446
 447         getgeometry(i);
 448         start_fwbk(i);
 449
 450         ida_procinit(i);
 451
 452         if (pdev)
 453                 blk_queue_bounce_limit(q, hba[i]->pci_dev->dma_mask);
 454
 455         /* This is a hardware imposed limit. */
 456         blk_queue_max_hw_segments(q, SG_MAX);
 457
 458         /* This is a driver limit and could be eliminated. */
 459         blk_queue_max_phys_segments(q, SG_MAX);
 460
 461         init_timer(&hba[i]->timer);
 462         hba[i]->timer.expires = jiffies + IDA_TIMER;
 463         hba[i]->timer.data = (unsigned long)hba[i];
 464         hba[i]->timer.function = ida_timer;
 465         add_timer(&hba[i]->timer);
 466
 467         /* Enable IRQ now that spinlock and rate limit timer are set up */
 468         hba[i]->access.set_intr_mask(hba[i], FIFO_NOT_EMPTY);
 469
 470         for(j=0; j<NWD; j++) {
 471                 struct gendisk *disk = ida_gendisk[i][j];
 472                 drv_info_t *drv = &hba[i]->drv[j];
 473                 sprintf(disk->disk_name, "ida/c%dd%d", i, j);
 474                 disk->major = COMPAQ_SMART2_MAJOR + i;
 475                 disk->first_minor = j<<NWD_SHIFT;
 476                 disk->fops = &ida_fops;
 477                 if (j && !drv->nr_blks)
 478                         continue;
 479                 blk_queue_hardsect_size(hba[i]->queue, drv->blk_size);
 480                 set_capacity(disk, drv->nr_blks);
 481                 disk->queue = hba[i]->queue;
 482                 disk->private_data = drv;
 483                 add_disk(disk);
 484         }
 485
 486         /* done ! */
 487         return(i);
 488
 489 Enomem1:
 490         nr_ctlr = i;
 491         kfree(hba[i]->cmd_pool_bits);
 492         if (hba[i]->cmd_pool)
 493                 pci_free_consistent(hba[i]->pci_dev, NR_CMDS*sizeof(cmdlist_t),
 494                                     hba[i]->cmd_pool, hba[i]->cmd_pool_dhandle);
 495 Enomem2:
 496         while (j--) {
 497                 put_disk(ida_gendisk[i][j]);
 498                 ida_gendisk[i][j] = NULL;
 499         }
 500         free_irq(hba[i]->intr, hba[i]);
 501 Enomem3:
 502         unregister_blkdev(COMPAQ_SMART2_MAJOR+i, hba[i]->devname);
 503 Enomem4:
 504         if (pdev)
 505                 pci_set_drvdata(pdev, NULL);
 506         release_io_mem(hba[i]);
 507         free_hba(i);
 508
 509         printk( KERN_ERR "cpqarray: out of memory");
 510
 511         return -1;
 512 }
 513
 514 static int __init cpqarray_init_one( struct pci_dev *pdev,
 515         const struct pci_device_id *ent)
 516 {
 517         int i;
 518
 519         printk(KERN_DEBUG "cpqarray: Device 0x%x has been found at"
 520                         " bus %d dev %d func %d\n",
 521                         pdev->device, pdev->bus->number, PCI_SLOT(pdev->devfn),
 522                         PCI_FUNC(pdev->devfn));
 523         i = alloc_cpqarray_hba();
 524         if( i < 0 )
 525                 return (-1);
 526         memset(hba[i], 0, sizeof(ctlr_info_t));
 527         sprintf(hba[i]->devname, "ida%d", i);
 528         hba[i]->ctlr = i;
 529         /* Initialize the pdev driver private data */
 530         pci_set_drvdata(pdev, hba[i]);
 531
 532         if (cpqarray_pci_init(hba[i], pdev) != 0) {
 533                 pci_set_drvdata(pdev, NULL);
 534                 release_io_mem(hba[i]);
 535                 free_hba(i);
 536                 return -1;
 537         }
 538
 539         return (cpqarray_register_ctlr(i, pdev));
 540 }
 541
 542 static struct pci_driver cpqarray_pci_driver = {
 543         .name = "cpqarray",
 544         .probe = cpqarray_init_one,
 545         .remove = __devexit_p(cpqarray_remove_one_pci),
 546         .id_table = cpqarray_pci_device_id,
 547 };
 548
 549 /*
 550  *  This is it.  Find all the controllers and register them.
 551  *  returns the number of block devices registered.
 552  */
 553 static int __init cpqarray_init(void)
 554 {
 555         int num_cntlrs_reg = 0;
 556         int i;
 557         int rc = 0;
 558
 559         /* detect controllers */
 560         printk(DRIVER_NAME "\n");
 561
 562         rc = pci_register_driver(&cpqarray_pci_driver);
 563         if (rc)
 564                 return rc;
 565         cpqarray_eisa_detect();
 566
 567         for (i=0; i < MAX_CTLR; i++) {
 568                 if (hba[i] != NULL)
 569                         num_cntlrs_reg++;
 570         }
 571
 572         return(num_cntlrs_reg);
 573 }
 574
 575 /* Function to find the first free pointer into our hba[] array */
 576 /* Returns -1 if no free entries are left.  */
 577 static int alloc_cpqarray_hba(void)
 578 {
 579         int i;
 580
 581         for(i=0; i< MAX_CTLR; i++) {
 582                 if (hba[i] == NULL) {
 583                         hba[i] = kmalloc(sizeof(ctlr_info_t), GFP_KERNEL);
 584                         if(hba[i]==NULL) {
 585                                 printk(KERN_ERR "cpqarray: out of memory.\n");
 586                                 return (-1);
 587                         }
 588                         return (i);
 589                 }
 590         }
 591         printk(KERN_WARNING "cpqarray: This driver supports a maximum"
 592                 " of 8 controllers.\n");
 593         return(-1);
 594 }
 595
 596 static void free_hba(int i)
 597 {
 598         kfree(hba[i]);
 599         hba[i]=NULL;
 600 }
 601
 602 /*
 603  * Find the IO address of the controller, its IRQ and so forth.  Fill
 604  * in some basic stuff into the ctlr_info_t structure.
 605  */
 606 static int cpqarray_pci_init(ctlr_info_t *c, struct pci_dev *pdev)
 607 {
 608         ushort vendor_id, device_id, command;
 609         unchar cache_line_size, latency_timer;
 610         unchar irq, revision;
 611         unsigned long addr[6];
 612         __u32 board_id;
 613
 614         int i;
 615
 616         c->pci_dev = pdev;
 617         pci_set_master(pdev);
 618         if (pci_enable_device(pdev)) {
 619                 printk(KERN_ERR "cpqarray: Unable to Enable PCI device\n");
 620                 return -1;
 621         }
 622         vendor_id = pdev->vendor;
 623         device_id = pdev->device;
 624         irq = pdev->irq;
 625
 626         for(i=0; i<6; i++)
 627                 addr[i] = pci_resource_start(pdev, i);
 628
 629         if (pci_set_dma_mask(pdev, CPQARRAY_DMA_MASK) != 0)
 630         {
 631                 printk(KERN_ERR "cpqarray: Unable to set DMA mask\n");
 632                 return -1;
 633         }
 634
 635         pci_read_config_word(pdev, PCI_COMMAND, &command);
 636         pci_read_config_byte(pdev, PCI_CLASS_REVISION, &revision);
 637         pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &cache_line_size);
 638         pci_read_config_byte(pdev, PCI_LATENCY_TIMER, &latency_timer);
 639
 640         pci_read_config_dword(pdev, 0x2c, &board_id);
 641
 642         /* check to see if controller has been disabled */
 643         if(!(command & 0x02)) {
 644                 printk(KERN_WARNING
 645                         "cpqarray: controller appears to be disabled\n");
 646                 return(-1);
 647         }
 648
 649 DBGINFO(
 650         printk("vendor_id = %x\n", vendor_id);
 651         printk("device_id = %x\n", device_id);
 652         printk("command = %x\n", command);
 653         for(i=0; i<6; i++)
 654                 printk("addr[%d] = %lx\n", i, addr[i]);
 655         printk("revision = %x\n", revision);
 656         printk("irq = %x\n", irq);
 657         printk("cache_line_size = %x\n", cache_line_size);
 658         printk("latency_timer = %x\n", latency_timer);
 659         printk("board_id = %x\n", board_id);
 660 );
 661
 662         c->intr = irq;
 663
 664         for(i=0; i<6; i++) {
 665                 if (pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE_IO)
 666                 { /* IO space */
 667                         c->io_mem_addr = addr[i];
 668                         c->io_mem_length = pci_resource_end(pdev, i)
 669                                 - pci_resource_start(pdev, i) + 1;
 670                         if(!request_region( c->io_mem_addr, c->io_mem_length,
 671                                 "cpqarray"))
 672                         {
 673                                 printk( KERN_WARNING "cpqarray I/O memory range already in use addr %lx length = %ld\n", c->io_mem_addr, c->io_mem_length);
 674                                 c->io_mem_addr = 0;
 675                                 c->io_mem_length = 0;
 676                         }
 677                         break;
 678                 }
 679         }
 680
 681         c->paddr = 0;
 682         for(i=0; i<6; i++)
 683                 if (!(pci_resource_flags(pdev, i) &
 684                                 PCI_BASE_ADDRESS_SPACE_IO)) {
 685                         c->paddr = pci_resource_start (pdev, i);
 686                         break;
 687                 }
 688         if (!c->paddr)
 689                 return -1;
 690         c->vaddr = remap_pci_mem(c->paddr, 128);
 691         if (!c->vaddr)
 692                 return -1;
 693         c->board_id = board_id;
 694
 695         for(i=0; i<NR_PRODUCTS; i++) {
 696                 if (board_id == products[i].board_id) {
 697                         c->product_name = products[i].product_name;
 698                         c->access = *(products[i].access);
 699                         break;
 700                 }
 701         }
 702         if (i == NR_PRODUCTS) {
 703                 printk(KERN_WARNING "cpqarray: Sorry, I don't know how"
 704                         " to access the SMART Array controller %08lx\n",
 705                                 (unsigned long)board_id);
 706                 return -1;
 707         }
 708
 709         return 0;
 710 }
 711
 712 /*
 713  * Map (physical) PCI mem into (virtual) kernel space
 714  */
 715 static void __iomem *remap_pci_mem(ulong base, ulong size)
 716 {
 717         ulong page_base        = ((ulong) base) & PAGE_MASK;
 718         ulong page_offs        = ((ulong) base) - page_base;
 719         void __iomem *page_remapped    = ioremap(page_base, page_offs+size);
 720
 721         return (page_remapped ? (page_remapped + page_offs) : NULL);
 722 }
 723
 724 #ifndef MODULE
 725 /*
 726  * Config string is a comma separated set of i/o addresses of EISA cards.
 727  */
 728 static int cpqarray_setup(char *str)
 729 {
 730         int i, ints[9];
 731
 732         (void)get_options(str, ARRAY_SIZE(ints), ints);
 733
 734         for(i=0; i<ints[0] && i<8; i++)
 735                 eisa[i] = ints[i+1];
 736         return 1;
 737 }
 738
 739 __setup("smart2=", cpqarray_setup);
 740
 741 #endif
 742
 743 /*
 744  * Find an EISA controller's signature.  Set up an hba if we find it.
 745  */
 746 static int __init cpqarray_eisa_detect(void)
 747 {
 748         int i=0, j;
 749         __u32 board_id;
 750         int intr;
 751         int ctlr;
 752         int num_ctlr = 0;
 753
 754         while(i<8 && eisa[i]) {
 755                 ctlr = alloc_cpqarray_hba();
 756                 if(ctlr == -1)
 757                         break;
 758                 board_id = inl(eisa[i]+0xC80);
 759                 for(j=0; j < NR_PRODUCTS; j++)
 760                         if (board_id == products[j].board_id)
 761                                 break;
 762
 763                 if (j == NR_PRODUCTS) {
 764                         printk(KERN_WARNING "cpqarray: Sorry, I don't know how"
 765                                 " to access the SMART Array controller %08lx\n",                                 (unsigned long)board_id);
 766                         continue;
 767                 }
 768
 769                 memset(hba[ctlr], 0, sizeof(ctlr_info_t));
 770                 hba[ctlr]->io_mem_addr = eisa[i];
 771                 hba[ctlr]->io_mem_length = 0x7FF;
 772                 if(!request_region(hba[ctlr]->io_mem_addr,
 773                                 hba[ctlr]->io_mem_length,
 774                                 "cpqarray"))
 775                 {
 776                         printk(KERN_WARNING "cpqarray: I/O range already in "
 777                                         "use addr = %lx length = %ld\n",
 778                                         hba[ctlr]->io_mem_addr,
 779                                         hba[ctlr]->io_mem_length);
 780                         free_hba(ctlr);
 781                         continue;
 782                 }
 783
 784                 /*
 785                  * Read the config register to find our interrupt
 786                  */
 787                 intr = inb(eisa[i]+0xCC0) >> 4;
 788                 if (intr & 1) intr = 11;
 789                 else if (intr & 2) intr = 10;
 790                 else if (intr & 4) intr = 14;
 791                 else if (intr & 8) intr = 15;
 792
 793                 hba[ctlr]->intr = intr;
 794                 sprintf(hba[ctlr]->devname, "ida%d", nr_ctlr);
 795                 hba[ctlr]->product_name = products[j].product_name;
 796                 hba[ctlr]->access = *(products[j].access);
 797                 hba[ctlr]->ctlr = ctlr;
 798                 hba[ctlr]->board_id = board_id;
 799                 hba[ctlr]->pci_dev = NULL; /* not PCI */
 800
 801 DBGINFO(
 802         printk("i = %d, j = %d\n", i, j);
 803         printk("irq = %x\n", intr);
 804         printk("product name = %s\n", products[j].product_name);
 805         printk("board_id = %x\n", board_id);
 806 );
 807
 808                 num_ctlr++;
 809                 i++;
 810
 811                 if (cpqarray_register_ctlr(ctlr, NULL) == -1)
 812                         printk(KERN_WARNING
 813                                 "cpqarray: Can't register EISA controller %d\n",
 814                                 ctlr);
 815
 816         }
 817
 818         return num_ctlr;
 819 }
 820
 821 /*
 822  * Open.  Make sure the device is really there.
 823  */
 824 static int ida_open(struct inode *inode, struct file *filep)
 825 {
 826         drv_info_t *drv = get_drv(inode->i_bdev->bd_disk);
 827         ctlr_info_t *host = get_host(inode->i_bdev->bd_disk);
 828
 829         DBGINFO(printk("ida_open %s\n", inode->i_bdev->bd_disk->disk_name));
 830         /*
 831          * Root is allowed to open raw volume zero even if it's not configured
 832          * so array config can still work.  I don't think I really like this,
 833          * but I'm already using way to many device nodes to claim another one
 834          * for "raw controller".
 835          */
 836         if (!drv->nr_blks) {
 837                 if (!capable(CAP_SYS_RAWIO))
 838                         return -ENXIO;
 839                 if (!capable(CAP_SYS_ADMIN) && drv != host->drv)
 840                         return -ENXIO;
 841         }
 842         host->usage_count++;
 843         return 0;
 844 }
 845
 846 /*
 847  * Close.  Sync first.
 848  */
 849 static int ida_release(struct inode *inode, struct file *filep)
 850 {
 851         ctlr_info_t *host = get_host(inode->i_bdev->bd_disk);
 852         host->usage_count--;
 853         return 0;
 854 }
 855
 856 /*
 857  * Enqueuing and dequeuing functions for cmdlists.
 858  */
 859 static inline void addQ(cmdlist_t **Qptr, cmdlist_t *c)
 860 {
 861         if (*Qptr == NULL) {
 862                 *Qptr = c;
 863                 c->next = c->prev = c;
 864         } else {
 865                 c->prev = (*Qptr)->prev;
 866                 c->next = (*Qptr);
 867                 (*Qptr)->prev->next = c;
 868                 (*Qptr)->prev = c;
 869         }
 870 }
 871
 872 static inline cmdlist_t *removeQ(cmdlist_t **Qptr, cmdlist_t *c)
 873 {
 874         if (c && c->next != c) {
 875                 if (*Qptr == c) *Qptr = c->next;
 876                 c->prev->next = c->next;
 877                 c->next->prev = c->prev;
 878         } else {
 879                 *Qptr = NULL;
 880         }
 881         return c;
 882 }
 883
 884 /*
 885  * Get a request and submit it to the controller.
 886  * This routine needs to grab all the requests it possibly can from the
 887  * req Q and submit them.  Interrupts are off (and need to be off) when you
 888  * are in here (either via the dummy do_ida_request functions or by being
 889  * called from the interrupt handler
 890  */
 891 static void do_ida_request(request_queue_t *q)
 892 {
 893         ctlr_info_t *h = q->queuedata;
 894         cmdlist_t *c;
 895         struct request *creq;
 896         struct scatterlist tmp_sg[SG_MAX];
 897         int i, dir, seg;
 898
 899         if (blk_queue_plugged(q))
 900                 goto startio;
 901
 902 queue_next:
 903         creq = elv_next_request(q);
 904         if (!creq)
 905                 goto startio;
 906
 907         BUG_ON(creq->nr_phys_segments > SG_MAX);
 908
 909         if ((c = cmd_alloc(h,1)) == NULL)
 910                 goto startio;
 911
 912         blkdev_dequeue_request(creq);
 913
 914         c->ctlr = h->ctlr;
 915         c->hdr.unit = (drv_info_t *)(creq->rq_disk->private_data) - h->drv;
 916         c->hdr.size = sizeof(rblk_t) >> 2;
 917         c->size += sizeof(rblk_t);
 918
 919         c->req.hdr.blk = creq->sector;
 920         c->rq = creq;
 921 DBGPX(
 922         printk("sector=%d, nr_sectors=%d\n", creq->sector, creq->nr_sectors);
 923 );
 924         seg = blk_rq_map_sg(q, creq, tmp_sg);
 925
 926         /* Now do all the DMA Mappings */
 927         if (rq_data_dir(creq) == READ)
 928                 dir = PCI_DMA_FROMDEVICE;
 929         else
 930                 dir = PCI_DMA_TODEVICE;
 931         for( i=0; i < seg; i++)
 932         {
 933                 c->req.sg[i].size = tmp_sg[i].length;
 934                 c->req.sg[i].addr = (__u32) pci_map_page(h->pci_dev,
 935                                                  tmp_sg[i].page,
 936                                                  tmp_sg[i].offset,
 937                                                  tmp_sg[i].length, dir);
 938         }
 939 DBGPX(  printk("Submitting %d sectors in %d segments\n", creq->nr_sectors, seg); );
 940         c->req.hdr.sg_cnt = seg;
 941         c->req.hdr.blk_cnt = creq->nr_sectors;
 942         c->req.hdr.cmd = (rq_data_dir(creq) == READ) ? IDA_READ : IDA_WRITE;
 943         c->type = CMD_RWREQ;
 944
 945         /* Put the request on the tail of the request queue */
 946         addQ(&h->reqQ, c);
 947         h->Qdepth++;
 948         if (h->Qdepth > h->maxQsinceinit)
 949                 h->maxQsinceinit = h->Qdepth;
 950
 951         goto queue_next;
 952
 953 startio:
 954         start_io(h);
 955 }
 956
 957 /*
 958  * start_io submits everything on a controller's request queue
 959  * and moves it to the completion queue.
 960  *
 961  * Interrupts had better be off if you're in here
 962  */
 963 static void start_io(ctlr_info_t *h)
 964 {
 965         cmdlist_t *c;
 966
 967         while((c = h->reqQ) != NULL) {
 968                 /* Can't do anything if we're busy */
 969                 if (h->access.fifo_full(h) == 0)
 970                         return;
 971
 972                 /* Get the first entry from the request Q */
 973                 removeQ(&h->reqQ, c);
 974                 h->Qdepth--;
 975
 976                 /* Tell the controller to do our bidding */
 977                 h->access.submit_command(h, c);
 978
 979                 /* Get onto the completion Q */
 980                 addQ(&h->cmpQ, c);
 981         }
 982 }
 983
 984 static inline void complete_buffers(struct bio *bio, int ok)
 985 {
 986         struct bio *xbh;
 987         while(bio) {
 988                 int nr_sectors = bio_sectors(bio);
 989
 990                 xbh = bio->bi_next;
 991                 bio->bi_next = NULL;
 992
 993                 blk_finished_io(nr_sectors);
 994                 bio_endio(bio, nr_sectors << 9, ok ? 0 : -EIO);
 995
 996                 bio = xbh;
 997         }
 998 }
 999 /*
1000  * Mark all buffers that cmd was responsible for
1001  */
1002 static inline void complete_command(cmdlist_t *cmd, int timeout)
1003 {
1004         int ok=1;
1005         int i, ddir;
1006
1007         if (cmd->req.hdr.rcode & RCODE_NONFATAL &&
1008            (hba[cmd->ctlr]->misc_tflags & MISC_NONFATAL_WARN) == 0) {
1009                 printk(KERN_NOTICE "Non Fatal error on ida/c%dd%d\n",
1010                                 cmd->ctlr, cmd->hdr.unit);
1011                 hba[cmd->ctlr]->misc_tflags |= MISC_NONFATAL_WARN;
1012         }
1013         if (cmd->req.hdr.rcode & RCODE_FATAL) {
1014                 printk(KERN_WARNING "Fatal error on ida/c%dd%d\n",
1015                                 cmd->ctlr, cmd->hdr.unit);
1016                 ok = 0;
1017         }
1018         if (cmd->req.hdr.rcode & RCODE_INVREQ) {
1019                                 printk(KERN_WARNING "Invalid request on ida/c%dd%d = (cmd=%x sect=%d cnt=%d sg=%d ret=%x)\n",
1020                                 cmd->ctlr, cmd->hdr.unit, cmd->req.hdr.cmd,
1021                                 cmd->req.hdr.blk, cmd->req.hdr.blk_cnt,
1022                                 cmd->req.hdr.sg_cnt, cmd->req.hdr.rcode);
1023                 ok = 0;
1024         }
1025         if (timeout) ok = 0;
1026         /* unmap the DMA mapping for all the scatter gather elements */
1027         if (cmd->req.hdr.cmd == IDA_READ)
1028                 ddir = PCI_DMA_FROMDEVICE;
1029         else
1030                 ddir = PCI_DMA_TODEVICE;
1031         for(i=0; i<cmd->req.hdr.sg_cnt; i++)
1032                 pci_unmap_page(hba[cmd->ctlr]->pci_dev, cmd->req.sg[i].addr,
1033                                 cmd->req.sg[i].size, ddir);
1034
1035         complete_buffers(cmd->rq->bio, ok);
1036
1037         add_disk_randomness(cmd->rq->rq_disk);
1038
1039         DBGPX(printk("Done with %p\n", cmd->rq););
1040         end_that_request_last(cmd->rq, ok ? 1 : -EIO);
1041 }
1042
1043 /*
1044  *  The controller will interrupt us upon completion of commands.
1045  *  Find the command on the completion queue, remove it, tell the OS and
1046  *  try to queue up more IO
1047  */
1048 static irqreturn_t do_ida_intr(int irq, void *dev_id, struct pt_regs *regs)
1049 {
1050         ctlr_info_t *h = dev_id;
1051         cmdlist_t *c;
1052         unsigned long istat;
1053         unsigned long flags;
1054         __u32 a,a1;
1055
1056         istat = h->access.intr_pending(h);
1057         /* Is this interrupt for us? */
1058         if (istat == 0)
1059                 return IRQ_NONE;
1060
1061         /*
1062          * If there are completed commands in the completion queue,
1063          * we had better do something about it.
1064          */
1065         spin_lock_irqsave(IDA_LOCK(h->ctlr), flags);
1066         if (istat & FIFO_NOT_EMPTY) {
1067                 while((a = h->access.command_completed(h))) {
1068                         a1 = a; a &= ~3;
1069                         if ((c = h->cmpQ) == NULL)
1070                         {
1071                                 printk(KERN_WARNING "cpqarray: Completion of %08lx ignored\n", (unsigned long)a1);
1072                                 continue;
1073                         }
1074                         while(c->busaddr != a) {
1075                                 c = c->next;
1076                                 if (c == h->cmpQ)
1077                                         break;
1078                         }
1079                         /*
1080                          * If we've found the command, take it off the
1081                          * completion Q and free it
1082                          */
1083                         if (c->busaddr == a) {
1084                                 removeQ(&h->cmpQ, c);
1085                                 /*  Check for invalid command.
1086                                  *  Controller returns command error,
1087                                  *  But rcode = 0.
1088                                  */
1089
1090                                 if((a1 & 0x03) && (c->req.hdr.rcode == 0))
1091                                 {
1092                                         c->req.hdr.rcode = RCODE_INVREQ;
1093                                 }
1094                                 if (c->type == CMD_RWREQ) {
1095                                         complete_command(c, 0);
1096                                         cmd_free(h, c, 1);
1097                                 } else if (c->type == CMD_IOCTL_PEND) {
1098                                         c->type = CMD_IOCTL_DONE;
1099                                 }
1100                                 continue;
1101                         }
1102                 }
1103         }
1104
1105         /*
1106          * See if we can queue up some more IO
1107          */
1108         do_ida_request(h->queue);
1109         spin_unlock_irqrestore(IDA_LOCK(h->ctlr), flags);
1110         return IRQ_HANDLED;
1111 }
1112
1113 /*
1114  * This timer was for timing out requests that haven't happened after
1115  * IDA_TIMEOUT.  That wasn't such a good idea.  This timer is used to
1116  * reset a flags structure so we don't flood the user with
1117  * "Non-Fatal error" messages.
1118  */
1119 static void ida_timer(unsigned long tdata)
1120 {
1121         ctlr_info_t *h = (ctlr_info_t*)tdata;
1122
1123         h->timer.expires = jiffies + IDA_TIMER;
1124         add_timer(&h->timer);
1125         h->misc_tflags = 0;
1126 }
1127
1128 static int ida_getgeo(struct block_device *bdev, struct hd_geometry *geo)
1129 {
1130         drv_info_t *drv = get_drv(bdev->bd_disk);
1131
1132         if (drv->cylinders) {
1133                 geo->heads = drv->heads;
1134                 geo->sectors = drv->sectors;
1135                 geo->cylinders = drv->cylinders;
1136         } else {
1137                 geo->heads = 0xff;
1138                 geo->sectors = 0x3f;
1139                 geo->cylinders = drv->nr_blks / (0xff*0x3f);
1140         }
1141
1142         return 0;
1143 }
1144
1145 /*
1146  *  ida_ioctl does some miscellaneous stuff like reporting drive geometry,
1147  *  setting readahead and submitting commands from userspace to the controller.
1148  */
1149 static int ida_ioctl(struct inode *inode, struct file *filep, unsigned int cmd, unsigned long arg)
1150 {
1151         drv_info_t *drv = get_drv(inode->i_bdev->bd_disk);
1152         ctlr_info_t *host = get_host(inode->i_bdev->bd_disk);
1153         int error;
1154         ida_ioctl_t __user *io = (ida_ioctl_t __user *)arg;
1155         ida_ioctl_t *my_io;
1156
1157         switch(cmd) {
1158         case IDAGETDRVINFO:
1159                 if (copy_to_user(&io->c.drv, drv, sizeof(drv_info_t)))
1160                         return -EFAULT;
1161                 return 0;
1162         case IDAPASSTHRU:
1163                 if (!capable(CAP_SYS_RAWIO))
1164                         return -EPERM;
1165                 my_io = kmalloc(sizeof(ida_ioctl_t), GFP_KERNEL);
1166                 if (!my_io)
1167                         return -ENOMEM;
1168                 error = -EFAULT;
1169                 if (copy_from_user(my_io, io, sizeof(*my_io)))
1170                         goto out_passthru;
1171                 error = ida_ctlr_ioctl(host, drv - host->drv, my_io);
1172                 if (error)
1173                         goto out_passthru;
1174                 error = -EFAULT;
1175                 if (copy_to_user(io, my_io, sizeof(*my_io)))
1176                         goto out_passthru;
1177                 error = 0;
1178 out_passthru:
1179                 kfree(my_io);
1180                 return error;
1181         case IDAGETCTLRSIG:
1182                 if (!arg) return -EINVAL;
1183                 put_user(host->ctlr_sig, (int __user *)arg);
1184                 return 0;
1185         case IDAREVALIDATEVOLS:
1186                 if (iminor(inode) != 0)
1187                         return -ENXIO;
1188                 return revalidate_allvol(host);
1189         case IDADRIVERVERSION:
1190                 if (!arg) return -EINVAL;
1191                 put_user(DRIVER_VERSION, (unsigned long __user *)arg);
1192                 return 0;
1193         case IDAGETPCIINFO:
1194         {
1195
1196                 ida_pci_info_struct pciinfo;
1197
1198                 if (!arg) return -EINVAL;
1199                 pciinfo.bus = host->pci_dev->bus->number;
1200                 pciinfo.dev_fn = host->pci_dev->devfn;
1201                 pciinfo.board_id = host->board_id;
1202                 if(copy_to_user((void __user *) arg, &pciinfo,
1203                         sizeof( ida_pci_info_struct)))
1204                                 return -EFAULT;
1205                 return(0);
1206         }
1207
1208         default:
1209                 return -EINVAL;
1210         }
1211
1212 }
1213 /*
1214  * ida_ctlr_ioctl is for passing commands to the controller from userspace.
1215  * The command block (io) has already been copied to kernel space for us,
1216  * however, any elements in the sglist need to be copied to kernel space
1217  * or copied back to userspace.
1218  *
1219  * Only root may perform a controller passthru command, however I'm not doing
1220  * any serious sanity checking on the arguments.  Doing an IDA_WRITE_MEDIA and
1221  * putting a 64M buffer in the sglist is probably a *bad* idea.
1222  */
1223 static int ida_ctlr_ioctl(ctlr_info_t *h, int dsk, ida_ioctl_t *io)
1224 {
1225         int ctlr = h->ctlr;
1226         cmdlist_t *c;
1227         void *p = NULL;
1228         unsigned long flags;
1229         int error;
1230
1231         if ((c = cmd_alloc(h, 0)) == NULL)
1232                 return -ENOMEM;
1233         c->ctlr = ctlr;
1234         c->hdr.unit = (io->unit & UNITVALID) ? (io->unit & ~UNITVALID) : dsk;
1235         c->hdr.size = sizeof(rblk_t) >> 2;
1236         c->size += sizeof(rblk_t);
1237
1238         c->req.hdr.cmd = io->cmd;
1239         c->req.hdr.blk = io->blk;
1240         c->req.hdr.blk_cnt = io->blk_cnt;
1241         c->type = CMD_IOCTL_PEND;
1242
1243         /* Pre submit processing */
1244         switch(io->cmd) {
1245         case PASSTHRU_A:
1246                 p = kmalloc(io->sg[0].size, GFP_KERNEL);
1247                 if (!p)
1248                 {
1249                         error = -ENOMEM;
1250                         cmd_free(h, c, 0);
1251                         return(error);
1252                 }
1253                 if (copy_from_user(p, io->sg[0].addr, io->sg[0].size)) {
1254                         kfree(p);
1255                         cmd_free(h, c, 0);
1256                         return -EFAULT;
1257                 }
1258                 c->req.hdr.blk = pci_map_single(h->pci_dev, &(io->c),
1259                                 sizeof(ida_ioctl_t),
1260                                 PCI_DMA_BIDIRECTIONAL);
1261                 c->req.sg[0].size = io->sg[0].size;
1262                 c->req.sg[0].addr = pci_map_single(h->pci_dev, p,
1263                         c->req.sg[0].size, PCI_DMA_BIDIRECTIONAL);
1264                 c->req.hdr.sg_cnt = 1;
1265                 break;
1266         case IDA_READ:
1267         case READ_FLASH_ROM:
1268         case SENSE_CONTROLLER_PERFORMANCE:
1269                 p = kmalloc(io->sg[0].size, GFP_KERNEL);
1270                 if (!p)
1271                 {
1272                         error = -ENOMEM;
1273                         cmd_free(h, c, 0);
1274                         return(error);
1275                 }
1276
1277                 c->req.sg[0].size = io->sg[0].size;
1278                 c->req.sg[0].addr = pci_map_single(h->pci_dev, p,
1279                         c->req.sg[0].size, PCI_DMA_BIDIRECTIONAL);
1280                 c->req.hdr.sg_cnt = 1;
1281                 break;
1282         case IDA_WRITE:
1283         case IDA_WRITE_MEDIA:
1284         case DIAG_PASS_THRU:
1285         case COLLECT_BUFFER:
1286         case WRITE_FLASH_ROM:
1287                 p = kmalloc(io->sg[0].size, GFP_KERNEL);
1288                 if (!p)
1289                 {
1290                         error = -ENOMEM;
1291                         cmd_free(h, c, 0);
1292                         return(error);
1293                 }
1294                 if (copy_from_user(p, io->sg[0].addr, io->sg[0].size)) {
1295                         kfree(p);
1296                         cmd_free(h, c, 0);
1297                         return -EFAULT;
1298                 }
1299                 c->req.sg[0].size = io->sg[0].size;
1300                 c->req.sg[0].addr = pci_map_single(h->pci_dev, p,
1301                         c->req.sg[0].size, PCI_DMA_BIDIRECTIONAL);
1302                 c->req.hdr.sg_cnt = 1;
1303                 break;
1304         default:
1305                 c->req.sg[0].size = sizeof(io->c);
1306                 c->req.sg[0].addr = pci_map_single(h->pci_dev,&io->c,
1307                         c->req.sg[0].size, PCI_DMA_BIDIRECTIONAL);
1308                 c->req.hdr.sg_cnt = 1;
1309         }
1310
1311         /* Put the request on the tail of the request queue */
1312         spin_lock_irqsave(IDA_LOCK(ctlr), flags);
1313         addQ(&h->reqQ, c);
1314         h->Qdepth++;
1315         start_io(h);
1316         spin_unlock_irqrestore(IDA_LOCK(ctlr), flags);
1317
1318         /* Wait for completion */
1319         while(c->type != CMD_IOCTL_DONE)
1320                 schedule();
1321
1322         /* Unmap the DMA  */
1323         pci_unmap_single(h->pci_dev, c->req.sg[0].addr, c->req.sg[0].size,
1324                 PCI_DMA_BIDIRECTIONAL);
1325         /* Post submit processing */
1326         switch(io->cmd) {
1327         case PASSTHRU_A:
1328                 pci_unmap_single(h->pci_dev, c->req.hdr.blk,
1329                                 sizeof(ida_ioctl_t),
1330                                 PCI_DMA_BIDIRECTIONAL);
1331         case IDA_READ:
1332         case DIAG_PASS_THRU:
1333         case SENSE_CONTROLLER_PERFORMANCE:
1334         case READ_FLASH_ROM:
1335                 if (copy_to_user(io->sg[0].addr, p, io->sg[0].size)) {
1336                         kfree(p);
1337                         return -EFAULT;
1338                 }
1339                 /* fall through and free p */
1340         case IDA_WRITE:
1341         case IDA_WRITE_MEDIA:
1342         case COLLECT_BUFFER:
1343         case WRITE_FLASH_ROM:
1344                 kfree(p);
1345                 break;
1346         default:;
1347                 /* Nothing to do */
1348         }
1349
1350         io->rcode = c->req.hdr.rcode;
1351         cmd_free(h, c, 0);
1352         return(0);
1353 }
1354
1355 /*
1356  * Commands are pre-allocated in a large block.  Here we use a simple bitmap
1357  * scheme to suballocte them to the driver.  Operations that are not time
1358  * critical (and can wait for kmalloc and possibly sleep) can pass in NULL
1359  * as the first argument to get a new command.
1360  */
1361 static cmdlist_t * cmd_alloc(ctlr_info_t *h, int get_from_pool)
1362 {
1363         cmdlist_t * c;
1364         int i;
1365         dma_addr_t cmd_dhandle;
1366
1367         if (!get_from_pool) {
1368                 c = (cmdlist_t*)pci_alloc_consistent(h->pci_dev,
1369                         sizeof(cmdlist_t), &cmd_dhandle);
1370                 if(c==NULL)
1371                         return NULL;
1372         } else {
1373                 do {
1374                         i = find_first_zero_bit(h->cmd_pool_bits, NR_CMDS);
1375                         if (i == NR_CMDS)
1376                                 return NULL;
1377                 } while(test_and_set_bit(i&(BITS_PER_LONG-1), h->cmd_pool_bits+(i/BITS_PER_LONG)) != 0);
1378                 c = h->cmd_pool + i;
1379                 cmd_dhandle = h->cmd_pool_dhandle + i*sizeof(cmdlist_t);
1380                 h->nr_allocs++;
1381         }
1382
1383         memset(c, 0, sizeof(cmdlist_t));
1384         c->busaddr = cmd_dhandle;
1385         return c;
1386 }
1387
1388 static void cmd_free(ctlr_info_t *h, cmdlist_t *c, int got_from_pool)
1389 {
1390         int i;
1391
1392         if (!got_from_pool) {
1393                 pci_free_consistent(h->pci_dev, sizeof(cmdlist_t), c,
1394                         c->busaddr);
1395         } else {
1396                 i = c - h->cmd_pool;
1397                 clear_bit(i&(BITS_PER_LONG-1), h->cmd_pool_bits+(i/BITS_PER_LONG));
1398                 h->nr_frees++;
1399         }
1400 }
1401
1402 /***********************************************************************
1403     name:        sendcmd
1404     Send a command to an IDA using the memory mapped FIFO interface
1405     and wait for it to complete.
1406     This routine should only be called at init time.
1407 ***********************************************************************/
1408 static int sendcmd(
1409         __u8    cmd,
1410         int     ctlr,
1411         void    *buff,
1412         size_t  size,
1413         unsigned int blk,
1414         unsigned int blkcnt,
1415         unsigned int log_unit )
1416 {
1417         cmdlist_t *c;
1418         int complete;
1419         unsigned long temp;
1420         unsigned long i;
1421         ctlr_info_t *info_p = hba[ctlr];
1422
1423         c = cmd_alloc(info_p, 1);
1424         if(!c)
1425                 return IO_ERROR;
1426         c->ctlr = ctlr;
1427         c->hdr.unit = log_unit;
1428         c->hdr.prio = 0;
1429         c->hdr.size = sizeof(rblk_t) >> 2;
1430         c->size += sizeof(rblk_t);
1431
1432         /* The request information. */
1433         c->req.hdr.next = 0;
1434         c->req.hdr.rcode = 0;
1435         c->req.bp = 0;
1436         c->req.hdr.sg_cnt = 1;
1437         c->req.hdr.reserved = 0;
1438
1439         if (size == 0)
1440                 c->req.sg[0].size = 512;
1441         else
1442                 c->req.sg[0].size = size;
1443
1444         c->req.hdr.blk = blk;
1445         c->req.hdr.blk_cnt = blkcnt;
1446         c->req.hdr.cmd = (unsigned char) cmd;
1447         c->req.sg[0].addr = (__u32) pci_map_single(info_p->pci_dev,
1448                 buff, c->req.sg[0].size, PCI_DMA_BIDIRECTIONAL);
1449         /*
1450          * Disable interrupt
1451          */
1452         info_p->access.set_intr_mask(info_p, 0);
1453         /* Make sure there is room in the command FIFO */
1454         /* Actually it should be completely empty at this time. */
1455         for (i = 200000; i > 0; i--) {
1456                 temp = info_p->access.fifo_full(info_p);
1457                 if (temp != 0) {
1458                         break;
1459                 }
1460                 udelay(10);
1461 DBG(
1462                 printk(KERN_WARNING "cpqarray ida%d: idaSendPciCmd FIFO full,"
1463                         " waiting!\n", ctlr);
1464 );
1465         }
1466         /*
1467          * Send the cmd
1468          */
1469         info_p->access.submit_command(info_p, c);
1470         complete = pollcomplete(ctlr);
1471
1472         pci_unmap_single(info_p->pci_dev, (dma_addr_t) c->req.sg[0].addr,
1473                 c->req.sg[0].size, PCI_DMA_BIDIRECTIONAL);
1474         if (complete != 1) {
1475                 if (complete != c->busaddr) {
1476                         printk( KERN_WARNING
1477                         "cpqarray ida%d: idaSendPciCmd "
1478                       "Invalid command list address returned! (%08lx)\n",
1479                                 ctlr, (unsigned long)complete);
1480                         cmd_free(info_p, c, 1);
1481                         return (IO_ERROR);
1482                 }
1483         } else {
1484                 printk( KERN_WARNING
1485                         "cpqarray ida%d: idaSendPciCmd Timeout out, "
1486                         "No command list address returned!\n",
1487                         ctlr);
1488                 cmd_free(info_p, c, 1);
1489                 return (IO_ERROR);
1490         }
1491
1492         if (c->req.hdr.rcode & 0x00FE) {
1493                 if (!(c->req.hdr.rcode & BIG_PROBLEM)) {
1494                         printk( KERN_WARNING
1495                         "cpqarray ida%d: idaSendPciCmd, error: "
1496                                 "Controller failed at init time "
1497                                 "cmd: 0x%x, return code = 0x%x\n",
1498                                 ctlr, c->req.hdr.cmd, c->req.hdr.rcode);
1499
1500                         cmd_free(info_p, c, 1);
1501                         return (IO_ERROR);
1502                 }
1503         }
1504         cmd_free(info_p, c, 1);
1505         return (IO_OK);
1506 }
1507
1508 /*
1509  * revalidate_allvol is for online array config utilities.  After a
1510  * utility reconfigures the drives in the array, it can use this function
1511  * (through an ioctl) to make the driver zap any previous disk structs for
1512  * that controller and get new ones.
1513  *
1514  * Right now I'm using the getgeometry() function to do this, but this
1515  * function should probably be finer grained and allow you to revalidate one
1516  * particualar logical volume (instead of all of them on a particular
1517  * controller).
1518  */
1519 static int revalidate_allvol(ctlr_info_t *host)
1520 {
1521         int ctlr = host->ctlr;
1522         int i;
1523         unsigned long flags;
1524
1525         spin_lock_irqsave(IDA_LOCK(ctlr), flags);
1526         if (host->usage_count > 1) {
1527                 spin_unlock_irqrestore(IDA_LOCK(ctlr), flags);
1528                 printk(KERN_WARNING "cpqarray: Device busy for volume"
1529                         " revalidation (usage=%d)\n", host->usage_count);
1530                 return -EBUSY;
1531         }
1532         host->usage_count++;
1533         spin_unlock_irqrestore(IDA_LOCK(ctlr), flags);
1534
1535         /*
1536          * Set the partition and block size structures for all volumes
1537          * on this controller to zero.  We will reread all of this data
1538          */
1539         set_capacity(ida_gendisk[ctlr][0], 0);
1540         for (i = 1; i < NWD; i++) {
1541                 struct gendisk *disk = ida_gendisk[ctlr][i];
1542                 if (disk->flags & GENHD_FL_UP)
1543                         del_gendisk(disk);
1544         }
1545         memset(host->drv, 0, sizeof(drv_info_t)*NWD);
1546
1547         /*
1548          * Tell the array controller not to give us any interrupts while
1549          * we check the new geometry.  Then turn interrupts back on when
1550          * we're done.
1551          */
1552         host->access.set_intr_mask(host, 0);
1553         getgeometry(ctlr);
1554         host->access.set_intr_mask(host, FIFO_NOT_EMPTY);
1555
1556         for(i=0; i<NWD; i++) {
1557                 struct gendisk *disk = ida_gendisk[ctlr][i];
1558                 drv_info_t *drv = &host->drv[i];
1559                 if (i && !drv->nr_blks)
1560                         continue;
1561                 blk_queue_hardsect_size(host->queue, drv->blk_size);
1562                 set_capacity(disk, drv->nr_blks);
1563                 disk->queue = host->queue;
1564                 disk->private_data = drv;
1565                 if (i)
1566                         add_disk(disk);
1567         }
1568
1569         host->usage_count--;
1570         return 0;
1571 }
1572
1573 static int ida_revalidate(struct gendisk *disk)
1574 {
1575         drv_info_t *drv = disk->private_data;
1576         set_capacity(disk, drv->nr_blks);
1577         return 0;
1578 }
1579
1580 /********************************************************************
1581     name: pollcomplete
1582     Wait polling for a command to complete.
1583     The memory mapped FIFO is polled for the completion.
1584     Used only at init time, interrupts disabled.
1585  ********************************************************************/
1586 static int pollcomplete(int ctlr)
1587 {
1588         int done;
1589         int i;
1590
1591         /* Wait (up to 2 seconds) for a command to complete */
1592
1593         for (i = 200000; i > 0; i--) {
1594                 done = hba[ctlr]->access.command_completed(hba[ctlr]);
1595                 if (done == 0) {
1596                         udelay(10);     /* a short fixed delay */
1597                 } else
1598                         return (done);
1599         }
1600         /* Invalid address to tell caller we ran out of time */
1601         return 1;
1602 }
1603 /*****************************************************************
1604     start_fwbk
1605     Starts controller firmwares background processing.
1606     Currently only the Integrated Raid controller needs this done.
1607     If the PCI mem address registers are written to after this,
1608          data corruption may occur
1609 *****************************************************************/
1610 static void start_fwbk(int ctlr)
1611 {
1612                 id_ctlr_t *id_ctlr_buf;
1613         int ret_code;
1614
1615         if(     (hba[ctlr]->board_id != 0x40400E11)
1616                 && (hba[ctlr]->board_id != 0x40480E11) )
1617
1618         /* Not a Integrated Raid, so there is nothing for us to do */
1619                 return;
1620         printk(KERN_DEBUG "cpqarray: Starting firmware's background"
1621                 " processing\n");
1622         /* Command does not return anything, but idasend command needs a
1623                 buffer */
1624         id_ctlr_buf = (id_ctlr_t *)kmalloc(sizeof(id_ctlr_t), GFP_KERNEL);
1625         if(id_ctlr_buf==NULL)
1626         {
1627                 printk(KERN_WARNING "cpqarray: Out of memory. "
1628                         "Unable to start background processing.\n");
1629                 return;
1630         }
1631         ret_code = sendcmd(RESUME_BACKGROUND_ACTIVITY, ctlr,
1632                 id_ctlr_buf, 0, 0, 0, 0);
1633         if(ret_code != IO_OK)
1634                 printk(KERN_WARNING "cpqarray: Unable to start"
1635                         " background processing\n");
1636
1637         kfree(id_ctlr_buf);
1638 }
1639 /*****************************************************************
1640     getgeometry
1641     Get ida logical volume geometry from the controller
1642     This is a large bit of code which once existed in two flavors,
1643     It is used only at init time.
1644 *****************************************************************/
1645 static void getgeometry(int ctlr)
1646 {
1647         id_log_drv_t *id_ldrive;
1648         id_ctlr_t *id_ctlr_buf;
1649         sense_log_drv_stat_t *id_lstatus_buf;
1650         config_t *sense_config_buf;
1651         unsigned int log_unit, log_index;
1652         int ret_code, size;
1653         drv_info_t *drv;
1654         ctlr_info_t *info_p = hba[ctlr];
1655         int i;
1656
1657         info_p->log_drv_map = 0;
1658
1659         id_ldrive = (id_log_drv_t *)kmalloc(sizeof(id_log_drv_t), GFP_KERNEL);
1660         if(id_ldrive == NULL)
1661         {
1662                 printk( KERN_ERR "cpqarray:  out of memory.\n");
1663                 return;
1664         }
1665
1666         id_ctlr_buf = (id_ctlr_t *)kmalloc(sizeof(id_ctlr_t), GFP_KERNEL);
1667         if(id_ctlr_buf == NULL)
1668         {
1669                 kfree(id_ldrive);
1670                 printk( KERN_ERR "cpqarray:  out of memory.\n");
1671                 return;
1672         }
1673
1674         id_lstatus_buf = (sense_log_drv_stat_t *)kmalloc(sizeof(sense_log_drv_stat_t), GFP_KERNEL);
1675         if(id_lstatus_buf == NULL)
1676         {
1677                 kfree(id_ctlr_buf);
1678                 kfree(id_ldrive);
1679                 printk( KERN_ERR "cpqarray:  out of memory.\n");
1680                 return;
1681         }
1682
1683         sense_config_buf = (config_t *)kmalloc(sizeof(config_t), GFP_KERNEL);
1684         if(sense_config_buf == NULL)
1685         {
1686                 kfree(id_lstatus_buf);
1687                 kfree(id_ctlr_buf);
1688                 kfree(id_ldrive);
1689                 printk( KERN_ERR "cpqarray:  out of memory.\n");
1690                 return;
1691         }
1692
1693         memset(id_ldrive, 0, sizeof(id_log_drv_t));
1694         memset(id_ctlr_buf, 0, sizeof(id_ctlr_t));
1695         memset(id_lstatus_buf, 0, sizeof(sense_log_drv_stat_t));
1696         memset(sense_config_buf, 0, sizeof(config_t));
1697
1698         info_p->phys_drives = 0;
1699         info_p->log_drv_map = 0;
1700         info_p->drv_assign_map = 0;
1701         info_p->drv_spare_map = 0;
1702         info_p->mp_failed_drv_map = 0;  /* only initialized here */
1703         /* Get controllers info for this logical drive */
1704         ret_code = sendcmd(ID_CTLR, ctlr, id_ctlr_buf, 0, 0, 0, 0);
1705         if (ret_code == IO_ERROR) {
1706                 /*
1707                  * If can't get controller info, set the logical drive map to 0,
1708                  * so the idastubopen will fail on all logical drives
1709                  * on the controller.
1710                  */
1711                  /* Free all the buffers and return */
1712                 printk(KERN_ERR "cpqarray: error sending ID controller\n");
1713                 kfree(sense_config_buf);
1714                 kfree(id_lstatus_buf);
1715                 kfree(id_ctlr_buf);
1716                 kfree(id_ldrive);
1717                 return;
1718         }
1719
1720         info_p->log_drives = id_ctlr_buf->nr_drvs;
1721         for(i=0;i<4;i++)
1722                 info_p->firm_rev[i] = id_ctlr_buf->firm_rev[i];
1723         info_p->ctlr_sig = id_ctlr_buf->cfg_sig;
1724
1725         printk(" (%s)\n", info_p->product_name);
1726         /*
1727          * Initialize logical drive map to zero
1728          */
1729         log_index = 0;
1730         /*
1731          * Get drive geometry for all logical drives
1732          */
1733         if (id_ctlr_buf->nr_drvs > 16)
1734                 printk(KERN_WARNING "cpqarray ida%d:  This driver supports "
1735                         "16 logical drives per controller.\n.  "
1736                         " Additional drives will not be "
1737                         "detected\n", ctlr);
1738
1739         for (log_unit = 0;
1740              (log_index < id_ctlr_buf->nr_drvs)
1741              && (log_unit < NWD);
1742              log_unit++) {
1743                 size = sizeof(sense_log_drv_stat_t);
1744
1745                 /*
1746                    Send "Identify logical drive status" cmd
1747                  */
1748                 ret_code = sendcmd(SENSE_LOG_DRV_STAT,
1749                              ctlr, id_lstatus_buf, size, 0, 0, log_unit);
1750                 if (ret_code == IO_ERROR) {
1751                         /*
1752                            If can't get logical drive status, set
1753                            the logical drive map to 0, so the
1754                            idastubopen will fail for all logical drives
1755                            on the controller.
1756                          */
1757                         info_p->log_drv_map = 0;
1758                         printk( KERN_WARNING
1759                              "cpqarray ida%d: idaGetGeometry - Controller"
1760                                 " failed to report status of logical drive %d\n"
1761                          "Access to this controller has been disabled\n",
1762                                 ctlr, log_unit);
1763                         /* Free all the buffers and return */
1764                         kfree(sense_config_buf);
1765                         kfree(id_lstatus_buf);
1766                         kfree(id_ctlr_buf);
1767                         kfree(id_ldrive);
1768                         return;
1769                 }
1770                 /*
1771                    Make sure the logical drive is configured
1772                  */
1773                 if (id_lstatus_buf->status != LOG_NOT_CONF) {
1774                         ret_code = sendcmd(ID_LOG_DRV, ctlr, id_ldrive,
1775                                sizeof(id_log_drv_t), 0, 0, log_unit);
1776                         /*
1777                            If error, the bit for this
1778                            logical drive won't be set and
1779                            idastubopen will return error.
1780                          */
1781                         if (ret_code != IO_ERROR) {
1782                                 drv = &info_p->drv[log_unit];
1783                                 drv->blk_size = id_ldrive->blk_size;
1784                                 drv->nr_blks = id_ldrive->nr_blks;
1785                                 drv->cylinders = id_ldrive->drv.cyl;
1786                                 drv->heads = id_ldrive->drv.heads;
1787                                 drv->sectors = id_ldrive->drv.sect_per_track;
1788                                 info_p->log_drv_map |=  (1 << log_unit);
1789
1790         printk(KERN_INFO "cpqarray ida/c%dd%d: blksz=%d nr_blks=%d\n",
1791                 ctlr, log_unit, drv->blk_size, drv->nr_blks);
1792                                 ret_code = sendcmd(SENSE_CONFIG,
1793                                                   ctlr, sense_config_buf,
1794                                  sizeof(config_t), 0, 0, log_unit);
1795                                 if (ret_code == IO_ERROR) {
1796                                         info_p->log_drv_map = 0;
1797                                         /* Free all the buffers and return */
1798                                         printk(KERN_ERR "cpqarray: error sending sense config\n");
1799                                         kfree(sense_config_buf);
1800                                         kfree(id_lstatus_buf);
1801                                         kfree(id_ctlr_buf);
1802                                         kfree(id_ldrive);
1803                                         return;
1804
1805                                 }
1806
1807                                 info_p->phys_drives =
1808                                     sense_config_buf->ctlr_phys_drv;
1809                                 info_p->drv_assign_map
1810                                     |= sense_config_buf->drv_asgn_map;
1811                                 info_p->drv_assign_map
1812                                     |= sense_config_buf->spare_asgn_map;
1813                                 info_p->drv_spare_map
1814                                     |= sense_config_buf->spare_asgn_map;
1815                         }       /* end of if no error on id_ldrive */
1816                         log_index = log_index + 1;
1817                 }               /* end of if logical drive configured */
1818         }                       /* end of for log_unit */
1819         kfree(sense_config_buf);
1820         kfree(id_ldrive);
1821         kfree(id_lstatus_buf);
1822         kfree(id_ctlr_buf);
1823         return;
1824
1825 }
1826
1827 static void __exit cpqarray_exit(void)
1828 {
1829         int i;
1830
1831         pci_unregister_driver(&cpqarray_pci_driver);
1832
1833         /* Double check that all controller entries have been removed */
1834         for(i=0; i<MAX_CTLR; i++) {
1835                 if (hba[i] != NULL) {
1836                         printk(KERN_WARNING "cpqarray: Removing EISA "
1837                                         "controller %d\n", i);
1838                         cpqarray_remove_one_eisa(i);
1839                 }
1840         }
1841
1842         remove_proc_entry("cpqarray", proc_root_driver);
1843 }
1844
1845 module_init(cpqarray_init)
1846 module_exit(cpqarray_exit)