drivers/char/agp/intel-agp.c

   1 /*
   2  * Intel AGPGART routines.
   3  */
   4
   5 /*
   6  * Intel(R) 855GM/852GM and 865G support added by David Dawes
   7  * <dawes@tungstengraphics.com>.
   8  *
   9  * Intel(R) 915G/915GM support added by Alan Hourihane
  10  * <alanh@tungstengraphics.com>.
  11  */
  12
  13 #include <linux/module.h>
  14 #include <linux/pci.h>
  15 #include <linux/init.h>
  16 #include <linux/pagemap.h>
  17 #include <linux/agp_backend.h>
  18 #include "agp.h"
  19
  20 /* Intel 815 register */
  21 #define INTEL_815_APCONT        0x51
  22 #define INTEL_815_ATTBASE_MASK  ~0x1FFFFFFF
  23
  24 /* Intel i820 registers */
  25 #define INTEL_I820_RDCR         0x51
  26 #define INTEL_I820_ERRSTS       0xc8
  27
  28 /* Intel i840 registers */
  29 #define INTEL_I840_MCHCFG       0x50
  30 #define INTEL_I840_ERRSTS       0xc8
  31
  32 /* Intel i850 registers */
  33 #define INTEL_I850_MCHCFG       0x50
  34 #define INTEL_I850_ERRSTS       0xc8
  35
  36 /* intel 915G registers */
  37 #define I915_GMADDR     0x18
  38 #define I915_MMADDR     0x10
  39 #define I915_PTEADDR    0x1C
  40 #define I915_GMCH_GMS_STOLEN_48M        (0x6 << 4)
  41 #define I915_GMCH_GMS_STOLEN_64M        (0x7 << 4)
  42
  43
  44 /* Intel 7505 registers */
  45 #define INTEL_I7505_APSIZE      0x74
  46 #define INTEL_I7505_NCAPID      0x60
  47 #define INTEL_I7505_NISTAT      0x6c
  48 #define INTEL_I7505_ATTBASE     0x78
  49 #define INTEL_I7505_ERRSTS      0x42
  50 #define INTEL_I7505_AGPCTRL     0x70
  51 #define INTEL_I7505_MCHCFG      0x50
  52
  53 static struct aper_size_info_fixed intel_i810_sizes[] =
  54 {
  55         {64, 16384, 4},
  56         /* The 32M mode still requires a 64k gatt */
  57         {32, 8192, 4}
  58 };
  59
  60 #define AGP_DCACHE_MEMORY       1
  61 #define AGP_PHYS_MEMORY         2
  62
  63 static struct gatt_mask intel_i810_masks[] =
  64 {
  65         {.mask = I810_PTE_VALID, .type = 0},
  66         {.mask = (I810_PTE_VALID | I810_PTE_LOCAL), .type = AGP_DCACHE_MEMORY},
  67         {.mask = I810_PTE_VALID, .type = 0}
  68 };
  69
  70 static struct _intel_i810_private {
  71         struct pci_dev *i810_dev;       /* device one */
  72         volatile u8 __iomem *registers;
  73         int num_dcache_entries;
  74 } intel_i810_private;
  75
  76 static int intel_i810_fetch_size(void)
  77 {
  78         u32 smram_miscc;
  79         struct aper_size_info_fixed *values;
  80
  81         pci_read_config_dword(agp_bridge->dev, I810_SMRAM_MISCC, &smram_miscc);
  82         values = A_SIZE_FIX(agp_bridge->driver->aperture_sizes);
  83
  84         if ((smram_miscc & I810_GMS) == I810_GMS_DISABLE) {
  85                 printk(KERN_WARNING PFX "i810 is disabled\n");
  86                 return 0;
  87         }
  88         if ((smram_miscc & I810_GFX_MEM_WIN_SIZE) == I810_GFX_MEM_WIN_32M) {
  89                 agp_bridge->previous_size =
  90                         agp_bridge->current_size = (void *) (values + 1);
  91                 agp_bridge->aperture_size_idx = 1;
  92                 return values[1].size;
  93         } else {
  94                 agp_bridge->previous_size =
  95                         agp_bridge->current_size = (void *) (values);
  96                 agp_bridge->aperture_size_idx = 0;
  97                 return values[0].size;
  98         }
  99
 100         return 0;
 101 }
 102
 103 static int intel_i810_configure(void)
 104 {
 105         struct aper_size_info_fixed *current_size;
 106         u32 temp;
 107         int i;
 108
 109         current_size = A_SIZE_FIX(agp_bridge->current_size);
 110
 111         pci_read_config_dword(intel_i810_private.i810_dev, I810_MMADDR, &temp);
 112         temp &= 0xfff80000;
 113
 114         intel_i810_private.registers = ioremap(temp, 128 * 4096);
 115         if (!intel_i810_private.registers) {
 116                 printk(KERN_ERR PFX "Unable to remap memory.\n");
 117                 return -ENOMEM;
 118         }
 119
 120         if ((readl(intel_i810_private.registers+I810_DRAM_CTL)
 121                 & I810_DRAM_ROW_0) == I810_DRAM_ROW_0_SDRAM) {
 122                 /* This will need to be dynamically assigned */
 123                 printk(KERN_INFO PFX "detected 4MB dedicated video ram.\n");
 124                 intel_i810_private.num_dcache_entries = 1024;
 125         }
 126         pci_read_config_dword(intel_i810_private.i810_dev, I810_GMADDR, &temp);
 127         agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
 128         writel(agp_bridge->gatt_bus_addr | I810_PGETBL_ENABLED, intel_i810_private.registers+I810_PGETBL_CTL);
 129         readl(intel_i810_private.registers+I810_PGETBL_CTL);    /* PCI Posting. */
 130
 131         if (agp_bridge->driver->needs_scratch_page) {
 132                 for (i = 0; i < current_size->num_entries; i++) {
 133                         writel(agp_bridge->scratch_page, intel_i810_private.registers+I810_PTE_BASE+(i*4));
 134                         readl(intel_i810_private.registers+I810_PTE_BASE+(i*4));        /* PCI posting. */
 135                 }
 136         }
 137         global_cache_flush();
 138         return 0;
 139 }
 140
 141 static void intel_i810_cleanup(void)
 142 {
 143         writel(0, intel_i810_private.registers+I810_PGETBL_CTL);
 144         readl(intel_i810_private.registers);    /* PCI Posting. */
 145         iounmap(intel_i810_private.registers);
 146 }
 147
 148 static void intel_i810_tlbflush(struct agp_memory *mem)
 149 {
 150         return;
 151 }
 152
 153 static void intel_i810_agp_enable(u32 mode)
 154 {
 155         return;
 156 }
 157
 158 /* Exists to support ARGB cursors */
 159 static void *i8xx_alloc_pages(void)
 160 {
 161         struct page * page;
 162
 163         page = alloc_pages(GFP_KERNEL, 2);
 164         if (page == NULL)
 165                 return NULL;
 166
 167         if (change_page_attr(page, 4, PAGE_KERNEL_NOCACHE) < 0) {
 168                 global_flush_tlb();
 169                 __free_page(page);
 170                 return NULL;
 171         }
 172         global_flush_tlb();
 173         get_page(page);
 174         SetPageLocked(page);
 175         atomic_inc(&agp_bridge->current_memory_agp);
 176         return page_address(page);
 177 }
 178
 179 static void i8xx_destroy_pages(void *addr)
 180 {
 181         struct page *page;
 182
 183         if (addr == NULL)
 184                 return;
 185
 186         page = virt_to_page(addr);
 187         change_page_attr(page, 4, PAGE_KERNEL);
 188         global_flush_tlb();
 189         put_page(page);
 190         unlock_page(page);
 191         free_pages((unsigned long)addr, 2);
 192         atomic_dec(&agp_bridge->current_memory_agp);
 193 }
 194
 195 static int intel_i810_insert_entries(struct agp_memory *mem, off_t pg_start,
 196                                 int type)
 197 {
 198         int i, j, num_entries;
 199         void *temp;
 200
 201         temp = agp_bridge->current_size;
 202         num_entries = A_SIZE_FIX(temp)->num_entries;
 203
 204         if ((pg_start + mem->page_count) > num_entries) {
 205                 return -EINVAL;
 206         }
 207         for (j = pg_start; j < (pg_start + mem->page_count); j++) {
 208                 if (!PGE_EMPTY(agp_bridge, readl(agp_bridge->gatt_table+j)))
 209                         return -EBUSY;
 210         }
 211
 212         if (type != 0 || mem->type != 0) {
 213                 if ((type == AGP_DCACHE_MEMORY) && (mem->type == AGP_DCACHE_MEMORY)) {
 214                         /* special insert */
 215                         global_cache_flush();
 216                         for (i = pg_start; i < (pg_start + mem->page_count); i++) {
 217                                 writel((i*4096)|I810_PTE_LOCAL|I810_PTE_VALID, intel_i810_private.registers+I810_PTE_BASE+(i*4));
 218                                 readl(intel_i810_private.registers+I810_PTE_BASE+(i*4));        /* PCI Posting. */
 219                         }
 220                         global_cache_flush();
 221                         agp_bridge->driver->tlb_flush(mem);
 222                         return 0;
 223                 }
 224                 if((type == AGP_PHYS_MEMORY) && (mem->type == AGP_PHYS_MEMORY))
 225                         goto insert;
 226                 return -EINVAL;
 227         }
 228
 229 insert:
 230         global_cache_flush();
 231         for (i = 0, j = pg_start; i < mem->page_count; i++, j++) {
 232                 writel(agp_bridge->driver->mask_memory(mem->memory[i], mem->type),
 233                                 intel_i810_private.registers+I810_PTE_BASE+(j*4));
 234                 readl(intel_i810_private.registers+I810_PTE_BASE+(j*4));        /* PCI Posting. */
 235         }
 236         global_cache_flush();
 237
 238         agp_bridge->driver->tlb_flush(mem);
 239         return 0;
 240 }
 241
 242 static int intel_i810_remove_entries(struct agp_memory *mem, off_t pg_start,
 243                                 int type)
 244 {
 245         int i;
 246
 247         for (i = pg_start; i < (mem->page_count + pg_start); i++) {
 248                 writel(agp_bridge->scratch_page, intel_i810_private.registers+I810_PTE_BASE+(i*4));
 249                 readl(intel_i810_private.registers+I810_PTE_BASE+(i*4));        /* PCI Posting. */
 250         }
 251
 252         global_cache_flush();
 253         agp_bridge->driver->tlb_flush(mem);
 254         return 0;
 255 }
 256
 257 /*
 258  * The i810/i830 requires a physical address to program its mouse
 259  * pointer into hardware.
 260  * However the Xserver still writes to it through the agp aperture.
 261  */
 262 static struct agp_memory *alloc_agpphysmem_i8xx(size_t pg_count, int type)
 263 {
 264         struct agp_memory *new;
 265         void *addr;
 266
 267         if (pg_count != 1 && pg_count != 4)
 268                 return NULL;
 269
 270         switch (pg_count) {
 271         case 1: addr = agp_bridge->driver->agp_alloc_page();
 272                 break;
 273         case 4:
 274                 /* kludge to get 4 physical pages for ARGB cursor */
 275                 addr = i8xx_alloc_pages();
 276                 break;
 277         default:
 278                 return NULL;
 279         }
 280
 281         if (addr == NULL)
 282                 return NULL;
 283
 284         new = agp_create_memory(pg_count);
 285         if (new == NULL)
 286                 return NULL;
 287
 288         new->memory[0] = virt_to_phys(addr);
 289         if (pg_count == 4) {
 290                 /* kludge to get 4 physical pages for ARGB cursor */
 291                 new->memory[1] = new->memory[0] + PAGE_SIZE;
 292                 new->memory[2] = new->memory[1] + PAGE_SIZE;
 293                 new->memory[3] = new->memory[2] + PAGE_SIZE;
 294         }
 295         new->page_count = pg_count;
 296         new->num_scratch_pages = pg_count;
 297         new->type = AGP_PHYS_MEMORY;
 298         new->physical = new->memory[0];
 299         return new;
 300 }
 301
 302 static struct agp_memory *intel_i810_alloc_by_type(size_t pg_count, int type)
 303 {
 304         struct agp_memory *new;
 305
 306         if (type == AGP_DCACHE_MEMORY) {
 307                 if (pg_count != intel_i810_private.num_dcache_entries)
 308                         return NULL;
 309
 310                 new = agp_create_memory(1);
 311                 if (new == NULL)
 312                         return NULL;
 313
 314                 new->type = AGP_DCACHE_MEMORY;
 315                 new->page_count = pg_count;
 316                 new->num_scratch_pages = 0;
 317                 vfree(new->memory);
 318                 return new;
 319         }
 320         if (type == AGP_PHYS_MEMORY)
 321                 return alloc_agpphysmem_i8xx(pg_count, type);
 322
 323         return NULL;
 324 }
 325
 326 static void intel_i810_free_by_type(struct agp_memory *curr)
 327 {
 328         agp_free_key(curr->key);
 329         if(curr->type == AGP_PHYS_MEMORY) {
 330                 if (curr->page_count == 4)
 331                         i8xx_destroy_pages(phys_to_virt(curr->memory[0]));
 332                 else
 333                         agp_bridge->driver->agp_destroy_page(
 334                                  phys_to_virt(curr->memory[0]));
 335                 vfree(curr->memory);
 336         }
 337         kfree(curr);
 338 }
 339
 340 static unsigned long intel_i810_mask_memory(unsigned long addr, int type)
 341 {
 342         /* Type checking must be done elsewhere */
 343         return addr | agp_bridge->driver->masks[type].mask;
 344 }
 345
 346 static struct aper_size_info_fixed intel_i830_sizes[] =
 347 {
 348         {128, 32768, 5},
 349         /* The 64M mode still requires a 128k gatt */
 350         {64, 16384, 5},
 351         {256, 65536, 6},
 352 };
 353
 354 static struct _intel_i830_private {
 355         struct pci_dev *i830_dev;               /* device one */
 356         volatile u8 __iomem *registers;
 357         volatile u32 __iomem *gtt;              /* I915G */
 358         int gtt_entries;
 359 } intel_i830_private;
 360
 361 static void intel_i830_init_gtt_entries(void)
 362 {
 363         u16 gmch_ctrl;
 364         int gtt_entries;
 365         u8 rdct;
 366         int local = 0;
 367         static const int ddt[4] = { 0, 16, 32, 64 };
 368         int size;
 369
 370         pci_read_config_word(agp_bridge->dev,I830_GMCH_CTRL,&gmch_ctrl);
 371
 372         /* We obtain the size of the GTT, which is also stored (for some
 373          * reason) at the top of stolen memory. Then we add 4KB to that
 374          * for the video BIOS popup, which is also stored in there. */
 375         size = agp_bridge->driver->fetch_size() + 4;
 376
 377         if (agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82830_HB ||
 378             agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82845G_HB) {
 379                 switch (gmch_ctrl & I830_GMCH_GMS_MASK) {
 380                 case I830_GMCH_GMS_STOLEN_512:
 381                         gtt_entries = KB(512) - KB(size);
 382                         break;
 383                 case I830_GMCH_GMS_STOLEN_1024:
 384                         gtt_entries = MB(1) - KB(size);
 385                         break;
 386                 case I830_GMCH_GMS_STOLEN_8192:
 387                         gtt_entries = MB(8) - KB(size);
 388                         break;
 389                 case I830_GMCH_GMS_LOCAL:
 390                         rdct = readb(intel_i830_private.registers+I830_RDRAM_CHANNEL_TYPE);
 391                         gtt_entries = (I830_RDRAM_ND(rdct) + 1) *
 392                                         MB(ddt[I830_RDRAM_DDT(rdct)]);
 393                         local = 1;
 394                         break;
 395                 default:
 396                         gtt_entries = 0;
 397                         break;
 398                 }
 399         } else {
 400                 switch (gmch_ctrl & I830_GMCH_GMS_MASK) {
 401                 case I855_GMCH_GMS_STOLEN_1M:
 402                         gtt_entries = MB(1) - KB(size);
 403                         break;
 404                 case I855_GMCH_GMS_STOLEN_4M:
 405                         gtt_entries = MB(4) - KB(size);
 406                         break;
 407                 case I855_GMCH_GMS_STOLEN_8M:
 408                         gtt_entries = MB(8) - KB(size);
 409                         break;
 410                 case I855_GMCH_GMS_STOLEN_16M:
 411                         gtt_entries = MB(16) - KB(size);
 412                         break;
 413                 case I855_GMCH_GMS_STOLEN_32M:
 414                         gtt_entries = MB(32) - KB(size);
 415                         break;
 416                 case I915_GMCH_GMS_STOLEN_48M:
 417                         /* Check it's really I915G */
 418                         if (agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82915G_HB ||
 419                             agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82915GM_HB)
 420                                 gtt_entries = MB(48) - KB(size);
 421                         else
 422                                 gtt_entries = 0;
 423                         break;
 424                 case I915_GMCH_GMS_STOLEN_64M:
 425                         /* Check it's really I915G */
 426                         if (agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82915G_HB ||
 427                             agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82915GM_HB)
 428                                 gtt_entries = MB(64) - KB(size);
 429                         else
 430                                 gtt_entries = 0;
 431                 default:
 432                         gtt_entries = 0;
 433                         break;
 434                 }
 435         }
 436         if (gtt_entries > 0)
 437                 printk(KERN_INFO PFX "Detected %dK %s memory.\n",
 438                        gtt_entries / KB(1), local ? "local" : "stolen");
 439         else
 440                 printk(KERN_INFO PFX
 441                        "No pre-allocated video memory detected.\n");
 442         gtt_entries /= KB(4);
 443
 444         intel_i830_private.gtt_entries = gtt_entries;
 445 }
 446
 447 /* The intel i830 automatically initializes the agp aperture during POST.
 448  * Use the memory already set aside for in the GTT.
 449  */
 450 static int intel_i830_create_gatt_table(void)
 451 {
 452         int page_order;
 453         struct aper_size_info_fixed *size;
 454         int num_entries;
 455         u32 temp;
 456
 457         size = agp_bridge->current_size;
 458         page_order = size->page_order;
 459         num_entries = size->num_entries;
 460         agp_bridge->gatt_table_real = NULL;
 461
 462         pci_read_config_dword(intel_i830_private.i830_dev,I810_MMADDR,&temp);
 463         temp &= 0xfff80000;
 464
 465         intel_i830_private.registers = ioremap(temp,128 * 4096);
 466         if (!intel_i830_private.registers)
 467                 return -ENOMEM;
 468
 469         temp = readl(intel_i830_private.registers+I810_PGETBL_CTL) & 0xfffff000;
 470         global_cache_flush();   /* FIXME: ?? */
 471
 472         /* we have to call this as early as possible after the MMIO base address is known */
 473         intel_i830_init_gtt_entries();
 474
 475         agp_bridge->gatt_table = NULL;
 476
 477         agp_bridge->gatt_bus_addr = temp;
 478
 479         return 0;
 480 }
 481
 482 /* Return the gatt table to a sane state. Use the top of stolen
 483  * memory for the GTT.
 484  */
 485 static int intel_i830_free_gatt_table(void)
 486 {
 487         return 0;
 488 }
 489
 490 static int intel_i830_fetch_size(void)
 491 {
 492         u16 gmch_ctrl;
 493         struct aper_size_info_fixed *values;
 494
 495         values = A_SIZE_FIX(agp_bridge->driver->aperture_sizes);
 496
 497         if (agp_bridge->dev->device != PCI_DEVICE_ID_INTEL_82830_HB &&
 498             agp_bridge->dev->device != PCI_DEVICE_ID_INTEL_82845G_HB) {
 499                 /* 855GM/852GM/865G has 128MB aperture size */
 500                 agp_bridge->previous_size = agp_bridge->current_size = (void *) values;
 501                 agp_bridge->aperture_size_idx = 0;
 502                 return values[0].size;
 503         }
 504
 505         pci_read_config_word(agp_bridge->dev,I830_GMCH_CTRL,&gmch_ctrl);
 506
 507         if ((gmch_ctrl & I830_GMCH_MEM_MASK) == I830_GMCH_MEM_128M) {
 508                 agp_bridge->previous_size = agp_bridge->current_size = (void *) values;
 509                 agp_bridge->aperture_size_idx = 0;
 510                 return values[0].size;
 511         } else {
 512                 agp_bridge->previous_size = agp_bridge->current_size = (void *) (values + 1);
 513                 agp_bridge->aperture_size_idx = 1;
 514                 return values[1].size;
 515         }
 516
 517         return 0;
 518 }
 519
 520 static int intel_i830_configure(void)
 521 {
 522         struct aper_size_info_fixed *current_size;
 523         u32 temp;
 524         u16 gmch_ctrl;
 525         int i;
 526
 527         current_size = A_SIZE_FIX(agp_bridge->current_size);
 528
 529         pci_read_config_dword(intel_i830_private.i830_dev,I810_GMADDR,&temp);
 530         agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
 531
 532         pci_read_config_word(agp_bridge->dev,I830_GMCH_CTRL,&gmch_ctrl);
 533         gmch_ctrl |= I830_GMCH_ENABLED;
 534         pci_write_config_word(agp_bridge->dev,I830_GMCH_CTRL,gmch_ctrl);
 535
 536         writel(agp_bridge->gatt_bus_addr|I810_PGETBL_ENABLED, intel_i830_private.registers+I810_PGETBL_CTL);
 537         readl(intel_i830_private.registers+I810_PGETBL_CTL);    /* PCI Posting. */
 538
 539         if (agp_bridge->driver->needs_scratch_page) {
 540                 for (i = intel_i830_private.gtt_entries; i < current_size->num_entries; i++) {
 541                         writel(agp_bridge->scratch_page, intel_i830_private.registers+I810_PTE_BASE+(i*4));
 542                         readl(intel_i830_private.registers+I810_PTE_BASE+(i*4));        /* PCI Posting. */
 543                 }
 544         }
 545
 546         global_cache_flush();
 547         return 0;
 548 }
 549
 550 static void intel_i830_cleanup(void)
 551 {
 552         iounmap(intel_i830_private.registers);
 553 }
 554
 555 static int intel_i830_insert_entries(struct agp_memory *mem,off_t pg_start, int type)
 556 {
 557         int i,j,num_entries;
 558         void *temp;
 559
 560         temp = agp_bridge->current_size;
 561         num_entries = A_SIZE_FIX(temp)->num_entries;
 562
 563         if (pg_start < intel_i830_private.gtt_entries) {
 564                 printk (KERN_DEBUG PFX "pg_start == 0x%.8lx,intel_i830_private.gtt_entries == 0x%.8x\n",
 565                                 pg_start,intel_i830_private.gtt_entries);
 566
 567                 printk (KERN_INFO PFX "Trying to insert into local/stolen memory\n");
 568                 return -EINVAL;
 569         }
 570
 571         if ((pg_start + mem->page_count) > num_entries)
 572                 return -EINVAL;
 573
 574         /* The i830 can't check the GTT for entries since its read only,
 575          * depend on the caller to make the correct offset decisions.
 576          */
 577
 578         if ((type != 0 && type != AGP_PHYS_MEMORY) ||
 579                 (mem->type != 0 && mem->type != AGP_PHYS_MEMORY))
 580                 return -EINVAL;
 581
 582         global_cache_flush();   /* FIXME: Necessary ?*/
 583
 584         for (i = 0, j = pg_start; i < mem->page_count; i++, j++) {
 585                 writel(agp_bridge->driver->mask_memory(mem->memory[i], mem->type),
 586                                 intel_i830_private.registers+I810_PTE_BASE+(j*4));
 587                 readl(intel_i830_private.registers+I810_PTE_BASE+(j*4));        /* PCI Posting. */
 588         }
 589
 590         global_cache_flush();
 591         agp_bridge->driver->tlb_flush(mem);
 592         return 0;
 593 }
 594
 595 static int intel_i830_remove_entries(struct agp_memory *mem,off_t pg_start,
 596                                 int type)
 597 {
 598         int i;
 599
 600         global_cache_flush();
 601
 602         if (pg_start < intel_i830_private.gtt_entries) {
 603                 printk (KERN_INFO PFX "Trying to disable local/stolen memory\n");
 604                 return -EINVAL;
 605         }
 606
 607         for (i = pg_start; i < (mem->page_count + pg_start); i++) {
 608                 writel(agp_bridge->scratch_page, intel_i830_private.registers+I810_PTE_BASE+(i*4));
 609                 readl(intel_i830_private.registers+I810_PTE_BASE+(i*4));        /* PCI Posting. */
 610         }
 611
 612         global_cache_flush();
 613         agp_bridge->driver->tlb_flush(mem);
 614         return 0;
 615 }
 616
 617 static struct agp_memory *intel_i830_alloc_by_type(size_t pg_count,int type)
 618 {
 619         if (type == AGP_PHYS_MEMORY)
 620                 return alloc_agpphysmem_i8xx(pg_count, type);
 621
 622         /* always return NULL for other allocation types for now */
 623         return NULL;
 624 }
 625
 626 static int intel_i915_configure(void)
 627 {
 628         struct aper_size_info_fixed *current_size;
 629         u32 temp;
 630         u16 gmch_ctrl;
 631         int i;
 632
 633         current_size = A_SIZE_FIX(agp_bridge->current_size);
 634
 635         pci_read_config_dword(intel_i830_private.i830_dev, I915_GMADDR, &temp);
 636
 637         agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
 638
 639         pci_read_config_word(agp_bridge->dev,I830_GMCH_CTRL,&gmch_ctrl);
 640         gmch_ctrl |= I830_GMCH_ENABLED;
 641         pci_write_config_word(agp_bridge->dev,I830_GMCH_CTRL,gmch_ctrl);
 642
 643         writel(agp_bridge->gatt_bus_addr|I810_PGETBL_ENABLED, intel_i830_private.registers+I810_PGETBL_CTL);
 644         readl(intel_i830_private.registers+I810_PGETBL_CTL);    /* PCI Posting. */
 645
 646         if (agp_bridge->driver->needs_scratch_page) {
 647                 for (i = intel_i830_private.gtt_entries; i < current_size->num_entries; i++) {
 648                         writel(agp_bridge->scratch_page, intel_i830_private.gtt+i);
 649                         readl(intel_i830_private.gtt+i);        /* PCI Posting. */
 650                 }
 651         }
 652
 653         global_cache_flush();
 654         return 0;
 655 }
 656
 657 static void intel_i915_cleanup(void)
 658 {
 659         iounmap(intel_i830_private.gtt);
 660         iounmap(intel_i830_private.registers);
 661 }
 662
 663 static int intel_i915_insert_entries(struct agp_memory *mem,off_t pg_start,
 664                                 int type)
 665 {
 666         int i,j,num_entries;
 667         void *temp;
 668
 669         temp = agp_bridge->current_size;
 670         num_entries = A_SIZE_FIX(temp)->num_entries;
 671
 672         if (pg_start < intel_i830_private.gtt_entries) {
 673                 printk (KERN_DEBUG PFX "pg_start == 0x%.8lx,intel_i830_private.gtt_entries == 0x%.8x\n",
 674                                 pg_start,intel_i830_private.gtt_entries);
 675
 676                 printk (KERN_INFO PFX "Trying to insert into local/stolen memory\n");
 677                 return -EINVAL;
 678         }
 679
 680         if ((pg_start + mem->page_count) > num_entries)
 681                 return -EINVAL;
 682
 683         /* The i830 can't check the GTT for entries since its read only,
 684          * depend on the caller to make the correct offset decisions.
 685          */
 686
 687         if ((type != 0 && type != AGP_PHYS_MEMORY) ||
 688                 (mem->type != 0 && mem->type != AGP_PHYS_MEMORY))
 689                 return -EINVAL;
 690
 691         global_cache_flush();
 692
 693         for (i = 0, j = pg_start; i < mem->page_count; i++, j++) {
 694                 writel(agp_bridge->driver->mask_memory(mem->memory[i], mem->type), intel_i830_private.gtt+j);
 695                 readl(intel_i830_private.gtt+j);        /* PCI Posting. */
 696         }
 697
 698         global_cache_flush();
 699         agp_bridge->driver->tlb_flush(mem);
 700         return 0;
 701 }
 702
 703 static int intel_i915_remove_entries(struct agp_memory *mem,off_t pg_start,
 704                                 int type)
 705 {
 706         int i;
 707
 708         global_cache_flush();
 709
 710         if (pg_start < intel_i830_private.gtt_entries) {
 711                 printk (KERN_INFO PFX "Trying to disable local/stolen memory\n");
 712                 return -EINVAL;
 713         }
 714
 715         for (i = pg_start; i < (mem->page_count + pg_start); i++) {
 716                 writel(agp_bridge->scratch_page, intel_i830_private.gtt+i);
 717                 readl(intel_i830_private.gtt+i);
 718         }
 719
 720         global_cache_flush();
 721         agp_bridge->driver->tlb_flush(mem);
 722         return 0;
 723 }
 724
 725 static int intel_i915_fetch_size(void)
 726 {
 727         struct aper_size_info_fixed *values;
 728         u32 temp, offset = 0;
 729
 730 #define I915_256MB_ADDRESS_MASK (1<<27)
 731
 732         values = A_SIZE_FIX(agp_bridge->driver->aperture_sizes);
 733
 734         pci_read_config_dword(intel_i830_private.i830_dev, I915_GMADDR, &temp);
 735         if (temp & I915_256MB_ADDRESS_MASK)
 736                 offset = 0;     /* 128MB aperture */
 737         else
 738                 offset = 2;     /* 256MB aperture */
 739         agp_bridge->previous_size = agp_bridge->current_size = (void *)(values + offset);
 740         return values[offset].size;
 741 }
 742
 743 /* The intel i915 automatically initializes the agp aperture during POST.
 744  * Use the memory already set aside for in the GTT.
 745  */
 746 static int intel_i915_create_gatt_table(void)
 747 {
 748         int page_order;
 749         struct aper_size_info_fixed *size;
 750         int num_entries;
 751         u32 temp, temp2;
 752
 753         size = agp_bridge->current_size;
 754         page_order = size->page_order;
 755         num_entries = size->num_entries;
 756         agp_bridge->gatt_table_real = NULL;
 757
 758         pci_read_config_dword(intel_i830_private.i830_dev, I915_MMADDR, &temp);
 759         pci_read_config_dword(intel_i830_private.i830_dev, I915_PTEADDR,&temp2);
 760
 761         intel_i830_private.gtt = ioremap(temp2, 256 * 1024);
 762         if (!intel_i830_private.gtt)
 763                 return -ENOMEM;
 764
 765         temp &= 0xfff80000;
 766
 767         intel_i830_private.registers = ioremap(temp,128 * 4096);
 768         if (!intel_i830_private.registers)
 769                 return -ENOMEM;
 770
 771         temp = readl(intel_i830_private.registers+I810_PGETBL_CTL) & 0xfffff000;
 772         global_cache_flush();   /* FIXME: ? */
 773
 774         /* we have to call this as early as possible after the MMIO base address is known */
 775         intel_i830_init_gtt_entries();
 776
 777         agp_bridge->gatt_table = NULL;
 778
 779         agp_bridge->gatt_bus_addr = temp;
 780
 781         return 0;
 782 }
 783
 784 static int intel_fetch_size(void)
 785 {
 786         int i;
 787         u16 temp;
 788         struct aper_size_info_16 *values;
 789
 790         pci_read_config_word(agp_bridge->dev, INTEL_APSIZE, &temp);
 791         values = A_SIZE_16(agp_bridge->driver->aperture_sizes);
 792
 793         for (i = 0; i < agp_bridge->driver->num_aperture_sizes; i++) {
 794                 if (temp == values[i].size_value) {
 795                         agp_bridge->previous_size = agp_bridge->current_size = (void *) (values + i);
 796                         agp_bridge->aperture_size_idx = i;
 797                         return values[i].size;
 798                 }
 799         }
 800
 801         return 0;
 802 }
 803
 804 static int __intel_8xx_fetch_size(u8 temp)
 805 {
 806         int i;
 807         struct aper_size_info_8 *values;
 808
 809         values = A_SIZE_8(agp_bridge->driver->aperture_sizes);
 810
 811         for (i = 0; i < agp_bridge->driver->num_aperture_sizes; i++) {
 812                 if (temp == values[i].size_value) {
 813                         agp_bridge->previous_size =
 814                                 agp_bridge->current_size = (void *) (values + i);
 815                         agp_bridge->aperture_size_idx = i;
 816                         return values[i].size;
 817                 }
 818         }
 819         return 0;
 820 }
 821
 822 static int intel_8xx_fetch_size(void)
 823 {
 824         u8 temp;
 825
 826         pci_read_config_byte(agp_bridge->dev, INTEL_APSIZE, &temp);
 827         return __intel_8xx_fetch_size(temp);
 828 }
 829
 830 static int intel_815_fetch_size(void)
 831 {
 832         u8 temp;
 833
 834         /* Intel 815 chipsets have a _weird_ APSIZE register with only
 835          * one non-reserved bit, so mask the others out ... */
 836         pci_read_config_byte(agp_bridge->dev, INTEL_APSIZE, &temp);
 837         temp &= (1 << 3);
 838
 839         return __intel_8xx_fetch_size(temp);
 840 }
 841
 842 static void intel_tlbflush(struct agp_memory *mem)
 843 {
 844         pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, 0x2200);
 845         pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, 0x2280);
 846 }
 847
 848
 849 static void intel_8xx_tlbflush(struct agp_memory *mem)
 850 {
 851         u32 temp;
 852         pci_read_config_dword(agp_bridge->dev, INTEL_AGPCTRL, &temp);
 853         pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, temp & ~(1 << 7));
 854         pci_read_config_dword(agp_bridge->dev, INTEL_AGPCTRL, &temp);
 855         pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, temp | (1 << 7));
 856 }
 857
 858
 859 static void intel_cleanup(void)
 860 {
 861         u16 temp;
 862         struct aper_size_info_16 *previous_size;
 863
 864         previous_size = A_SIZE_16(agp_bridge->previous_size);
 865         pci_read_config_word(agp_bridge->dev, INTEL_NBXCFG, &temp);
 866         pci_write_config_word(agp_bridge->dev, INTEL_NBXCFG, temp & ~(1 << 9));
 867         pci_write_config_word(agp_bridge->dev, INTEL_APSIZE, previous_size->size_value);
 868 }
 869
 870
 871 static void intel_8xx_cleanup(void)
 872 {
 873         u16 temp;
 874         struct aper_size_info_8 *previous_size;
 875
 876         previous_size = A_SIZE_8(agp_bridge->previous_size);
 877         pci_read_config_word(agp_bridge->dev, INTEL_NBXCFG, &temp);
 878         pci_write_config_word(agp_bridge->dev, INTEL_NBXCFG, temp & ~(1 << 9));
 879         pci_write_config_byte(agp_bridge->dev, INTEL_APSIZE, previous_size->size_value);
 880 }
 881
 882
 883 static int intel_configure(void)
 884 {
 885         u32 temp;
 886         u16 temp2;
 887         struct aper_size_info_16 *current_size;
 888
 889         current_size = A_SIZE_16(agp_bridge->current_size);
 890
 891         /* aperture size */
 892         pci_write_config_word(agp_bridge->dev, INTEL_APSIZE, current_size->size_value);
 893
 894         /* address to map to */
 895         pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
 896         agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
 897
 898         /* attbase - aperture base */
 899         pci_write_config_dword(agp_bridge->dev, INTEL_ATTBASE, agp_bridge->gatt_bus_addr);
 900
 901         /* agpctrl */
 902         pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, 0x2280);
 903
 904         /* paccfg/nbxcfg */
 905         pci_read_config_word(agp_bridge->dev, INTEL_NBXCFG, &temp2);
 906         pci_write_config_word(agp_bridge->dev, INTEL_NBXCFG,
 907                         (temp2 & ~(1 << 10)) | (1 << 9));
 908         /* clear any possible error conditions */
 909         pci_write_config_byte(agp_bridge->dev, INTEL_ERRSTS + 1, 7);
 910         return 0;
 911 }
 912
 913 static int intel_815_configure(void)
 914 {
 915         u32 temp, addr;
 916         u8 temp2;
 917         struct aper_size_info_8 *current_size;
 918
 919         /* attbase - aperture base */
 920         /* the Intel 815 chipset spec. says that bits 29-31 in the
 921         * ATTBASE register are reserved -> try not to write them */
 922         if (agp_bridge->gatt_bus_addr & INTEL_815_ATTBASE_MASK) {
 923                 printk (KERN_EMERG PFX "gatt bus addr too high");
 924                 return -EINVAL;
 925         }
 926
 927         current_size = A_SIZE_8(agp_bridge->current_size);
 928
 929         /* aperture size */
 930         pci_write_config_byte(agp_bridge->dev, INTEL_APSIZE,
 931                         current_size->size_value);
 932
 933         /* address to map to */
 934         pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
 935         agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
 936
 937         pci_read_config_dword(agp_bridge->dev, INTEL_ATTBASE, &addr);
 938         addr &= INTEL_815_ATTBASE_MASK;
 939         addr |= agp_bridge->gatt_bus_addr;
 940         pci_write_config_dword(agp_bridge->dev, INTEL_ATTBASE, addr);
 941
 942         /* agpctrl */
 943         pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, 0x0000);
 944
 945         /* apcont */
 946         pci_read_config_byte(agp_bridge->dev, INTEL_815_APCONT, &temp2);
 947         pci_write_config_byte(agp_bridge->dev, INTEL_815_APCONT, temp2 | (1 << 1));
 948
 949         /* clear any possible error conditions */
 950         /* Oddness : this chipset seems to have no ERRSTS register ! */
 951         return 0;
 952 }
 953
 954 static void intel_820_tlbflush(struct agp_memory *mem)
 955 {
 956         return;
 957 }
 958
 959 static void intel_820_cleanup(void)
 960 {
 961         u8 temp;
 962         struct aper_size_info_8 *previous_size;
 963
 964         previous_size = A_SIZE_8(agp_bridge->previous_size);
 965         pci_read_config_byte(agp_bridge->dev, INTEL_I820_RDCR, &temp);
 966         pci_write_config_byte(agp_bridge->dev, INTEL_I820_RDCR,
 967                         temp & ~(1 << 1));
 968         pci_write_config_byte(agp_bridge->dev, INTEL_APSIZE,
 969                         previous_size->size_value);
 970 }
 971
 972
 973 static int intel_820_configure(void)
 974 {
 975         u32 temp;
 976         u8 temp2;
 977         struct aper_size_info_8 *current_size;
 978
 979         current_size = A_SIZE_8(agp_bridge->current_size);
 980
 981         /* aperture size */
 982         pci_write_config_byte(agp_bridge->dev, INTEL_APSIZE, current_size->size_value);
 983
 984         /* address to map to */
 985         pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
 986         agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
 987
 988         /* attbase - aperture base */
 989         pci_write_config_dword(agp_bridge->dev, INTEL_ATTBASE, agp_bridge->gatt_bus_addr);
 990
 991         /* agpctrl */
 992         pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, 0x0000);
 993
 994         /* global enable aperture access */
 995         /* This flag is not accessed through MCHCFG register as in */
 996         /* i850 chipset. */
 997         pci_read_config_byte(agp_bridge->dev, INTEL_I820_RDCR, &temp2);
 998         pci_write_config_byte(agp_bridge->dev, INTEL_I820_RDCR, temp2 | (1 << 1));
 999         /* clear any possible AGP-related error conditions */
1000         pci_write_config_word(agp_bridge->dev, INTEL_I820_ERRSTS, 0x001c);
1001         return 0;
1002 }
1003
1004 static int intel_840_configure(void)
1005 {
1006         u32 temp;
1007         u16 temp2;
1008         struct aper_size_info_8 *current_size;
1009
1010         current_size = A_SIZE_8(agp_bridge->current_size);
1011
1012         /* aperture size */
1013         pci_write_config_byte(agp_bridge->dev, INTEL_APSIZE, current_size->size_value);
1014
1015         /* address to map to */
1016         pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
1017         agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
1018
1019         /* attbase - aperture base */
1020         pci_write_config_dword(agp_bridge->dev, INTEL_ATTBASE, agp_bridge->gatt_bus_addr);
1021
1022         /* agpctrl */
1023         pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, 0x0000);
1024
1025         /* mcgcfg */
1026         pci_read_config_word(agp_bridge->dev, INTEL_I840_MCHCFG, &temp2);
1027         pci_write_config_word(agp_bridge->dev, INTEL_I840_MCHCFG, temp2 | (1 << 9));
1028         /* clear any possible error conditions */
1029         pci_write_config_word(agp_bridge->dev, INTEL_I840_ERRSTS, 0xc000);
1030         return 0;
1031 }
1032
1033 static int intel_845_configure(void)
1034 {
1035         u32 temp;
1036         u8 temp2;
1037         struct aper_size_info_8 *current_size;
1038
1039         current_size = A_SIZE_8(agp_bridge->current_size);
1040
1041         /* aperture size */
1042         pci_write_config_byte(agp_bridge->dev, INTEL_APSIZE, current_size->size_value);
1043
1044         /* address to map to */
1045         pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
1046         agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
1047
1048         /* attbase - aperture base */
1049         pci_write_config_dword(agp_bridge->dev, INTEL_ATTBASE, agp_bridge->gatt_bus_addr);
1050
1051         /* agpctrl */
1052         pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, 0x0000);
1053
1054         /* agpm */
1055         pci_read_config_byte(agp_bridge->dev, INTEL_I845_AGPM, &temp2);
1056         pci_write_config_byte(agp_bridge->dev, INTEL_I845_AGPM, temp2 | (1 << 1));
1057         /* clear any possible error conditions */
1058         pci_write_config_word(agp_bridge->dev, INTEL_I845_ERRSTS, 0x001c);
1059         return 0;
1060 }
1061
1062 static int intel_850_configure(void)
1063 {
1064         u32 temp;
1065         u16 temp2;
1066         struct aper_size_info_8 *current_size;
1067
1068         current_size = A_SIZE_8(agp_bridge->current_size);
1069
1070         /* aperture size */
1071         pci_write_config_byte(agp_bridge->dev, INTEL_APSIZE, current_size->size_value);
1072
1073         /* address to map to */
1074         pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
1075         agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
1076
1077         /* attbase - aperture base */
1078         pci_write_config_dword(agp_bridge->dev, INTEL_ATTBASE, agp_bridge->gatt_bus_addr);
1079
1080         /* agpctrl */
1081         pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, 0x0000);
1082
1083         /* mcgcfg */
1084         pci_read_config_word(agp_bridge->dev, INTEL_I850_MCHCFG, &temp2);
1085         pci_write_config_word(agp_bridge->dev, INTEL_I850_MCHCFG, temp2 | (1 << 9));
1086         /* clear any possible AGP-related error conditions */
1087         pci_write_config_word(agp_bridge->dev, INTEL_I850_ERRSTS, 0x001c);
1088         return 0;
1089 }
1090
1091 static int intel_860_configure(void)
1092 {
1093         u32 temp;
1094         u16 temp2;
1095         struct aper_size_info_8 *current_size;
1096
1097         current_size = A_SIZE_8(agp_bridge->current_size);
1098
1099         /* aperture size */
1100         pci_write_config_byte(agp_bridge->dev, INTEL_APSIZE, current_size->size_value);
1101
1102         /* address to map to */
1103         pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
1104         agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
1105
1106         /* attbase - aperture base */
1107         pci_write_config_dword(agp_bridge->dev, INTEL_ATTBASE, agp_bridge->gatt_bus_addr);
1108
1109         /* agpctrl */
1110         pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, 0x0000);
1111
1112         /* mcgcfg */
1113         pci_read_config_word(agp_bridge->dev, INTEL_I860_MCHCFG, &temp2);
1114         pci_write_config_word(agp_bridge->dev, INTEL_I860_MCHCFG, temp2 | (1 << 9));
1115         /* clear any possible AGP-related error conditions */
1116         pci_write_config_word(agp_bridge->dev, INTEL_I860_ERRSTS, 0xf700);
1117         return 0;
1118 }
1119
1120 static int intel_830mp_configure(void)
1121 {
1122         u32 temp;
1123         u16 temp2;
1124         struct aper_size_info_8 *current_size;
1125
1126         current_size = A_SIZE_8(agp_bridge->current_size);
1127
1128         /* aperture size */
1129         pci_write_config_byte(agp_bridge->dev, INTEL_APSIZE, current_size->size_value);
1130
1131         /* address to map to */
1132         pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
1133         agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
1134
1135         /* attbase - aperture base */
1136         pci_write_config_dword(agp_bridge->dev, INTEL_ATTBASE, agp_bridge->gatt_bus_addr);
1137
1138         /* agpctrl */
1139         pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, 0x0000);
1140
1141         /* gmch */
1142         pci_read_config_word(agp_bridge->dev, INTEL_NBXCFG, &temp2);
1143         pci_write_config_word(agp_bridge->dev, INTEL_NBXCFG, temp2 | (1 << 9));
1144         /* clear any possible AGP-related error conditions */
1145         pci_write_config_word(agp_bridge->dev, INTEL_I830_ERRSTS, 0x1c);
1146         return 0;
1147 }
1148
1149 static int intel_7505_configure(void)
1150 {
1151         u32 temp;
1152         u16 temp2;
1153         struct aper_size_info_8 *current_size;
1154
1155         current_size = A_SIZE_8(agp_bridge->current_size);
1156
1157         /* aperture size */
1158         pci_write_config_byte(agp_bridge->dev, INTEL_APSIZE, current_size->size_value);
1159
1160         /* address to map to */
1161         pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
1162         agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
1163
1164         /* attbase - aperture base */
1165         pci_write_config_dword(agp_bridge->dev, INTEL_ATTBASE, agp_bridge->gatt_bus_addr);
1166
1167         /* agpctrl */
1168         pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, 0x0000);
1169
1170         /* mchcfg */
1171         pci_read_config_word(agp_bridge->dev, INTEL_I7505_MCHCFG, &temp2);
1172         pci_write_config_word(agp_bridge->dev, INTEL_I7505_MCHCFG, temp2 | (1 << 9));
1173
1174         return 0;
1175 }
1176
1177 /* Setup function */
1178 static struct gatt_mask intel_generic_masks[] =
1179 {
1180         {.mask = 0x00000017, .type = 0}
1181 };
1182
1183 static struct aper_size_info_8 intel_815_sizes[2] =
1184 {
1185         {64, 16384, 4, 0},
1186         {32, 8192, 3, 8},
1187 };
1188
1189 static struct aper_size_info_8 intel_8xx_sizes[7] =
1190 {
1191         {256, 65536, 6, 0},
1192         {128, 32768, 5, 32},
1193         {64, 16384, 4, 48},
1194         {32, 8192, 3, 56},
1195         {16, 4096, 2, 60},
1196         {8, 2048, 1, 62},
1197         {4, 1024, 0, 63}
1198 };
1199
1200 static struct aper_size_info_16 intel_generic_sizes[7] =
1201 {
1202         {256, 65536, 6, 0},
1203         {128, 32768, 5, 32},
1204         {64, 16384, 4, 48},
1205         {32, 8192, 3, 56},
1206         {16, 4096, 2, 60},
1207         {8, 2048, 1, 62},
1208         {4, 1024, 0, 63}
1209 };
1210
1211 static struct aper_size_info_8 intel_830mp_sizes[4] =
1212 {
1213         {256, 65536, 6, 0},
1214         {128, 32768, 5, 32},
1215         {64, 16384, 4, 48},
1216         {32, 8192, 3, 56}
1217 };
1218
1219 static struct agp_bridge_driver intel_generic_driver = {
1220         .owner                  = THIS_MODULE,
1221         .aperture_sizes         = intel_generic_sizes,
1222         .size_type              = U16_APER_SIZE,
1223         .num_aperture_sizes     = 7,
1224         .configure              = intel_configure,
1225         .fetch_size             = intel_fetch_size,
1226         .cleanup                = intel_cleanup,
1227         .tlb_flush              = intel_tlbflush,
1228         .mask_memory            = agp_generic_mask_memory,
1229         .masks                  = intel_generic_masks,
1230         .agp_enable             = agp_generic_enable,
1231         .cache_flush            = global_cache_flush,
1232         .create_gatt_table      = agp_generic_create_gatt_table,
1233         .free_gatt_table        = agp_generic_free_gatt_table,
1234         .insert_memory          = agp_generic_insert_memory,
1235         .remove_memory          = agp_generic_remove_memory,
1236         .alloc_by_type          = agp_generic_alloc_by_type,
1237         .free_by_type           = agp_generic_free_by_type,
1238         .agp_alloc_page         = agp_generic_alloc_page,
1239         .agp_destroy_page       = agp_generic_destroy_page,
1240 };
1241
1242 static struct agp_bridge_driver intel_810_driver = {
1243         .owner                  = THIS_MODULE,
1244         .aperture_sizes         = intel_i810_sizes,
1245         .size_type              = FIXED_APER_SIZE,
1246         .num_aperture_sizes     = 2,
1247         .needs_scratch_page     = TRUE,
1248         .configure              = intel_i810_configure,
1249         .fetch_size             = intel_i810_fetch_size,
1250         .cleanup                = intel_i810_cleanup,
1251         .tlb_flush              = intel_i810_tlbflush,
1252         .mask_memory            = intel_i810_mask_memory,
1253         .masks                  = intel_i810_masks,
1254         .agp_enable             = intel_i810_agp_enable,
1255         .cache_flush            = global_cache_flush,
1256         .create_gatt_table      = agp_generic_create_gatt_table,
1257         .free_gatt_table        = agp_generic_free_gatt_table,
1258         .insert_memory          = intel_i810_insert_entries,
1259         .remove_memory          = intel_i810_remove_entries,
1260         .alloc_by_type          = intel_i810_alloc_by_type,
1261         .free_by_type           = intel_i810_free_by_type,
1262         .agp_alloc_page         = agp_generic_alloc_page,
1263         .agp_destroy_page       = agp_generic_destroy_page,
1264 };
1265
1266 static struct agp_bridge_driver intel_815_driver = {
1267         .owner                  = THIS_MODULE,
1268         .aperture_sizes         = intel_815_sizes,
1269         .size_type              = U8_APER_SIZE,
1270         .num_aperture_sizes     = 2,
1271         .configure              = intel_815_configure,
1272         .fetch_size             = intel_815_fetch_size,
1273         .cleanup                = intel_8xx_cleanup,
1274         .tlb_flush              = intel_8xx_tlbflush,
1275         .mask_memory            = agp_generic_mask_memory,
1276         .masks                  = intel_generic_masks,
1277         .agp_enable             = agp_generic_enable,
1278         .cache_flush            = global_cache_flush,
1279         .create_gatt_table      = agp_generic_create_gatt_table,
1280         .free_gatt_table        = agp_generic_free_gatt_table,
1281         .insert_memory          = agp_generic_insert_memory,
1282         .remove_memory          = agp_generic_remove_memory,
1283         .alloc_by_type          = agp_generic_alloc_by_type,
1284         .free_by_type           = agp_generic_free_by_type,
1285         .agp_alloc_page         = agp_generic_alloc_page,
1286         .agp_destroy_page       = agp_generic_destroy_page,
1287 };
1288
1289 static struct agp_bridge_driver intel_830_driver = {
1290         .owner                  = THIS_MODULE,
1291         .aperture_sizes         = intel_i830_sizes,
1292         .size_type              = FIXED_APER_SIZE,
1293         .num_aperture_sizes     = 3,
1294         .needs_scratch_page     = TRUE,
1295         .configure              = intel_i830_configure,
1296         .fetch_size             = intel_i830_fetch_size,
1297         .cleanup                = intel_i830_cleanup,
1298         .tlb_flush              = intel_i810_tlbflush,
1299         .mask_memory            = intel_i810_mask_memory,
1300         .masks                  = intel_i810_masks,
1301         .agp_enable             = intel_i810_agp_enable,
1302         .cache_flush            = global_cache_flush,
1303         .create_gatt_table      = intel_i830_create_gatt_table,
1304         .free_gatt_table        = intel_i830_free_gatt_table,
1305         .insert_memory          = intel_i830_insert_entries,
1306         .remove_memory          = intel_i830_remove_entries,
1307         .alloc_by_type          = intel_i830_alloc_by_type,
1308         .free_by_type           = intel_i810_free_by_type,
1309         .agp_alloc_page         = agp_generic_alloc_page,
1310         .agp_destroy_page       = agp_generic_destroy_page,
1311 };
1312
1313 static struct agp_bridge_driver intel_820_driver = {
1314         .owner                  = THIS_MODULE,
1315         .aperture_sizes         = intel_8xx_sizes,
1316         .size_type              = U8_APER_SIZE,
1317         .num_aperture_sizes     = 7,
1318         .configure              = intel_820_configure,
1319         .fetch_size             = intel_8xx_fetch_size,
1320         .cleanup                = intel_820_cleanup,
1321         .tlb_flush              = intel_820_tlbflush,
1322         .mask_memory            = agp_generic_mask_memory,
1323         .masks                  = intel_generic_masks,
1324         .agp_enable             = agp_generic_enable,
1325         .cache_flush            = global_cache_flush,
1326         .create_gatt_table      = agp_generic_create_gatt_table,
1327         .free_gatt_table        = agp_generic_free_gatt_table,
1328         .insert_memory          = agp_generic_insert_memory,
1329         .remove_memory          = agp_generic_remove_memory,
1330         .alloc_by_type          = agp_generic_alloc_by_type,
1331         .free_by_type           = agp_generic_free_by_type,
1332         .agp_alloc_page         = agp_generic_alloc_page,
1333         .agp_destroy_page       = agp_generic_destroy_page,
1334 };
1335
1336 static struct agp_bridge_driver intel_830mp_driver = {
1337         .owner                  = THIS_MODULE,
1338         .aperture_sizes         = intel_830mp_sizes,
1339         .size_type              = U8_APER_SIZE,
1340         .num_aperture_sizes     = 4,
1341         .configure              = intel_830mp_configure,
1342         .fetch_size             = intel_8xx_fetch_size,
1343         .cleanup                = intel_8xx_cleanup,
1344         .tlb_flush              = intel_8xx_tlbflush,
1345         .mask_memory            = agp_generic_mask_memory,
1346         .masks                  = intel_generic_masks,
1347         .agp_enable             = agp_generic_enable,
1348         .cache_flush            = global_cache_flush,
1349         .create_gatt_table      = agp_generic_create_gatt_table,
1350         .free_gatt_table        = agp_generic_free_gatt_table,
1351         .insert_memory          = agp_generic_insert_memory,
1352         .remove_memory          = agp_generic_remove_memory,
1353         .alloc_by_type          = agp_generic_alloc_by_type,
1354         .free_by_type           = agp_generic_free_by_type,
1355         .agp_alloc_page         = agp_generic_alloc_page,
1356         .agp_destroy_page       = agp_generic_destroy_page,
1357 };
1358
1359 static struct agp_bridge_driver intel_840_driver = {
1360         .owner                  = THIS_MODULE,
1361         .aperture_sizes         = intel_8xx_sizes,
1362         .size_type              = U8_APER_SIZE,
1363         .num_aperture_sizes     = 7,
1364         .configure              = intel_840_configure,
1365         .fetch_size             = intel_8xx_fetch_size,
1366         .cleanup                = intel_8xx_cleanup,
1367         .tlb_flush              = intel_8xx_tlbflush,
1368         .mask_memory            = agp_generic_mask_memory,
1369         .masks                  = intel_generic_masks,
1370         .agp_enable             = agp_generic_enable,
1371         .cache_flush            = global_cache_flush,
1372         .create_gatt_table      = agp_generic_create_gatt_table,
1373         .free_gatt_table        = agp_generic_free_gatt_table,
1374         .insert_memory          = agp_generic_insert_memory,
1375         .remove_memory          = agp_generic_remove_memory,
1376         .alloc_by_type          = agp_generic_alloc_by_type,
1377         .free_by_type           = agp_generic_free_by_type,
1378         .agp_alloc_page         = agp_generic_alloc_page,
1379         .agp_destroy_page       = agp_generic_destroy_page,
1380 };
1381
1382 static struct agp_bridge_driver intel_845_driver = {
1383         .owner                  = THIS_MODULE,
1384         .aperture_sizes         = intel_8xx_sizes,
1385         .size_type              = U8_APER_SIZE,
1386         .num_aperture_sizes     = 7,
1387         .configure              = intel_845_configure,
1388         .fetch_size             = intel_8xx_fetch_size,
1389         .cleanup                = intel_8xx_cleanup,
1390         .tlb_flush              = intel_8xx_tlbflush,
1391         .mask_memory            = agp_generic_mask_memory,
1392         .masks                  = intel_generic_masks,
1393         .agp_enable             = agp_generic_enable,
1394         .cache_flush            = global_cache_flush,
1395         .create_gatt_table      = agp_generic_create_gatt_table,
1396         .free_gatt_table        = agp_generic_free_gatt_table,
1397         .insert_memory          = agp_generic_insert_memory,
1398         .remove_memory          = agp_generic_remove_memory,
1399         .alloc_by_type          = agp_generic_alloc_by_type,
1400         .free_by_type           = agp_generic_free_by_type,
1401         .agp_alloc_page         = agp_generic_alloc_page,
1402         .agp_destroy_page       = agp_generic_destroy_page,
1403 };
1404
1405 static struct agp_bridge_driver intel_850_driver = {
1406         .owner                  = THIS_MODULE,
1407         .aperture_sizes         = intel_8xx_sizes,
1408         .size_type              = U8_APER_SIZE,
1409         .num_aperture_sizes     = 7,
1410         .configure              = intel_850_configure,
1411         .fetch_size             = intel_8xx_fetch_size,
1412         .cleanup                = intel_8xx_cleanup,
1413         .tlb_flush              = intel_8xx_tlbflush,
1414         .mask_memory            = agp_generic_mask_memory,
1415         .masks                  = intel_generic_masks,
1416         .agp_enable             = agp_generic_enable,
1417         .cache_flush            = global_cache_flush,
1418         .create_gatt_table      = agp_generic_create_gatt_table,
1419         .free_gatt_table        = agp_generic_free_gatt_table,
1420         .insert_memory          = agp_generic_insert_memory,
1421         .remove_memory          = agp_generic_remove_memory,
1422         .alloc_by_type          = agp_generic_alloc_by_type,
1423         .free_by_type           = agp_generic_free_by_type,
1424         .agp_alloc_page         = agp_generic_alloc_page,
1425         .agp_destroy_page       = agp_generic_destroy_page,
1426 };
1427
1428 static struct agp_bridge_driver intel_860_driver = {
1429         .owner                  = THIS_MODULE,
1430         .aperture_sizes         = intel_8xx_sizes,
1431         .size_type              = U8_APER_SIZE,
1432         .num_aperture_sizes     = 7,
1433         .configure              = intel_860_configure,
1434         .fetch_size             = intel_8xx_fetch_size,
1435         .cleanup                = intel_8xx_cleanup,
1436         .tlb_flush              = intel_8xx_tlbflush,
1437         .mask_memory            = agp_generic_mask_memory,
1438         .masks                  = intel_generic_masks,
1439         .agp_enable             = agp_generic_enable,
1440         .cache_flush            = global_cache_flush,
1441         .create_gatt_table      = agp_generic_create_gatt_table,
1442         .free_gatt_table        = agp_generic_free_gatt_table,
1443         .insert_memory          = agp_generic_insert_memory,
1444         .remove_memory          = agp_generic_remove_memory,
1445         .alloc_by_type          = agp_generic_alloc_by_type,
1446         .free_by_type           = agp_generic_free_by_type,
1447         .agp_alloc_page         = agp_generic_alloc_page,
1448         .agp_destroy_page       = agp_generic_destroy_page,
1449 };
1450
1451 static struct agp_bridge_driver intel_915_driver = {
1452         .owner                  = THIS_MODULE,
1453         .aperture_sizes         = intel_i830_sizes,
1454         .size_type              = FIXED_APER_SIZE,
1455         .num_aperture_sizes     = 3,
1456         .needs_scratch_page     = TRUE,
1457         .configure              = intel_i915_configure,
1458         .fetch_size             = intel_i915_fetch_size,
1459         .cleanup                = intel_i915_cleanup,
1460         .tlb_flush              = intel_i810_tlbflush,
1461         .mask_memory            = intel_i810_mask_memory,
1462         .masks                  = intel_i810_masks,
1463         .agp_enable             = intel_i810_agp_enable,
1464         .cache_flush            = global_cache_flush,
1465         .create_gatt_table      = intel_i915_create_gatt_table,
1466         .free_gatt_table        = intel_i830_free_gatt_table,
1467         .insert_memory          = intel_i915_insert_entries,
1468         .remove_memory          = intel_i915_remove_entries,
1469         .alloc_by_type          = intel_i830_alloc_by_type,
1470         .free_by_type           = intel_i810_free_by_type,
1471         .agp_alloc_page         = agp_generic_alloc_page,
1472         .agp_destroy_page       = agp_generic_destroy_page,
1473 };
1474
1475
1476 static struct agp_bridge_driver intel_7505_driver = {
1477         .owner                  = THIS_MODULE,
1478         .aperture_sizes         = intel_8xx_sizes,
1479         .size_type              = U8_APER_SIZE,
1480         .num_aperture_sizes     = 7,
1481         .configure              = intel_7505_configure,
1482         .fetch_size             = intel_8xx_fetch_size,
1483         .cleanup                = intel_8xx_cleanup,
1484         .tlb_flush              = intel_8xx_tlbflush,
1485         .mask_memory            = agp_generic_mask_memory,
1486         .masks                  = intel_generic_masks,
1487         .agp_enable             = agp_generic_enable,
1488         .cache_flush            = global_cache_flush,
1489         .create_gatt_table      = agp_generic_create_gatt_table,
1490         .free_gatt_table        = agp_generic_free_gatt_table,
1491         .insert_memory          = agp_generic_insert_memory,
1492         .remove_memory          = agp_generic_remove_memory,
1493         .alloc_by_type          = agp_generic_alloc_by_type,
1494         .free_by_type           = agp_generic_free_by_type,
1495         .agp_alloc_page         = agp_generic_alloc_page,
1496         .agp_destroy_page       = agp_generic_destroy_page,
1497 };
1498
1499 static int find_i810(u16 device)
1500 {
1501         struct pci_dev *i810_dev;
1502
1503         i810_dev = pci_get_device(PCI_VENDOR_ID_INTEL, device, NULL);
1504         if (!i810_dev)
1505                 return 0;
1506         intel_i810_private.i810_dev = i810_dev;
1507         return 1;
1508 }
1509
1510 static int find_i830(u16 device)
1511 {
1512         struct pci_dev *i830_dev;
1513
1514         i830_dev = pci_get_device(PCI_VENDOR_ID_INTEL, device, NULL);
1515         if (i830_dev && PCI_FUNC(i830_dev->devfn) != 0) {
1516                 i830_dev = pci_get_device(PCI_VENDOR_ID_INTEL,
1517                                 device, i830_dev);
1518         }
1519
1520         if (!i830_dev)
1521                 return 0;
1522
1523         intel_i830_private.i830_dev = i830_dev;
1524         return 1;
1525 }
1526
1527 static int __devinit agp_intel_probe(struct pci_dev *pdev,
1528                                      const struct pci_device_id *ent)
1529 {
1530         struct agp_bridge_data *bridge;
1531         char *name = "(unknown)";
1532         u8 cap_ptr = 0;
1533         struct resource *r;
1534
1535         cap_ptr = pci_find_capability(pdev, PCI_CAP_ID_AGP);
1536
1537         bridge = agp_alloc_bridge();
1538         if (!bridge)
1539                 return -ENOMEM;
1540
1541         switch (pdev->device) {
1542         case PCI_DEVICE_ID_INTEL_82443LX_0:
1543                 bridge->driver = &intel_generic_driver;
1544                 name = "440LX";
1545                 break;
1546         case PCI_DEVICE_ID_INTEL_82443BX_0:
1547                 bridge->driver = &intel_generic_driver;
1548                 name = "440BX";
1549                 break;
1550         case PCI_DEVICE_ID_INTEL_82443GX_0:
1551                 bridge->driver = &intel_generic_driver;
1552                 name = "440GX";
1553                 break;
1554         case PCI_DEVICE_ID_INTEL_82810_MC1:
1555                 name = "i810";
1556                 if (!find_i810(PCI_DEVICE_ID_INTEL_82810_IG1))
1557                         goto fail;
1558                 bridge->driver = &intel_810_driver;
1559                 break;
1560         case PCI_DEVICE_ID_INTEL_82810_MC3:
1561                 name = "i810 DC100";
1562                 if (!find_i810(PCI_DEVICE_ID_INTEL_82810_IG3))
1563                         goto fail;
1564                 bridge->driver = &intel_810_driver;
1565                 break;
1566         case PCI_DEVICE_ID_INTEL_82810E_MC:
1567                 name = "i810 E";
1568                 if (!find_i810(PCI_DEVICE_ID_INTEL_82810E_IG))
1569                         goto fail;
1570                 bridge->driver = &intel_810_driver;
1571                 break;
1572          case PCI_DEVICE_ID_INTEL_82815_MC:
1573                 /*
1574                  * The i815 can operate either as an i810 style
1575                  * integrated device, or as an AGP4X motherboard.
1576                  */
1577                 if (find_i810(PCI_DEVICE_ID_INTEL_82815_CGC))
1578                         bridge->driver = &intel_810_driver;
1579                 else
1580                         bridge->driver = &intel_815_driver;
1581                 name = "i815";
1582                 break;
1583         case PCI_DEVICE_ID_INTEL_82820_HB:
1584         case PCI_DEVICE_ID_INTEL_82820_UP_HB:
1585                 bridge->driver = &intel_820_driver;
1586                 name = "i820";
1587                 break;
1588         case PCI_DEVICE_ID_INTEL_82830_HB:
1589                 if (find_i830(PCI_DEVICE_ID_INTEL_82830_CGC)) {
1590                         bridge->driver = &intel_830_driver;
1591                 } else {
1592                         bridge->driver = &intel_830mp_driver;
1593                 }
1594                 name = "830M";
1595                 break;
1596         case PCI_DEVICE_ID_INTEL_82840_HB:
1597                 bridge->driver = &intel_840_driver;
1598                 name = "i840";
1599                 break;
1600         case PCI_DEVICE_ID_INTEL_82845_HB:
1601                 bridge->driver = &intel_845_driver;
1602                 name = "i845";
1603                 break;
1604         case PCI_DEVICE_ID_INTEL_82845G_HB:
1605                 if (find_i830(PCI_DEVICE_ID_INTEL_82845G_IG)) {
1606                         bridge->driver = &intel_830_driver;
1607                 } else {
1608                         bridge->driver = &intel_845_driver;
1609                 }
1610                 name = "845G";
1611                 break;
1612         case PCI_DEVICE_ID_INTEL_82850_HB:
1613                 bridge->driver = &intel_850_driver;
1614                 name = "i850";
1615                 break;
1616         case PCI_DEVICE_ID_INTEL_82855PM_HB:
1617                 bridge->driver = &intel_845_driver;
1618                 name = "855PM";
1619                 break;
1620         case PCI_DEVICE_ID_INTEL_82855GM_HB:
1621                 if (find_i830(PCI_DEVICE_ID_INTEL_82855GM_IG)) {
1622                         bridge->driver = &intel_830_driver;
1623                         name = "855";
1624                 } else {
1625                         bridge->driver = &intel_845_driver;
1626                         name = "855GM";
1627                 }
1628                 break;
1629         case PCI_DEVICE_ID_INTEL_82860_HB:
1630                 bridge->driver = &intel_860_driver;
1631                 name = "i860";
1632                 break;
1633         case PCI_DEVICE_ID_INTEL_82865_HB:
1634                 if (find_i830(PCI_DEVICE_ID_INTEL_82865_IG)) {
1635                         bridge->driver = &intel_830_driver;
1636                 } else {
1637                         bridge->driver = &intel_845_driver;
1638                 }
1639                 name = "865";
1640                 break;
1641         case PCI_DEVICE_ID_INTEL_82875_HB:
1642                 bridge->driver = &intel_845_driver;
1643                 name = "i875";
1644                 break;
1645         case PCI_DEVICE_ID_INTEL_82915G_HB:
1646                 if (find_i830(PCI_DEVICE_ID_INTEL_82915G_IG)) {
1647                         bridge->driver = &intel_915_driver;
1648                 } else {
1649                         bridge->driver = &intel_845_driver;
1650                 }
1651                 name = "915G";
1652                 break;
1653         case PCI_DEVICE_ID_INTEL_82915GM_HB:
1654                 if (find_i830(PCI_DEVICE_ID_INTEL_82915GM_IG)) {
1655                         bridge->driver = &intel_915_driver;
1656                 } else {
1657                         bridge->driver = &intel_845_driver;
1658                 }
1659                 name = "915GM";
1660                 break;
1661         case PCI_DEVICE_ID_INTEL_7505_0:
1662                 bridge->driver = &intel_7505_driver;
1663                 name = "E7505";
1664                 break;
1665         case PCI_DEVICE_ID_INTEL_7205_0:
1666                 bridge->driver = &intel_7505_driver;
1667                 name = "E7205";
1668                 break;
1669         default:
1670                 if (cap_ptr)
1671                         printk(KERN_WARNING PFX "Unsupported Intel chipset (device id: %04x)\n",
1672                             pdev->device);
1673                 agp_put_bridge(bridge);
1674                 return -ENODEV;
1675         };
1676
1677         bridge->dev = pdev;
1678         bridge->capndx = cap_ptr;
1679
1680         if (bridge->driver == &intel_810_driver)
1681                 bridge->dev_private_data = &intel_i810_private;
1682         else if (bridge->driver == &intel_830_driver)
1683                 bridge->dev_private_data = &intel_i830_private;
1684
1685         printk(KERN_INFO PFX "Detected an Intel %s Chipset.\n", name);
1686
1687         /*
1688         * The following fixes the case where the BIOS has "forgotten" to
1689         * provide an address range for the GART.
1690         * 20030610 - hamish@zot.org
1691         */
1692         r = &pdev->resource[0];
1693         if (!r->start && r->end) {
1694                 if(pci_assign_resource(pdev, 0)) {
1695                         printk(KERN_ERR PFX "could not assign resource 0\n");
1696                         agp_put_bridge(bridge);
1697                         return -ENODEV;
1698                 }
1699         }
1700
1701         /*
1702         * If the device has not been properly setup, the following will catch
1703         * the problem and should stop the system from crashing.
1704         * 20030610 - hamish@zot.org
1705         */
1706         if (pci_enable_device(pdev)) {
1707                 printk(KERN_ERR PFX "Unable to Enable PCI device\n");
1708                 agp_put_bridge(bridge);
1709                 return -ENODEV;
1710         }
1711
1712         /* Fill in the mode register */
1713         if (cap_ptr) {
1714                 pci_read_config_dword(pdev,
1715                                 bridge->capndx+PCI_AGP_STATUS,
1716                                 &bridge->mode);
1717         }
1718
1719         pci_set_drvdata(pdev, bridge);
1720         return agp_add_bridge(bridge);
1721
1722 fail:
1723         printk(KERN_ERR PFX "Detected an Intel %s chipset, "
1724                 "but could not find the secondary device.\n", name);
1725         agp_put_bridge(bridge);
1726         return -ENODEV;
1727 }
1728
1729 static void __devexit agp_intel_remove(struct pci_dev *pdev)
1730 {
1731         struct agp_bridge_data *bridge = pci_get_drvdata(pdev);
1732
1733         agp_remove_bridge(bridge);
1734
1735         if (intel_i810_private.i810_dev)
1736                 pci_dev_put(intel_i810_private.i810_dev);
1737         if (intel_i830_private.i830_dev)
1738                 pci_dev_put(intel_i830_private.i830_dev);
1739
1740         agp_put_bridge(bridge);
1741 }
1742
1743 static int agp_intel_resume(struct pci_dev *pdev)
1744 {
1745         struct agp_bridge_data *bridge = pci_get_drvdata(pdev);
1746
1747         pci_restore_state(pdev);
1748
1749         if (bridge->driver == &intel_generic_driver)
1750                 intel_configure();
1751         else if (bridge->driver == &intel_850_driver)
1752                 intel_850_configure();
1753         else if (bridge->driver == &intel_845_driver)
1754                 intel_845_configure();
1755         else if (bridge->driver == &intel_830mp_driver)
1756                 intel_830mp_configure();
1757         else if (bridge->driver == &intel_915_driver)
1758                 intel_i915_configure();
1759         else if (bridge->driver == &intel_830_driver)
1760                 intel_i830_configure();
1761
1762         return 0;
1763 }
1764
1765 static struct pci_device_id agp_intel_pci_table[] = {
1766 #define ID(x)                                           \
1767         {                                               \
1768         .class          = (PCI_CLASS_BRIDGE_HOST << 8), \
1769         .class_mask     = ~0,                           \
1770         .vendor         = PCI_VENDOR_ID_INTEL,          \
1771         .device         = x,                            \
1772         .subvendor      = PCI_ANY_ID,                   \
1773         .subdevice      = PCI_ANY_ID,                   \
1774         }
1775         ID(PCI_DEVICE_ID_INTEL_82443LX_0),
1776         ID(PCI_DEVICE_ID_INTEL_82443BX_0),
1777         ID(PCI_DEVICE_ID_INTEL_82443GX_0),
1778         ID(PCI_DEVICE_ID_INTEL_82810_MC1),
1779         ID(PCI_DEVICE_ID_INTEL_82810_MC3),
1780         ID(PCI_DEVICE_ID_INTEL_82810E_MC),
1781         ID(PCI_DEVICE_ID_INTEL_82815_MC),
1782         ID(PCI_DEVICE_ID_INTEL_82820_HB),
1783         ID(PCI_DEVICE_ID_INTEL_82820_UP_HB),
1784         ID(PCI_DEVICE_ID_INTEL_82830_HB),
1785         ID(PCI_DEVICE_ID_INTEL_82840_HB),
1786         ID(PCI_DEVICE_ID_INTEL_82845_HB),
1787         ID(PCI_DEVICE_ID_INTEL_82845G_HB),
1788         ID(PCI_DEVICE_ID_INTEL_82850_HB),
1789         ID(PCI_DEVICE_ID_INTEL_82855PM_HB),
1790         ID(PCI_DEVICE_ID_INTEL_82855GM_HB),
1791         ID(PCI_DEVICE_ID_INTEL_82860_HB),
1792         ID(PCI_DEVICE_ID_INTEL_82865_HB),
1793         ID(PCI_DEVICE_ID_INTEL_82875_HB),
1794         ID(PCI_DEVICE_ID_INTEL_7505_0),
1795         ID(PCI_DEVICE_ID_INTEL_7205_0),
1796         ID(PCI_DEVICE_ID_INTEL_82915G_HB),
1797         ID(PCI_DEVICE_ID_INTEL_82915GM_HB),
1798         { }
1799 };
1800
1801 MODULE_DEVICE_TABLE(pci, agp_intel_pci_table);
1802
1803 static struct pci_driver agp_intel_pci_driver = {
1804         .name           = "agpgart-intel",
1805         .id_table       = agp_intel_pci_table,
1806         .probe          = agp_intel_probe,
1807         .remove         = __devexit_p(agp_intel_remove),
1808         .resume         = agp_intel_resume,
1809 };
1810
1811 static int __init agp_intel_init(void)
1812 {
1813         return pci_module_init(&agp_intel_pci_driver);
1814 }
1815
1816 static void __exit agp_intel_cleanup(void)
1817 {
1818         pci_unregister_driver(&agp_intel_pci_driver);
1819 }
1820
1821 module_init(agp_intel_init);
1822 module_exit(agp_intel_cleanup);
1823
1824 MODULE_AUTHOR("Dave Jones <davej@codemonkey.org.uk>");
1825 MODULE_LICENSE("GPL and additional rights");