drivers/char/agp/intel-agp.c

   1 /*
   2  * Intel AGPGART routines.
   3  */
   4
   5 /*
   6  * Intel(R) 855GM/852GM and 865G support added by David Dawes
   7  * <dawes@tungstengraphics.com>.
   8  *
   9  * Intel(R) 915G support added by Alan Hourihane
  10  * <alanh@tungstengraphics.com>.
  11  */
  12
  13 #include <linux/module.h>
  14 #include <linux/pci.h>
  15 #include <linux/init.h>
  16 #include <linux/pagemap.h>
  17 #include <linux/agp_backend.h>
  18 #include "agp.h"
  19
  20 /* Intel 815 register */
  21 #define INTEL_815_APCONT        0x51
  22 #define INTEL_815_ATTBASE_MASK  ~0x1FFFFFFF
  23
  24 /* Intel i820 registers */
  25 #define INTEL_I820_RDCR         0x51
  26 #define INTEL_I820_ERRSTS       0xc8
  27
  28 /* Intel i840 registers */
  29 #define INTEL_I840_MCHCFG       0x50
  30 #define INTEL_I840_ERRSTS       0xc8
  31
  32 /* Intel i850 registers */
  33 #define INTEL_I850_MCHCFG       0x50
  34 #define INTEL_I850_ERRSTS       0xc8
  35
  36 /* intel 915G registers */
  37 #define I915_GMADDR     0x18
  38 #define I915_MMADDR     0x10
  39 #define I915_PTEADDR    0x1C
  40 #define I915_GMCH_GMS_STOLEN_48M        (0x6 << 4)
  41 #define I915_GMCH_GMS_STOLEN_64M        (0x7 << 4)
  42
  43
  44 /* Intel 7505 registers */
  45 #define INTEL_I7505_APSIZE      0x74
  46 #define INTEL_I7505_NCAPID      0x60
  47 #define INTEL_I7505_NISTAT      0x6c
  48 #define INTEL_I7505_ATTBASE     0x78
  49 #define INTEL_I7505_ERRSTS      0x42
  50 #define INTEL_I7505_AGPCTRL     0x70
  51 #define INTEL_I7505_MCHCFG      0x50
  52
  53 static struct aper_size_info_fixed intel_i810_sizes[] =
  54 {
  55         {64, 16384, 4},
  56         /* The 32M mode still requires a 64k gatt */
  57         {32, 8192, 4}
  58 };
  59
  60 #define AGP_DCACHE_MEMORY       1
  61 #define AGP_PHYS_MEMORY         2
  62
  63 static struct gatt_mask intel_i810_masks[] =
  64 {
  65         {.mask = I810_PTE_VALID, .type = 0},
  66         {.mask = (I810_PTE_VALID | I810_PTE_LOCAL), .type = AGP_DCACHE_MEMORY},
  67         {.mask = I810_PTE_VALID, .type = 0}
  68 };
  69
  70 static struct _intel_i810_private {
  71         struct pci_dev *i810_dev;       /* device one */
  72         volatile u8 *registers;
  73         int num_dcache_entries;
  74 } intel_i810_private;
  75
  76 static int intel_i810_fetch_size(void)
  77 {
  78         u32 smram_miscc;
  79         struct aper_size_info_fixed *values;
  80
  81         pci_read_config_dword(agp_bridge->dev, I810_SMRAM_MISCC, &smram_miscc);
  82         values = A_SIZE_FIX(agp_bridge->driver->aperture_sizes);
  83
  84         if ((smram_miscc & I810_GMS) == I810_GMS_DISABLE) {
  85                 printk(KERN_WARNING PFX "i810 is disabled\n");
  86                 return 0;
  87         }
  88         if ((smram_miscc & I810_GFX_MEM_WIN_SIZE) == I810_GFX_MEM_WIN_32M) {
  89                 agp_bridge->previous_size =
  90                         agp_bridge->current_size = (void *) (values + 1);
  91                 agp_bridge->aperture_size_idx = 1;
  92                 return values[1].size;
  93         } else {
  94                 agp_bridge->previous_size =
  95                         agp_bridge->current_size = (void *) (values);
  96                 agp_bridge->aperture_size_idx = 0;
  97                 return values[0].size;
  98         }
  99
 100         return 0;
 101 }
 102
 103 static int intel_i810_configure(void)
 104 {
 105         struct aper_size_info_fixed *current_size;
 106         u32 temp;
 107         int i;
 108
 109         current_size = A_SIZE_FIX(agp_bridge->current_size);
 110
 111         pci_read_config_dword(intel_i810_private.i810_dev, I810_MMADDR, &temp);
 112         temp &= 0xfff80000;
 113
 114         intel_i810_private.registers = (volatile u8 *) ioremap(temp, 128 * 4096);
 115         if (!intel_i810_private.registers) {
 116                 printk(KERN_ERR PFX "Unable to remap memory.\n");
 117                 return -ENOMEM;
 118         }
 119
 120         if ((INREG32(intel_i810_private.registers, I810_DRAM_CTL)
 121                 & I810_DRAM_ROW_0) == I810_DRAM_ROW_0_SDRAM) {
 122                 /* This will need to be dynamically assigned */
 123                 printk(KERN_INFO PFX "detected 4MB dedicated video ram.\n");
 124                 intel_i810_private.num_dcache_entries = 1024;
 125         }
 126         pci_read_config_dword(intel_i810_private.i810_dev, I810_GMADDR, &temp);
 127         agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
 128         OUTREG32(intel_i810_private.registers, I810_PGETBL_CTL,
 129                  agp_bridge->gatt_bus_addr | I810_PGETBL_ENABLED);
 130         global_cache_flush();
 131
 132         if (agp_bridge->driver->needs_scratch_page) {
 133                 for (i = 0; i < current_size->num_entries; i++) {
 134                         OUTREG32(intel_i810_private.registers,
 135                                  I810_PTE_BASE + (i * 4),
 136                                  agp_bridge->scratch_page);
 137                 }
 138         }
 139         return 0;
 140 }
 141
 142 static void intel_i810_cleanup(void)
 143 {
 144         OUTREG32(intel_i810_private.registers, I810_PGETBL_CTL, 0);
 145         iounmap((void *) intel_i810_private.registers);
 146 }
 147
 148 static void intel_i810_tlbflush(struct agp_memory *mem)
 149 {
 150         return;
 151 }
 152
 153 static void intel_i810_agp_enable(u32 mode)
 154 {
 155         return;
 156 }
 157
 158 /* Exists to support ARGB cursors */
 159 static void *i8xx_alloc_pages(void)
 160 {
 161         struct page * page;
 162
 163         page = alloc_pages(GFP_KERNEL, 2);
 164         if (page == NULL) {
 165                 return 0;
 166         }
 167         if (change_page_attr(page, 4, PAGE_KERNEL_NOCACHE) < 0) {
 168                 __free_page(page);
 169                 return 0;
 170         }
 171         get_page(page);
 172         SetPageLocked(page);
 173         atomic_inc(&agp_bridge->current_memory_agp);
 174         return page_address(page);
 175 }
 176
 177 static void i8xx_destroy_pages(void *addr)
 178 {
 179         struct page *page;
 180
 181         if (addr == NULL)
 182                 return;
 183
 184         page = virt_to_page(addr);
 185         change_page_attr(page, 4, PAGE_KERNEL);
 186         put_page(page);
 187         unlock_page(page);
 188         free_pages((unsigned long)addr, 2);
 189         atomic_dec(&agp_bridge->current_memory_agp);
 190 }
 191
 192 static int intel_i810_insert_entries(struct agp_memory *mem, off_t pg_start,
 193                                 int type)
 194 {
 195         int i, j, num_entries;
 196         void *temp;
 197
 198         temp = agp_bridge->current_size;
 199         num_entries = A_SIZE_FIX(temp)->num_entries;
 200
 201         if ((pg_start + mem->page_count) > num_entries) {
 202                 return -EINVAL;
 203         }
 204         for (j = pg_start; j < (pg_start + mem->page_count); j++) {
 205                 if (!PGE_EMPTY(agp_bridge, agp_bridge->gatt_table[j]))
 206                         return -EBUSY;
 207         }
 208
 209         if (type != 0 || mem->type != 0) {
 210                 if ((type == AGP_DCACHE_MEMORY) && (mem->type == AGP_DCACHE_MEMORY)) {
 211                         /* special insert */
 212                         global_cache_flush();
 213                         for (i = pg_start; i < (pg_start + mem->page_count); i++) {
 214                                 OUTREG32(intel_i810_private.registers,
 215                                          I810_PTE_BASE + (i * 4),
 216                                          (i * 4096) | I810_PTE_LOCAL |
 217                                          I810_PTE_VALID);
 218                         }
 219                         global_cache_flush();
 220                         agp_bridge->driver->tlb_flush(mem);
 221                         return 0;
 222                 }
 223                 if((type == AGP_PHYS_MEMORY) && (mem->type == AGP_PHYS_MEMORY))
 224                         goto insert;
 225                 return -EINVAL;
 226         }
 227
 228 insert:
 229         global_cache_flush();
 230         for (i = 0, j = pg_start; i < mem->page_count; i++, j++) {
 231                 OUTREG32(intel_i810_private.registers,
 232                         I810_PTE_BASE + (j * 4),
 233                         agp_bridge->driver->mask_memory(mem->memory[i], mem->type));
 234         }
 235         global_cache_flush();
 236
 237         agp_bridge->driver->tlb_flush(mem);
 238         return 0;
 239 }
 240
 241 static int intel_i810_remove_entries(struct agp_memory *mem, off_t pg_start,
 242                                 int type)
 243 {
 244         int i;
 245
 246         for (i = pg_start; i < (mem->page_count + pg_start); i++) {
 247                 OUTREG32(intel_i810_private.registers,
 248                          I810_PTE_BASE + (i * 4),
 249                          agp_bridge->scratch_page);
 250         }
 251
 252         global_cache_flush();
 253         agp_bridge->driver->tlb_flush(mem);
 254         return 0;
 255 }
 256
 257 /*
 258  * The i810/i830 requires a physical address to program its mouse
 259  * pointer into hardware.
 260  * However the Xserver still writes to it through the agp aperture.
 261  */
 262 static struct agp_memory *alloc_agpphysmem_i8xx(size_t pg_count, int type)
 263 {
 264         struct agp_memory *new;
 265         void *addr;
 266
 267         if (pg_count != 1 && pg_count != 4)
 268                 return NULL;
 269
 270         switch (pg_count) {
 271         case 1: addr = agp_bridge->driver->agp_alloc_page();
 272                 break;
 273         case 4:
 274                 /* kludge to get 4 physical pages for ARGB cursor */
 275                 addr = i8xx_alloc_pages();
 276                 break;
 277         default:
 278                 return NULL;
 279         }
 280
 281         if (addr == NULL)
 282                 return NULL;
 283
 284         new = agp_create_memory(pg_count);
 285         if (new == NULL)
 286                 return NULL;
 287
 288         new->memory[0] = virt_to_phys(addr);
 289         if (pg_count == 4) {
 290                 /* kludge to get 4 physical pages for ARGB cursor */
 291                 new->memory[1] = new->memory[0] + PAGE_SIZE;
 292                 new->memory[2] = new->memory[1] + PAGE_SIZE;
 293                 new->memory[3] = new->memory[2] + PAGE_SIZE;
 294         }
 295         new->page_count = pg_count;
 296         new->num_scratch_pages = pg_count;
 297         new->type = AGP_PHYS_MEMORY;
 298         new->physical = new->memory[0];
 299         return new;
 300 }
 301
 302 static struct agp_memory *intel_i810_alloc_by_type(size_t pg_count, int type)
 303 {
 304         struct agp_memory *new;
 305
 306         if (type == AGP_DCACHE_MEMORY) {
 307                 if (pg_count != intel_i810_private.num_dcache_entries)
 308                         return NULL;
 309
 310                 new = agp_create_memory(1);
 311                 if (new == NULL)
 312                         return NULL;
 313
 314                 new->type = AGP_DCACHE_MEMORY;
 315                 new->page_count = pg_count;
 316                 new->num_scratch_pages = 0;
 317                 vfree(new->memory);
 318                 return new;
 319         }
 320         if (type == AGP_PHYS_MEMORY)
 321                 return(alloc_agpphysmem_i8xx(pg_count, type));
 322
 323         return NULL;
 324 }
 325
 326 static void intel_i810_free_by_type(struct agp_memory *curr)
 327 {
 328         agp_free_key(curr->key);
 329         if(curr->type == AGP_PHYS_MEMORY) {
 330                 if (curr->page_count == 4)
 331                         i8xx_destroy_pages(phys_to_virt(curr->memory[0]));
 332                 else
 333                         agp_bridge->driver->agp_destroy_page(
 334                                  phys_to_virt(curr->memory[0]));
 335                 vfree(curr->memory);
 336         }
 337         kfree(curr);
 338 }
 339
 340 static unsigned long intel_i810_mask_memory(unsigned long addr, int type)
 341 {
 342         /* Type checking must be done elsewhere */
 343         return addr | agp_bridge->driver->masks[type].mask;
 344 }
 345
 346 static struct aper_size_info_fixed intel_i830_sizes[] =
 347 {
 348         {128, 32768, 5},
 349         /* The 64M mode still requires a 128k gatt */
 350         {64, 16384, 5},
 351         {256, 65536, 6},
 352 };
 353
 354 static struct _intel_i830_private {
 355         struct pci_dev *i830_dev;               /* device one */
 356         volatile u8 *registers;
 357         volatile u32 *gtt;              /* I915G */
 358         int gtt_entries;
 359 } intel_i830_private;
 360
 361 static void intel_i830_init_gtt_entries(void)
 362 {
 363         u16 gmch_ctrl;
 364         int gtt_entries;
 365         u8 rdct;
 366         int local = 0;
 367         static const int ddt[4] = { 0, 16, 32, 64 };
 368         int size;
 369
 370         pci_read_config_word(agp_bridge->dev,I830_GMCH_CTRL,&gmch_ctrl);
 371
 372         /* We obtain the size of the GTT, which is also stored (for some
 373          * reason) at the top of stolen memory. Then we add 4KB to that
 374          * for the video BIOS popup, which is also stored in there. */
 375         size = agp_bridge->driver->fetch_size() + 4;
 376
 377         if (agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82830_HB ||
 378             agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82845G_HB) {
 379                 switch (gmch_ctrl & I830_GMCH_GMS_MASK) {
 380                 case I830_GMCH_GMS_STOLEN_512:
 381                         gtt_entries = KB(512) - KB(size);
 382                         break;
 383                 case I830_GMCH_GMS_STOLEN_1024:
 384                         gtt_entries = MB(1) - KB(size);
 385                         break;
 386                 case I830_GMCH_GMS_STOLEN_8192:
 387                         gtt_entries = MB(8) - KB(size);
 388                         break;
 389                 case I830_GMCH_GMS_LOCAL:
 390                         rdct = INREG8(intel_i830_private.registers,
 391                                       I830_RDRAM_CHANNEL_TYPE);
 392                         gtt_entries = (I830_RDRAM_ND(rdct) + 1) *
 393                                         MB(ddt[I830_RDRAM_DDT(rdct)]);
 394                         local = 1;
 395                         break;
 396                 default:
 397                         gtt_entries = 0;
 398                         break;
 399                 }
 400         } else {
 401                 switch (gmch_ctrl & I830_GMCH_GMS_MASK) {
 402                 case I855_GMCH_GMS_STOLEN_1M:
 403                         gtt_entries = MB(1) - KB(size);
 404                         break;
 405                 case I855_GMCH_GMS_STOLEN_4M:
 406                         gtt_entries = MB(4) - KB(size);
 407                         break;
 408                 case I855_GMCH_GMS_STOLEN_8M:
 409                         gtt_entries = MB(8) - KB(size);
 410                         break;
 411                 case I855_GMCH_GMS_STOLEN_16M:
 412                         gtt_entries = MB(16) - KB(size);
 413                         break;
 414                 case I855_GMCH_GMS_STOLEN_32M:
 415                         gtt_entries = MB(32) - KB(size);
 416                         break;
 417                 case I915_GMCH_GMS_STOLEN_48M:
 418                         /* Check it's really I915G */
 419                         if (agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82915G_HB)
 420                                 gtt_entries = MB(48) - KB(size);
 421                         else
 422                                 gtt_entries = 0;
 423                         break;
 424                 case I915_GMCH_GMS_STOLEN_64M:
 425                         /* Check it's really I915G */
 426                         if (agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82915G_HB)
 427                                 gtt_entries = MB(64) - KB(size);
 428                         else
 429                                 gtt_entries = 0;
 430                 default:
 431                         gtt_entries = 0;
 432                         break;
 433                 }
 434         }
 435         if (gtt_entries > 0)
 436                 printk(KERN_INFO PFX "Detected %dK %s memory.\n",
 437                        gtt_entries / KB(1), local ? "local" : "stolen");
 438         else
 439                 printk(KERN_INFO PFX
 440                        "No pre-allocated video memory detected.\n");
 441         gtt_entries /= KB(4);
 442
 443         intel_i830_private.gtt_entries = gtt_entries;
 444 }
 445
 446 /* The intel i830 automatically initializes the agp aperture during POST.
 447  * Use the memory already set aside for in the GTT.
 448  */
 449 static int intel_i830_create_gatt_table(void)
 450 {
 451         int page_order;
 452         struct aper_size_info_fixed *size;
 453         int num_entries;
 454         u32 temp;
 455
 456         size = agp_bridge->current_size;
 457         page_order = size->page_order;
 458         num_entries = size->num_entries;
 459         agp_bridge->gatt_table_real = NULL;
 460
 461         pci_read_config_dword(intel_i830_private.i830_dev,I810_MMADDR,&temp);
 462         temp &= 0xfff80000;
 463
 464         intel_i830_private.registers = (volatile u8 *) ioremap(temp,128 * 4096);
 465         if (!intel_i830_private.registers)
 466                 return (-ENOMEM);
 467
 468         temp = INREG32(intel_i830_private.registers,I810_PGETBL_CTL) & 0xfffff000;
 469         global_cache_flush();
 470
 471         /* we have to call this as early as possible after the MMIO base address is known */
 472         intel_i830_init_gtt_entries();
 473
 474         agp_bridge->gatt_table = NULL;
 475
 476         agp_bridge->gatt_bus_addr = temp;
 477
 478         return(0);
 479 }
 480
 481 /* Return the gatt table to a sane state. Use the top of stolen
 482  * memory for the GTT.
 483  */
 484 static int intel_i830_free_gatt_table(void)
 485 {
 486         return(0);
 487 }
 488
 489 static int intel_i830_fetch_size(void)
 490 {
 491         u16 gmch_ctrl;
 492         struct aper_size_info_fixed *values;
 493
 494         values = A_SIZE_FIX(agp_bridge->driver->aperture_sizes);
 495
 496         if (agp_bridge->dev->device != PCI_DEVICE_ID_INTEL_82830_HB &&
 497             agp_bridge->dev->device != PCI_DEVICE_ID_INTEL_82845G_HB) {
 498                 /* 855GM/852GM/865G has 128MB aperture size */
 499                 agp_bridge->previous_size = agp_bridge->current_size = (void *) values;
 500                 agp_bridge->aperture_size_idx = 0;
 501                 return(values[0].size);
 502         }
 503
 504         pci_read_config_word(agp_bridge->dev,I830_GMCH_CTRL,&gmch_ctrl);
 505
 506         if ((gmch_ctrl & I830_GMCH_MEM_MASK) == I830_GMCH_MEM_128M) {
 507                 agp_bridge->previous_size = agp_bridge->current_size = (void *) values;
 508                 agp_bridge->aperture_size_idx = 0;
 509                 return(values[0].size);
 510         } else {
 511                 agp_bridge->previous_size = agp_bridge->current_size = (void *) (values + 1);
 512                 agp_bridge->aperture_size_idx = 1;
 513                 return(values[1].size);
 514         }
 515
 516         return(0);
 517 }
 518
 519 static int intel_i830_configure(void)
 520 {
 521         struct aper_size_info_fixed *current_size;
 522         u32 temp;
 523         u16 gmch_ctrl;
 524         int i;
 525
 526         current_size = A_SIZE_FIX(agp_bridge->current_size);
 527
 528         pci_read_config_dword(intel_i830_private.i830_dev,I810_GMADDR,&temp);
 529         agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
 530
 531         pci_read_config_word(agp_bridge->dev,I830_GMCH_CTRL,&gmch_ctrl);
 532         gmch_ctrl |= I830_GMCH_ENABLED;
 533         pci_write_config_word(agp_bridge->dev,I830_GMCH_CTRL,gmch_ctrl);
 534
 535         OUTREG32(intel_i830_private.registers,I810_PGETBL_CTL,agp_bridge->gatt_bus_addr | I810_PGETBL_ENABLED);
 536         global_cache_flush();
 537
 538         if (agp_bridge->driver->needs_scratch_page)
 539                 for (i = intel_i830_private.gtt_entries; i < current_size->num_entries; i++)
 540                         OUTREG32(intel_i830_private.registers,I810_PTE_BASE + (i * 4),agp_bridge->scratch_page);
 541
 542         return (0);
 543 }
 544
 545 static void intel_i830_cleanup(void)
 546 {
 547         iounmap((void *) intel_i830_private.registers);
 548 }
 549
 550 static int intel_i830_insert_entries(struct agp_memory *mem,off_t pg_start,
 551                                 int type)
 552 {
 553         int i,j,num_entries;
 554         void *temp;
 555
 556         temp = agp_bridge->current_size;
 557         num_entries = A_SIZE_FIX(temp)->num_entries;
 558
 559         if (pg_start < intel_i830_private.gtt_entries) {
 560                 printk (KERN_DEBUG PFX "pg_start == 0x%.8lx,intel_i830_private.gtt_entries == 0x%.8x\n",
 561                                 pg_start,intel_i830_private.gtt_entries);
 562
 563                 printk (KERN_INFO PFX "Trying to insert into local/stolen memory\n");
 564                 return (-EINVAL);
 565         }
 566
 567         if ((pg_start + mem->page_count) > num_entries)
 568                 return (-EINVAL);
 569
 570         /* The i830 can't check the GTT for entries since its read only,
 571          * depend on the caller to make the correct offset decisions.
 572          */
 573
 574         if ((type != 0 && type != AGP_PHYS_MEMORY) ||
 575                 (mem->type != 0 && mem->type != AGP_PHYS_MEMORY))
 576                 return (-EINVAL);
 577
 578         global_cache_flush();
 579
 580         for (i = 0, j = pg_start; i < mem->page_count; i++, j++)
 581                 OUTREG32(intel_i830_private.registers,I810_PTE_BASE + (j * 4),
 582                         agp_bridge->driver->mask_memory(mem->memory[i], mem->type));
 583
 584         global_cache_flush();
 585
 586         agp_bridge->driver->tlb_flush(mem);
 587
 588         return(0);
 589 }
 590
 591 static int intel_i830_remove_entries(struct agp_memory *mem,off_t pg_start,
 592                                 int type)
 593 {
 594         int i;
 595
 596         global_cache_flush();
 597
 598         if (pg_start < intel_i830_private.gtt_entries) {
 599                 printk (KERN_INFO PFX "Trying to disable local/stolen memory\n");
 600                 return (-EINVAL);
 601         }
 602
 603         for (i = pg_start; i < (mem->page_count + pg_start); i++)
 604                 OUTREG32(intel_i830_private.registers,I810_PTE_BASE + (i * 4),agp_bridge->scratch_page);
 605
 606         global_cache_flush();
 607
 608         agp_bridge->driver->tlb_flush(mem);
 609
 610         return (0);
 611 }
 612
 613 static struct agp_memory *intel_i830_alloc_by_type(size_t pg_count,int type)
 614 {
 615         if (type == AGP_PHYS_MEMORY)
 616                 return(alloc_agpphysmem_i8xx(pg_count, type));
 617
 618         /* always return NULL for other allocation types for now */
 619         return(NULL);
 620 }
 621
 622 static int intel_i915_configure(void)
 623 {
 624         struct aper_size_info_fixed *current_size;
 625         u32 temp;
 626         u16 gmch_ctrl;
 627         int i;
 628
 629         current_size = A_SIZE_FIX(agp_bridge->current_size);
 630
 631         pci_read_config_dword(intel_i830_private.i830_dev, I915_GMADDR, &temp);
 632
 633         agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
 634
 635         pci_read_config_word(agp_bridge->dev,I830_GMCH_CTRL,&gmch_ctrl);
 636         gmch_ctrl |= I830_GMCH_ENABLED;
 637         pci_write_config_word(agp_bridge->dev,I830_GMCH_CTRL,gmch_ctrl);
 638
 639         OUTREG32(intel_i830_private.registers,I810_PGETBL_CTL,agp_bridge->gatt_bus_addr | I810_PGETBL_ENABLED);
 640         global_cache_flush();
 641
 642         if (agp_bridge->driver->needs_scratch_page) {
 643                 for (i = intel_i830_private.gtt_entries; i < current_size->num_entries; i++)
 644                         OUTREG32(intel_i830_private.gtt, i, agp_bridge->scratch_page);
 645         }
 646
 647         return (0);
 648 }
 649
 650 static void intel_i915_cleanup(void)
 651 {
 652         iounmap((void *) intel_i830_private.gtt);
 653         iounmap((void *) intel_i830_private.registers);
 654 }
 655
 656 static int intel_i915_insert_entries(struct agp_memory *mem,off_t pg_start,
 657                                 int type)
 658 {
 659         int i,j,num_entries;
 660         void *temp;
 661
 662         temp = agp_bridge->current_size;
 663         num_entries = A_SIZE_FIX(temp)->num_entries;
 664
 665         if (pg_start < intel_i830_private.gtt_entries) {
 666                 printk (KERN_DEBUG PFX "pg_start == 0x%.8lx,intel_i830_private.gtt_entries == 0x%.8x\n",
 667                                 pg_start,intel_i830_private.gtt_entries);
 668
 669                 printk (KERN_INFO PFX "Trying to insert into local/stolen memory\n");
 670                 return (-EINVAL);
 671         }
 672
 673         if ((pg_start + mem->page_count) > num_entries)
 674                 return (-EINVAL);
 675
 676         /* The i830 can't check the GTT for entries since its read only,
 677          * depend on the caller to make the correct offset decisions.
 678          */
 679
 680         if ((type != 0 && type != AGP_PHYS_MEMORY) ||
 681                 (mem->type != 0 && mem->type != AGP_PHYS_MEMORY))
 682                 return (-EINVAL);
 683
 684         global_cache_flush();
 685
 686         for (i = 0, j = pg_start; i < mem->page_count; i++, j++)
 687                 OUTREG32(intel_i830_private.gtt, j, agp_bridge->driver->mask_memory(mem->memory[i], mem->type));
 688
 689         global_cache_flush();
 690
 691         agp_bridge->driver->tlb_flush(mem);
 692
 693         return(0);
 694 }
 695
 696 static int intel_i915_remove_entries(struct agp_memory *mem,off_t pg_start,
 697                                 int type)
 698 {
 699         int i;
 700
 701         global_cache_flush();
 702
 703         if (pg_start < intel_i830_private.gtt_entries) {
 704                 printk (KERN_INFO PFX "Trying to disable local/stolen memory\n");
 705                 return (-EINVAL);
 706         }
 707
 708         for (i = pg_start; i < (mem->page_count + pg_start); i++)
 709                 OUTREG32(intel_i830_private.gtt, i, agp_bridge->scratch_page);
 710
 711         global_cache_flush();
 712
 713         agp_bridge->driver->tlb_flush(mem);
 714
 715         return (0);
 716 }
 717
 718 static int intel_i915_fetch_size(void)
 719 {
 720         struct aper_size_info_fixed *values;
 721         u32 temp, offset = 0;
 722
 723 #define I915_256MB_ADDRESS_MASK (1<<27)
 724
 725         values = A_SIZE_FIX(agp_bridge->driver->aperture_sizes);
 726
 727         pci_read_config_dword(intel_i830_private.i830_dev, I915_GMADDR, &temp);
 728         if (temp & I915_256MB_ADDRESS_MASK)
 729                 offset = 0;     /* 128MB aperture */
 730         else
 731                 offset = 2;     /* 256MB aperture */
 732         agp_bridge->previous_size = agp_bridge->current_size = (void *)(values + offset);
 733         return(values[offset].size);
 734 }
 735
 736 /* The intel i915 automatically initializes the agp aperture during POST.
 737  * Use the memory already set aside for in the GTT.
 738  */
 739 static int intel_i915_create_gatt_table(void)
 740 {
 741         int page_order;
 742         struct aper_size_info_fixed *size;
 743         int num_entries;
 744         u32 temp, temp2;
 745
 746         size = agp_bridge->current_size;
 747         page_order = size->page_order;
 748         num_entries = size->num_entries;
 749         agp_bridge->gatt_table_real = 0;
 750
 751         pci_read_config_dword(intel_i830_private.i830_dev, I915_MMADDR, &temp);
 752         pci_read_config_dword(intel_i830_private.i830_dev, I915_PTEADDR,&temp2);
 753
 754         intel_i830_private.gtt = (volatile u32 *) ioremap(temp2, 256 * 1024);
 755         if (!intel_i830_private.gtt)
 756                 return (-ENOMEM);
 757
 758         temp &= 0xfff80000;
 759
 760         intel_i830_private.registers = (volatile u8 *) ioremap(temp,128 * 4096);
 761         if (!intel_i830_private.registers)
 762                 return (-ENOMEM);
 763
 764         temp = INREG32(intel_i830_private.registers,I810_PGETBL_CTL) & 0xfffff000;
 765         global_cache_flush();
 766
 767         /* we have to call this as early as possible after the MMIO base address is known */
 768         intel_i830_init_gtt_entries();
 769
 770         agp_bridge->gatt_table = NULL;
 771
 772         agp_bridge->gatt_bus_addr = temp;
 773
 774         return(0);
 775 }
 776
 777 static int intel_fetch_size(void)
 778 {
 779         int i;
 780         u16 temp;
 781         struct aper_size_info_16 *values;
 782
 783         pci_read_config_word(agp_bridge->dev, INTEL_APSIZE, &temp);
 784         values = A_SIZE_16(agp_bridge->driver->aperture_sizes);
 785
 786         for (i = 0; i < agp_bridge->driver->num_aperture_sizes; i++) {
 787                 if (temp == values[i].size_value) {
 788                         agp_bridge->previous_size = agp_bridge->current_size = (void *) (values + i);
 789                         agp_bridge->aperture_size_idx = i;
 790                         return values[i].size;
 791                 }
 792         }
 793
 794         return 0;
 795 }
 796
 797 static int __intel_8xx_fetch_size(u8 temp)
 798 {
 799         int i;
 800         struct aper_size_info_8 *values;
 801
 802         values = A_SIZE_8(agp_bridge->driver->aperture_sizes);
 803
 804         for (i = 0; i < agp_bridge->driver->num_aperture_sizes; i++) {
 805                 if (temp == values[i].size_value) {
 806                         agp_bridge->previous_size =
 807                                 agp_bridge->current_size = (void *) (values + i);
 808                         agp_bridge->aperture_size_idx = i;
 809                         return values[i].size;
 810                 }
 811         }
 812         return 0;
 813 }
 814
 815 static int intel_8xx_fetch_size(void)
 816 {
 817         u8 temp;
 818
 819         pci_read_config_byte(agp_bridge->dev, INTEL_APSIZE, &temp);
 820         return __intel_8xx_fetch_size(temp);
 821 }
 822
 823 static int intel_815_fetch_size(void)
 824 {
 825         u8 temp;
 826
 827         /* Intel 815 chipsets have a _weird_ APSIZE register with only
 828          * one non-reserved bit, so mask the others out ... */
 829         pci_read_config_byte(agp_bridge->dev, INTEL_APSIZE, &temp);
 830         temp &= (1 << 3);
 831
 832         return __intel_8xx_fetch_size(temp);
 833 }
 834
 835 static void intel_tlbflush(struct agp_memory *mem)
 836 {
 837         pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, 0x2200);
 838         pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, 0x2280);
 839 }
 840
 841
 842 static void intel_8xx_tlbflush(struct agp_memory *mem)
 843 {
 844         u32 temp;
 845         pci_read_config_dword(agp_bridge->dev, INTEL_AGPCTRL, &temp);
 846         pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, temp & ~(1 << 7));
 847         pci_read_config_dword(agp_bridge->dev, INTEL_AGPCTRL, &temp);
 848         pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, temp | (1 << 7));
 849 }
 850
 851
 852 static void intel_cleanup(void)
 853 {
 854         u16 temp;
 855         struct aper_size_info_16 *previous_size;
 856
 857         previous_size = A_SIZE_16(agp_bridge->previous_size);
 858         pci_read_config_word(agp_bridge->dev, INTEL_NBXCFG, &temp);
 859         pci_write_config_word(agp_bridge->dev, INTEL_NBXCFG, temp & ~(1 << 9));
 860         pci_write_config_word(agp_bridge->dev, INTEL_APSIZE, previous_size->size_value);
 861 }
 862
 863
 864 static void intel_8xx_cleanup(void)
 865 {
 866         u16 temp;
 867         struct aper_size_info_8 *previous_size;
 868
 869         previous_size = A_SIZE_8(agp_bridge->previous_size);
 870         pci_read_config_word(agp_bridge->dev, INTEL_NBXCFG, &temp);
 871         pci_write_config_word(agp_bridge->dev, INTEL_NBXCFG, temp & ~(1 << 9));
 872         pci_write_config_byte(agp_bridge->dev, INTEL_APSIZE, previous_size->size_value);
 873 }
 874
 875
 876 static int intel_configure(void)
 877 {
 878         u32 temp;
 879         u16 temp2;
 880         struct aper_size_info_16 *current_size;
 881
 882         current_size = A_SIZE_16(agp_bridge->current_size);
 883
 884         /* aperture size */
 885         pci_write_config_word(agp_bridge->dev, INTEL_APSIZE, current_size->size_value);
 886
 887         /* address to map to */
 888         pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
 889         agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
 890
 891         /* attbase - aperture base */
 892         pci_write_config_dword(agp_bridge->dev, INTEL_ATTBASE, agp_bridge->gatt_bus_addr);
 893
 894         /* agpctrl */
 895         pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, 0x2280);
 896
 897         /* paccfg/nbxcfg */
 898         pci_read_config_word(agp_bridge->dev, INTEL_NBXCFG, &temp2);
 899         pci_write_config_word(agp_bridge->dev, INTEL_NBXCFG,
 900                         (temp2 & ~(1 << 10)) | (1 << 9));
 901         /* clear any possible error conditions */
 902         pci_write_config_byte(agp_bridge->dev, INTEL_ERRSTS + 1, 7);
 903         return 0;
 904 }
 905
 906 static int intel_815_configure(void)
 907 {
 908         u32 temp, addr;
 909         u8 temp2;
 910         struct aper_size_info_8 *current_size;
 911
 912         /* attbase - aperture base */
 913         /* the Intel 815 chipset spec. says that bits 29-31 in the
 914         * ATTBASE register are reserved -> try not to write them */
 915         if (agp_bridge->gatt_bus_addr & INTEL_815_ATTBASE_MASK) {
 916                 printk (KERN_EMERG PFX "gatt bus addr too high");
 917                 return -EINVAL;
 918         }
 919
 920         current_size = A_SIZE_8(agp_bridge->current_size);
 921
 922         /* aperture size */
 923         pci_write_config_byte(agp_bridge->dev, INTEL_APSIZE,
 924                         current_size->size_value);
 925
 926         /* address to map to */
 927         pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
 928         agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
 929
 930         pci_read_config_dword(agp_bridge->dev, INTEL_ATTBASE, &addr);
 931         addr &= INTEL_815_ATTBASE_MASK;
 932         addr |= agp_bridge->gatt_bus_addr;
 933         pci_write_config_dword(agp_bridge->dev, INTEL_ATTBASE, addr);
 934
 935         /* agpctrl */
 936         pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, 0x0000);
 937
 938         /* apcont */
 939         pci_read_config_byte(agp_bridge->dev, INTEL_815_APCONT, &temp2);
 940         pci_write_config_byte(agp_bridge->dev, INTEL_815_APCONT, temp2 | (1 << 1));
 941
 942         /* clear any possible error conditions */
 943         /* Oddness : this chipset seems to have no ERRSTS register ! */
 944         return 0;
 945 }
 946
 947 static void intel_820_tlbflush(struct agp_memory *mem)
 948 {
 949         return;
 950 }
 951
 952 static void intel_820_cleanup(void)
 953 {
 954         u8 temp;
 955         struct aper_size_info_8 *previous_size;
 956
 957         previous_size = A_SIZE_8(agp_bridge->previous_size);
 958         pci_read_config_byte(agp_bridge->dev, INTEL_I820_RDCR, &temp);
 959         pci_write_config_byte(agp_bridge->dev, INTEL_I820_RDCR,
 960                         temp & ~(1 << 1));
 961         pci_write_config_byte(agp_bridge->dev, INTEL_APSIZE,
 962                         previous_size->size_value);
 963 }
 964
 965
 966 static int intel_820_configure(void)
 967 {
 968         u32 temp;
 969         u8 temp2;
 970         struct aper_size_info_8 *current_size;
 971
 972         current_size = A_SIZE_8(agp_bridge->current_size);
 973
 974         /* aperture size */
 975         pci_write_config_byte(agp_bridge->dev, INTEL_APSIZE, current_size->size_value);
 976
 977         /* address to map to */
 978         pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
 979         agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
 980
 981         /* attbase - aperture base */
 982         pci_write_config_dword(agp_bridge->dev, INTEL_ATTBASE, agp_bridge->gatt_bus_addr);
 983
 984         /* agpctrl */
 985         pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, 0x0000);
 986
 987         /* global enable aperture access */
 988         /* This flag is not accessed through MCHCFG register as in */
 989         /* i850 chipset. */
 990         pci_read_config_byte(agp_bridge->dev, INTEL_I820_RDCR, &temp2);
 991         pci_write_config_byte(agp_bridge->dev, INTEL_I820_RDCR, temp2 | (1 << 1));
 992         /* clear any possible AGP-related error conditions */
 993         pci_write_config_word(agp_bridge->dev, INTEL_I820_ERRSTS, 0x001c);
 994         return 0;
 995 }
 996
 997 static int intel_840_configure(void)
 998 {
 999         u32 temp;
1000         u16 temp2;
1001         struct aper_size_info_8 *current_size;
1002
1003         current_size = A_SIZE_8(agp_bridge->current_size);
1004
1005         /* aperture size */
1006         pci_write_config_byte(agp_bridge->dev, INTEL_APSIZE, current_size->size_value);
1007
1008         /* address to map to */
1009         pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
1010         agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
1011
1012         /* attbase - aperture base */
1013         pci_write_config_dword(agp_bridge->dev, INTEL_ATTBASE, agp_bridge->gatt_bus_addr);
1014
1015         /* agpctrl */
1016         pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, 0x0000);
1017
1018         /* mcgcfg */
1019         pci_read_config_word(agp_bridge->dev, INTEL_I840_MCHCFG, &temp2);
1020         pci_write_config_word(agp_bridge->dev, INTEL_I840_MCHCFG, temp2 | (1 << 9));
1021         /* clear any possible error conditions */
1022         pci_write_config_word(agp_bridge->dev, INTEL_I840_ERRSTS, 0xc000);
1023         return 0;
1024 }
1025
1026 static int intel_845_configure(void)
1027 {
1028         u32 temp;
1029         u8 temp2;
1030         struct aper_size_info_8 *current_size;
1031
1032         current_size = A_SIZE_8(agp_bridge->current_size);
1033
1034         /* aperture size */
1035         pci_write_config_byte(agp_bridge->dev, INTEL_APSIZE, current_size->size_value);
1036
1037         /* address to map to */
1038         pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
1039         agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
1040
1041         /* attbase - aperture base */
1042         pci_write_config_dword(agp_bridge->dev, INTEL_ATTBASE, agp_bridge->gatt_bus_addr);
1043
1044         /* agpctrl */
1045         pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, 0x0000);
1046
1047         /* agpm */
1048         pci_read_config_byte(agp_bridge->dev, INTEL_I845_AGPM, &temp2);
1049         pci_write_config_byte(agp_bridge->dev, INTEL_I845_AGPM, temp2 | (1 << 1));
1050         /* clear any possible error conditions */
1051         pci_write_config_word(agp_bridge->dev, INTEL_I845_ERRSTS, 0x001c);
1052         return 0;
1053 }
1054
1055 static int intel_850_configure(void)
1056 {
1057         u32 temp;
1058         u16 temp2;
1059         struct aper_size_info_8 *current_size;
1060
1061         current_size = A_SIZE_8(agp_bridge->current_size);
1062
1063         /* aperture size */
1064         pci_write_config_byte(agp_bridge->dev, INTEL_APSIZE, current_size->size_value);
1065
1066         /* address to map to */
1067         pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
1068         agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
1069
1070         /* attbase - aperture base */
1071         pci_write_config_dword(agp_bridge->dev, INTEL_ATTBASE, agp_bridge->gatt_bus_addr);
1072
1073         /* agpctrl */
1074         pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, 0x0000);
1075
1076         /* mcgcfg */
1077         pci_read_config_word(agp_bridge->dev, INTEL_I850_MCHCFG, &temp2);
1078         pci_write_config_word(agp_bridge->dev, INTEL_I850_MCHCFG, temp2 | (1 << 9));
1079         /* clear any possible AGP-related error conditions */
1080         pci_write_config_word(agp_bridge->dev, INTEL_I850_ERRSTS, 0x001c);
1081         return 0;
1082 }
1083
1084 static int intel_860_configure(void)
1085 {
1086         u32 temp;
1087         u16 temp2;
1088         struct aper_size_info_8 *current_size;
1089
1090         current_size = A_SIZE_8(agp_bridge->current_size);
1091
1092         /* aperture size */
1093         pci_write_config_byte(agp_bridge->dev, INTEL_APSIZE, current_size->size_value);
1094
1095         /* address to map to */
1096         pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
1097         agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
1098
1099         /* attbase - aperture base */
1100         pci_write_config_dword(agp_bridge->dev, INTEL_ATTBASE, agp_bridge->gatt_bus_addr);
1101
1102         /* agpctrl */
1103         pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, 0x0000);
1104
1105         /* mcgcfg */
1106         pci_read_config_word(agp_bridge->dev, INTEL_I860_MCHCFG, &temp2);
1107         pci_write_config_word(agp_bridge->dev, INTEL_I860_MCHCFG, temp2 | (1 << 9));
1108         /* clear any possible AGP-related error conditions */
1109         pci_write_config_word(agp_bridge->dev, INTEL_I860_ERRSTS, 0xf700);
1110         return 0;
1111 }
1112
1113 static int intel_830mp_configure(void)
1114 {
1115         u32 temp;
1116         u16 temp2;
1117         struct aper_size_info_8 *current_size;
1118
1119         current_size = A_SIZE_8(agp_bridge->current_size);
1120
1121         /* aperture size */
1122         pci_write_config_byte(agp_bridge->dev, INTEL_APSIZE, current_size->size_value);
1123
1124         /* address to map to */
1125         pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
1126         agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
1127
1128         /* attbase - aperture base */
1129         pci_write_config_dword(agp_bridge->dev, INTEL_ATTBASE, agp_bridge->gatt_bus_addr);
1130
1131         /* agpctrl */
1132         pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, 0x0000);
1133
1134         /* gmch */
1135         pci_read_config_word(agp_bridge->dev, INTEL_NBXCFG, &temp2);
1136         pci_write_config_word(agp_bridge->dev, INTEL_NBXCFG, temp2 | (1 << 9));
1137         /* clear any possible AGP-related error conditions */
1138         pci_write_config_word(agp_bridge->dev, INTEL_I830_ERRSTS, 0x1c);
1139         return 0;
1140 }
1141
1142 static int intel_7505_configure(void)
1143 {
1144         u32 temp;
1145         u16 temp2;
1146         struct aper_size_info_8 *current_size;
1147
1148         current_size = A_SIZE_8(agp_bridge->current_size);
1149
1150         /* aperture size */
1151         pci_write_config_byte(agp_bridge->dev, INTEL_APSIZE, current_size->size_value);
1152
1153         /* address to map to */
1154         pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
1155         agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
1156
1157         /* attbase - aperture base */
1158         pci_write_config_dword(agp_bridge->dev, INTEL_ATTBASE, agp_bridge->gatt_bus_addr);
1159
1160         /* agpctrl */
1161         pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, 0x0000);
1162
1163         /* mchcfg */
1164         pci_read_config_word(agp_bridge->dev, INTEL_I7505_MCHCFG, &temp2);
1165         pci_write_config_word(agp_bridge->dev, INTEL_I7505_MCHCFG, temp2 | (1 << 9));
1166
1167         return 0;
1168 }
1169
1170 /* Setup function */
1171 static struct gatt_mask intel_generic_masks[] =
1172 {
1173         {.mask = 0x00000017, .type = 0}
1174 };
1175
1176 static struct aper_size_info_8 intel_815_sizes[2] =
1177 {
1178         {64, 16384, 4, 0},
1179         {32, 8192, 3, 8},
1180 };
1181
1182 static struct aper_size_info_8 intel_8xx_sizes[7] =
1183 {
1184         {256, 65536, 6, 0},
1185         {128, 32768, 5, 32},
1186         {64, 16384, 4, 48},
1187         {32, 8192, 3, 56},
1188         {16, 4096, 2, 60},
1189         {8, 2048, 1, 62},
1190         {4, 1024, 0, 63}
1191 };
1192
1193 static struct aper_size_info_16 intel_generic_sizes[7] =
1194 {
1195         {256, 65536, 6, 0},
1196         {128, 32768, 5, 32},
1197         {64, 16384, 4, 48},
1198         {32, 8192, 3, 56},
1199         {16, 4096, 2, 60},
1200         {8, 2048, 1, 62},
1201         {4, 1024, 0, 63}
1202 };
1203
1204 static struct aper_size_info_8 intel_830mp_sizes[4] =
1205 {
1206         {256, 65536, 6, 0},
1207         {128, 32768, 5, 32},
1208         {64, 16384, 4, 48},
1209         {32, 8192, 3, 56}
1210 };
1211
1212 static struct agp_bridge_driver intel_generic_driver = {
1213         .owner                  = THIS_MODULE,
1214         .aperture_sizes         = intel_generic_sizes,
1215         .size_type              = U16_APER_SIZE,
1216         .num_aperture_sizes     = 7,
1217         .configure              = intel_configure,
1218         .fetch_size             = intel_fetch_size,
1219         .cleanup                = intel_cleanup,
1220         .tlb_flush              = intel_tlbflush,
1221         .mask_memory            = agp_generic_mask_memory,
1222         .masks                  = intel_generic_masks,
1223         .agp_enable             = agp_generic_enable,
1224         .cache_flush            = global_cache_flush,
1225         .create_gatt_table      = agp_generic_create_gatt_table,
1226         .free_gatt_table        = agp_generic_free_gatt_table,
1227         .insert_memory          = agp_generic_insert_memory,
1228         .remove_memory          = agp_generic_remove_memory,
1229         .alloc_by_type          = agp_generic_alloc_by_type,
1230         .free_by_type           = agp_generic_free_by_type,
1231         .agp_alloc_page         = agp_generic_alloc_page,
1232         .agp_destroy_page       = agp_generic_destroy_page,
1233 };
1234
1235 static struct agp_bridge_driver intel_810_driver = {
1236         .owner                  = THIS_MODULE,
1237         .aperture_sizes         = intel_i810_sizes,
1238         .size_type              = FIXED_APER_SIZE,
1239         .num_aperture_sizes     = 2,
1240         .needs_scratch_page     = TRUE,
1241         .configure              = intel_i810_configure,
1242         .fetch_size             = intel_i810_fetch_size,
1243         .cleanup                = intel_i810_cleanup,
1244         .tlb_flush              = intel_i810_tlbflush,
1245         .mask_memory            = intel_i810_mask_memory,
1246         .masks                  = intel_i810_masks,
1247         .agp_enable             = intel_i810_agp_enable,
1248         .cache_flush            = global_cache_flush,
1249         .create_gatt_table      = agp_generic_create_gatt_table,
1250         .free_gatt_table        = agp_generic_free_gatt_table,
1251         .insert_memory          = intel_i810_insert_entries,
1252         .remove_memory          = intel_i810_remove_entries,
1253         .alloc_by_type          = intel_i810_alloc_by_type,
1254         .free_by_type           = intel_i810_free_by_type,
1255         .agp_alloc_page         = agp_generic_alloc_page,
1256         .agp_destroy_page       = agp_generic_destroy_page,
1257 };
1258
1259 static struct agp_bridge_driver intel_815_driver = {
1260         .owner                  = THIS_MODULE,
1261         .aperture_sizes         = intel_815_sizes,
1262         .size_type              = U8_APER_SIZE,
1263         .num_aperture_sizes     = 2,
1264         .configure              = intel_815_configure,
1265         .fetch_size             = intel_815_fetch_size,
1266         .cleanup                = intel_8xx_cleanup,
1267         .tlb_flush              = intel_8xx_tlbflush,
1268         .mask_memory            = agp_generic_mask_memory,
1269         .masks                  = intel_generic_masks,
1270         .agp_enable             = agp_generic_enable,
1271         .cache_flush            = global_cache_flush,
1272         .create_gatt_table      = agp_generic_create_gatt_table,
1273         .free_gatt_table        = agp_generic_free_gatt_table,
1274         .insert_memory          = agp_generic_insert_memory,
1275         .remove_memory          = agp_generic_remove_memory,
1276         .alloc_by_type          = agp_generic_alloc_by_type,
1277         .free_by_type           = agp_generic_free_by_type,
1278         .agp_alloc_page         = agp_generic_alloc_page,
1279         .agp_destroy_page       = agp_generic_destroy_page,
1280 };
1281
1282 static struct agp_bridge_driver intel_830_driver = {
1283         .owner                  = THIS_MODULE,
1284         .aperture_sizes         = intel_i830_sizes,
1285         .size_type              = FIXED_APER_SIZE,
1286         .num_aperture_sizes     = 3,
1287         .needs_scratch_page     = TRUE,
1288         .configure              = intel_i830_configure,
1289         .fetch_size             = intel_i830_fetch_size,
1290         .cleanup                = intel_i830_cleanup,
1291         .tlb_flush              = intel_i810_tlbflush,
1292         .mask_memory            = intel_i810_mask_memory,
1293         .masks                  = intel_i810_masks,
1294         .agp_enable             = intel_i810_agp_enable,
1295         .cache_flush            = global_cache_flush,
1296         .create_gatt_table      = intel_i830_create_gatt_table,
1297         .free_gatt_table        = intel_i830_free_gatt_table,
1298         .insert_memory          = intel_i830_insert_entries,
1299         .remove_memory          = intel_i830_remove_entries,
1300         .alloc_by_type          = intel_i830_alloc_by_type,
1301         .free_by_type           = intel_i810_free_by_type,
1302         .agp_alloc_page         = agp_generic_alloc_page,
1303         .agp_destroy_page       = agp_generic_destroy_page,
1304 };
1305
1306 static struct agp_bridge_driver intel_820_driver = {
1307         .owner                  = THIS_MODULE,
1308         .aperture_sizes         = intel_8xx_sizes,
1309         .size_type              = U8_APER_SIZE,
1310         .num_aperture_sizes     = 7,
1311         .configure              = intel_820_configure,
1312         .fetch_size             = intel_8xx_fetch_size,
1313         .cleanup                = intel_820_cleanup,
1314         .tlb_flush              = intel_820_tlbflush,
1315         .mask_memory            = agp_generic_mask_memory,
1316         .masks                  = intel_generic_masks,
1317         .agp_enable             = agp_generic_enable,
1318         .cache_flush            = global_cache_flush,
1319         .create_gatt_table      = agp_generic_create_gatt_table,
1320         .free_gatt_table        = agp_generic_free_gatt_table,
1321         .insert_memory          = agp_generic_insert_memory,
1322         .remove_memory          = agp_generic_remove_memory,
1323         .alloc_by_type          = agp_generic_alloc_by_type,
1324         .free_by_type           = agp_generic_free_by_type,
1325         .agp_alloc_page         = agp_generic_alloc_page,
1326         .agp_destroy_page       = agp_generic_destroy_page,
1327 };
1328
1329 static struct agp_bridge_driver intel_830mp_driver = {
1330         .owner                  = THIS_MODULE,
1331         .aperture_sizes         = intel_830mp_sizes,
1332         .size_type              = U8_APER_SIZE,
1333         .num_aperture_sizes     = 4,
1334         .configure              = intel_830mp_configure,
1335         .fetch_size             = intel_8xx_fetch_size,
1336         .cleanup                = intel_8xx_cleanup,
1337         .tlb_flush              = intel_8xx_tlbflush,
1338         .mask_memory            = agp_generic_mask_memory,
1339         .masks                  = intel_generic_masks,
1340         .agp_enable             = agp_generic_enable,
1341         .cache_flush            = global_cache_flush,
1342         .create_gatt_table      = agp_generic_create_gatt_table,
1343         .free_gatt_table        = agp_generic_free_gatt_table,
1344         .insert_memory          = agp_generic_insert_memory,
1345         .remove_memory          = agp_generic_remove_memory,
1346         .alloc_by_type          = agp_generic_alloc_by_type,
1347         .free_by_type           = agp_generic_free_by_type,
1348         .agp_alloc_page         = agp_generic_alloc_page,
1349         .agp_destroy_page       = agp_generic_destroy_page,
1350 };
1351
1352 static struct agp_bridge_driver intel_840_driver = {
1353         .owner                  = THIS_MODULE,
1354         .aperture_sizes         = intel_8xx_sizes,
1355         .size_type              = U8_APER_SIZE,
1356         .num_aperture_sizes     = 7,
1357         .configure              = intel_840_configure,
1358         .fetch_size             = intel_8xx_fetch_size,
1359         .cleanup                = intel_8xx_cleanup,
1360         .tlb_flush              = intel_8xx_tlbflush,
1361         .mask_memory            = agp_generic_mask_memory,
1362         .masks                  = intel_generic_masks,
1363         .agp_enable             = agp_generic_enable,
1364         .cache_flush            = global_cache_flush,
1365         .create_gatt_table      = agp_generic_create_gatt_table,
1366         .free_gatt_table        = agp_generic_free_gatt_table,
1367         .insert_memory          = agp_generic_insert_memory,
1368         .remove_memory          = agp_generic_remove_memory,
1369         .alloc_by_type          = agp_generic_alloc_by_type,
1370         .free_by_type           = agp_generic_free_by_type,
1371         .agp_alloc_page         = agp_generic_alloc_page,
1372         .agp_destroy_page       = agp_generic_destroy_page,
1373 };
1374
1375 static struct agp_bridge_driver intel_845_driver = {
1376         .owner                  = THIS_MODULE,
1377         .aperture_sizes         = intel_8xx_sizes,
1378         .size_type              = U8_APER_SIZE,
1379         .num_aperture_sizes     = 7,
1380         .configure              = intel_845_configure,
1381         .fetch_size             = intel_8xx_fetch_size,
1382         .cleanup                = intel_8xx_cleanup,
1383         .tlb_flush              = intel_8xx_tlbflush,
1384         .mask_memory            = agp_generic_mask_memory,
1385         .masks                  = intel_generic_masks,
1386         .agp_enable             = agp_generic_enable,
1387         .cache_flush            = global_cache_flush,
1388         .create_gatt_table      = agp_generic_create_gatt_table,
1389         .free_gatt_table        = agp_generic_free_gatt_table,
1390         .insert_memory          = agp_generic_insert_memory,
1391         .remove_memory          = agp_generic_remove_memory,
1392         .alloc_by_type          = agp_generic_alloc_by_type,
1393         .free_by_type           = agp_generic_free_by_type,
1394         .agp_alloc_page         = agp_generic_alloc_page,
1395         .agp_destroy_page       = agp_generic_destroy_page,
1396 };
1397
1398 static struct agp_bridge_driver intel_850_driver = {
1399         .owner                  = THIS_MODULE,
1400         .aperture_sizes         = intel_8xx_sizes,
1401         .size_type              = U8_APER_SIZE,
1402         .num_aperture_sizes     = 7,
1403         .configure              = intel_850_configure,
1404         .fetch_size             = intel_8xx_fetch_size,
1405         .cleanup                = intel_8xx_cleanup,
1406         .tlb_flush              = intel_8xx_tlbflush,
1407         .mask_memory            = agp_generic_mask_memory,
1408         .masks                  = intel_generic_masks,
1409         .agp_enable             = agp_generic_enable,
1410         .cache_flush            = global_cache_flush,
1411         .create_gatt_table      = agp_generic_create_gatt_table,
1412         .free_gatt_table        = agp_generic_free_gatt_table,
1413         .insert_memory          = agp_generic_insert_memory,
1414         .remove_memory          = agp_generic_remove_memory,
1415         .alloc_by_type          = agp_generic_alloc_by_type,
1416         .free_by_type           = agp_generic_free_by_type,
1417         .agp_alloc_page         = agp_generic_alloc_page,
1418         .agp_destroy_page       = agp_generic_destroy_page,
1419 };
1420
1421 static struct agp_bridge_driver intel_860_driver = {
1422         .owner                  = THIS_MODULE,
1423         .aperture_sizes         = intel_8xx_sizes,
1424         .size_type              = U8_APER_SIZE,
1425         .num_aperture_sizes     = 7,
1426         .configure              = intel_860_configure,
1427         .fetch_size             = intel_8xx_fetch_size,
1428         .cleanup                = intel_8xx_cleanup,
1429         .tlb_flush              = intel_8xx_tlbflush,
1430         .mask_memory            = agp_generic_mask_memory,
1431         .masks                  = intel_generic_masks,
1432         .agp_enable             = agp_generic_enable,
1433         .cache_flush            = global_cache_flush,
1434         .create_gatt_table      = agp_generic_create_gatt_table,
1435         .free_gatt_table        = agp_generic_free_gatt_table,
1436         .insert_memory          = agp_generic_insert_memory,
1437         .remove_memory          = agp_generic_remove_memory,
1438         .alloc_by_type          = agp_generic_alloc_by_type,
1439         .free_by_type           = agp_generic_free_by_type,
1440         .agp_alloc_page         = agp_generic_alloc_page,
1441         .agp_destroy_page       = agp_generic_destroy_page,
1442 };
1443
1444 static struct agp_bridge_driver intel_915_driver = {
1445         .owner                  = THIS_MODULE,
1446         .aperture_sizes         = intel_i830_sizes,
1447         .size_type              = FIXED_APER_SIZE,
1448         .num_aperture_sizes     = 3,
1449         .needs_scratch_page     = TRUE,
1450         .configure              = intel_i915_configure,
1451         .fetch_size             = intel_i915_fetch_size,
1452         .cleanup                = intel_i915_cleanup,
1453         .tlb_flush              = intel_i810_tlbflush,
1454         .mask_memory            = intel_i810_mask_memory,
1455         .masks                  = intel_i810_masks,
1456         .agp_enable             = intel_i810_agp_enable,
1457         .cache_flush            = global_cache_flush,
1458         .create_gatt_table      = intel_i915_create_gatt_table,
1459         .free_gatt_table        = intel_i830_free_gatt_table,
1460         .insert_memory          = intel_i915_insert_entries,
1461         .remove_memory          = intel_i915_remove_entries,
1462         .alloc_by_type          = intel_i830_alloc_by_type,
1463         .free_by_type           = intel_i810_free_by_type,
1464         .agp_alloc_page         = agp_generic_alloc_page,
1465         .agp_destroy_page       = agp_generic_destroy_page,
1466 };
1467
1468
1469 static struct agp_bridge_driver intel_7505_driver = {
1470         .owner                  = THIS_MODULE,
1471         .aperture_sizes         = intel_8xx_sizes,
1472         .size_type              = U8_APER_SIZE,
1473         .num_aperture_sizes     = 7,
1474         .configure              = intel_7505_configure,
1475         .fetch_size             = intel_8xx_fetch_size,
1476         .cleanup                = intel_8xx_cleanup,
1477         .tlb_flush              = intel_8xx_tlbflush,
1478         .mask_memory            = agp_generic_mask_memory,
1479         .masks                  = intel_generic_masks,
1480         .agp_enable             = agp_generic_enable,
1481         .cache_flush            = global_cache_flush,
1482         .create_gatt_table      = agp_generic_create_gatt_table,
1483         .free_gatt_table        = agp_generic_free_gatt_table,
1484         .insert_memory          = agp_generic_insert_memory,
1485         .remove_memory          = agp_generic_remove_memory,
1486         .alloc_by_type          = agp_generic_alloc_by_type,
1487         .free_by_type           = agp_generic_free_by_type,
1488         .agp_alloc_page         = agp_generic_alloc_page,
1489         .agp_destroy_page       = agp_generic_destroy_page,
1490 };
1491
1492 static int find_i810(u16 device, const char *name)
1493 {
1494         struct pci_dev *i810_dev;
1495
1496         i810_dev = pci_find_device(PCI_VENDOR_ID_INTEL, device, NULL);
1497         if (!i810_dev) {
1498                 printk(KERN_ERR PFX "Detected an Intel %s Chipset, "
1499                                 "but could not find the secondary device.\n",
1500                                 name);
1501                 return 0;
1502         }
1503
1504         intel_i810_private.i810_dev = i810_dev;
1505         return 1;
1506 }
1507
1508 static int find_i830(u16 device)
1509 {
1510         struct pci_dev *i830_dev;
1511
1512         i830_dev = pci_find_device(PCI_VENDOR_ID_INTEL, device, NULL);
1513         if (i830_dev && PCI_FUNC(i830_dev->devfn) != 0) {
1514                 i830_dev = pci_find_device(PCI_VENDOR_ID_INTEL,
1515                                 device, i830_dev);
1516         }
1517
1518         if (!i830_dev)
1519                 return 0;
1520
1521         intel_i830_private.i830_dev = i830_dev;
1522         return 1;
1523 }
1524
1525 static int __devinit agp_intel_probe(struct pci_dev *pdev,
1526                                      const struct pci_device_id *ent)
1527 {
1528         struct agp_bridge_data *bridge;
1529         char *name = "(unknown)";
1530         u8 cap_ptr = 0;
1531         struct resource *r;
1532
1533         cap_ptr = pci_find_capability(pdev, PCI_CAP_ID_AGP);
1534
1535         bridge = agp_alloc_bridge();
1536         if (!bridge)
1537                 return -ENOMEM;
1538
1539         switch (pdev->device) {
1540         case PCI_DEVICE_ID_INTEL_82443LX_0:
1541                 bridge->driver = &intel_generic_driver;
1542                 name = "440LX";
1543                 break;
1544         case PCI_DEVICE_ID_INTEL_82443BX_0:
1545                 bridge->driver = &intel_generic_driver;
1546                 name = "440BX";
1547                 break;
1548         case PCI_DEVICE_ID_INTEL_82443GX_0:
1549                 bridge->driver = &intel_generic_driver;
1550                 name = "440GX";
1551                 break;
1552         case PCI_DEVICE_ID_INTEL_82810_MC1:
1553                 if (!find_i810(PCI_DEVICE_ID_INTEL_82810_IG1, "i810"))
1554                         goto fail;
1555                 bridge->driver = &intel_810_driver;
1556                 name = "i810";
1557                 break;
1558         case PCI_DEVICE_ID_INTEL_82810_MC3:
1559                 if (!find_i810(PCI_DEVICE_ID_INTEL_82810_IG3, "i810 DC100"))
1560                         goto fail;
1561                 bridge->driver = &intel_810_driver;
1562                 name = "i810 DC100";
1563                 break;
1564         case PCI_DEVICE_ID_INTEL_82810E_MC:
1565                 if (!find_i810(PCI_DEVICE_ID_INTEL_82810E_IG, "i810 E"))
1566                         goto fail;
1567                 bridge->driver = &intel_810_driver;
1568                 name = "i810 E";
1569                 break;
1570          case PCI_DEVICE_ID_INTEL_82815_MC:
1571                 /*
1572                  * The i815 can operate either as an i810 style
1573                  * integrated device, or as an AGP4X motherboard.
1574                  */
1575                 if (find_i810(PCI_DEVICE_ID_INTEL_82815_CGC, "i815"))
1576                         bridge->driver = &intel_810_driver;
1577                 else
1578                         bridge->driver = &intel_815_driver;
1579                 name = "i815";
1580                 break;
1581         case PCI_DEVICE_ID_INTEL_82820_HB:
1582         case PCI_DEVICE_ID_INTEL_82820_UP_HB:
1583                 bridge->driver = &intel_820_driver;
1584                 name = "i820";
1585                 break;
1586         case PCI_DEVICE_ID_INTEL_82830_HB:
1587                 if (find_i830(PCI_DEVICE_ID_INTEL_82830_CGC)) {
1588                         bridge->driver = &intel_830_driver;
1589                 } else {
1590                         bridge->driver = &intel_830mp_driver;
1591                 }
1592                 name = "830M";
1593                 break;
1594         case PCI_DEVICE_ID_INTEL_82840_HB:
1595                 bridge->driver = &intel_840_driver;
1596                 name = "i840";
1597                 break;
1598         case PCI_DEVICE_ID_INTEL_82845_HB:
1599                 bridge->driver = &intel_845_driver;
1600                 name = "i845";
1601                 break;
1602         case PCI_DEVICE_ID_INTEL_82845G_HB:
1603                 if (find_i830(PCI_DEVICE_ID_INTEL_82845G_IG)) {
1604                         bridge->driver = &intel_830_driver;
1605                 } else {
1606                         bridge->driver = &intel_845_driver;
1607                 }
1608                 name = "845G";
1609                 break;
1610         case PCI_DEVICE_ID_INTEL_82850_HB:
1611                 bridge->driver = &intel_850_driver;
1612                 name = "i850";
1613                 break;
1614         case PCI_DEVICE_ID_INTEL_82855PM_HB:
1615                 bridge->driver = &intel_845_driver;
1616                 name = "855PM";
1617                 break;
1618         case PCI_DEVICE_ID_INTEL_82855GM_HB:
1619                 if (find_i830(PCI_DEVICE_ID_INTEL_82855GM_IG)) {
1620                         bridge->driver = &intel_830_driver;
1621                         name = "855";
1622                 } else {
1623                         bridge->driver = &intel_845_driver;
1624                         name = "855GM";
1625                 }
1626                 break;
1627         case PCI_DEVICE_ID_INTEL_82860_HB:
1628                 bridge->driver = &intel_860_driver;
1629                 name = "i860";
1630                 break;
1631         case PCI_DEVICE_ID_INTEL_82865_HB:
1632                 if (find_i830(PCI_DEVICE_ID_INTEL_82865_IG)) {
1633                         bridge->driver = &intel_830_driver;
1634                 } else {
1635                         bridge->driver = &intel_845_driver;
1636                 }
1637                 name = "865";
1638                 break;
1639         case PCI_DEVICE_ID_INTEL_82875_HB:
1640                 bridge->driver = &intel_845_driver;
1641                 name = "i875";
1642                 break;
1643         case PCI_DEVICE_ID_INTEL_82915G_HB:
1644                 if (find_i830(PCI_DEVICE_ID_INTEL_82915G_IG)) {
1645                         bridge->driver = &intel_915_driver;
1646                 } else {
1647                         bridge->driver = &intel_845_driver;
1648                 }
1649                 name = "915G";
1650                 break;
1651         case PCI_DEVICE_ID_INTEL_7505_0:
1652                 bridge->driver = &intel_7505_driver;
1653                 name = "E7505";
1654                 break;
1655         case PCI_DEVICE_ID_INTEL_7205_0:
1656                 bridge->driver = &intel_7505_driver;
1657                 name = "E7205";
1658                 break;
1659         default:
1660                 if (cap_ptr)
1661                         printk(KERN_WARNING PFX "Unsupported Intel chipset (device id: %04x)\n",
1662                             pdev->device);
1663                 agp_put_bridge(bridge);
1664                 return -ENODEV;
1665         };
1666
1667         bridge->dev = pdev;
1668         bridge->capndx = cap_ptr;
1669
1670         if (bridge->driver == &intel_810_driver)
1671                 bridge->dev_private_data = &intel_i810_private;
1672         else if (bridge->driver == &intel_830_driver)
1673                 bridge->dev_private_data = &intel_i830_private;
1674
1675         printk(KERN_INFO PFX "Detected an Intel %s Chipset.\n", name);
1676
1677         /*
1678         * The following fixes the case where the BIOS has "forgotten" to
1679         * provide an address range for the GART.
1680         * 20030610 - hamish@zot.org
1681         */
1682         r = &pdev->resource[0];
1683         if (!r->start && r->end) {
1684                 if(pci_assign_resource(pdev, 0)) {
1685                         printk(KERN_ERR PFX "could not assign resource 0\n");
1686                         agp_put_bridge(bridge);
1687                         return -ENODEV;
1688                 }
1689         }
1690
1691         /*
1692         * If the device has not been properly setup, the following will catch
1693         * the problem and should stop the system from crashing.
1694         * 20030610 - hamish@zot.org
1695         */
1696         if (pci_enable_device(pdev)) {
1697                 printk(KERN_ERR PFX "Unable to Enable PCI device\n");
1698                 agp_put_bridge(bridge);
1699                 return -ENODEV;
1700         }
1701
1702         /* Fill in the mode register */
1703         if (cap_ptr) {
1704                 pci_read_config_dword(pdev,
1705                                 bridge->capndx+PCI_AGP_STATUS,
1706                                 &bridge->mode);
1707         }
1708
1709         pci_set_drvdata(pdev, bridge);
1710         return agp_add_bridge(bridge);
1711  fail:
1712         agp_put_bridge(bridge);
1713         return -ENODEV;
1714 }
1715
1716 static void __devexit agp_intel_remove(struct pci_dev *pdev)
1717 {
1718         struct agp_bridge_data *bridge = pci_get_drvdata(pdev);
1719
1720         agp_remove_bridge(bridge);
1721         agp_put_bridge(bridge);
1722 }
1723
1724 static int agp_intel_resume(struct pci_dev *pdev)
1725 {
1726         struct agp_bridge_data *bridge = pci_get_drvdata(pdev);
1727
1728         pci_restore_state(pdev, pdev->saved_config_space);
1729
1730         if (bridge->driver == &intel_generic_driver)
1731                 intel_configure();
1732         else if (bridge->driver == &intel_845_driver)
1733                 intel_845_configure();
1734         else if (bridge->driver == &intel_830mp_driver)
1735                 intel_830mp_configure();
1736         else if (bridge->driver == &intel_915_driver)
1737                 intel_i915_configure();
1738
1739         return 0;
1740 }
1741
1742 static struct pci_device_id agp_intel_pci_table[] = {
1743 #define ID(x)                                           \
1744         {                                               \
1745         .class          = (PCI_CLASS_BRIDGE_HOST << 8), \
1746         .class_mask     = ~0,                           \
1747         .vendor         = PCI_VENDOR_ID_INTEL,          \
1748         .device         = x,                            \
1749         .subvendor      = PCI_ANY_ID,                   \
1750         .subdevice      = PCI_ANY_ID,                   \
1751         }
1752         ID(PCI_DEVICE_ID_INTEL_82443LX_0),
1753         ID(PCI_DEVICE_ID_INTEL_82443BX_0),
1754         ID(PCI_DEVICE_ID_INTEL_82443GX_0),
1755         ID(PCI_DEVICE_ID_INTEL_82810_MC1),
1756         ID(PCI_DEVICE_ID_INTEL_82810_MC3),
1757         ID(PCI_DEVICE_ID_INTEL_82810E_MC),
1758         ID(PCI_DEVICE_ID_INTEL_82815_MC),
1759         ID(PCI_DEVICE_ID_INTEL_82820_HB),
1760         ID(PCI_DEVICE_ID_INTEL_82820_UP_HB),
1761         ID(PCI_DEVICE_ID_INTEL_82830_HB),
1762         ID(PCI_DEVICE_ID_INTEL_82840_HB),
1763         ID(PCI_DEVICE_ID_INTEL_82845_HB),
1764         ID(PCI_DEVICE_ID_INTEL_82845G_HB),
1765         ID(PCI_DEVICE_ID_INTEL_82850_HB),
1766         ID(PCI_DEVICE_ID_INTEL_82855PM_HB),
1767         ID(PCI_DEVICE_ID_INTEL_82855GM_HB),
1768         ID(PCI_DEVICE_ID_INTEL_82860_HB),
1769         ID(PCI_DEVICE_ID_INTEL_82865_HB),
1770         ID(PCI_DEVICE_ID_INTEL_82875_HB),
1771         ID(PCI_DEVICE_ID_INTEL_7505_0),
1772         ID(PCI_DEVICE_ID_INTEL_7205_0),
1773         { }
1774 };
1775
1776 MODULE_DEVICE_TABLE(pci, agp_intel_pci_table);
1777
1778 static struct pci_driver agp_intel_pci_driver = {
1779         .name           = "agpgart-intel",
1780         .id_table       = agp_intel_pci_table,
1781         .probe          = agp_intel_probe,
1782         .remove         = agp_intel_remove,
1783         .resume         = agp_intel_resume,
1784 };
1785
1786 /* intel_agp_init() must not be declared static for explicit
1787    early initialization to work (ie i810fb) */
1788 int __init agp_intel_init(void)
1789 {
1790         static int agp_initialised=0;
1791
1792         if (agp_initialised == 1)
1793                 return 0;
1794         agp_initialised=1;
1795
1796         return pci_module_init(&agp_intel_pci_driver);
1797 }
1798
1799 static void __exit agp_intel_cleanup(void)
1800 {
1801         pci_unregister_driver(&agp_intel_pci_driver);
1802 }
1803
1804 module_init(agp_intel_init);
1805 module_exit(agp_intel_cleanup);
1806
1807 MODULE_AUTHOR("Dave Jones <davej@codemonkey.org.uk>");
1808 MODULE_LICENSE("GPL and additional rights");