drivers/char/agp/intel-agp.c

   1 /*
   2  * Intel AGPGART routines.
   3  */
   4
   5 /*
   6  * Intel(R) 855GM/852GM and 865G support added by David Dawes
   7  * <dawes@tungstengraphics.com>.
   8  */
   9
  10 #include <linux/module.h>
  11 #include <linux/pci.h>
  12 #include <linux/init.h>
  13 #include <linux/agp_backend.h>
  14 #include "agp.h"
  15
  16 /* Intel 815 register */
  17 #define INTEL_815_APCONT        0x51
  18 #define INTEL_815_ATTBASE_MASK  ~0x1FFFFFFF
  19
  20 /* Intel i820 registers */
  21 #define INTEL_I820_RDCR         0x51
  22 #define INTEL_I820_ERRSTS       0xc8
  23
  24 /* Intel i840 registers */
  25 #define INTEL_I840_MCHCFG       0x50
  26 #define INTEL_I840_ERRSTS       0xc8
  27
  28 /* Intel i850 registers */
  29 #define INTEL_I850_MCHCFG       0x50
  30 #define INTEL_I850_ERRSTS       0xc8
  31
  32 /* Intel 7505 registers */
  33 #define INTEL_I7505_APSIZE      0x74
  34 #define INTEL_I7505_NCAPID      0x60
  35 #define INTEL_I7505_NISTAT      0x6c
  36 #define INTEL_I7505_ATTBASE     0x78
  37 #define INTEL_I7505_ERRSTS      0x42
  38 #define INTEL_I7505_AGPCTRL     0x70
  39 #define INTEL_I7505_MCHCFG      0x50
  40
  41 static struct aper_size_info_fixed intel_i810_sizes[] =
  42 {
  43         {64, 16384, 4},
  44         /* The 32M mode still requires a 64k gatt */
  45         {32, 8192, 4}
  46 };
  47
  48 #define AGP_DCACHE_MEMORY       1
  49 #define AGP_PHYS_MEMORY         2
  50
  51 static struct gatt_mask intel_i810_masks[] =
  52 {
  53         {.mask = I810_PTE_VALID, .type = 0},
  54         {.mask = (I810_PTE_VALID | I810_PTE_LOCAL), .type = AGP_DCACHE_MEMORY},
  55         {.mask = I810_PTE_VALID, .type = 0}
  56 };
  57
  58 static struct _intel_i810_private {
  59         struct pci_dev *i810_dev;       /* device one */
  60         volatile u8 *registers;
  61         int num_dcache_entries;
  62 } intel_i810_private;
  63
  64 static int intel_i810_fetch_size(void)
  65 {
  66         u32 smram_miscc;
  67         struct aper_size_info_fixed *values;
  68
  69         pci_read_config_dword(agp_bridge->dev, I810_SMRAM_MISCC, &smram_miscc);
  70         values = A_SIZE_FIX(agp_bridge->driver->aperture_sizes);
  71
  72         if ((smram_miscc & I810_GMS) == I810_GMS_DISABLE) {
  73                 printk(KERN_WARNING PFX "i810 is disabled\n");
  74                 return 0;
  75         }
  76         if ((smram_miscc & I810_GFX_MEM_WIN_SIZE) == I810_GFX_MEM_WIN_32M) {
  77                 agp_bridge->previous_size =
  78                         agp_bridge->current_size = (void *) (values + 1);
  79                 agp_bridge->aperture_size_idx = 1;
  80                 return values[1].size;
  81         } else {
  82                 agp_bridge->previous_size =
  83                         agp_bridge->current_size = (void *) (values);
  84                 agp_bridge->aperture_size_idx = 0;
  85                 return values[0].size;
  86         }
  87
  88         return 0;
  89 }
  90
  91 static int intel_i810_configure(void)
  92 {
  93         struct aper_size_info_fixed *current_size;
  94         u32 temp;
  95         int i;
  96
  97         current_size = A_SIZE_FIX(agp_bridge->current_size);
  98
  99         pci_read_config_dword(intel_i810_private.i810_dev, I810_MMADDR, &temp);
 100         temp &= 0xfff80000;
 101
 102         intel_i810_private.registers = (volatile u8 *) ioremap(temp, 128 * 4096);
 103         if (!intel_i810_private.registers) {
 104                 printk(KERN_ERR PFX "Unable to remap memory.\n");
 105                 return -ENOMEM;
 106         }
 107
 108         if ((INREG32(intel_i810_private.registers, I810_DRAM_CTL)
 109                 & I810_DRAM_ROW_0) == I810_DRAM_ROW_0_SDRAM) {
 110                 /* This will need to be dynamically assigned */
 111                 printk(KERN_INFO PFX "detected 4MB dedicated video ram.\n");
 112                 intel_i810_private.num_dcache_entries = 1024;
 113         }
 114         pci_read_config_dword(intel_i810_private.i810_dev, I810_GMADDR, &temp);
 115         agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
 116         OUTREG32(intel_i810_private.registers, I810_PGETBL_CTL,
 117                  agp_bridge->gatt_bus_addr | I810_PGETBL_ENABLED);
 118         global_cache_flush();
 119
 120         if (agp_bridge->driver->needs_scratch_page) {
 121                 for (i = 0; i < current_size->num_entries; i++) {
 122                         OUTREG32(intel_i810_private.registers,
 123                                  I810_PTE_BASE + (i * 4),
 124                                  agp_bridge->scratch_page);
 125                 }
 126         }
 127         return 0;
 128 }
 129
 130 static void intel_i810_cleanup(void)
 131 {
 132         OUTREG32(intel_i810_private.registers, I810_PGETBL_CTL, 0);
 133         iounmap((void *) intel_i810_private.registers);
 134 }
 135
 136 static void intel_i810_tlbflush(struct agp_memory *mem)
 137 {
 138         return;
 139 }
 140
 141 static void intel_i810_agp_enable(u32 mode)
 142 {
 143         return;
 144 }
 145
 146 static int intel_i810_insert_entries(struct agp_memory *mem, off_t pg_start,
 147                                 int type)
 148 {
 149         int i, j, num_entries;
 150         void *temp;
 151
 152         temp = agp_bridge->current_size;
 153         num_entries = A_SIZE_FIX(temp)->num_entries;
 154
 155         if ((pg_start + mem->page_count) > num_entries) {
 156                 return -EINVAL;
 157         }
 158         for (j = pg_start; j < (pg_start + mem->page_count); j++) {
 159                 if (!PGE_EMPTY(agp_bridge, agp_bridge->gatt_table[j]))
 160                         return -EBUSY;
 161         }
 162
 163         if (type != 0 || mem->type != 0) {
 164                 if ((type == AGP_DCACHE_MEMORY) && (mem->type == AGP_DCACHE_MEMORY)) {
 165                         /* special insert */
 166                         global_cache_flush();
 167                         for (i = pg_start; i < (pg_start + mem->page_count); i++) {
 168                                 OUTREG32(intel_i810_private.registers,
 169                                          I810_PTE_BASE + (i * 4),
 170                                          (i * 4096) | I810_PTE_LOCAL |
 171                                          I810_PTE_VALID);
 172                         }
 173                         global_cache_flush();
 174                         agp_bridge->driver->tlb_flush(mem);
 175                         return 0;
 176                 }
 177                 if((type == AGP_PHYS_MEMORY) && (mem->type == AGP_PHYS_MEMORY))
 178                         goto insert;
 179                 return -EINVAL;
 180         }
 181
 182 insert:
 183         global_cache_flush();
 184         for (i = 0, j = pg_start; i < mem->page_count; i++, j++) {
 185                 OUTREG32(intel_i810_private.registers,
 186                         I810_PTE_BASE + (j * 4),
 187                         agp_bridge->driver->mask_memory(mem->memory[i], mem->type));
 188         }
 189         global_cache_flush();
 190
 191         agp_bridge->driver->tlb_flush(mem);
 192         return 0;
 193 }
 194
 195 static int intel_i810_remove_entries(struct agp_memory *mem, off_t pg_start,
 196                                 int type)
 197 {
 198         int i;
 199
 200         for (i = pg_start; i < (mem->page_count + pg_start); i++) {
 201                 OUTREG32(intel_i810_private.registers,
 202                          I810_PTE_BASE + (i * 4),
 203                          agp_bridge->scratch_page);
 204         }
 205
 206         global_cache_flush();
 207         agp_bridge->driver->tlb_flush(mem);
 208         return 0;
 209 }
 210
 211 /*
 212  * The i810/i830 requires a physical address to program its mouse
 213  * pointer into hardware.
 214  * However the Xserver still writes to it through the agp aperture.
 215  */
 216 static struct agp_memory *alloc_agpphysmem_i8xx(size_t pg_count, int type)
 217 {
 218         struct agp_memory *new;
 219         void *addr;
 220
 221         if (pg_count != 1)
 222                 return NULL;
 223
 224         addr = agp_bridge->driver->agp_alloc_page();
 225         if (addr == NULL)
 226                 return NULL;
 227
 228         new = agp_create_memory(1);
 229         if (new == NULL)
 230                 return NULL;
 231
 232         new->memory[0] = agp_bridge->driver->mask_memory(virt_to_phys(addr), type);
 233         new->page_count = 1;
 234         new->num_scratch_pages = 1;
 235         new->type = AGP_PHYS_MEMORY;
 236         new->physical = new->memory[0];
 237         return new;
 238 }
 239
 240 static struct agp_memory *intel_i810_alloc_by_type(size_t pg_count, int type)
 241 {
 242         struct agp_memory *new;
 243
 244         if (type == AGP_DCACHE_MEMORY) {
 245                 if (pg_count != intel_i810_private.num_dcache_entries)
 246                         return NULL;
 247
 248                 new = agp_create_memory(1);
 249                 if (new == NULL)
 250                         return NULL;
 251
 252                 new->type = AGP_DCACHE_MEMORY;
 253                 new->page_count = pg_count;
 254                 new->num_scratch_pages = 0;
 255                 vfree(new->memory);
 256                 return new;
 257         }
 258         if (type == AGP_PHYS_MEMORY)
 259                 return(alloc_agpphysmem_i8xx(pg_count, type));
 260
 261         return NULL;
 262 }
 263
 264 static void intel_i810_free_by_type(struct agp_memory *curr)
 265 {
 266         agp_free_key(curr->key);
 267         if(curr->type == AGP_PHYS_MEMORY) {
 268                 agp_bridge->driver->agp_destroy_page(phys_to_virt(curr->memory[0]));
 269                 vfree(curr->memory);
 270         }
 271         kfree(curr);
 272 }
 273
 274 static unsigned long intel_i810_mask_memory(unsigned long addr, int type)
 275 {
 276         /* Type checking must be done elsewhere */
 277         return addr | agp_bridge->driver->masks[type].mask;
 278 }
 279
 280 static struct aper_size_info_fixed intel_i830_sizes[] =
 281 {
 282         {128, 32768, 5},
 283         /* The 64M mode still requires a 128k gatt */
 284         {64, 16384, 5}
 285 };
 286
 287 static struct _intel_i830_private {
 288         struct pci_dev *i830_dev;               /* device one */
 289         volatile u8 *registers;
 290         int gtt_entries;
 291 } intel_i830_private;
 292
 293 static void intel_i830_init_gtt_entries(void)
 294 {
 295         u16 gmch_ctrl;
 296         int gtt_entries;
 297         u8 rdct;
 298         int local = 0;
 299         static const int ddt[4] = { 0, 16, 32, 64 };
 300
 301         pci_read_config_word(agp_bridge->dev,I830_GMCH_CTRL,&gmch_ctrl);
 302
 303         if (agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82830_HB ||
 304             agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82845G_HB) {
 305                 switch (gmch_ctrl & I830_GMCH_GMS_MASK) {
 306                 case I830_GMCH_GMS_STOLEN_512:
 307                         gtt_entries = KB(512) - KB(132);
 308                         break;
 309                 case I830_GMCH_GMS_STOLEN_1024:
 310                         gtt_entries = MB(1) - KB(132);
 311                         break;
 312                 case I830_GMCH_GMS_STOLEN_8192:
 313                         gtt_entries = MB(8) - KB(132);
 314                         break;
 315                 case I830_GMCH_GMS_LOCAL:
 316                         rdct = INREG8(intel_i830_private.registers,
 317                                       I830_RDRAM_CHANNEL_TYPE);
 318                         gtt_entries = (I830_RDRAM_ND(rdct) + 1) *
 319                                         MB(ddt[I830_RDRAM_DDT(rdct)]);
 320                         local = 1;
 321                         break;
 322                 default:
 323                         gtt_entries = 0;
 324                         break;
 325                 }
 326         } else {
 327                 switch (gmch_ctrl & I830_GMCH_GMS_MASK) {
 328                 case I855_GMCH_GMS_STOLEN_1M:
 329                         gtt_entries = MB(1) - KB(132);
 330                         break;
 331                 case I855_GMCH_GMS_STOLEN_4M:
 332                         gtt_entries = MB(4) - KB(132);
 333                         break;
 334                 case I855_GMCH_GMS_STOLEN_8M:
 335                         gtt_entries = MB(8) - KB(132);
 336                         break;
 337                 case I855_GMCH_GMS_STOLEN_16M:
 338                         gtt_entries = MB(16) - KB(132);
 339                         break;
 340                 case I855_GMCH_GMS_STOLEN_32M:
 341                         gtt_entries = MB(32) - KB(132);
 342                         break;
 343                 default:
 344                         gtt_entries = 0;
 345                         break;
 346                 }
 347         }
 348         if (gtt_entries > 0)
 349                 printk(KERN_INFO PFX "Detected %dK %s memory.\n",
 350                        gtt_entries / KB(1), local ? "local" : "stolen");
 351         else
 352                 printk(KERN_INFO PFX
 353                        "No pre-allocated video memory detected.\n");
 354         gtt_entries /= KB(4);
 355
 356         intel_i830_private.gtt_entries = gtt_entries;
 357 }
 358
 359 /* The intel i830 automatically initializes the agp aperture during POST.
 360  * Use the memory already set aside for in the GTT.
 361  */
 362 static int intel_i830_create_gatt_table(void)
 363 {
 364         int page_order;
 365         struct aper_size_info_fixed *size;
 366         int num_entries;
 367         u32 temp;
 368
 369         size = agp_bridge->current_size;
 370         page_order = size->page_order;
 371         num_entries = size->num_entries;
 372         agp_bridge->gatt_table_real = 0;
 373
 374         pci_read_config_dword(intel_i830_private.i830_dev,I810_MMADDR,&temp);
 375         temp &= 0xfff80000;
 376
 377         intel_i830_private.registers = (volatile u8 *) ioremap(temp,128 * 4096);
 378         if (!intel_i830_private.registers)
 379                 return (-ENOMEM);
 380
 381         temp = INREG32(intel_i830_private.registers,I810_PGETBL_CTL) & 0xfffff000;
 382         global_cache_flush();
 383
 384         /* we have to call this as early as possible after the MMIO base address is known */
 385         intel_i830_init_gtt_entries();
 386
 387         agp_bridge->gatt_table = NULL;
 388
 389         agp_bridge->gatt_bus_addr = temp;
 390
 391         return(0);
 392 }
 393
 394 /* Return the gatt table to a sane state. Use the top of stolen
 395  * memory for the GTT.
 396  */
 397 static int intel_i830_free_gatt_table(void)
 398 {
 399         return(0);
 400 }
 401
 402 static int intel_i830_fetch_size(void)
 403 {
 404         u16 gmch_ctrl;
 405         struct aper_size_info_fixed *values;
 406
 407         values = A_SIZE_FIX(agp_bridge->driver->aperture_sizes);
 408
 409         if (agp_bridge->dev->device != PCI_DEVICE_ID_INTEL_82830_HB &&
 410             agp_bridge->dev->device != PCI_DEVICE_ID_INTEL_82845G_HB) {
 411                 /* 855GM/852GM/865G has 128MB aperture size */
 412                 agp_bridge->previous_size = agp_bridge->current_size = (void *) values;
 413                 agp_bridge->aperture_size_idx = 0;
 414                 return(values[0].size);
 415         }
 416
 417         pci_read_config_word(agp_bridge->dev,I830_GMCH_CTRL,&gmch_ctrl);
 418
 419         if ((gmch_ctrl & I830_GMCH_MEM_MASK) == I830_GMCH_MEM_128M) {
 420                 agp_bridge->previous_size = agp_bridge->current_size = (void *) values;
 421                 agp_bridge->aperture_size_idx = 0;
 422                 return(values[0].size);
 423         } else {
 424                 agp_bridge->previous_size = agp_bridge->current_size = (void *) values;
 425                 agp_bridge->aperture_size_idx = 1;
 426                 return(values[1].size);
 427         }
 428
 429         return(0);
 430 }
 431
 432 static int intel_i830_configure(void)
 433 {
 434         struct aper_size_info_fixed *current_size;
 435         u32 temp;
 436         u16 gmch_ctrl;
 437         int i;
 438
 439         current_size = A_SIZE_FIX(agp_bridge->current_size);
 440
 441         pci_read_config_dword(intel_i830_private.i830_dev,I810_GMADDR,&temp);
 442         agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
 443
 444         pci_read_config_word(agp_bridge->dev,I830_GMCH_CTRL,&gmch_ctrl);
 445         gmch_ctrl |= I830_GMCH_ENABLED;
 446         pci_write_config_word(agp_bridge->dev,I830_GMCH_CTRL,gmch_ctrl);
 447
 448         OUTREG32(intel_i830_private.registers,I810_PGETBL_CTL,agp_bridge->gatt_bus_addr | I810_PGETBL_ENABLED);
 449         global_cache_flush();
 450
 451         if (agp_bridge->driver->needs_scratch_page)
 452                 for (i = intel_i830_private.gtt_entries; i < current_size->num_entries; i++)
 453                         OUTREG32(intel_i830_private.registers,I810_PTE_BASE + (i * 4),agp_bridge->scratch_page);
 454
 455         return (0);
 456 }
 457
 458 static void intel_i830_cleanup(void)
 459 {
 460         iounmap((void *) intel_i830_private.registers);
 461 }
 462
 463 static int intel_i830_insert_entries(struct agp_memory *mem,off_t pg_start,
 464                                 int type)
 465 {
 466         int i,j,num_entries;
 467         void *temp;
 468
 469         temp = agp_bridge->current_size;
 470         num_entries = A_SIZE_FIX(temp)->num_entries;
 471
 472         if (pg_start < intel_i830_private.gtt_entries) {
 473                 printk (KERN_DEBUG PFX "pg_start == 0x%.8lx,intel_i830_private.gtt_entries == 0x%.8x\n",
 474                                 pg_start,intel_i830_private.gtt_entries);
 475
 476                 printk (KERN_INFO PFX "Trying to insert into local/stolen memory\n");
 477                 return (-EINVAL);
 478         }
 479
 480         if ((pg_start + mem->page_count) > num_entries)
 481                 return (-EINVAL);
 482
 483         /* The i830 can't check the GTT for entries since its read only,
 484          * depend on the caller to make the correct offset decisions.
 485          */
 486
 487         if ((type != 0 && type != AGP_PHYS_MEMORY) ||
 488                 (mem->type != 0 && mem->type != AGP_PHYS_MEMORY))
 489                 return (-EINVAL);
 490
 491         global_cache_flush();
 492
 493         for (i = 0, j = pg_start; i < mem->page_count; i++, j++)
 494                 OUTREG32(intel_i830_private.registers,I810_PTE_BASE + (j * 4),
 495                         agp_bridge->driver->mask_memory(mem->memory[i], mem->type));
 496
 497         global_cache_flush();
 498
 499         agp_bridge->driver->tlb_flush(mem);
 500
 501         return(0);
 502 }
 503
 504 static int intel_i830_remove_entries(struct agp_memory *mem,off_t pg_start,
 505                                 int type)
 506 {
 507         int i;
 508
 509         global_cache_flush();
 510
 511         if (pg_start < intel_i830_private.gtt_entries) {
 512                 printk (KERN_INFO PFX "Trying to disable local/stolen memory\n");
 513                 return (-EINVAL);
 514         }
 515
 516         for (i = pg_start; i < (mem->page_count + pg_start); i++)
 517                 OUTREG32(intel_i830_private.registers,I810_PTE_BASE + (i * 4),agp_bridge->scratch_page);
 518
 519         global_cache_flush();
 520
 521         agp_bridge->driver->tlb_flush(mem);
 522
 523         return (0);
 524 }
 525
 526 static struct agp_memory *intel_i830_alloc_by_type(size_t pg_count,int type)
 527 {
 528         if (type == AGP_PHYS_MEMORY)
 529                 return(alloc_agpphysmem_i8xx(pg_count, type));
 530
 531         /* always return NULL for other allocation types for now */
 532         return(NULL);
 533 }
 534
 535 static int intel_fetch_size(void)
 536 {
 537         int i;
 538         u16 temp;
 539         struct aper_size_info_16 *values;
 540
 541         pci_read_config_word(agp_bridge->dev, INTEL_APSIZE, &temp);
 542         values = A_SIZE_16(agp_bridge->driver->aperture_sizes);
 543
 544         for (i = 0; i < agp_bridge->driver->num_aperture_sizes; i++) {
 545                 if (temp == values[i].size_value) {
 546                         agp_bridge->previous_size = agp_bridge->current_size = (void *) (values + i);
 547                         agp_bridge->aperture_size_idx = i;
 548                         return values[i].size;
 549                 }
 550         }
 551
 552         return 0;
 553 }
 554
 555 static int __intel_8xx_fetch_size(u8 temp)
 556 {
 557         int i;
 558         struct aper_size_info_8 *values;
 559
 560         values = A_SIZE_8(agp_bridge->driver->aperture_sizes);
 561
 562         for (i = 0; i < agp_bridge->driver->num_aperture_sizes; i++) {
 563                 if (temp == values[i].size_value) {
 564                         agp_bridge->previous_size =
 565                                 agp_bridge->current_size = (void *) (values + i);
 566                         agp_bridge->aperture_size_idx = i;
 567                         return values[i].size;
 568                 }
 569         }
 570         return 0;
 571 }
 572
 573 static int intel_8xx_fetch_size(void)
 574 {
 575         u8 temp;
 576
 577         pci_read_config_byte(agp_bridge->dev, INTEL_APSIZE, &temp);
 578         return __intel_8xx_fetch_size(temp);
 579 }
 580
 581 static int intel_815_fetch_size(void)
 582 {
 583         u8 temp;
 584
 585         /* Intel 815 chipsets have a _weird_ APSIZE register with only
 586          * one non-reserved bit, so mask the others out ... */
 587         pci_read_config_byte(agp_bridge->dev, INTEL_APSIZE, &temp);
 588         temp &= (1 << 3);
 589
 590         return __intel_8xx_fetch_size(temp);
 591 }
 592
 593 static void intel_tlbflush(struct agp_memory *mem)
 594 {
 595         pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, 0x2200);
 596         pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, 0x2280);
 597 }
 598
 599
 600 static void intel_8xx_tlbflush(struct agp_memory *mem)
 601 {
 602         u32 temp;
 603         pci_read_config_dword(agp_bridge->dev, INTEL_AGPCTRL, &temp);
 604         pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, temp & ~(1 << 7));
 605         pci_read_config_dword(agp_bridge->dev, INTEL_AGPCTRL, &temp);
 606         pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, temp | (1 << 7));
 607 }
 608
 609
 610 static void intel_cleanup(void)
 611 {
 612         u16 temp;
 613         struct aper_size_info_16 *previous_size;
 614
 615         previous_size = A_SIZE_16(agp_bridge->previous_size);
 616         pci_read_config_word(agp_bridge->dev, INTEL_NBXCFG, &temp);
 617         pci_write_config_word(agp_bridge->dev, INTEL_NBXCFG, temp & ~(1 << 9));
 618         pci_write_config_word(agp_bridge->dev, INTEL_APSIZE, previous_size->size_value);
 619 }
 620
 621
 622 static void intel_8xx_cleanup(void)
 623 {
 624         u16 temp;
 625         struct aper_size_info_8 *previous_size;
 626
 627         previous_size = A_SIZE_8(agp_bridge->previous_size);
 628         pci_read_config_word(agp_bridge->dev, INTEL_NBXCFG, &temp);
 629         pci_write_config_word(agp_bridge->dev, INTEL_NBXCFG, temp & ~(1 << 9));
 630         pci_write_config_byte(agp_bridge->dev, INTEL_APSIZE, previous_size->size_value);
 631 }
 632
 633
 634 static int intel_configure(void)
 635 {
 636         u32 temp;
 637         u16 temp2;
 638         struct aper_size_info_16 *current_size;
 639
 640         current_size = A_SIZE_16(agp_bridge->current_size);
 641
 642         /* aperture size */
 643         pci_write_config_word(agp_bridge->dev, INTEL_APSIZE, current_size->size_value);
 644
 645         /* address to map to */
 646         pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
 647         agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
 648
 649         /* attbase - aperture base */
 650         pci_write_config_dword(agp_bridge->dev, INTEL_ATTBASE, agp_bridge->gatt_bus_addr);
 651
 652         /* agpctrl */
 653         pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, 0x2280);
 654
 655         /* paccfg/nbxcfg */
 656         pci_read_config_word(agp_bridge->dev, INTEL_NBXCFG, &temp2);
 657         pci_write_config_word(agp_bridge->dev, INTEL_NBXCFG,
 658                         (temp2 & ~(1 << 10)) | (1 << 9));
 659         /* clear any possible error conditions */
 660         pci_write_config_byte(agp_bridge->dev, INTEL_ERRSTS + 1, 7);
 661         return 0;
 662 }
 663
 664 static int intel_815_configure(void)
 665 {
 666         u32 temp, addr;
 667         u8 temp2;
 668         struct aper_size_info_8 *current_size;
 669
 670         /* attbase - aperture base */
 671         /* the Intel 815 chipset spec. says that bits 29-31 in the
 672         * ATTBASE register are reserved -> try not to write them */
 673         if (agp_bridge->gatt_bus_addr & INTEL_815_ATTBASE_MASK) {
 674                 printk (KERN_EMERG PFX "gatt bus addr too high");
 675                 return -EINVAL;
 676         }
 677
 678         current_size = A_SIZE_8(agp_bridge->current_size);
 679
 680         /* aperture size */
 681         pci_write_config_byte(agp_bridge->dev, INTEL_APSIZE,
 682                         current_size->size_value);
 683
 684         /* address to map to */
 685         pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
 686         agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
 687
 688         pci_read_config_dword(agp_bridge->dev, INTEL_ATTBASE, &addr);
 689         addr &= INTEL_815_ATTBASE_MASK;
 690         addr |= agp_bridge->gatt_bus_addr;
 691         pci_write_config_dword(agp_bridge->dev, INTEL_ATTBASE, addr);
 692
 693         /* agpctrl */
 694         pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, 0x0000);
 695
 696         /* apcont */
 697         pci_read_config_byte(agp_bridge->dev, INTEL_815_APCONT, &temp2);
 698         pci_write_config_byte(agp_bridge->dev, INTEL_815_APCONT, temp2 | (1 << 1));
 699
 700         /* clear any possible error conditions */
 701         /* Oddness : this chipset seems to have no ERRSTS register ! */
 702         return 0;
 703 }
 704
 705 static void intel_820_tlbflush(struct agp_memory *mem)
 706 {
 707         return;
 708 }
 709
 710 static void intel_820_cleanup(void)
 711 {
 712         u8 temp;
 713         struct aper_size_info_8 *previous_size;
 714
 715         previous_size = A_SIZE_8(agp_bridge->previous_size);
 716         pci_read_config_byte(agp_bridge->dev, INTEL_I820_RDCR, &temp);
 717         pci_write_config_byte(agp_bridge->dev, INTEL_I820_RDCR,
 718                         temp & ~(1 << 1));
 719         pci_write_config_byte(agp_bridge->dev, INTEL_APSIZE,
 720                         previous_size->size_value);
 721 }
 722
 723
 724 static int intel_820_configure(void)
 725 {
 726         u32 temp;
 727         u8 temp2;
 728         struct aper_size_info_8 *current_size;
 729
 730         current_size = A_SIZE_8(agp_bridge->current_size);
 731
 732         /* aperture size */
 733         pci_write_config_byte(agp_bridge->dev, INTEL_APSIZE, current_size->size_value);
 734
 735         /* address to map to */
 736         pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
 737         agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
 738
 739         /* attbase - aperture base */
 740         pci_write_config_dword(agp_bridge->dev, INTEL_ATTBASE, agp_bridge->gatt_bus_addr);
 741
 742         /* agpctrl */
 743         pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, 0x0000);
 744
 745         /* global enable aperture access */
 746         /* This flag is not accessed through MCHCFG register as in */
 747         /* i850 chipset. */
 748         pci_read_config_byte(agp_bridge->dev, INTEL_I820_RDCR, &temp2);
 749         pci_write_config_byte(agp_bridge->dev, INTEL_I820_RDCR, temp2 | (1 << 1));
 750         /* clear any possible AGP-related error conditions */
 751         pci_write_config_word(agp_bridge->dev, INTEL_I820_ERRSTS, 0x001c);
 752         return 0;
 753 }
 754
 755 static int intel_840_configure(void)
 756 {
 757         u32 temp;
 758         u16 temp2;
 759         struct aper_size_info_8 *current_size;
 760
 761         current_size = A_SIZE_8(agp_bridge->current_size);
 762
 763         /* aperture size */
 764         pci_write_config_byte(agp_bridge->dev, INTEL_APSIZE, current_size->size_value);
 765
 766         /* address to map to */
 767         pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
 768         agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
 769
 770         /* attbase - aperture base */
 771         pci_write_config_dword(agp_bridge->dev, INTEL_ATTBASE, agp_bridge->gatt_bus_addr);
 772
 773         /* agpctrl */
 774         pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, 0x0000);
 775
 776         /* mcgcfg */
 777         pci_read_config_word(agp_bridge->dev, INTEL_I840_MCHCFG, &temp2);
 778         pci_write_config_word(agp_bridge->dev, INTEL_I840_MCHCFG, temp2 | (1 << 9));
 779         /* clear any possible error conditions */
 780         pci_write_config_word(agp_bridge->dev, INTEL_I840_ERRSTS, 0xc000);
 781         return 0;
 782 }
 783
 784 static int intel_845_configure(void)
 785 {
 786         u32 temp;
 787         u8 temp2;
 788         struct aper_size_info_8 *current_size;
 789
 790         current_size = A_SIZE_8(agp_bridge->current_size);
 791
 792         /* aperture size */
 793         pci_write_config_byte(agp_bridge->dev, INTEL_APSIZE, current_size->size_value);
 794
 795         /* address to map to */
 796         pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
 797         agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
 798
 799         /* attbase - aperture base */
 800         pci_write_config_dword(agp_bridge->dev, INTEL_ATTBASE, agp_bridge->gatt_bus_addr);
 801
 802         /* agpctrl */
 803         pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, 0x0000);
 804
 805         /* agpm */
 806         pci_read_config_byte(agp_bridge->dev, INTEL_I845_AGPM, &temp2);
 807         pci_write_config_byte(agp_bridge->dev, INTEL_I845_AGPM, temp2 | (1 << 1));
 808         /* clear any possible error conditions */
 809         pci_write_config_word(agp_bridge->dev, INTEL_I845_ERRSTS, 0x001c);
 810         return 0;
 811 }
 812
 813 static int intel_850_configure(void)
 814 {
 815         u32 temp;
 816         u16 temp2;
 817         struct aper_size_info_8 *current_size;
 818
 819         current_size = A_SIZE_8(agp_bridge->current_size);
 820
 821         /* aperture size */
 822         pci_write_config_byte(agp_bridge->dev, INTEL_APSIZE, current_size->size_value);
 823
 824         /* address to map to */
 825         pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
 826         agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
 827
 828         /* attbase - aperture base */
 829         pci_write_config_dword(agp_bridge->dev, INTEL_ATTBASE, agp_bridge->gatt_bus_addr);
 830
 831         /* agpctrl */
 832         pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, 0x0000);
 833
 834         /* mcgcfg */
 835         pci_read_config_word(agp_bridge->dev, INTEL_I850_MCHCFG, &temp2);
 836         pci_write_config_word(agp_bridge->dev, INTEL_I850_MCHCFG, temp2 | (1 << 9));
 837         /* clear any possible AGP-related error conditions */
 838         pci_write_config_word(agp_bridge->dev, INTEL_I850_ERRSTS, 0x001c);
 839         return 0;
 840 }
 841
 842 static int intel_860_configure(void)
 843 {
 844         u32 temp;
 845         u16 temp2;
 846         struct aper_size_info_8 *current_size;
 847
 848         current_size = A_SIZE_8(agp_bridge->current_size);
 849
 850         /* aperture size */
 851         pci_write_config_byte(agp_bridge->dev, INTEL_APSIZE, current_size->size_value);
 852
 853         /* address to map to */
 854         pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
 855         agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
 856
 857         /* attbase - aperture base */
 858         pci_write_config_dword(agp_bridge->dev, INTEL_ATTBASE, agp_bridge->gatt_bus_addr);
 859
 860         /* agpctrl */
 861         pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, 0x0000);
 862
 863         /* mcgcfg */
 864         pci_read_config_word(agp_bridge->dev, INTEL_I860_MCHCFG, &temp2);
 865         pci_write_config_word(agp_bridge->dev, INTEL_I860_MCHCFG, temp2 | (1 << 9));
 866         /* clear any possible AGP-related error conditions */
 867         pci_write_config_word(agp_bridge->dev, INTEL_I860_ERRSTS, 0xf700);
 868         return 0;
 869 }
 870
 871 static int intel_830mp_configure(void)
 872 {
 873         u32 temp;
 874         u16 temp2;
 875         struct aper_size_info_8 *current_size;
 876
 877         current_size = A_SIZE_8(agp_bridge->current_size);
 878
 879         /* aperture size */
 880         pci_write_config_byte(agp_bridge->dev, INTEL_APSIZE, current_size->size_value);
 881
 882         /* address to map to */
 883         pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
 884         agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
 885
 886         /* attbase - aperture base */
 887         pci_write_config_dword(agp_bridge->dev, INTEL_ATTBASE, agp_bridge->gatt_bus_addr);
 888
 889         /* agpctrl */
 890         pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, 0x0000);
 891
 892         /* gmch */
 893         pci_read_config_word(agp_bridge->dev, INTEL_NBXCFG, &temp2);
 894         pci_write_config_word(agp_bridge->dev, INTEL_NBXCFG, temp2 | (1 << 9));
 895         /* clear any possible AGP-related error conditions */
 896         pci_write_config_word(agp_bridge->dev, INTEL_I830_ERRSTS, 0x1c);
 897         return 0;
 898 }
 899
 900 static int intel_7505_configure(void)
 901 {
 902         u32 temp;
 903         u16 temp2;
 904         struct aper_size_info_8 *current_size;
 905
 906         current_size = A_SIZE_8(agp_bridge->current_size);
 907
 908         /* aperture size */
 909         pci_write_config_byte(agp_bridge->dev, INTEL_APSIZE, current_size->size_value);
 910
 911         /* address to map to */
 912         pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
 913         agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
 914
 915         /* attbase - aperture base */
 916         pci_write_config_dword(agp_bridge->dev, INTEL_ATTBASE, agp_bridge->gatt_bus_addr);
 917
 918         /* agpctrl */
 919         pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, 0x0000);
 920
 921         /* mchcfg */
 922         pci_read_config_word(agp_bridge->dev, INTEL_I7505_MCHCFG, &temp2);
 923         pci_write_config_word(agp_bridge->dev, INTEL_I7505_MCHCFG, temp2 | (1 << 9));
 924
 925         return 0;
 926 }
 927
 928 /* Setup function */
 929 static struct gatt_mask intel_generic_masks[] =
 930 {
 931         {.mask = 0x00000017, .type = 0}
 932 };
 933
 934 static struct aper_size_info_8 intel_815_sizes[2] =
 935 {
 936         {64, 16384, 4, 0},
 937         {32, 8192, 3, 8},
 938 };
 939
 940 static struct aper_size_info_8 intel_8xx_sizes[7] =
 941 {
 942         {256, 65536, 6, 0},
 943         {128, 32768, 5, 32},
 944         {64, 16384, 4, 48},
 945         {32, 8192, 3, 56},
 946         {16, 4096, 2, 60},
 947         {8, 2048, 1, 62},
 948         {4, 1024, 0, 63}
 949 };
 950
 951 static struct aper_size_info_16 intel_generic_sizes[7] =
 952 {
 953         {256, 65536, 6, 0},
 954         {128, 32768, 5, 32},
 955         {64, 16384, 4, 48},
 956         {32, 8192, 3, 56},
 957         {16, 4096, 2, 60},
 958         {8, 2048, 1, 62},
 959         {4, 1024, 0, 63}
 960 };
 961
 962 static struct aper_size_info_8 intel_830mp_sizes[4] =
 963 {
 964         {256, 65536, 6, 0},
 965         {128, 32768, 5, 32},
 966         {64, 16384, 4, 48},
 967         {32, 8192, 3, 56}
 968 };
 969
 970 static struct agp_bridge_driver intel_generic_driver = {
 971         .owner                  = THIS_MODULE,
 972         .aperture_sizes         = intel_generic_sizes,
 973         .size_type              = U16_APER_SIZE,
 974         .num_aperture_sizes     = 7,
 975         .configure              = intel_configure,
 976         .fetch_size             = intel_fetch_size,
 977         .cleanup                = intel_cleanup,
 978         .tlb_flush              = intel_tlbflush,
 979         .mask_memory            = agp_generic_mask_memory,
 980         .masks                  = intel_generic_masks,
 981         .agp_enable             = agp_generic_enable,
 982         .cache_flush            = global_cache_flush,
 983         .create_gatt_table      = agp_generic_create_gatt_table,
 984         .free_gatt_table        = agp_generic_free_gatt_table,
 985         .insert_memory          = agp_generic_insert_memory,
 986         .remove_memory          = agp_generic_remove_memory,
 987         .alloc_by_type          = agp_generic_alloc_by_type,
 988         .free_by_type           = agp_generic_free_by_type,
 989         .agp_alloc_page         = agp_generic_alloc_page,
 990         .agp_destroy_page       = agp_generic_destroy_page,
 991 };
 992
 993 static struct agp_bridge_driver intel_810_driver = {
 994         .owner                  = THIS_MODULE,
 995         .aperture_sizes         = intel_i810_sizes,
 996         .size_type              = FIXED_APER_SIZE,
 997         .num_aperture_sizes     = 2,
 998         .needs_scratch_page     = TRUE,
 999         .configure              = intel_i810_configure,
1000         .fetch_size             = intel_i810_fetch_size,
1001         .cleanup                = intel_i810_cleanup,
1002         .tlb_flush              = intel_i810_tlbflush,
1003         .mask_memory            = intel_i810_mask_memory,
1004         .masks                  = intel_i810_masks,
1005         .agp_enable             = intel_i810_agp_enable,
1006         .cache_flush            = global_cache_flush,
1007         .create_gatt_table      = agp_generic_create_gatt_table,
1008         .free_gatt_table        = agp_generic_free_gatt_table,
1009         .insert_memory          = intel_i810_insert_entries,
1010         .remove_memory          = intel_i810_remove_entries,
1011         .alloc_by_type          = intel_i810_alloc_by_type,
1012         .free_by_type           = intel_i810_free_by_type,
1013         .agp_alloc_page         = agp_generic_alloc_page,
1014         .agp_destroy_page       = agp_generic_destroy_page,
1015 };
1016
1017 static struct agp_bridge_driver intel_815_driver = {
1018         .owner                  = THIS_MODULE,
1019         .aperture_sizes         = intel_815_sizes,
1020         .size_type              = U8_APER_SIZE,
1021         .num_aperture_sizes     = 2,
1022         .configure              = intel_815_configure,
1023         .fetch_size             = intel_815_fetch_size,
1024         .cleanup                = intel_8xx_cleanup,
1025         .tlb_flush              = intel_8xx_tlbflush,
1026         .mask_memory            = agp_generic_mask_memory,
1027         .masks                  = intel_generic_masks,
1028         .agp_enable             = agp_generic_enable,
1029         .cache_flush            = global_cache_flush,
1030         .create_gatt_table      = agp_generic_create_gatt_table,
1031         .free_gatt_table        = agp_generic_free_gatt_table,
1032         .insert_memory          = agp_generic_insert_memory,
1033         .remove_memory          = agp_generic_remove_memory,
1034         .alloc_by_type          = agp_generic_alloc_by_type,
1035         .free_by_type           = agp_generic_free_by_type,
1036         .agp_alloc_page         = agp_generic_alloc_page,
1037         .agp_destroy_page       = agp_generic_destroy_page,
1038 };
1039
1040 static struct agp_bridge_driver intel_830_driver = {
1041         .owner                  = THIS_MODULE,
1042         .aperture_sizes         = intel_i830_sizes,
1043         .size_type              = FIXED_APER_SIZE,
1044         .num_aperture_sizes     = 2,
1045         .needs_scratch_page     = TRUE,
1046         .configure              = intel_i830_configure,
1047         .fetch_size             = intel_i830_fetch_size,
1048         .cleanup                = intel_i830_cleanup,
1049         .tlb_flush              = intel_i810_tlbflush,
1050         .mask_memory            = intel_i810_mask_memory,
1051         .masks                  = intel_i810_masks,
1052         .agp_enable             = intel_i810_agp_enable,
1053         .cache_flush            = global_cache_flush,
1054         .create_gatt_table      = intel_i830_create_gatt_table,
1055         .free_gatt_table        = intel_i830_free_gatt_table,
1056         .insert_memory          = intel_i830_insert_entries,
1057         .remove_memory          = intel_i830_remove_entries,
1058         .alloc_by_type          = intel_i830_alloc_by_type,
1059         .free_by_type           = intel_i810_free_by_type,
1060         .agp_alloc_page         = agp_generic_alloc_page,
1061         .agp_destroy_page       = agp_generic_destroy_page,
1062 };
1063
1064 static struct agp_bridge_driver intel_820_driver = {
1065         .owner                  = THIS_MODULE,
1066         .aperture_sizes         = intel_8xx_sizes,
1067         .size_type              = U8_APER_SIZE,
1068         .num_aperture_sizes     = 7,
1069         .configure              = intel_820_configure,
1070         .fetch_size             = intel_8xx_fetch_size,
1071         .cleanup                = intel_820_cleanup,
1072         .tlb_flush              = intel_820_tlbflush,
1073         .mask_memory            = agp_generic_mask_memory,
1074         .masks                  = intel_generic_masks,
1075         .agp_enable             = agp_generic_enable,
1076         .cache_flush            = global_cache_flush,
1077         .create_gatt_table      = agp_generic_create_gatt_table,
1078         .free_gatt_table        = agp_generic_free_gatt_table,
1079         .insert_memory          = agp_generic_insert_memory,
1080         .remove_memory          = agp_generic_remove_memory,
1081         .alloc_by_type          = agp_generic_alloc_by_type,
1082         .free_by_type           = agp_generic_free_by_type,
1083         .agp_alloc_page         = agp_generic_alloc_page,
1084         .agp_destroy_page       = agp_generic_destroy_page,
1085 };
1086
1087 static struct agp_bridge_driver intel_830mp_driver = {
1088         .owner                  = THIS_MODULE,
1089         .aperture_sizes         = intel_830mp_sizes,
1090         .size_type              = U8_APER_SIZE,
1091         .num_aperture_sizes     = 4,
1092         .configure              = intel_830mp_configure,
1093         .fetch_size             = intel_8xx_fetch_size,
1094         .cleanup                = intel_8xx_cleanup,
1095         .tlb_flush              = intel_8xx_tlbflush,
1096         .mask_memory            = agp_generic_mask_memory,
1097         .masks                  = intel_generic_masks,
1098         .agp_enable             = agp_generic_enable,
1099         .cache_flush            = global_cache_flush,
1100         .create_gatt_table      = agp_generic_create_gatt_table,
1101         .free_gatt_table        = agp_generic_free_gatt_table,
1102         .insert_memory          = agp_generic_insert_memory,
1103         .remove_memory          = agp_generic_remove_memory,
1104         .alloc_by_type          = agp_generic_alloc_by_type,
1105         .free_by_type           = agp_generic_free_by_type,
1106         .agp_alloc_page         = agp_generic_alloc_page,
1107         .agp_destroy_page       = agp_generic_destroy_page,
1108 };
1109
1110 static struct agp_bridge_driver intel_840_driver = {
1111         .owner                  = THIS_MODULE,
1112         .aperture_sizes         = intel_8xx_sizes,
1113         .size_type              = U8_APER_SIZE,
1114         .num_aperture_sizes     = 7,
1115         .configure              = intel_840_configure,
1116         .fetch_size             = intel_8xx_fetch_size,
1117         .cleanup                = intel_8xx_cleanup,
1118         .tlb_flush              = intel_8xx_tlbflush,
1119         .mask_memory            = agp_generic_mask_memory,
1120         .masks                  = intel_generic_masks,
1121         .agp_enable             = agp_generic_enable,
1122         .cache_flush            = global_cache_flush,
1123         .create_gatt_table      = agp_generic_create_gatt_table,
1124         .free_gatt_table        = agp_generic_free_gatt_table,
1125         .insert_memory          = agp_generic_insert_memory,
1126         .remove_memory          = agp_generic_remove_memory,
1127         .alloc_by_type          = agp_generic_alloc_by_type,
1128         .free_by_type           = agp_generic_free_by_type,
1129         .agp_alloc_page         = agp_generic_alloc_page,
1130         .agp_destroy_page       = agp_generic_destroy_page,
1131 };
1132
1133 static struct agp_bridge_driver intel_845_driver = {
1134         .owner                  = THIS_MODULE,
1135         .aperture_sizes         = intel_8xx_sizes,
1136         .size_type              = U8_APER_SIZE,
1137         .num_aperture_sizes     = 7,
1138         .configure              = intel_845_configure,
1139         .fetch_size             = intel_8xx_fetch_size,
1140         .cleanup                = intel_8xx_cleanup,
1141         .tlb_flush              = intel_8xx_tlbflush,
1142         .mask_memory            = agp_generic_mask_memory,
1143         .masks                  = intel_generic_masks,
1144         .agp_enable             = agp_generic_enable,
1145         .cache_flush            = global_cache_flush,
1146         .create_gatt_table      = agp_generic_create_gatt_table,
1147         .free_gatt_table        = agp_generic_free_gatt_table,
1148         .insert_memory          = agp_generic_insert_memory,
1149         .remove_memory          = agp_generic_remove_memory,
1150         .alloc_by_type          = agp_generic_alloc_by_type,
1151         .free_by_type           = agp_generic_free_by_type,
1152         .agp_alloc_page         = agp_generic_alloc_page,
1153         .agp_destroy_page       = agp_generic_destroy_page,
1154 };
1155
1156 static struct agp_bridge_driver intel_850_driver = {
1157         .owner                  = THIS_MODULE,
1158         .aperture_sizes         = intel_8xx_sizes,
1159         .size_type              = U8_APER_SIZE,
1160         .num_aperture_sizes     = 7,
1161         .configure              = intel_850_configure,
1162         .fetch_size             = intel_8xx_fetch_size,
1163         .cleanup                = intel_8xx_cleanup,
1164         .tlb_flush              = intel_8xx_tlbflush,
1165         .mask_memory            = agp_generic_mask_memory,
1166         .masks                  = intel_generic_masks,
1167         .agp_enable             = agp_generic_enable,
1168         .cache_flush            = global_cache_flush,
1169         .create_gatt_table      = agp_generic_create_gatt_table,
1170         .free_gatt_table        = agp_generic_free_gatt_table,
1171         .insert_memory          = agp_generic_insert_memory,
1172         .remove_memory          = agp_generic_remove_memory,
1173         .alloc_by_type          = agp_generic_alloc_by_type,
1174         .free_by_type           = agp_generic_free_by_type,
1175         .agp_alloc_page         = agp_generic_alloc_page,
1176         .agp_destroy_page       = agp_generic_destroy_page,
1177 };
1178
1179 static struct agp_bridge_driver intel_860_driver = {
1180         .owner                  = THIS_MODULE,
1181         .aperture_sizes         = intel_8xx_sizes,
1182         .size_type              = U8_APER_SIZE,
1183         .num_aperture_sizes     = 7,
1184         .configure              = intel_860_configure,
1185         .fetch_size             = intel_8xx_fetch_size,
1186         .cleanup                = intel_8xx_cleanup,
1187         .tlb_flush              = intel_8xx_tlbflush,
1188         .mask_memory            = agp_generic_mask_memory,
1189         .masks                  = intel_generic_masks,
1190         .agp_enable             = agp_generic_enable,
1191         .cache_flush            = global_cache_flush,
1192         .create_gatt_table      = agp_generic_create_gatt_table,
1193         .free_gatt_table        = agp_generic_free_gatt_table,
1194         .insert_memory          = agp_generic_insert_memory,
1195         .remove_memory          = agp_generic_remove_memory,
1196         .alloc_by_type          = agp_generic_alloc_by_type,
1197         .free_by_type           = agp_generic_free_by_type,
1198         .agp_alloc_page         = agp_generic_alloc_page,
1199         .agp_destroy_page       = agp_generic_destroy_page,
1200 };
1201
1202 static struct agp_bridge_driver intel_7505_driver = {
1203         .owner                  = THIS_MODULE,
1204         .aperture_sizes         = intel_8xx_sizes,
1205         .size_type              = U8_APER_SIZE,
1206         .num_aperture_sizes     = 7,
1207         .configure              = intel_7505_configure,
1208         .fetch_size             = intel_8xx_fetch_size,
1209         .cleanup                = intel_8xx_cleanup,
1210         .tlb_flush              = intel_8xx_tlbflush,
1211         .mask_memory            = agp_generic_mask_memory,
1212         .masks                  = intel_generic_masks,
1213         .agp_enable             = agp_generic_enable,
1214         .cache_flush            = global_cache_flush,
1215         .create_gatt_table      = agp_generic_create_gatt_table,
1216         .free_gatt_table        = agp_generic_free_gatt_table,
1217         .insert_memory          = agp_generic_insert_memory,
1218         .remove_memory          = agp_generic_remove_memory,
1219         .alloc_by_type          = agp_generic_alloc_by_type,
1220         .free_by_type           = agp_generic_free_by_type,
1221         .agp_alloc_page         = agp_generic_alloc_page,
1222         .agp_destroy_page       = agp_generic_destroy_page,
1223 };
1224
1225 static int find_i810(u16 device, const char *name)
1226 {
1227         struct pci_dev *i810_dev;
1228
1229         i810_dev = pci_find_device(PCI_VENDOR_ID_INTEL, device, NULL);
1230         if (!i810_dev) {
1231                 printk(KERN_ERR PFX "Detected an Intel %s Chipset, "
1232                                 "but could not find the secondary device.\n",
1233                                 name);
1234                 return 0;
1235         }
1236
1237         intel_i810_private.i810_dev = i810_dev;
1238         return 1;
1239 }
1240
1241 static int find_i830(u16 device)
1242 {
1243         struct pci_dev *i830_dev;
1244
1245         i830_dev = pci_find_device(PCI_VENDOR_ID_INTEL, device, NULL);
1246         if (i830_dev && PCI_FUNC(i830_dev->devfn) != 0) {
1247                 i830_dev = pci_find_device(PCI_VENDOR_ID_INTEL,
1248                                 device, i830_dev);
1249         }
1250
1251         if (!i830_dev)
1252                 return 0;
1253
1254         intel_i830_private.i830_dev = i830_dev;
1255         return 1;
1256 }
1257
1258 static int __devinit agp_intel_probe(struct pci_dev *pdev,
1259                                      const struct pci_device_id *ent)
1260 {
1261         struct agp_bridge_data *bridge;
1262         char *name = "(unknown)";
1263         u8 cap_ptr = 0;
1264         struct resource *r;
1265
1266         cap_ptr = pci_find_capability(pdev, PCI_CAP_ID_AGP);
1267
1268         bridge = agp_alloc_bridge();
1269         if (!bridge)
1270                 return -ENOMEM;
1271
1272         switch (pdev->device) {
1273         case PCI_DEVICE_ID_INTEL_82443LX_0:
1274                 bridge->driver = &intel_generic_driver;
1275                 name = "440LX";
1276                 break;
1277         case PCI_DEVICE_ID_INTEL_82443BX_0:
1278                 bridge->driver = &intel_generic_driver;
1279                 name = "440BX";
1280                 break;
1281         case PCI_DEVICE_ID_INTEL_82443GX_0:
1282                 bridge->driver = &intel_generic_driver;
1283                 name = "440GX";
1284                 break;
1285         case PCI_DEVICE_ID_INTEL_82810_MC1:
1286                 if (!find_i810(PCI_DEVICE_ID_INTEL_82810_IG1, "i810"))
1287                         goto fail;
1288                 bridge->driver = &intel_810_driver;
1289                 name = "i810";
1290                 break;
1291         case PCI_DEVICE_ID_INTEL_82810_MC3:
1292                 if (!find_i810(PCI_DEVICE_ID_INTEL_82810_IG3, "i810 DC100"))
1293                         goto fail;
1294                 bridge->driver = &intel_810_driver;
1295                 name = "i810 DC100";
1296                 break;
1297         case PCI_DEVICE_ID_INTEL_82810E_MC:
1298                 if (!find_i810(PCI_DEVICE_ID_INTEL_82810E_IG, "i810 E"))
1299                         goto fail;
1300                 bridge->driver = &intel_810_driver;
1301                 name = "i810 E";
1302                 break;
1303          case PCI_DEVICE_ID_INTEL_82815_MC:
1304                 /*
1305                  * The i815 can operate either as an i810 style
1306                  * integrated device, or as an AGP4X motherboard.
1307                  */
1308                 if (find_i810(PCI_DEVICE_ID_INTEL_82815_CGC, "i815"))
1309                         bridge->driver = &intel_810_driver;
1310                 else
1311                         bridge->driver = &intel_815_driver;
1312                 name = "i815";
1313                 break;
1314         case PCI_DEVICE_ID_INTEL_82820_HB:
1315         case PCI_DEVICE_ID_INTEL_82820_UP_HB:
1316                 bridge->driver = &intel_820_driver;
1317                 name = "i820";
1318                 break;
1319         case PCI_DEVICE_ID_INTEL_82830_HB:
1320                 if (find_i830(PCI_DEVICE_ID_INTEL_82830_CGC)) {
1321                         bridge->driver = &intel_830_driver;
1322                 } else {
1323                         bridge->driver = &intel_830mp_driver;
1324                 }
1325                 name = "830M";
1326                 break;
1327         case PCI_DEVICE_ID_INTEL_82840_HB:
1328                 bridge->driver = &intel_840_driver;
1329                 name = "i840";
1330                 break;
1331         case PCI_DEVICE_ID_INTEL_82845_HB:
1332                 bridge->driver = &intel_845_driver;
1333                 name = "i845";
1334                 break;
1335         case PCI_DEVICE_ID_INTEL_82845G_HB:
1336                 if (find_i830(PCI_DEVICE_ID_INTEL_82845G_IG)) {
1337                         bridge->driver = &intel_830_driver;
1338                 } else {
1339                         bridge->driver = &intel_845_driver;
1340                 }
1341                 name = "845G";
1342                 break;
1343         case PCI_DEVICE_ID_INTEL_82850_HB:
1344                 bridge->driver = &intel_850_driver;
1345                 name = "i850";
1346                 break;
1347         case PCI_DEVICE_ID_INTEL_82855PM_HB:
1348                 bridge->driver = &intel_845_driver;
1349                 name = "855PM";
1350                 break;
1351         case PCI_DEVICE_ID_INTEL_82855GM_HB:
1352                 if (find_i830(PCI_DEVICE_ID_INTEL_82855GM_IG)) {
1353                         bridge->driver = &intel_830_driver;
1354                         name = "855";
1355                 } else {
1356                         bridge->driver = &intel_845_driver;
1357                         name = "855GM";
1358                 }
1359                 break;
1360         case PCI_DEVICE_ID_INTEL_82860_HB:
1361                 bridge->driver = &intel_860_driver;
1362                 name = "i860";
1363                 break;
1364         case PCI_DEVICE_ID_INTEL_82865_HB:
1365                 if (find_i830(PCI_DEVICE_ID_INTEL_82865_IG)) {
1366                         bridge->driver = &intel_830_driver;
1367                 } else {
1368                         bridge->driver = &intel_845_driver;
1369                 }
1370                 name = "865";
1371                 break;
1372         case PCI_DEVICE_ID_INTEL_82875_HB:
1373                 bridge->driver = &intel_845_driver;
1374                 name = "i875";
1375                 break;
1376         case PCI_DEVICE_ID_INTEL_7505_0:
1377                 bridge->driver = &intel_7505_driver;
1378                 name =  "E7505";
1379                 break;
1380         case PCI_DEVICE_ID_INTEL_7205_0:
1381                 bridge->driver = &intel_7505_driver;
1382                 name = "E7205";
1383                 break;
1384         default:
1385                 if (cap_ptr)
1386                         printk(KERN_WARNING PFX "Unsupported Intel chipset (device id: %04x)\n",
1387                             pdev->device);
1388                 agp_put_bridge(bridge);
1389                 return -ENODEV;
1390         };
1391
1392         bridge->dev = pdev;
1393         bridge->capndx = cap_ptr;
1394
1395         if (bridge->driver == &intel_810_driver)
1396                 bridge->dev_private_data = &intel_i810_private;
1397         else if (bridge->driver == &intel_830_driver)
1398                 bridge->dev_private_data = &intel_i830_private;
1399
1400         printk(KERN_INFO PFX "Detected an Intel %s Chipset.\n", name);
1401
1402         /*
1403         * The following fixes the case where the BIOS has "forgotten" to
1404         * provide an address range for the GART.
1405         * 20030610 - hamish@zot.org
1406         */
1407         r = &pdev->resource[0];
1408         if (!r->start && r->end) {
1409                 if(pci_assign_resource(pdev, 0)) {
1410                         printk(KERN_ERR PFX "could not assign resource 0\n");
1411                         agp_put_bridge(bridge);
1412                         return -ENODEV;
1413                 }
1414         }
1415
1416         /*
1417         * If the device has not been properly setup, the following will catch
1418         * the problem and should stop the system from crashing.
1419         * 20030610 - hamish@zot.org
1420         */
1421         if (pci_enable_device(pdev)) {
1422                 printk(KERN_ERR PFX "Unable to Enable PCI device\n");
1423                 agp_put_bridge(bridge);
1424                 return -ENODEV;
1425         }
1426
1427         /* Fill in the mode register */
1428         if (cap_ptr) {
1429                 pci_read_config_dword(pdev,
1430                                 bridge->capndx+PCI_AGP_STATUS,
1431                                 &bridge->mode);
1432         }
1433
1434         pci_set_drvdata(pdev, bridge);
1435         return agp_add_bridge(bridge);
1436  fail:
1437         agp_put_bridge(bridge);
1438         return -ENODEV;
1439 }
1440
1441 static void __devexit agp_intel_remove(struct pci_dev *pdev)
1442 {
1443         struct agp_bridge_data *bridge = pci_get_drvdata(pdev);
1444
1445         agp_remove_bridge(bridge);
1446         agp_put_bridge(bridge);
1447 }
1448
1449 static int agp_intel_resume(struct pci_dev *pdev)
1450 {
1451         struct agp_bridge_data *bridge = pci_get_drvdata(pdev);
1452
1453         pci_restore_state(pdev, pdev->saved_config_space);
1454
1455         if (bridge->driver == &intel_generic_driver)
1456                 intel_configure();
1457         else if (bridge->driver == &intel_845_driver)
1458                 intel_845_configure();
1459         else if (bridge->driver == &intel_830mp_driver)
1460                 intel_830mp_configure();
1461
1462         return 0;
1463 }
1464
1465 static struct pci_device_id agp_intel_pci_table[] = {
1466 #define ID(x)                                           \
1467         {                                               \
1468         .class          = (PCI_CLASS_BRIDGE_HOST << 8), \
1469         .class_mask     = ~0,                           \
1470         .vendor         = PCI_VENDOR_ID_INTEL,          \
1471         .device         = x,                            \
1472         .subvendor      = PCI_ANY_ID,                   \
1473         .subdevice      = PCI_ANY_ID,                   \
1474         }
1475         ID(PCI_DEVICE_ID_INTEL_82443LX_0),
1476         ID(PCI_DEVICE_ID_INTEL_82443BX_0),
1477         ID(PCI_DEVICE_ID_INTEL_82443GX_0),
1478         ID(PCI_DEVICE_ID_INTEL_82810_MC1),
1479         ID(PCI_DEVICE_ID_INTEL_82810_MC3),
1480         ID(PCI_DEVICE_ID_INTEL_82810E_MC),
1481         ID(PCI_DEVICE_ID_INTEL_82815_MC),
1482         ID(PCI_DEVICE_ID_INTEL_82820_HB),
1483         ID(PCI_DEVICE_ID_INTEL_82820_UP_HB),
1484         ID(PCI_DEVICE_ID_INTEL_82830_HB),
1485         ID(PCI_DEVICE_ID_INTEL_82840_HB),
1486         ID(PCI_DEVICE_ID_INTEL_82845_HB),
1487         ID(PCI_DEVICE_ID_INTEL_82845G_HB),
1488         ID(PCI_DEVICE_ID_INTEL_82850_HB),
1489         ID(PCI_DEVICE_ID_INTEL_82855PM_HB),
1490         ID(PCI_DEVICE_ID_INTEL_82855GM_HB),
1491         ID(PCI_DEVICE_ID_INTEL_82860_HB),
1492         ID(PCI_DEVICE_ID_INTEL_82865_HB),
1493         ID(PCI_DEVICE_ID_INTEL_82875_HB),
1494         ID(PCI_DEVICE_ID_INTEL_7505_0),
1495         ID(PCI_DEVICE_ID_INTEL_7205_0),
1496         { }
1497 };
1498
1499 MODULE_DEVICE_TABLE(pci, agp_intel_pci_table);
1500
1501 static struct pci_driver agp_intel_pci_driver = {
1502         .name           = "agpgart-intel",
1503         .id_table       = agp_intel_pci_table,
1504         .probe          = agp_intel_probe,
1505         .remove         = agp_intel_remove,
1506         .resume         = agp_intel_resume,
1507 };
1508
1509 /* intel_agp_init() must not be declared static for explicit
1510    early initialization to work (ie i810fb) */
1511 int __init agp_intel_init(void)
1512 {
1513         static int agp_initialised=0;
1514
1515         if (agp_initialised == 1)
1516                 return 0;
1517         agp_initialised=1;
1518
1519         return pci_module_init(&agp_intel_pci_driver);
1520 }
1521
1522 static void __exit agp_intel_cleanup(void)
1523 {
1524         pci_unregister_driver(&agp_intel_pci_driver);
1525 }
1526
1527 module_init(agp_intel_init);
1528 module_exit(agp_intel_cleanup);
1529
1530 MODULE_AUTHOR("Dave Jones <davej@codemonkey.org.uk>");
1531 MODULE_LICENSE("GPL and additional rights");