drivers/char/agp/intel-agp.c

   1 /*
   2  * Intel AGPGART routines.
   3  */
   4
   5 /*
   6  * Intel(R) 855GM/852GM and 865G support added by David Dawes
   7  * <dawes@tungstengraphics.com>.
   8  *
   9  * Intel(R) 915G support added by Alan Hourihane
  10  * <alanh@tungstengraphics.com>.
  11  */
  12
  13 #include <linux/module.h>
  14 #include <linux/pci.h>
  15 #include <linux/init.h>
  16 #include <linux/pagemap.h>
  17 #include <linux/agp_backend.h>
  18 #include "agp.h"
  19
  20 /* Intel 815 register */
  21 #define INTEL_815_APCONT        0x51
  22 #define INTEL_815_ATTBASE_MASK  ~0x1FFFFFFF
  23
  24 /* Intel i820 registers */
  25 #define INTEL_I820_RDCR         0x51
  26 #define INTEL_I820_ERRSTS       0xc8
  27
  28 /* Intel i840 registers */
  29 #define INTEL_I840_MCHCFG       0x50
  30 #define INTEL_I840_ERRSTS       0xc8
  31
  32 /* Intel i850 registers */
  33 #define INTEL_I850_MCHCFG       0x50
  34 #define INTEL_I850_ERRSTS       0xc8
  35
  36 /* intel 915G registers */
  37 #define I915_GMADDR     0x18
  38 #define I915_MMADDR     0x10
  39 #define I915_PTEADDR    0x1C
  40 #define I915_GMCH_GMS_STOLEN_48M        (0x6 << 4)
  41 #define I915_GMCH_GMS_STOLEN_64M        (0x7 << 4)
  42
  43
  44 /* Intel 7505 registers */
  45 #define INTEL_I7505_APSIZE      0x74
  46 #define INTEL_I7505_NCAPID      0x60
  47 #define INTEL_I7505_NISTAT      0x6c
  48 #define INTEL_I7505_ATTBASE     0x78
  49 #define INTEL_I7505_ERRSTS      0x42
  50 #define INTEL_I7505_AGPCTRL     0x70
  51 #define INTEL_I7505_MCHCFG      0x50
  52
  53 static struct aper_size_info_fixed intel_i810_sizes[] =
  54 {
  55         {64, 16384, 4},
  56         /* The 32M mode still requires a 64k gatt */
  57         {32, 8192, 4}
  58 };
  59
  60 #define AGP_DCACHE_MEMORY       1
  61 #define AGP_PHYS_MEMORY         2
  62
  63 static struct gatt_mask intel_i810_masks[] =
  64 {
  65         {.mask = I810_PTE_VALID, .type = 0},
  66         {.mask = (I810_PTE_VALID | I810_PTE_LOCAL), .type = AGP_DCACHE_MEMORY},
  67         {.mask = I810_PTE_VALID, .type = 0}
  68 };
  69
  70 static struct _intel_i810_private {
  71         struct pci_dev *i810_dev;       /* device one */
  72         volatile u8 __iomem *registers;
  73         int num_dcache_entries;
  74 } intel_i810_private;
  75
  76 static int intel_i810_fetch_size(void)
  77 {
  78         u32 smram_miscc;
  79         struct aper_size_info_fixed *values;
  80
  81         pci_read_config_dword(agp_bridge->dev, I810_SMRAM_MISCC, &smram_miscc);
  82         values = A_SIZE_FIX(agp_bridge->driver->aperture_sizes);
  83
  84         if ((smram_miscc & I810_GMS) == I810_GMS_DISABLE) {
  85                 printk(KERN_WARNING PFX "i810 is disabled\n");
  86                 return 0;
  87         }
  88         if ((smram_miscc & I810_GFX_MEM_WIN_SIZE) == I810_GFX_MEM_WIN_32M) {
  89                 agp_bridge->previous_size =
  90                         agp_bridge->current_size = (void *) (values + 1);
  91                 agp_bridge->aperture_size_idx = 1;
  92                 return values[1].size;
  93         } else {
  94                 agp_bridge->previous_size =
  95                         agp_bridge->current_size = (void *) (values);
  96                 agp_bridge->aperture_size_idx = 0;
  97                 return values[0].size;
  98         }
  99
 100         return 0;
 101 }
 102
 103 static int intel_i810_configure(void)
 104 {
 105         struct aper_size_info_fixed *current_size;
 106         u32 temp;
 107         int i;
 108
 109         current_size = A_SIZE_FIX(agp_bridge->current_size);
 110
 111         pci_read_config_dword(intel_i810_private.i810_dev, I810_MMADDR, &temp);
 112         temp &= 0xfff80000;
 113
 114         intel_i810_private.registers = ioremap(temp, 128 * 4096);
 115         if (!intel_i810_private.registers) {
 116                 printk(KERN_ERR PFX "Unable to remap memory.\n");
 117                 return -ENOMEM;
 118         }
 119
 120         if ((readl(intel_i810_private.registers+I810_DRAM_CTL)
 121                 & I810_DRAM_ROW_0) == I810_DRAM_ROW_0_SDRAM) {
 122                 /* This will need to be dynamically assigned */
 123                 printk(KERN_INFO PFX "detected 4MB dedicated video ram.\n");
 124                 intel_i810_private.num_dcache_entries = 1024;
 125         }
 126         pci_read_config_dword(intel_i810_private.i810_dev, I810_GMADDR, &temp);
 127         agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
 128         writel(agp_bridge->gatt_bus_addr | I810_PGETBL_ENABLED, intel_i810_private.registers+I810_PGETBL_CTL);
 129         readl(intel_i810_private.registers+I810_PGETBL_CTL);    /* PCI Posting. */
 130
 131         if (agp_bridge->driver->needs_scratch_page) {
 132                 for (i = 0; i < current_size->num_entries; i++) {
 133                         writel(agp_bridge->scratch_page, intel_i810_private.registers+I810_PTE_BASE+(i*4));
 134                         readl(intel_i810_private.registers+I810_PTE_BASE+(i*4));        /* PCI posting. */
 135                 }
 136         }
 137         global_cache_flush();
 138         return 0;
 139 }
 140
 141 static void intel_i810_cleanup(void)
 142 {
 143         writel(0, intel_i810_private.registers+I810_PGETBL_CTL);
 144         readl(intel_i810_private.registers);    /* PCI Posting. */
 145         iounmap(intel_i810_private.registers);
 146 }
 147
 148 static void intel_i810_tlbflush(struct agp_memory *mem)
 149 {
 150         return;
 151 }
 152
 153 static void intel_i810_agp_enable(u32 mode)
 154 {
 155         return;
 156 }
 157
 158 /* Exists to support ARGB cursors */
 159 static void *i8xx_alloc_pages(void)
 160 {
 161         struct page * page;
 162
 163         page = alloc_pages(GFP_KERNEL, 2);
 164         if (page == NULL)
 165                 return NULL;
 166
 167         if (change_page_attr(page, 4, PAGE_KERNEL_NOCACHE) < 0) {
 168                 global_flush_tlb();
 169                 __free_page(page);
 170                 return NULL;
 171         }
 172         global_flush_tlb();
 173         get_page(page);
 174         SetPageLocked(page);
 175         atomic_inc(&agp_bridge->current_memory_agp);
 176         return page_address(page);
 177 }
 178
 179 static void i8xx_destroy_pages(void *addr)
 180 {
 181         struct page *page;
 182
 183         if (addr == NULL)
 184                 return;
 185
 186         page = virt_to_page(addr);
 187         change_page_attr(page, 4, PAGE_KERNEL);
 188         global_flush_tlb();
 189         put_page(page);
 190         unlock_page(page);
 191         free_pages((unsigned long)addr, 2);
 192         atomic_dec(&agp_bridge->current_memory_agp);
 193 }
 194
 195 static int intel_i810_insert_entries(struct agp_memory *mem, off_t pg_start,
 196                                 int type)
 197 {
 198         int i, j, num_entries;
 199         void *temp;
 200
 201         temp = agp_bridge->current_size;
 202         num_entries = A_SIZE_FIX(temp)->num_entries;
 203
 204         if ((pg_start + mem->page_count) > num_entries) {
 205                 return -EINVAL;
 206         }
 207         for (j = pg_start; j < (pg_start + mem->page_count); j++) {
 208                 if (!PGE_EMPTY(agp_bridge, readl(agp_bridge->gatt_table+j)))
 209                         return -EBUSY;
 210         }
 211
 212         if (type != 0 || mem->type != 0) {
 213                 if ((type == AGP_DCACHE_MEMORY) && (mem->type == AGP_DCACHE_MEMORY)) {
 214                         /* special insert */
 215                         global_cache_flush();
 216                         for (i = pg_start; i < (pg_start + mem->page_count); i++) {
 217                                 writel((i*4096)|I810_PTE_LOCAL|I810_PTE_VALID, intel_i810_private.registers+I810_PTE_BASE+(i*4));
 218                                 readl(intel_i810_private.registers+I810_PTE_BASE+(i*4));        /* PCI Posting. */
 219                         }
 220                         global_cache_flush();
 221                         agp_bridge->driver->tlb_flush(mem);
 222                         return 0;
 223                 }
 224                 if((type == AGP_PHYS_MEMORY) && (mem->type == AGP_PHYS_MEMORY))
 225                         goto insert;
 226                 return -EINVAL;
 227         }
 228
 229 insert:
 230         global_cache_flush();
 231         for (i = 0, j = pg_start; i < mem->page_count; i++, j++) {
 232                 writel(agp_bridge->driver->mask_memory(mem->memory[i], mem->type),
 233                                 intel_i810_private.registers+I810_PTE_BASE+(j*4));
 234                 readl(intel_i810_private.registers+I810_PTE_BASE+(j*4));        /* PCI Posting. */
 235         }
 236         global_cache_flush();
 237
 238         agp_bridge->driver->tlb_flush(mem);
 239         return 0;
 240 }
 241
 242 static int intel_i810_remove_entries(struct agp_memory *mem, off_t pg_start,
 243                                 int type)
 244 {
 245         int i;
 246
 247         for (i = pg_start; i < (mem->page_count + pg_start); i++) {
 248                 writel(agp_bridge->scratch_page, intel_i810_private.registers+I810_PTE_BASE+(i*4));
 249                 readl(intel_i810_private.registers+I810_PTE_BASE+(i*4));        /* PCI Posting. */
 250         }
 251
 252         global_cache_flush();
 253         agp_bridge->driver->tlb_flush(mem);
 254         return 0;
 255 }
 256
 257 /*
 258  * The i810/i830 requires a physical address to program its mouse
 259  * pointer into hardware.
 260  * However the Xserver still writes to it through the agp aperture.
 261  */
 262 static struct agp_memory *alloc_agpphysmem_i8xx(size_t pg_count, int type)
 263 {
 264         struct agp_memory *new;
 265         void *addr;
 266
 267         if (pg_count != 1 && pg_count != 4)
 268                 return NULL;
 269
 270         switch (pg_count) {
 271         case 1: addr = agp_bridge->driver->agp_alloc_page();
 272                 break;
 273         case 4:
 274                 /* kludge to get 4 physical pages for ARGB cursor */
 275                 addr = i8xx_alloc_pages();
 276                 break;
 277         default:
 278                 return NULL;
 279         }
 280
 281         if (addr == NULL)
 282                 return NULL;
 283
 284         new = agp_create_memory(pg_count);
 285         if (new == NULL)
 286                 return NULL;
 287
 288         new->memory[0] = virt_to_phys(addr);
 289         if (pg_count == 4) {
 290                 /* kludge to get 4 physical pages for ARGB cursor */
 291                 new->memory[1] = new->memory[0] + PAGE_SIZE;
 292                 new->memory[2] = new->memory[1] + PAGE_SIZE;
 293                 new->memory[3] = new->memory[2] + PAGE_SIZE;
 294         }
 295         new->page_count = pg_count;
 296         new->num_scratch_pages = pg_count;
 297         new->type = AGP_PHYS_MEMORY;
 298         new->physical = new->memory[0];
 299         return new;
 300 }
 301
 302 static struct agp_memory *intel_i810_alloc_by_type(size_t pg_count, int type)
 303 {
 304         struct agp_memory *new;
 305
 306         if (type == AGP_DCACHE_MEMORY) {
 307                 if (pg_count != intel_i810_private.num_dcache_entries)
 308                         return NULL;
 309
 310                 new = agp_create_memory(1);
 311                 if (new == NULL)
 312                         return NULL;
 313
 314                 new->type = AGP_DCACHE_MEMORY;
 315                 new->page_count = pg_count;
 316                 new->num_scratch_pages = 0;
 317                 vfree(new->memory);
 318                 return new;
 319         }
 320         if (type == AGP_PHYS_MEMORY)
 321                 return(alloc_agpphysmem_i8xx(pg_count, type));
 322
 323         return NULL;
 324 }
 325
 326 static void intel_i810_free_by_type(struct agp_memory *curr)
 327 {
 328         agp_free_key(curr->key);
 329         if(curr->type == AGP_PHYS_MEMORY) {
 330                 if (curr->page_count == 4)
 331                         i8xx_destroy_pages(phys_to_virt(curr->memory[0]));
 332                 else
 333                         agp_bridge->driver->agp_destroy_page(
 334                                  phys_to_virt(curr->memory[0]));
 335                 vfree(curr->memory);
 336         }
 337         kfree(curr);
 338 }
 339
 340 static unsigned long intel_i810_mask_memory(unsigned long addr, int type)
 341 {
 342         /* Type checking must be done elsewhere */
 343         return addr | agp_bridge->driver->masks[type].mask;
 344 }
 345
 346 static struct aper_size_info_fixed intel_i830_sizes[] =
 347 {
 348         {128, 32768, 5},
 349         /* The 64M mode still requires a 128k gatt */
 350         {64, 16384, 5},
 351         {256, 65536, 6},
 352 };
 353
 354 static struct _intel_i830_private {
 355         struct pci_dev *i830_dev;               /* device one */
 356         volatile u8 __iomem *registers;
 357         volatile u32 __iomem *gtt;              /* I915G */
 358         int gtt_entries;
 359 } intel_i830_private;
 360
 361 static void intel_i830_init_gtt_entries(void)
 362 {
 363         u16 gmch_ctrl;
 364         int gtt_entries;
 365         u8 rdct;
 366         int local = 0;
 367         static const int ddt[4] = { 0, 16, 32, 64 };
 368         int size;
 369
 370         pci_read_config_word(agp_bridge->dev,I830_GMCH_CTRL,&gmch_ctrl);
 371
 372         /* We obtain the size of the GTT, which is also stored (for some
 373          * reason) at the top of stolen memory. Then we add 4KB to that
 374          * for the video BIOS popup, which is also stored in there. */
 375         size = agp_bridge->driver->fetch_size() + 4;
 376
 377         if (agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82830_HB ||
 378             agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82845G_HB) {
 379                 switch (gmch_ctrl & I830_GMCH_GMS_MASK) {
 380                 case I830_GMCH_GMS_STOLEN_512:
 381                         gtt_entries = KB(512) - KB(size);
 382                         break;
 383                 case I830_GMCH_GMS_STOLEN_1024:
 384                         gtt_entries = MB(1) - KB(size);
 385                         break;
 386                 case I830_GMCH_GMS_STOLEN_8192:
 387                         gtt_entries = MB(8) - KB(size);
 388                         break;
 389                 case I830_GMCH_GMS_LOCAL:
 390                         rdct = readb(intel_i830_private.registers+I830_RDRAM_CHANNEL_TYPE);
 391                         gtt_entries = (I830_RDRAM_ND(rdct) + 1) *
 392                                         MB(ddt[I830_RDRAM_DDT(rdct)]);
 393                         local = 1;
 394                         break;
 395                 default:
 396                         gtt_entries = 0;
 397                         break;
 398                 }
 399         } else {
 400                 switch (gmch_ctrl & I830_GMCH_GMS_MASK) {
 401                 case I855_GMCH_GMS_STOLEN_1M:
 402                         gtt_entries = MB(1) - KB(size);
 403                         break;
 404                 case I855_GMCH_GMS_STOLEN_4M:
 405                         gtt_entries = MB(4) - KB(size);
 406                         break;
 407                 case I855_GMCH_GMS_STOLEN_8M:
 408                         gtt_entries = MB(8) - KB(size);
 409                         break;
 410                 case I855_GMCH_GMS_STOLEN_16M:
 411                         gtt_entries = MB(16) - KB(size);
 412                         break;
 413                 case I855_GMCH_GMS_STOLEN_32M:
 414                         gtt_entries = MB(32) - KB(size);
 415                         break;
 416                 case I915_GMCH_GMS_STOLEN_48M:
 417                         /* Check it's really I915G */
 418                         if (agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82915G_HB)
 419                                 gtt_entries = MB(48) - KB(size);
 420                         else
 421                                 gtt_entries = 0;
 422                         break;
 423                 case I915_GMCH_GMS_STOLEN_64M:
 424                         /* Check it's really I915G */
 425                         if (agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82915G_HB)
 426                                 gtt_entries = MB(64) - KB(size);
 427                         else
 428                                 gtt_entries = 0;
 429                 default:
 430                         gtt_entries = 0;
 431                         break;
 432                 }
 433         }
 434         if (gtt_entries > 0)
 435                 printk(KERN_INFO PFX "Detected %dK %s memory.\n",
 436                        gtt_entries / KB(1), local ? "local" : "stolen");
 437         else
 438                 printk(KERN_INFO PFX
 439                        "No pre-allocated video memory detected.\n");
 440         gtt_entries /= KB(4);
 441
 442         intel_i830_private.gtt_entries = gtt_entries;
 443 }
 444
 445 /* The intel i830 automatically initializes the agp aperture during POST.
 446  * Use the memory already set aside for in the GTT.
 447  */
 448 static int intel_i830_create_gatt_table(void)
 449 {
 450         int page_order;
 451         struct aper_size_info_fixed *size;
 452         int num_entries;
 453         u32 temp;
 454
 455         size = agp_bridge->current_size;
 456         page_order = size->page_order;
 457         num_entries = size->num_entries;
 458         agp_bridge->gatt_table_real = NULL;
 459
 460         pci_read_config_dword(intel_i830_private.i830_dev,I810_MMADDR,&temp);
 461         temp &= 0xfff80000;
 462
 463         intel_i830_private.registers = ioremap(temp,128 * 4096);
 464         if (!intel_i830_private.registers)
 465                 return (-ENOMEM);
 466
 467         temp = readl(intel_i830_private.registers+I810_PGETBL_CTL) & 0xfffff000;
 468         global_cache_flush();   /* FIXME: ?? */
 469
 470         /* we have to call this as early as possible after the MMIO base address is known */
 471         intel_i830_init_gtt_entries();
 472
 473         agp_bridge->gatt_table = NULL;
 474
 475         agp_bridge->gatt_bus_addr = temp;
 476
 477         return(0);
 478 }
 479
 480 /* Return the gatt table to a sane state. Use the top of stolen
 481  * memory for the GTT.
 482  */
 483 static int intel_i830_free_gatt_table(void)
 484 {
 485         return(0);
 486 }
 487
 488 static int intel_i830_fetch_size(void)
 489 {
 490         u16 gmch_ctrl;
 491         struct aper_size_info_fixed *values;
 492
 493         values = A_SIZE_FIX(agp_bridge->driver->aperture_sizes);
 494
 495         if (agp_bridge->dev->device != PCI_DEVICE_ID_INTEL_82830_HB &&
 496             agp_bridge->dev->device != PCI_DEVICE_ID_INTEL_82845G_HB) {
 497                 /* 855GM/852GM/865G has 128MB aperture size */
 498                 agp_bridge->previous_size = agp_bridge->current_size = (void *) values;
 499                 agp_bridge->aperture_size_idx = 0;
 500                 return(values[0].size);
 501         }
 502
 503         pci_read_config_word(agp_bridge->dev,I830_GMCH_CTRL,&gmch_ctrl);
 504
 505         if ((gmch_ctrl & I830_GMCH_MEM_MASK) == I830_GMCH_MEM_128M) {
 506                 agp_bridge->previous_size = agp_bridge->current_size = (void *) values;
 507                 agp_bridge->aperture_size_idx = 0;
 508                 return(values[0].size);
 509         } else {
 510                 agp_bridge->previous_size = agp_bridge->current_size = (void *) (values + 1);
 511                 agp_bridge->aperture_size_idx = 1;
 512                 return(values[1].size);
 513         }
 514
 515         return(0);
 516 }
 517
 518 static int intel_i830_configure(void)
 519 {
 520         struct aper_size_info_fixed *current_size;
 521         u32 temp;
 522         u16 gmch_ctrl;
 523         int i;
 524
 525         current_size = A_SIZE_FIX(agp_bridge->current_size);
 526
 527         pci_read_config_dword(intel_i830_private.i830_dev,I810_GMADDR,&temp);
 528         agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
 529
 530         pci_read_config_word(agp_bridge->dev,I830_GMCH_CTRL,&gmch_ctrl);
 531         gmch_ctrl |= I830_GMCH_ENABLED;
 532         pci_write_config_word(agp_bridge->dev,I830_GMCH_CTRL,gmch_ctrl);
 533
 534         writel(agp_bridge->gatt_bus_addr|I810_PGETBL_ENABLED, intel_i830_private.registers+I810_PGETBL_CTL);
 535         readl(intel_i830_private.registers+I810_PGETBL_CTL);    /* PCI Posting. */
 536
 537         if (agp_bridge->driver->needs_scratch_page) {
 538                 for (i = intel_i830_private.gtt_entries; i < current_size->num_entries; i++) {
 539                         writel(agp_bridge->scratch_page, intel_i830_private.registers+I810_PTE_BASE+(i*4));
 540                         readl(intel_i830_private.registers+I810_PTE_BASE+(i*4));        /* PCI Posting. */
 541                 }
 542         }
 543
 544         global_cache_flush();
 545         return (0);
 546 }
 547
 548 static void intel_i830_cleanup(void)
 549 {
 550         iounmap(intel_i830_private.registers);
 551 }
 552
 553 static int intel_i830_insert_entries(struct agp_memory *mem,off_t pg_start, int type)
 554 {
 555         int i,j,num_entries;
 556         void *temp;
 557
 558         temp = agp_bridge->current_size;
 559         num_entries = A_SIZE_FIX(temp)->num_entries;
 560
 561         if (pg_start < intel_i830_private.gtt_entries) {
 562                 printk (KERN_DEBUG PFX "pg_start == 0x%.8lx,intel_i830_private.gtt_entries == 0x%.8x\n",
 563                                 pg_start,intel_i830_private.gtt_entries);
 564
 565                 printk (KERN_INFO PFX "Trying to insert into local/stolen memory\n");
 566                 return (-EINVAL);
 567         }
 568
 569         if ((pg_start + mem->page_count) > num_entries)
 570                 return (-EINVAL);
 571
 572         /* The i830 can't check the GTT for entries since its read only,
 573          * depend on the caller to make the correct offset decisions.
 574          */
 575
 576         if ((type != 0 && type != AGP_PHYS_MEMORY) ||
 577                 (mem->type != 0 && mem->type != AGP_PHYS_MEMORY))
 578                 return (-EINVAL);
 579
 580         global_cache_flush();   /* FIXME: Necessary ?*/
 581
 582         for (i = 0, j = pg_start; i < mem->page_count; i++, j++) {
 583                 writel(agp_bridge->driver->mask_memory(mem->memory[i], mem->type),
 584                                 intel_i830_private.registers+I810_PTE_BASE+(j*4));
 585                 readl(intel_i830_private.registers+I810_PTE_BASE+(j*4));        /* PCI Posting. */
 586         }
 587
 588         global_cache_flush();
 589         agp_bridge->driver->tlb_flush(mem);
 590         return(0);
 591 }
 592
 593 static int intel_i830_remove_entries(struct agp_memory *mem,off_t pg_start,
 594                                 int type)
 595 {
 596         int i;
 597
 598         global_cache_flush();
 599
 600         if (pg_start < intel_i830_private.gtt_entries) {
 601                 printk (KERN_INFO PFX "Trying to disable local/stolen memory\n");
 602                 return (-EINVAL);
 603         }
 604
 605         for (i = pg_start; i < (mem->page_count + pg_start); i++) {
 606                 writel(agp_bridge->scratch_page, intel_i830_private.registers+I810_PTE_BASE+(i*4));
 607                 readl(intel_i830_private.registers+I810_PTE_BASE+(i*4));        /* PCI Posting. */
 608         }
 609
 610         global_cache_flush();
 611         agp_bridge->driver->tlb_flush(mem);
 612         return (0);
 613 }
 614
 615 static struct agp_memory *intel_i830_alloc_by_type(size_t pg_count,int type)
 616 {
 617         if (type == AGP_PHYS_MEMORY)
 618                 return(alloc_agpphysmem_i8xx(pg_count, type));
 619
 620         /* always return NULL for other allocation types for now */
 621         return(NULL);
 622 }
 623
 624 static int intel_i915_configure(void)
 625 {
 626         struct aper_size_info_fixed *current_size;
 627         u32 temp;
 628         u16 gmch_ctrl;
 629         int i;
 630
 631         current_size = A_SIZE_FIX(agp_bridge->current_size);
 632
 633         pci_read_config_dword(intel_i830_private.i830_dev, I915_GMADDR, &temp);
 634
 635         agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
 636
 637         pci_read_config_word(agp_bridge->dev,I830_GMCH_CTRL,&gmch_ctrl);
 638         gmch_ctrl |= I830_GMCH_ENABLED;
 639         pci_write_config_word(agp_bridge->dev,I830_GMCH_CTRL,gmch_ctrl);
 640
 641         writel(agp_bridge->gatt_bus_addr|I810_PGETBL_ENABLED, intel_i830_private.registers+I810_PGETBL_CTL);
 642         readl(intel_i830_private.registers+I810_PGETBL_CTL);    /* PCI Posting. */
 643
 644         if (agp_bridge->driver->needs_scratch_page) {
 645                 for (i = intel_i830_private.gtt_entries; i < current_size->num_entries; i++) {
 646                         writel(agp_bridge->scratch_page, intel_i830_private.gtt+i);
 647                         readl(intel_i830_private.gtt+i);        /* PCI Posting. */
 648                 }
 649         }
 650
 651         global_cache_flush();
 652         return (0);
 653 }
 654
 655 static void intel_i915_cleanup(void)
 656 {
 657         iounmap(intel_i830_private.gtt);
 658         iounmap(intel_i830_private.registers);
 659 }
 660
 661 static int intel_i915_insert_entries(struct agp_memory *mem,off_t pg_start,
 662                                 int type)
 663 {
 664         int i,j,num_entries;
 665         void *temp;
 666
 667         temp = agp_bridge->current_size;
 668         num_entries = A_SIZE_FIX(temp)->num_entries;
 669
 670         if (pg_start < intel_i830_private.gtt_entries) {
 671                 printk (KERN_DEBUG PFX "pg_start == 0x%.8lx,intel_i830_private.gtt_entries == 0x%.8x\n",
 672                                 pg_start,intel_i830_private.gtt_entries);
 673
 674                 printk (KERN_INFO PFX "Trying to insert into local/stolen memory\n");
 675                 return (-EINVAL);
 676         }
 677
 678         if ((pg_start + mem->page_count) > num_entries)
 679                 return (-EINVAL);
 680
 681         /* The i830 can't check the GTT for entries since its read only,
 682          * depend on the caller to make the correct offset decisions.
 683          */
 684
 685         if ((type != 0 && type != AGP_PHYS_MEMORY) ||
 686                 (mem->type != 0 && mem->type != AGP_PHYS_MEMORY))
 687                 return (-EINVAL);
 688
 689         global_cache_flush();
 690
 691         for (i = 0, j = pg_start; i < mem->page_count; i++, j++) {
 692                 writel(agp_bridge->driver->mask_memory(mem->memory[i], mem->type), intel_i830_private.gtt+j);
 693                 readl(intel_i830_private.gtt+j);        /* PCI Posting. */
 694         }
 695
 696         global_cache_flush();
 697         agp_bridge->driver->tlb_flush(mem);
 698         return(0);
 699 }
 700
 701 static int intel_i915_remove_entries(struct agp_memory *mem,off_t pg_start,
 702                                 int type)
 703 {
 704         int i;
 705
 706         global_cache_flush();
 707
 708         if (pg_start < intel_i830_private.gtt_entries) {
 709                 printk (KERN_INFO PFX "Trying to disable local/stolen memory\n");
 710                 return (-EINVAL);
 711         }
 712
 713         for (i = pg_start; i < (mem->page_count + pg_start); i++) {
 714                 writel(agp_bridge->scratch_page, intel_i830_private.gtt+i);
 715                 readl(intel_i830_private.gtt+i);
 716         }
 717
 718         global_cache_flush();
 719         agp_bridge->driver->tlb_flush(mem);
 720         return (0);
 721 }
 722
 723 static int intel_i915_fetch_size(void)
 724 {
 725         struct aper_size_info_fixed *values;
 726         u32 temp, offset = 0;
 727
 728 #define I915_256MB_ADDRESS_MASK (1<<27)
 729
 730         values = A_SIZE_FIX(agp_bridge->driver->aperture_sizes);
 731
 732         pci_read_config_dword(intel_i830_private.i830_dev, I915_GMADDR, &temp);
 733         if (temp & I915_256MB_ADDRESS_MASK)
 734                 offset = 0;     /* 128MB aperture */
 735         else
 736                 offset = 2;     /* 256MB aperture */
 737         agp_bridge->previous_size = agp_bridge->current_size = (void *)(values + offset);
 738         return(values[offset].size);
 739 }
 740
 741 /* The intel i915 automatically initializes the agp aperture during POST.
 742  * Use the memory already set aside for in the GTT.
 743  */
 744 static int intel_i915_create_gatt_table(void)
 745 {
 746         int page_order;
 747         struct aper_size_info_fixed *size;
 748         int num_entries;
 749         u32 temp, temp2;
 750
 751         size = agp_bridge->current_size;
 752         page_order = size->page_order;
 753         num_entries = size->num_entries;
 754         agp_bridge->gatt_table_real = NULL;
 755
 756         pci_read_config_dword(intel_i830_private.i830_dev, I915_MMADDR, &temp);
 757         pci_read_config_dword(intel_i830_private.i830_dev, I915_PTEADDR,&temp2);
 758
 759         intel_i830_private.gtt = ioremap(temp2, 256 * 1024);
 760         if (!intel_i830_private.gtt)
 761                 return (-ENOMEM);
 762
 763         temp &= 0xfff80000;
 764
 765         intel_i830_private.registers = ioremap(temp,128 * 4096);
 766         if (!intel_i830_private.registers)
 767                 return (-ENOMEM);
 768
 769         temp = readl(intel_i830_private.registers+I810_PGETBL_CTL) & 0xfffff000;
 770         global_cache_flush();   /* FIXME: ? */
 771
 772         /* we have to call this as early as possible after the MMIO base address is known */
 773         intel_i830_init_gtt_entries();
 774
 775         agp_bridge->gatt_table = NULL;
 776
 777         agp_bridge->gatt_bus_addr = temp;
 778
 779         return(0);
 780 }
 781
 782 static int intel_fetch_size(void)
 783 {
 784         int i;
 785         u16 temp;
 786         struct aper_size_info_16 *values;
 787
 788         pci_read_config_word(agp_bridge->dev, INTEL_APSIZE, &temp);
 789         values = A_SIZE_16(agp_bridge->driver->aperture_sizes);
 790
 791         for (i = 0; i < agp_bridge->driver->num_aperture_sizes; i++) {
 792                 if (temp == values[i].size_value) {
 793                         agp_bridge->previous_size = agp_bridge->current_size = (void *) (values + i);
 794                         agp_bridge->aperture_size_idx = i;
 795                         return values[i].size;
 796                 }
 797         }
 798
 799         return 0;
 800 }
 801
 802 static int __intel_8xx_fetch_size(u8 temp)
 803 {
 804         int i;
 805         struct aper_size_info_8 *values;
 806
 807         values = A_SIZE_8(agp_bridge->driver->aperture_sizes);
 808
 809         for (i = 0; i < agp_bridge->driver->num_aperture_sizes; i++) {
 810                 if (temp == values[i].size_value) {
 811                         agp_bridge->previous_size =
 812                                 agp_bridge->current_size = (void *) (values + i);
 813                         agp_bridge->aperture_size_idx = i;
 814                         return values[i].size;
 815                 }
 816         }
 817         return 0;
 818 }
 819
 820 static int intel_8xx_fetch_size(void)
 821 {
 822         u8 temp;
 823
 824         pci_read_config_byte(agp_bridge->dev, INTEL_APSIZE, &temp);
 825         return __intel_8xx_fetch_size(temp);
 826 }
 827
 828 static int intel_815_fetch_size(void)
 829 {
 830         u8 temp;
 831
 832         /* Intel 815 chipsets have a _weird_ APSIZE register with only
 833          * one non-reserved bit, so mask the others out ... */
 834         pci_read_config_byte(agp_bridge->dev, INTEL_APSIZE, &temp);
 835         temp &= (1 << 3);
 836
 837         return __intel_8xx_fetch_size(temp);
 838 }
 839
 840 static void intel_tlbflush(struct agp_memory *mem)
 841 {
 842         pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, 0x2200);
 843         pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, 0x2280);
 844 }
 845
 846
 847 static void intel_8xx_tlbflush(struct agp_memory *mem)
 848 {
 849         u32 temp;
 850         pci_read_config_dword(agp_bridge->dev, INTEL_AGPCTRL, &temp);
 851         pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, temp & ~(1 << 7));
 852         pci_read_config_dword(agp_bridge->dev, INTEL_AGPCTRL, &temp);
 853         pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, temp | (1 << 7));
 854 }
 855
 856
 857 static void intel_cleanup(void)
 858 {
 859         u16 temp;
 860         struct aper_size_info_16 *previous_size;
 861
 862         previous_size = A_SIZE_16(agp_bridge->previous_size);
 863         pci_read_config_word(agp_bridge->dev, INTEL_NBXCFG, &temp);
 864         pci_write_config_word(agp_bridge->dev, INTEL_NBXCFG, temp & ~(1 << 9));
 865         pci_write_config_word(agp_bridge->dev, INTEL_APSIZE, previous_size->size_value);
 866 }
 867
 868
 869 static void intel_8xx_cleanup(void)
 870 {
 871         u16 temp;
 872         struct aper_size_info_8 *previous_size;
 873
 874         previous_size = A_SIZE_8(agp_bridge->previous_size);
 875         pci_read_config_word(agp_bridge->dev, INTEL_NBXCFG, &temp);
 876         pci_write_config_word(agp_bridge->dev, INTEL_NBXCFG, temp & ~(1 << 9));
 877         pci_write_config_byte(agp_bridge->dev, INTEL_APSIZE, previous_size->size_value);
 878 }
 879
 880
 881 static int intel_configure(void)
 882 {
 883         u32 temp;
 884         u16 temp2;
 885         struct aper_size_info_16 *current_size;
 886
 887         current_size = A_SIZE_16(agp_bridge->current_size);
 888
 889         /* aperture size */
 890         pci_write_config_word(agp_bridge->dev, INTEL_APSIZE, current_size->size_value);
 891
 892         /* address to map to */
 893         pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
 894         agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
 895
 896         /* attbase - aperture base */
 897         pci_write_config_dword(agp_bridge->dev, INTEL_ATTBASE, agp_bridge->gatt_bus_addr);
 898
 899         /* agpctrl */
 900         pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, 0x2280);
 901
 902         /* paccfg/nbxcfg */
 903         pci_read_config_word(agp_bridge->dev, INTEL_NBXCFG, &temp2);
 904         pci_write_config_word(agp_bridge->dev, INTEL_NBXCFG,
 905                         (temp2 & ~(1 << 10)) | (1 << 9));
 906         /* clear any possible error conditions */
 907         pci_write_config_byte(agp_bridge->dev, INTEL_ERRSTS + 1, 7);
 908         return 0;
 909 }
 910
 911 static int intel_815_configure(void)
 912 {
 913         u32 temp, addr;
 914         u8 temp2;
 915         struct aper_size_info_8 *current_size;
 916
 917         /* attbase - aperture base */
 918         /* the Intel 815 chipset spec. says that bits 29-31 in the
 919         * ATTBASE register are reserved -> try not to write them */
 920         if (agp_bridge->gatt_bus_addr & INTEL_815_ATTBASE_MASK) {
 921                 printk (KERN_EMERG PFX "gatt bus addr too high");
 922                 return -EINVAL;
 923         }
 924
 925         current_size = A_SIZE_8(agp_bridge->current_size);
 926
 927         /* aperture size */
 928         pci_write_config_byte(agp_bridge->dev, INTEL_APSIZE,
 929                         current_size->size_value);
 930
 931         /* address to map to */
 932         pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
 933         agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
 934
 935         pci_read_config_dword(agp_bridge->dev, INTEL_ATTBASE, &addr);
 936         addr &= INTEL_815_ATTBASE_MASK;
 937         addr |= agp_bridge->gatt_bus_addr;
 938         pci_write_config_dword(agp_bridge->dev, INTEL_ATTBASE, addr);
 939
 940         /* agpctrl */
 941         pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, 0x0000);
 942
 943         /* apcont */
 944         pci_read_config_byte(agp_bridge->dev, INTEL_815_APCONT, &temp2);
 945         pci_write_config_byte(agp_bridge->dev, INTEL_815_APCONT, temp2 | (1 << 1));
 946
 947         /* clear any possible error conditions */
 948         /* Oddness : this chipset seems to have no ERRSTS register ! */
 949         return 0;
 950 }
 951
 952 static void intel_820_tlbflush(struct agp_memory *mem)
 953 {
 954         return;
 955 }
 956
 957 static void intel_820_cleanup(void)
 958 {
 959         u8 temp;
 960         struct aper_size_info_8 *previous_size;
 961
 962         previous_size = A_SIZE_8(agp_bridge->previous_size);
 963         pci_read_config_byte(agp_bridge->dev, INTEL_I820_RDCR, &temp);
 964         pci_write_config_byte(agp_bridge->dev, INTEL_I820_RDCR,
 965                         temp & ~(1 << 1));
 966         pci_write_config_byte(agp_bridge->dev, INTEL_APSIZE,
 967                         previous_size->size_value);
 968 }
 969
 970
 971 static int intel_820_configure(void)
 972 {
 973         u32 temp;
 974         u8 temp2;
 975         struct aper_size_info_8 *current_size;
 976
 977         current_size = A_SIZE_8(agp_bridge->current_size);
 978
 979         /* aperture size */
 980         pci_write_config_byte(agp_bridge->dev, INTEL_APSIZE, current_size->size_value);
 981
 982         /* address to map to */
 983         pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
 984         agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
 985
 986         /* attbase - aperture base */
 987         pci_write_config_dword(agp_bridge->dev, INTEL_ATTBASE, agp_bridge->gatt_bus_addr);
 988
 989         /* agpctrl */
 990         pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, 0x0000);
 991
 992         /* global enable aperture access */
 993         /* This flag is not accessed through MCHCFG register as in */
 994         /* i850 chipset. */
 995         pci_read_config_byte(agp_bridge->dev, INTEL_I820_RDCR, &temp2);
 996         pci_write_config_byte(agp_bridge->dev, INTEL_I820_RDCR, temp2 | (1 << 1));
 997         /* clear any possible AGP-related error conditions */
 998         pci_write_config_word(agp_bridge->dev, INTEL_I820_ERRSTS, 0x001c);
 999         return 0;
1000 }
1001
1002 static int intel_840_configure(void)
1003 {
1004         u32 temp;
1005         u16 temp2;
1006         struct aper_size_info_8 *current_size;
1007
1008         current_size = A_SIZE_8(agp_bridge->current_size);
1009
1010         /* aperture size */
1011         pci_write_config_byte(agp_bridge->dev, INTEL_APSIZE, current_size->size_value);
1012
1013         /* address to map to */
1014         pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
1015         agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
1016
1017         /* attbase - aperture base */
1018         pci_write_config_dword(agp_bridge->dev, INTEL_ATTBASE, agp_bridge->gatt_bus_addr);
1019
1020         /* agpctrl */
1021         pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, 0x0000);
1022
1023         /* mcgcfg */
1024         pci_read_config_word(agp_bridge->dev, INTEL_I840_MCHCFG, &temp2);
1025         pci_write_config_word(agp_bridge->dev, INTEL_I840_MCHCFG, temp2 | (1 << 9));
1026         /* clear any possible error conditions */
1027         pci_write_config_word(agp_bridge->dev, INTEL_I840_ERRSTS, 0xc000);
1028         return 0;
1029 }
1030
1031 static int intel_845_configure(void)
1032 {
1033         u32 temp;
1034         u8 temp2;
1035         struct aper_size_info_8 *current_size;
1036
1037         current_size = A_SIZE_8(agp_bridge->current_size);
1038
1039         /* aperture size */
1040         pci_write_config_byte(agp_bridge->dev, INTEL_APSIZE, current_size->size_value);
1041
1042         /* address to map to */
1043         pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
1044         agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
1045
1046         /* attbase - aperture base */
1047         pci_write_config_dword(agp_bridge->dev, INTEL_ATTBASE, agp_bridge->gatt_bus_addr);
1048
1049         /* agpctrl */
1050         pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, 0x0000);
1051
1052         /* agpm */
1053         pci_read_config_byte(agp_bridge->dev, INTEL_I845_AGPM, &temp2);
1054         pci_write_config_byte(agp_bridge->dev, INTEL_I845_AGPM, temp2 | (1 << 1));
1055         /* clear any possible error conditions */
1056         pci_write_config_word(agp_bridge->dev, INTEL_I845_ERRSTS, 0x001c);
1057         return 0;
1058 }
1059
1060 static int intel_850_configure(void)
1061 {
1062         u32 temp;
1063         u16 temp2;
1064         struct aper_size_info_8 *current_size;
1065
1066         current_size = A_SIZE_8(agp_bridge->current_size);
1067
1068         /* aperture size */
1069         pci_write_config_byte(agp_bridge->dev, INTEL_APSIZE, current_size->size_value);
1070
1071         /* address to map to */
1072         pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
1073         agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
1074
1075         /* attbase - aperture base */
1076         pci_write_config_dword(agp_bridge->dev, INTEL_ATTBASE, agp_bridge->gatt_bus_addr);
1077
1078         /* agpctrl */
1079         pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, 0x0000);
1080
1081         /* mcgcfg */
1082         pci_read_config_word(agp_bridge->dev, INTEL_I850_MCHCFG, &temp2);
1083         pci_write_config_word(agp_bridge->dev, INTEL_I850_MCHCFG, temp2 | (1 << 9));
1084         /* clear any possible AGP-related error conditions */
1085         pci_write_config_word(agp_bridge->dev, INTEL_I850_ERRSTS, 0x001c);
1086         return 0;
1087 }
1088
1089 static int intel_860_configure(void)
1090 {
1091         u32 temp;
1092         u16 temp2;
1093         struct aper_size_info_8 *current_size;
1094
1095         current_size = A_SIZE_8(agp_bridge->current_size);
1096
1097         /* aperture size */
1098         pci_write_config_byte(agp_bridge->dev, INTEL_APSIZE, current_size->size_value);
1099
1100         /* address to map to */
1101         pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
1102         agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
1103
1104         /* attbase - aperture base */
1105         pci_write_config_dword(agp_bridge->dev, INTEL_ATTBASE, agp_bridge->gatt_bus_addr);
1106
1107         /* agpctrl */
1108         pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, 0x0000);
1109
1110         /* mcgcfg */
1111         pci_read_config_word(agp_bridge->dev, INTEL_I860_MCHCFG, &temp2);
1112         pci_write_config_word(agp_bridge->dev, INTEL_I860_MCHCFG, temp2 | (1 << 9));
1113         /* clear any possible AGP-related error conditions */
1114         pci_write_config_word(agp_bridge->dev, INTEL_I860_ERRSTS, 0xf700);
1115         return 0;
1116 }
1117
1118 static int intel_830mp_configure(void)
1119 {
1120         u32 temp;
1121         u16 temp2;
1122         struct aper_size_info_8 *current_size;
1123
1124         current_size = A_SIZE_8(agp_bridge->current_size);
1125
1126         /* aperture size */
1127         pci_write_config_byte(agp_bridge->dev, INTEL_APSIZE, current_size->size_value);
1128
1129         /* address to map to */
1130         pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
1131         agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
1132
1133         /* attbase - aperture base */
1134         pci_write_config_dword(agp_bridge->dev, INTEL_ATTBASE, agp_bridge->gatt_bus_addr);
1135
1136         /* agpctrl */
1137         pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, 0x0000);
1138
1139         /* gmch */
1140         pci_read_config_word(agp_bridge->dev, INTEL_NBXCFG, &temp2);
1141         pci_write_config_word(agp_bridge->dev, INTEL_NBXCFG, temp2 | (1 << 9));
1142         /* clear any possible AGP-related error conditions */
1143         pci_write_config_word(agp_bridge->dev, INTEL_I830_ERRSTS, 0x1c);
1144         return 0;
1145 }
1146
1147 static int intel_7505_configure(void)
1148 {
1149         u32 temp;
1150         u16 temp2;
1151         struct aper_size_info_8 *current_size;
1152
1153         current_size = A_SIZE_8(agp_bridge->current_size);
1154
1155         /* aperture size */
1156         pci_write_config_byte(agp_bridge->dev, INTEL_APSIZE, current_size->size_value);
1157
1158         /* address to map to */
1159         pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
1160         agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
1161
1162         /* attbase - aperture base */
1163         pci_write_config_dword(agp_bridge->dev, INTEL_ATTBASE, agp_bridge->gatt_bus_addr);
1164
1165         /* agpctrl */
1166         pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, 0x0000);
1167
1168         /* mchcfg */
1169         pci_read_config_word(agp_bridge->dev, INTEL_I7505_MCHCFG, &temp2);
1170         pci_write_config_word(agp_bridge->dev, INTEL_I7505_MCHCFG, temp2 | (1 << 9));
1171
1172         return 0;
1173 }
1174
1175 /* Setup function */
1176 static struct gatt_mask intel_generic_masks[] =
1177 {
1178         {.mask = 0x00000017, .type = 0}
1179 };
1180
1181 static struct aper_size_info_8 intel_815_sizes[2] =
1182 {
1183         {64, 16384, 4, 0},
1184         {32, 8192, 3, 8},
1185 };
1186
1187 static struct aper_size_info_8 intel_8xx_sizes[7] =
1188 {
1189         {256, 65536, 6, 0},
1190         {128, 32768, 5, 32},
1191         {64, 16384, 4, 48},
1192         {32, 8192, 3, 56},
1193         {16, 4096, 2, 60},
1194         {8, 2048, 1, 62},
1195         {4, 1024, 0, 63}
1196 };
1197
1198 static struct aper_size_info_16 intel_generic_sizes[7] =
1199 {
1200         {256, 65536, 6, 0},
1201         {128, 32768, 5, 32},
1202         {64, 16384, 4, 48},
1203         {32, 8192, 3, 56},
1204         {16, 4096, 2, 60},
1205         {8, 2048, 1, 62},
1206         {4, 1024, 0, 63}
1207 };
1208
1209 static struct aper_size_info_8 intel_830mp_sizes[4] =
1210 {
1211         {256, 65536, 6, 0},
1212         {128, 32768, 5, 32},
1213         {64, 16384, 4, 48},
1214         {32, 8192, 3, 56}
1215 };
1216
1217 static struct agp_bridge_driver intel_generic_driver = {
1218         .owner                  = THIS_MODULE,
1219         .aperture_sizes         = intel_generic_sizes,
1220         .size_type              = U16_APER_SIZE,
1221         .num_aperture_sizes     = 7,
1222         .configure              = intel_configure,
1223         .fetch_size             = intel_fetch_size,
1224         .cleanup                = intel_cleanup,
1225         .tlb_flush              = intel_tlbflush,
1226         .mask_memory            = agp_generic_mask_memory,
1227         .masks                  = intel_generic_masks,
1228         .agp_enable             = agp_generic_enable,
1229         .cache_flush            = global_cache_flush,
1230         .create_gatt_table      = agp_generic_create_gatt_table,
1231         .free_gatt_table        = agp_generic_free_gatt_table,
1232         .insert_memory          = agp_generic_insert_memory,
1233         .remove_memory          = agp_generic_remove_memory,
1234         .alloc_by_type          = agp_generic_alloc_by_type,
1235         .free_by_type           = agp_generic_free_by_type,
1236         .agp_alloc_page         = agp_generic_alloc_page,
1237         .agp_destroy_page       = agp_generic_destroy_page,
1238 };
1239
1240 static struct agp_bridge_driver intel_810_driver = {
1241         .owner                  = THIS_MODULE,
1242         .aperture_sizes         = intel_i810_sizes,
1243         .size_type              = FIXED_APER_SIZE,
1244         .num_aperture_sizes     = 2,
1245         .needs_scratch_page     = TRUE,
1246         .configure              = intel_i810_configure,
1247         .fetch_size             = intel_i810_fetch_size,
1248         .cleanup                = intel_i810_cleanup,
1249         .tlb_flush              = intel_i810_tlbflush,
1250         .mask_memory            = intel_i810_mask_memory,
1251         .masks                  = intel_i810_masks,
1252         .agp_enable             = intel_i810_agp_enable,
1253         .cache_flush            = global_cache_flush,
1254         .create_gatt_table      = agp_generic_create_gatt_table,
1255         .free_gatt_table        = agp_generic_free_gatt_table,
1256         .insert_memory          = intel_i810_insert_entries,
1257         .remove_memory          = intel_i810_remove_entries,
1258         .alloc_by_type          = intel_i810_alloc_by_type,
1259         .free_by_type           = intel_i810_free_by_type,
1260         .agp_alloc_page         = agp_generic_alloc_page,
1261         .agp_destroy_page       = agp_generic_destroy_page,
1262 };
1263
1264 static struct agp_bridge_driver intel_815_driver = {
1265         .owner                  = THIS_MODULE,
1266         .aperture_sizes         = intel_815_sizes,
1267         .size_type              = U8_APER_SIZE,
1268         .num_aperture_sizes     = 2,
1269         .configure              = intel_815_configure,
1270         .fetch_size             = intel_815_fetch_size,
1271         .cleanup                = intel_8xx_cleanup,
1272         .tlb_flush              = intel_8xx_tlbflush,
1273         .mask_memory            = agp_generic_mask_memory,
1274         .masks                  = intel_generic_masks,
1275         .agp_enable             = agp_generic_enable,
1276         .cache_flush            = global_cache_flush,
1277         .create_gatt_table      = agp_generic_create_gatt_table,
1278         .free_gatt_table        = agp_generic_free_gatt_table,
1279         .insert_memory          = agp_generic_insert_memory,
1280         .remove_memory          = agp_generic_remove_memory,
1281         .alloc_by_type          = agp_generic_alloc_by_type,
1282         .free_by_type           = agp_generic_free_by_type,
1283         .agp_alloc_page         = agp_generic_alloc_page,
1284         .agp_destroy_page       = agp_generic_destroy_page,
1285 };
1286
1287 static struct agp_bridge_driver intel_830_driver = {
1288         .owner                  = THIS_MODULE,
1289         .aperture_sizes         = intel_i830_sizes,
1290         .size_type              = FIXED_APER_SIZE,
1291         .num_aperture_sizes     = 3,
1292         .needs_scratch_page     = TRUE,
1293         .configure              = intel_i830_configure,
1294         .fetch_size             = intel_i830_fetch_size,
1295         .cleanup                = intel_i830_cleanup,
1296         .tlb_flush              = intel_i810_tlbflush,
1297         .mask_memory            = intel_i810_mask_memory,
1298         .masks                  = intel_i810_masks,
1299         .agp_enable             = intel_i810_agp_enable,
1300         .cache_flush            = global_cache_flush,
1301         .create_gatt_table      = intel_i830_create_gatt_table,
1302         .free_gatt_table        = intel_i830_free_gatt_table,
1303         .insert_memory          = intel_i830_insert_entries,
1304         .remove_memory          = intel_i830_remove_entries,
1305         .alloc_by_type          = intel_i830_alloc_by_type,
1306         .free_by_type           = intel_i810_free_by_type,
1307         .agp_alloc_page         = agp_generic_alloc_page,
1308         .agp_destroy_page       = agp_generic_destroy_page,
1309 };
1310
1311 static struct agp_bridge_driver intel_820_driver = {
1312         .owner                  = THIS_MODULE,
1313         .aperture_sizes         = intel_8xx_sizes,
1314         .size_type              = U8_APER_SIZE,
1315         .num_aperture_sizes     = 7,
1316         .configure              = intel_820_configure,
1317         .fetch_size             = intel_8xx_fetch_size,
1318         .cleanup                = intel_820_cleanup,
1319         .tlb_flush              = intel_820_tlbflush,
1320         .mask_memory            = agp_generic_mask_memory,
1321         .masks                  = intel_generic_masks,
1322         .agp_enable             = agp_generic_enable,
1323         .cache_flush            = global_cache_flush,
1324         .create_gatt_table      = agp_generic_create_gatt_table,
1325         .free_gatt_table        = agp_generic_free_gatt_table,
1326         .insert_memory          = agp_generic_insert_memory,
1327         .remove_memory          = agp_generic_remove_memory,
1328         .alloc_by_type          = agp_generic_alloc_by_type,
1329         .free_by_type           = agp_generic_free_by_type,
1330         .agp_alloc_page         = agp_generic_alloc_page,
1331         .agp_destroy_page       = agp_generic_destroy_page,
1332 };
1333
1334 static struct agp_bridge_driver intel_830mp_driver = {
1335         .owner                  = THIS_MODULE,
1336         .aperture_sizes         = intel_830mp_sizes,
1337         .size_type              = U8_APER_SIZE,
1338         .num_aperture_sizes     = 4,
1339         .configure              = intel_830mp_configure,
1340         .fetch_size             = intel_8xx_fetch_size,
1341         .cleanup                = intel_8xx_cleanup,
1342         .tlb_flush              = intel_8xx_tlbflush,
1343         .mask_memory            = agp_generic_mask_memory,
1344         .masks                  = intel_generic_masks,
1345         .agp_enable             = agp_generic_enable,
1346         .cache_flush            = global_cache_flush,
1347         .create_gatt_table      = agp_generic_create_gatt_table,
1348         .free_gatt_table        = agp_generic_free_gatt_table,
1349         .insert_memory          = agp_generic_insert_memory,
1350         .remove_memory          = agp_generic_remove_memory,
1351         .alloc_by_type          = agp_generic_alloc_by_type,
1352         .free_by_type           = agp_generic_free_by_type,
1353         .agp_alloc_page         = agp_generic_alloc_page,
1354         .agp_destroy_page       = agp_generic_destroy_page,
1355 };
1356
1357 static struct agp_bridge_driver intel_840_driver = {
1358         .owner                  = THIS_MODULE,
1359         .aperture_sizes         = intel_8xx_sizes,
1360         .size_type              = U8_APER_SIZE,
1361         .num_aperture_sizes     = 7,
1362         .configure              = intel_840_configure,
1363         .fetch_size             = intel_8xx_fetch_size,
1364         .cleanup                = intel_8xx_cleanup,
1365         .tlb_flush              = intel_8xx_tlbflush,
1366         .mask_memory            = agp_generic_mask_memory,
1367         .masks                  = intel_generic_masks,
1368         .agp_enable             = agp_generic_enable,
1369         .cache_flush            = global_cache_flush,
1370         .create_gatt_table      = agp_generic_create_gatt_table,
1371         .free_gatt_table        = agp_generic_free_gatt_table,
1372         .insert_memory          = agp_generic_insert_memory,
1373         .remove_memory          = agp_generic_remove_memory,
1374         .alloc_by_type          = agp_generic_alloc_by_type,
1375         .free_by_type           = agp_generic_free_by_type,
1376         .agp_alloc_page         = agp_generic_alloc_page,
1377         .agp_destroy_page       = agp_generic_destroy_page,
1378 };
1379
1380 static struct agp_bridge_driver intel_845_driver = {
1381         .owner                  = THIS_MODULE,
1382         .aperture_sizes         = intel_8xx_sizes,
1383         .size_type              = U8_APER_SIZE,
1384         .num_aperture_sizes     = 7,
1385         .configure              = intel_845_configure,
1386         .fetch_size             = intel_8xx_fetch_size,
1387         .cleanup                = intel_8xx_cleanup,
1388         .tlb_flush              = intel_8xx_tlbflush,
1389         .mask_memory            = agp_generic_mask_memory,
1390         .masks                  = intel_generic_masks,
1391         .agp_enable             = agp_generic_enable,
1392         .cache_flush            = global_cache_flush,
1393         .create_gatt_table      = agp_generic_create_gatt_table,
1394         .free_gatt_table        = agp_generic_free_gatt_table,
1395         .insert_memory          = agp_generic_insert_memory,
1396         .remove_memory          = agp_generic_remove_memory,
1397         .alloc_by_type          = agp_generic_alloc_by_type,
1398         .free_by_type           = agp_generic_free_by_type,
1399         .agp_alloc_page         = agp_generic_alloc_page,
1400         .agp_destroy_page       = agp_generic_destroy_page,
1401 };
1402
1403 static struct agp_bridge_driver intel_850_driver = {
1404         .owner                  = THIS_MODULE,
1405         .aperture_sizes         = intel_8xx_sizes,
1406         .size_type              = U8_APER_SIZE,
1407         .num_aperture_sizes     = 7,
1408         .configure              = intel_850_configure,
1409         .fetch_size             = intel_8xx_fetch_size,
1410         .cleanup                = intel_8xx_cleanup,
1411         .tlb_flush              = intel_8xx_tlbflush,
1412         .mask_memory            = agp_generic_mask_memory,
1413         .masks                  = intel_generic_masks,
1414         .agp_enable             = agp_generic_enable,
1415         .cache_flush            = global_cache_flush,
1416         .create_gatt_table      = agp_generic_create_gatt_table,
1417         .free_gatt_table        = agp_generic_free_gatt_table,
1418         .insert_memory          = agp_generic_insert_memory,
1419         .remove_memory          = agp_generic_remove_memory,
1420         .alloc_by_type          = agp_generic_alloc_by_type,
1421         .free_by_type           = agp_generic_free_by_type,
1422         .agp_alloc_page         = agp_generic_alloc_page,
1423         .agp_destroy_page       = agp_generic_destroy_page,
1424 };
1425
1426 static struct agp_bridge_driver intel_860_driver = {
1427         .owner                  = THIS_MODULE,
1428         .aperture_sizes         = intel_8xx_sizes,
1429         .size_type              = U8_APER_SIZE,
1430         .num_aperture_sizes     = 7,
1431         .configure              = intel_860_configure,
1432         .fetch_size             = intel_8xx_fetch_size,
1433         .cleanup                = intel_8xx_cleanup,
1434         .tlb_flush              = intel_8xx_tlbflush,
1435         .mask_memory            = agp_generic_mask_memory,
1436         .masks                  = intel_generic_masks,
1437         .agp_enable             = agp_generic_enable,
1438         .cache_flush            = global_cache_flush,
1439         .create_gatt_table      = agp_generic_create_gatt_table,
1440         .free_gatt_table        = agp_generic_free_gatt_table,
1441         .insert_memory          = agp_generic_insert_memory,
1442         .remove_memory          = agp_generic_remove_memory,
1443         .alloc_by_type          = agp_generic_alloc_by_type,
1444         .free_by_type           = agp_generic_free_by_type,
1445         .agp_alloc_page         = agp_generic_alloc_page,
1446         .agp_destroy_page       = agp_generic_destroy_page,
1447 };
1448
1449 static struct agp_bridge_driver intel_915_driver = {
1450         .owner                  = THIS_MODULE,
1451         .aperture_sizes         = intel_i830_sizes,
1452         .size_type              = FIXED_APER_SIZE,
1453         .num_aperture_sizes     = 3,
1454         .needs_scratch_page     = TRUE,
1455         .configure              = intel_i915_configure,
1456         .fetch_size             = intel_i915_fetch_size,
1457         .cleanup                = intel_i915_cleanup,
1458         .tlb_flush              = intel_i810_tlbflush,
1459         .mask_memory            = intel_i810_mask_memory,
1460         .masks                  = intel_i810_masks,
1461         .agp_enable             = intel_i810_agp_enable,
1462         .cache_flush            = global_cache_flush,
1463         .create_gatt_table      = intel_i915_create_gatt_table,
1464         .free_gatt_table        = intel_i830_free_gatt_table,
1465         .insert_memory          = intel_i915_insert_entries,
1466         .remove_memory          = intel_i915_remove_entries,
1467         .alloc_by_type          = intel_i830_alloc_by_type,
1468         .free_by_type           = intel_i810_free_by_type,
1469         .agp_alloc_page         = agp_generic_alloc_page,
1470         .agp_destroy_page       = agp_generic_destroy_page,
1471 };
1472
1473
1474 static struct agp_bridge_driver intel_7505_driver = {
1475         .owner                  = THIS_MODULE,
1476         .aperture_sizes         = intel_8xx_sizes,
1477         .size_type              = U8_APER_SIZE,
1478         .num_aperture_sizes     = 7,
1479         .configure              = intel_7505_configure,
1480         .fetch_size             = intel_8xx_fetch_size,
1481         .cleanup                = intel_8xx_cleanup,
1482         .tlb_flush              = intel_8xx_tlbflush,
1483         .mask_memory            = agp_generic_mask_memory,
1484         .masks                  = intel_generic_masks,
1485         .agp_enable             = agp_generic_enable,
1486         .cache_flush            = global_cache_flush,
1487         .create_gatt_table      = agp_generic_create_gatt_table,
1488         .free_gatt_table        = agp_generic_free_gatt_table,
1489         .insert_memory          = agp_generic_insert_memory,
1490         .remove_memory          = agp_generic_remove_memory,
1491         .alloc_by_type          = agp_generic_alloc_by_type,
1492         .free_by_type           = agp_generic_free_by_type,
1493         .agp_alloc_page         = agp_generic_alloc_page,
1494         .agp_destroy_page       = agp_generic_destroy_page,
1495 };
1496
1497 static int find_i810(u16 device)
1498 {
1499         struct pci_dev *i810_dev;
1500
1501         i810_dev = pci_find_device(PCI_VENDOR_ID_INTEL, device, NULL);
1502         if (!i810_dev)
1503                 return 0;
1504         intel_i810_private.i810_dev = i810_dev;
1505         return 1;
1506 }
1507
1508 static int find_i830(u16 device)
1509 {
1510         struct pci_dev *i830_dev;
1511
1512         i830_dev = pci_find_device(PCI_VENDOR_ID_INTEL, device, NULL);
1513         if (i830_dev && PCI_FUNC(i830_dev->devfn) != 0) {
1514                 i830_dev = pci_find_device(PCI_VENDOR_ID_INTEL,
1515                                 device, i830_dev);
1516         }
1517
1518         if (!i830_dev)
1519                 return 0;
1520
1521         intel_i830_private.i830_dev = i830_dev;
1522         return 1;
1523 }
1524
1525 static int __devinit agp_intel_probe(struct pci_dev *pdev,
1526                                      const struct pci_device_id *ent)
1527 {
1528         struct agp_bridge_data *bridge;
1529         char *name = "(unknown)";
1530         u8 cap_ptr = 0;
1531         struct resource *r;
1532
1533         cap_ptr = pci_find_capability(pdev, PCI_CAP_ID_AGP);
1534
1535         bridge = agp_alloc_bridge();
1536         if (!bridge)
1537                 return -ENOMEM;
1538
1539         switch (pdev->device) {
1540         case PCI_DEVICE_ID_INTEL_82443LX_0:
1541                 bridge->driver = &intel_generic_driver;
1542                 name = "440LX";
1543                 break;
1544         case PCI_DEVICE_ID_INTEL_82443BX_0:
1545                 bridge->driver = &intel_generic_driver;
1546                 name = "440BX";
1547                 break;
1548         case PCI_DEVICE_ID_INTEL_82443GX_0:
1549                 bridge->driver = &intel_generic_driver;
1550                 name = "440GX";
1551                 break;
1552         case PCI_DEVICE_ID_INTEL_82810_MC1:
1553                 name = "i810";
1554                 if (!find_i810(PCI_DEVICE_ID_INTEL_82810_IG1))
1555                         goto fail;
1556                 bridge->driver = &intel_810_driver;
1557                 break;
1558         case PCI_DEVICE_ID_INTEL_82810_MC3:
1559                 name = "i810 DC100";
1560                 if (!find_i810(PCI_DEVICE_ID_INTEL_82810_IG3))
1561                         goto fail;
1562                 bridge->driver = &intel_810_driver;
1563                 break;
1564         case PCI_DEVICE_ID_INTEL_82810E_MC:
1565                 name = "i810 E";
1566                 if (!find_i810(PCI_DEVICE_ID_INTEL_82810E_IG))
1567                         goto fail;
1568                 bridge->driver = &intel_810_driver;
1569                 break;
1570          case PCI_DEVICE_ID_INTEL_82815_MC:
1571                 /*
1572                  * The i815 can operate either as an i810 style
1573                  * integrated device, or as an AGP4X motherboard.
1574                  */
1575                 if (find_i810(PCI_DEVICE_ID_INTEL_82815_CGC))
1576                         bridge->driver = &intel_810_driver;
1577                 else
1578                         bridge->driver = &intel_815_driver;
1579                 name = "i815";
1580                 break;
1581         case PCI_DEVICE_ID_INTEL_82820_HB:
1582         case PCI_DEVICE_ID_INTEL_82820_UP_HB:
1583                 bridge->driver = &intel_820_driver;
1584                 name = "i820";
1585                 break;
1586         case PCI_DEVICE_ID_INTEL_82830_HB:
1587                 if (find_i830(PCI_DEVICE_ID_INTEL_82830_CGC)) {
1588                         bridge->driver = &intel_830_driver;
1589                 } else {
1590                         bridge->driver = &intel_830mp_driver;
1591                 }
1592                 name = "830M";
1593                 break;
1594         case PCI_DEVICE_ID_INTEL_82840_HB:
1595                 bridge->driver = &intel_840_driver;
1596                 name = "i840";
1597                 break;
1598         case PCI_DEVICE_ID_INTEL_82845_HB:
1599                 bridge->driver = &intel_845_driver;
1600                 name = "i845";
1601                 break;
1602         case PCI_DEVICE_ID_INTEL_82845G_HB:
1603                 if (find_i830(PCI_DEVICE_ID_INTEL_82845G_IG)) {
1604                         bridge->driver = &intel_830_driver;
1605                 } else {
1606                         bridge->driver = &intel_845_driver;
1607                 }
1608                 name = "845G";
1609                 break;
1610         case PCI_DEVICE_ID_INTEL_82850_HB:
1611                 bridge->driver = &intel_850_driver;
1612                 name = "i850";
1613                 break;
1614         case PCI_DEVICE_ID_INTEL_82855PM_HB:
1615                 bridge->driver = &intel_845_driver;
1616                 name = "855PM";
1617                 break;
1618         case PCI_DEVICE_ID_INTEL_82855GM_HB:
1619                 if (find_i830(PCI_DEVICE_ID_INTEL_82855GM_IG)) {
1620                         bridge->driver = &intel_830_driver;
1621                         name = "855";
1622                 } else {
1623                         bridge->driver = &intel_845_driver;
1624                         name = "855GM";
1625                 }
1626                 break;
1627         case PCI_DEVICE_ID_INTEL_82860_HB:
1628                 bridge->driver = &intel_860_driver;
1629                 name = "i860";
1630                 break;
1631         case PCI_DEVICE_ID_INTEL_82865_HB:
1632                 if (find_i830(PCI_DEVICE_ID_INTEL_82865_IG)) {
1633                         bridge->driver = &intel_830_driver;
1634                 } else {
1635                         bridge->driver = &intel_845_driver;
1636                 }
1637                 name = "865";
1638                 break;
1639         case PCI_DEVICE_ID_INTEL_82875_HB:
1640                 bridge->driver = &intel_845_driver;
1641                 name = "i875";
1642                 break;
1643         case PCI_DEVICE_ID_INTEL_82915G_HB:
1644                 if (find_i830(PCI_DEVICE_ID_INTEL_82915G_IG)) {
1645                         bridge->driver = &intel_915_driver;
1646                 } else {
1647                         bridge->driver = &intel_845_driver;
1648                 }
1649                 name = "915G";
1650                 break;
1651         case PCI_DEVICE_ID_INTEL_7505_0:
1652                 bridge->driver = &intel_7505_driver;
1653                 name = "E7505";
1654                 break;
1655         case PCI_DEVICE_ID_INTEL_7205_0:
1656                 bridge->driver = &intel_7505_driver;
1657                 name = "E7205";
1658                 break;
1659         default:
1660                 if (cap_ptr)
1661                         printk(KERN_WARNING PFX "Unsupported Intel chipset (device id: %04x)\n",
1662                             pdev->device);
1663                 agp_put_bridge(bridge);
1664                 return -ENODEV;
1665         };
1666
1667         bridge->dev = pdev;
1668         bridge->capndx = cap_ptr;
1669
1670         if (bridge->driver == &intel_810_driver)
1671                 bridge->dev_private_data = &intel_i810_private;
1672         else if (bridge->driver == &intel_830_driver)
1673                 bridge->dev_private_data = &intel_i830_private;
1674
1675         printk(KERN_INFO PFX "Detected an Intel %s Chipset.\n", name);
1676
1677         /*
1678         * The following fixes the case where the BIOS has "forgotten" to
1679         * provide an address range for the GART.
1680         * 20030610 - hamish@zot.org
1681         */
1682         r = &pdev->resource[0];
1683         if (!r->start && r->end) {
1684                 if(pci_assign_resource(pdev, 0)) {
1685                         printk(KERN_ERR PFX "could not assign resource 0\n");
1686                         agp_put_bridge(bridge);
1687                         return -ENODEV;
1688                 }
1689         }
1690
1691         /*
1692         * If the device has not been properly setup, the following will catch
1693         * the problem and should stop the system from crashing.
1694         * 20030610 - hamish@zot.org
1695         */
1696         if (pci_enable_device(pdev)) {
1697                 printk(KERN_ERR PFX "Unable to Enable PCI device\n");
1698                 agp_put_bridge(bridge);
1699                 return -ENODEV;
1700         }
1701
1702         /* Fill in the mode register */
1703         if (cap_ptr) {
1704                 pci_read_config_dword(pdev,
1705                                 bridge->capndx+PCI_AGP_STATUS,
1706                                 &bridge->mode);
1707         }
1708
1709         pci_set_drvdata(pdev, bridge);
1710         return agp_add_bridge(bridge);
1711
1712 fail:
1713         printk(KERN_ERR PFX "Detected an Intel %s chipset, "
1714                 "but could not find the secondary device.\n", name);
1715         agp_put_bridge(bridge);
1716         return -ENODEV;
1717 }
1718
1719 static void __devexit agp_intel_remove(struct pci_dev *pdev)
1720 {
1721         struct agp_bridge_data *bridge = pci_get_drvdata(pdev);
1722
1723         agp_remove_bridge(bridge);
1724         agp_put_bridge(bridge);
1725 }
1726
1727 static int agp_intel_resume(struct pci_dev *pdev)
1728 {
1729         struct agp_bridge_data *bridge = pci_get_drvdata(pdev);
1730
1731         pci_restore_state(pdev, pdev->saved_config_space);
1732
1733         if (bridge->driver == &intel_generic_driver)
1734                 intel_configure();
1735         else if (bridge->driver == &intel_845_driver)
1736                 intel_845_configure();
1737         else if (bridge->driver == &intel_830mp_driver)
1738                 intel_830mp_configure();
1739         else if (bridge->driver == &intel_915_driver)
1740                 intel_i915_configure();
1741
1742         return 0;
1743 }
1744
1745 static struct pci_device_id agp_intel_pci_table[] = {
1746 #define ID(x)                                           \
1747         {                                               \
1748         .class          = (PCI_CLASS_BRIDGE_HOST << 8), \
1749         .class_mask     = ~0,                           \
1750         .vendor         = PCI_VENDOR_ID_INTEL,          \
1751         .device         = x,                            \
1752         .subvendor      = PCI_ANY_ID,                   \
1753         .subdevice      = PCI_ANY_ID,                   \
1754         }
1755         ID(PCI_DEVICE_ID_INTEL_82443LX_0),
1756         ID(PCI_DEVICE_ID_INTEL_82443BX_0),
1757         ID(PCI_DEVICE_ID_INTEL_82443GX_0),
1758         ID(PCI_DEVICE_ID_INTEL_82810_MC1),
1759         ID(PCI_DEVICE_ID_INTEL_82810_MC3),
1760         ID(PCI_DEVICE_ID_INTEL_82810E_MC),
1761         ID(PCI_DEVICE_ID_INTEL_82815_MC),
1762         ID(PCI_DEVICE_ID_INTEL_82820_HB),
1763         ID(PCI_DEVICE_ID_INTEL_82820_UP_HB),
1764         ID(PCI_DEVICE_ID_INTEL_82830_HB),
1765         ID(PCI_DEVICE_ID_INTEL_82840_HB),
1766         ID(PCI_DEVICE_ID_INTEL_82845_HB),
1767         ID(PCI_DEVICE_ID_INTEL_82845G_HB),
1768         ID(PCI_DEVICE_ID_INTEL_82850_HB),
1769         ID(PCI_DEVICE_ID_INTEL_82855PM_HB),
1770         ID(PCI_DEVICE_ID_INTEL_82855GM_HB),
1771         ID(PCI_DEVICE_ID_INTEL_82860_HB),
1772         ID(PCI_DEVICE_ID_INTEL_82865_HB),
1773         ID(PCI_DEVICE_ID_INTEL_82875_HB),
1774         ID(PCI_DEVICE_ID_INTEL_7505_0),
1775         ID(PCI_DEVICE_ID_INTEL_7205_0),
1776         ID(PCI_DEVICE_ID_INTEL_82915G_HB),
1777         { }
1778 };
1779
1780 MODULE_DEVICE_TABLE(pci, agp_intel_pci_table);
1781
1782 static struct pci_driver agp_intel_pci_driver = {
1783         .name           = "agpgart-intel",
1784         .id_table       = agp_intel_pci_table,
1785         .probe          = agp_intel_probe,
1786         .remove         = __devexit_p(agp_intel_remove),
1787         .resume         = agp_intel_resume,
1788 };
1789
1790 /* intel_agp_init() must not be declared static for explicit
1791    early initialization to work (ie i810fb) */
1792 int __init agp_intel_init(void)
1793 {
1794         static int agp_initialised=0;
1795
1796         if (agp_initialised == 1)
1797                 return 0;
1798         agp_initialised=1;
1799
1800         return pci_module_init(&agp_intel_pci_driver);
1801 }
1802
1803 static void __exit agp_intel_cleanup(void)
1804 {
1805         pci_unregister_driver(&agp_intel_pci_driver);
1806 }
1807
1808 module_init(agp_intel_init);
1809 module_exit(agp_intel_cleanup);
1810
1811 MODULE_AUTHOR("Dave Jones <davej@codemonkey.org.uk>");
1812 MODULE_LICENSE("GPL and additional rights");