drivers/char/drm/i830_dma.c

   1 /* i830_dma.c -- DMA support for the I830 -*- linux-c -*-
   2  * Created: Mon Dec 13 01:50:01 1999 by jhartmann@precisioninsight.com
   3  *
   4  * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
   5  * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
   6  * All Rights Reserved.
   7  *
   8  * Permission is hereby granted, free of charge, to any person obtaining a
   9  * copy of this software and associated documentation files (the "Software"),
  10  * to deal in the Software without restriction, including without limitation
  11  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  12  * and/or sell copies of the Software, and to permit persons to whom the
  13  * Software is furnished to do so, subject to the following conditions:
  14  *
  15  * The above copyright notice and this permission notice (including the next
  16  * paragraph) shall be included in all copies or substantial portions of the
  17  * Software.
  18  *
  19  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  20  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  21  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  22  * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
  23  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  24  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  25  * DEALINGS IN THE SOFTWARE.
  26  *
  27  * Authors: Rickard E. (Rik) Faith <faith@valinux.com>
  28  *          Jeff Hartmann <jhartmann@valinux.com>
  29  *          Keith Whitwell <keith@tungstengraphics.com>
  30  *          Abraham vd Merwe <abraham@2d3d.co.za>
  31  *
  32  */
  33
  34 #include "i830.h"
  35 #include "drmP.h"
  36 #include "drm.h"
  37 #include "i830_drm.h"
  38 #include "i830_drv.h"
  39 #include <linux/interrupt.h>    /* For task queue support */
  40 #include <linux/pagemap.h>      /* For FASTCALL on unlock_page() */
  41 #include <linux/delay.h>
  42 #include <asm/uaccess.h>
  43
  44 #define I830_BUF_FREE           2
  45 #define I830_BUF_CLIENT         1
  46 #define I830_BUF_HARDWARE       0
  47
  48 #define I830_BUF_UNMAPPED 0
  49 #define I830_BUF_MAPPED   1
  50
  51 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,4,2)
  52 #define down_write down
  53 #define up_write up
  54 #endif
  55
  56 static inline void i830_print_status_page(drm_device_t *dev)
  57 {
  58         drm_device_dma_t *dma = dev->dma;
  59         drm_i830_private_t *dev_priv = dev->dev_private;
  60         u32 *temp = dev_priv->hw_status_page;
  61         int i;
  62
  63         DRM_DEBUG(  "hw_status: Interrupt Status : %x\n", temp[0]);
  64         DRM_DEBUG(  "hw_status: LpRing Head ptr : %x\n", temp[1]);
  65         DRM_DEBUG(  "hw_status: IRing Head ptr : %x\n", temp[2]);
  66         DRM_DEBUG(  "hw_status: Reserved : %x\n", temp[3]);
  67         DRM_DEBUG(  "hw_status: Driver Counter : %d\n", temp[5]);
  68         for(i = 9; i < dma->buf_count + 9; i++) {
  69                 DRM_DEBUG( "buffer status idx : %d used: %d\n", i - 9, temp[i]);
  70         }
  71 }
  72
  73 static drm_buf_t *i830_freelist_get(drm_device_t *dev)
  74 {
  75         drm_device_dma_t *dma = dev->dma;
  76         int              i;
  77         int              used;
  78
  79         /* Linear search might not be the best solution */
  80
  81         for (i = 0; i < dma->buf_count; i++) {
  82                 drm_buf_t *buf = dma->buflist[ i ];
  83                 drm_i830_buf_priv_t *buf_priv = buf->dev_private;
  84                 /* In use is already a pointer */
  85                 used = cmpxchg(buf_priv->in_use, I830_BUF_FREE,
  86                                I830_BUF_CLIENT);
  87                 if(used == I830_BUF_FREE) {
  88                         return buf;
  89                 }
  90         }
  91         return NULL;
  92 }
  93
  94 /* This should only be called if the buffer is not sent to the hardware
  95  * yet, the hardware updates in use for us once its on the ring buffer.
  96  */
  97
  98 static int i830_freelist_put(drm_device_t *dev, drm_buf_t *buf)
  99 {
 100         drm_i830_buf_priv_t *buf_priv = buf->dev_private;
 101         int used;
 102
 103         /* In use is already a pointer */
 104         used = cmpxchg(buf_priv->in_use, I830_BUF_CLIENT, I830_BUF_FREE);
 105         if(used != I830_BUF_CLIENT) {
 106                 DRM_ERROR("Freeing buffer thats not in use : %d\n", buf->idx);
 107                 return -EINVAL;
 108         }
 109
 110         return 0;
 111 }
 112
 113 static struct file_operations i830_buffer_fops = {
 114         .open    = DRM(open),
 115         .flush   = DRM(flush),
 116         .release = DRM(release),
 117         .ioctl   = DRM(ioctl),
 118         .mmap    = i830_mmap_buffers,
 119         .fasync  = DRM(fasync),
 120 };
 121
 122 int i830_mmap_buffers(struct file *filp, struct vm_area_struct *vma)
 123 {
 124         drm_file_t          *priv         = filp->private_data;
 125         drm_device_t        *dev;
 126         drm_i830_private_t  *dev_priv;
 127         drm_buf_t           *buf;
 128         drm_i830_buf_priv_t *buf_priv;
 129
 130         lock_kernel();
 131         dev      = priv->dev;
 132         dev_priv = dev->dev_private;
 133         buf      = dev_priv->mmap_buffer;
 134         buf_priv = buf->dev_private;
 135
 136         vma->vm_flags |= (VM_IO | VM_DONTCOPY);
 137         vma->vm_file = filp;
 138
 139         buf_priv->currently_mapped = I830_BUF_MAPPED;
 140         unlock_kernel();
 141
 142         if (remap_page_range(DRM_RPR_ARG(vma) vma->vm_start,
 143                              VM_OFFSET(vma),
 144                              vma->vm_end - vma->vm_start,
 145                              vma->vm_page_prot)) return -EAGAIN;
 146         return 0;
 147 }
 148
 149 static int i830_map_buffer(drm_buf_t *buf, struct file *filp)
 150 {
 151         drm_file_t        *priv   = filp->private_data;
 152         drm_device_t      *dev    = priv->dev;
 153         drm_i830_buf_priv_t *buf_priv = buf->dev_private;
 154         drm_i830_private_t *dev_priv = dev->dev_private;
 155         struct file_operations *old_fops;
 156         unsigned long virtual;
 157         int retcode = 0;
 158
 159         if(buf_priv->currently_mapped == I830_BUF_MAPPED) return -EINVAL;
 160
 161         down_write( &current->mm->mmap_sem );
 162         old_fops = filp->f_op;
 163         filp->f_op = &i830_buffer_fops;
 164         dev_priv->mmap_buffer = buf;
 165         virtual = do_mmap(filp, 0, buf->total, PROT_READ|PROT_WRITE,
 166                             MAP_SHARED, buf->bus_address);
 167         dev_priv->mmap_buffer = NULL;
 168         filp->f_op = old_fops;
 169         if (IS_ERR((void *)virtual)) {          /* ugh */
 170                 /* Real error */
 171                 DRM_ERROR("mmap error\n");
 172                 retcode = virtual;
 173                 buf_priv->virtual = NULL;
 174         } else {
 175                 buf_priv->virtual = (void __user *)virtual;
 176         }
 177         up_write( &current->mm->mmap_sem );
 178
 179         return retcode;
 180 }
 181
 182 static int i830_unmap_buffer(drm_buf_t *buf)
 183 {
 184         drm_i830_buf_priv_t *buf_priv = buf->dev_private;
 185         int retcode = 0;
 186
 187         if(buf_priv->currently_mapped != I830_BUF_MAPPED)
 188                 return -EINVAL;
 189
 190         down_write(&current->mm->mmap_sem);
 191         retcode = do_munmap(current->mm,
 192                             (unsigned long)buf_priv->virtual,
 193                             (size_t) buf->total);
 194         up_write(&current->mm->mmap_sem);
 195
 196         buf_priv->currently_mapped = I830_BUF_UNMAPPED;
 197         buf_priv->virtual = NULL;
 198
 199         return retcode;
 200 }
 201
 202 static int i830_dma_get_buffer(drm_device_t *dev, drm_i830_dma_t *d,
 203                                struct file *filp)
 204 {
 205         drm_buf_t         *buf;
 206         drm_i830_buf_priv_t *buf_priv;
 207         int retcode = 0;
 208
 209         buf = i830_freelist_get(dev);
 210         if (!buf) {
 211                 retcode = -ENOMEM;
 212                 DRM_DEBUG("retcode=%d\n", retcode);
 213                 return retcode;
 214         }
 215
 216         retcode = i830_map_buffer(buf, filp);
 217         if(retcode) {
 218                 i830_freelist_put(dev, buf);
 219                 DRM_ERROR("mapbuf failed, retcode %d\n", retcode);
 220                 return retcode;
 221         }
 222         buf->filp = filp;
 223         buf_priv = buf->dev_private;
 224         d->granted = 1;
 225         d->request_idx = buf->idx;
 226         d->request_size = buf->total;
 227         d->virtual = buf_priv->virtual;
 228
 229         return retcode;
 230 }
 231
 232 int i830_dma_cleanup(drm_device_t *dev)
 233 {
 234         drm_device_dma_t *dma = dev->dma;
 235
 236         /* Make sure interrupts are disabled here because the uninstall ioctl
 237          * may not have been called from userspace and after dev_private
 238          * is freed, it's too late.
 239          */
 240         if ( dev->irq_enabled ) DRM(irq_uninstall)(dev);
 241
 242         if (dev->dev_private) {
 243                 int i;
 244                 drm_i830_private_t *dev_priv =
 245                         (drm_i830_private_t *) dev->dev_private;
 246
 247                 if (dev_priv->ring.virtual_start) {
 248                         DRM(ioremapfree)((void *) dev_priv->ring.virtual_start,
 249                                          dev_priv->ring.Size, dev);
 250                 }
 251                 if (dev_priv->hw_status_page) {
 252                         pci_free_consistent(dev->pdev, PAGE_SIZE,
 253                                             dev_priv->hw_status_page,
 254                                             dev_priv->dma_status_page);
 255                         /* Need to rewrite hardware status page */
 256                         I830_WRITE(0x02080, 0x1ffff000);
 257                 }
 258
 259                 DRM(free)(dev->dev_private, sizeof(drm_i830_private_t),
 260                          DRM_MEM_DRIVER);
 261                 dev->dev_private = NULL;
 262
 263                 for (i = 0; i < dma->buf_count; i++) {
 264                         drm_buf_t *buf = dma->buflist[ i ];
 265                         drm_i830_buf_priv_t *buf_priv = buf->dev_private;
 266                         if ( buf_priv->kernel_virtual && buf->total )
 267                                 DRM(ioremapfree)(buf_priv->kernel_virtual, buf->total, dev);
 268                 }
 269         }
 270         return 0;
 271 }
 272
 273 int i830_wait_ring(drm_device_t *dev, int n, const char *caller)
 274 {
 275         drm_i830_private_t *dev_priv = dev->dev_private;
 276         drm_i830_ring_buffer_t *ring = &(dev_priv->ring);
 277         int iters = 0;
 278         unsigned long end;
 279         unsigned int last_head = I830_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
 280
 281         end = jiffies + (HZ*3);
 282         while (ring->space < n) {
 283                 ring->head = I830_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
 284                 ring->space = ring->head - (ring->tail+8);
 285                 if (ring->space < 0) ring->space += ring->Size;
 286
 287                 if (ring->head != last_head) {
 288                         end = jiffies + (HZ*3);
 289                         last_head = ring->head;
 290                 }
 291
 292                 iters++;
 293                 if(time_before(end, jiffies)) {
 294                         DRM_ERROR("space: %d wanted %d\n", ring->space, n);
 295                         DRM_ERROR("lockup\n");
 296                         goto out_wait_ring;
 297                 }
 298                 udelay(1);
 299                 dev_priv->sarea_priv->perf_boxes |= I830_BOX_WAIT;
 300         }
 301
 302 out_wait_ring:
 303         return iters;
 304 }
 305
 306 static void i830_kernel_lost_context(drm_device_t *dev)
 307 {
 308         drm_i830_private_t *dev_priv = dev->dev_private;
 309         drm_i830_ring_buffer_t *ring = &(dev_priv->ring);
 310
 311         ring->head = I830_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
 312         ring->tail = I830_READ(LP_RING + RING_TAIL) & TAIL_ADDR;
 313         ring->space = ring->head - (ring->tail+8);
 314         if (ring->space < 0) ring->space += ring->Size;
 315
 316         if (ring->head == ring->tail)
 317                 dev_priv->sarea_priv->perf_boxes |= I830_BOX_RING_EMPTY;
 318 }
 319
 320 static int i830_freelist_init(drm_device_t *dev, drm_i830_private_t *dev_priv)
 321 {
 322         drm_device_dma_t *dma = dev->dma;
 323         int my_idx = 36;
 324         u32 *hw_status = (u32 *)(dev_priv->hw_status_page + my_idx);
 325         int i;
 326
 327         if(dma->buf_count > 1019) {
 328                 /* Not enough space in the status page for the freelist */
 329                 return -EINVAL;
 330         }
 331
 332         for (i = 0; i < dma->buf_count; i++) {
 333                 drm_buf_t *buf = dma->buflist[ i ];
 334                 drm_i830_buf_priv_t *buf_priv = buf->dev_private;
 335
 336                 buf_priv->in_use = hw_status++;
 337                 buf_priv->my_use_idx = my_idx;
 338                 my_idx += 4;
 339
 340                 *buf_priv->in_use = I830_BUF_FREE;
 341
 342                 buf_priv->kernel_virtual = DRM(ioremap)(buf->bus_address,
 343                                                         buf->total, dev);
 344         }
 345         return 0;
 346 }
 347
 348 static int i830_dma_initialize(drm_device_t *dev,
 349                                drm_i830_private_t *dev_priv,
 350                                drm_i830_init_t *init)
 351 {
 352         struct list_head *list;
 353
 354         memset(dev_priv, 0, sizeof(drm_i830_private_t));
 355
 356         list_for_each(list, &dev->maplist->head) {
 357                 drm_map_list_t *r_list = list_entry(list, drm_map_list_t, head);
 358                 if( r_list->map &&
 359                     r_list->map->type == _DRM_SHM &&
 360                     r_list->map->flags & _DRM_CONTAINS_LOCK ) {
 361                         dev_priv->sarea_map = r_list->map;
 362                         break;
 363                 }
 364         }
 365
 366         if(!dev_priv->sarea_map) {
 367                 dev->dev_private = (void *)dev_priv;
 368                 i830_dma_cleanup(dev);
 369                 DRM_ERROR("can not find sarea!\n");
 370                 return -EINVAL;
 371         }
 372         dev_priv->mmio_map = drm_core_findmap(dev, init->mmio_offset);
 373         if(!dev_priv->mmio_map) {
 374                 dev->dev_private = (void *)dev_priv;
 375                 i830_dma_cleanup(dev);
 376                 DRM_ERROR("can not find mmio map!\n");
 377                 return -EINVAL;
 378         }
 379         dev->agp_buffer_map = drm_core_findmap(dev, init->buffers_offset);
 380         if(!dev->agp_buffer_map) {
 381                 dev->dev_private = (void *)dev_priv;
 382                 i830_dma_cleanup(dev);
 383                 DRM_ERROR("can not find dma buffer map!\n");
 384                 return -EINVAL;
 385         }
 386
 387         dev_priv->sarea_priv = (drm_i830_sarea_t *)
 388                 ((u8 *)dev_priv->sarea_map->handle +
 389                  init->sarea_priv_offset);
 390
 391         dev_priv->ring.Start = init->ring_start;
 392         dev_priv->ring.End = init->ring_end;
 393         dev_priv->ring.Size = init->ring_size;
 394
 395         dev_priv->ring.virtual_start = DRM(ioremap)(dev->agp->base +
 396                                                     init->ring_start,
 397                                                     init->ring_size, dev);
 398
 399         if (dev_priv->ring.virtual_start == NULL) {
 400                 dev->dev_private = (void *) dev_priv;
 401                 i830_dma_cleanup(dev);
 402                 DRM_ERROR("can not ioremap virtual address for"
 403                           " ring buffer\n");
 404                 return -ENOMEM;
 405         }
 406
 407         dev_priv->ring.tail_mask = dev_priv->ring.Size - 1;
 408
 409         dev_priv->w = init->w;
 410         dev_priv->h = init->h;
 411         dev_priv->pitch = init->pitch;
 412         dev_priv->back_offset = init->back_offset;
 413         dev_priv->depth_offset = init->depth_offset;
 414         dev_priv->front_offset = init->front_offset;
 415
 416         dev_priv->front_di1 = init->front_offset | init->pitch_bits;
 417         dev_priv->back_di1 = init->back_offset | init->pitch_bits;
 418         dev_priv->zi1 = init->depth_offset | init->pitch_bits;
 419
 420         DRM_DEBUG("front_di1 %x\n",    dev_priv->front_di1);
 421         DRM_DEBUG("back_offset %x\n", dev_priv->back_offset);
 422         DRM_DEBUG("back_di1 %x\n",    dev_priv->back_di1);
 423         DRM_DEBUG("pitch_bits %x\n",    init->pitch_bits);
 424
 425         dev_priv->cpp = init->cpp;
 426         /* We are using separate values as placeholders for mechanisms for
 427          * private backbuffer/depthbuffer usage.
 428          */
 429
 430         dev_priv->back_pitch = init->back_pitch;
 431         dev_priv->depth_pitch = init->depth_pitch;
 432         dev_priv->do_boxes = 0;
 433         dev_priv->use_mi_batchbuffer_start = 0;
 434
 435         /* Program Hardware Status Page */
 436         dev_priv->hw_status_page =
 437                 pci_alloc_consistent(dev->pdev, PAGE_SIZE,
 438                                                 &dev_priv->dma_status_page);
 439         if (!dev_priv->hw_status_page) {
 440                 dev->dev_private = (void *)dev_priv;
 441                 i830_dma_cleanup(dev);
 442                 DRM_ERROR("Can not allocate hardware status page\n");
 443                 return -ENOMEM;
 444         }
 445         memset(dev_priv->hw_status_page, 0, PAGE_SIZE);
 446         DRM_DEBUG("hw status page @ %p\n", dev_priv->hw_status_page);
 447
 448         I830_WRITE(0x02080, dev_priv->dma_status_page);
 449         DRM_DEBUG("Enabled hardware status page\n");
 450
 451         /* Now we need to init our freelist */
 452         if(i830_freelist_init(dev, dev_priv) != 0) {
 453                 dev->dev_private = (void *)dev_priv;
 454                 i830_dma_cleanup(dev);
 455                 DRM_ERROR("Not enough space in the status page for"
 456                           " the freelist\n");
 457                 return -ENOMEM;
 458         }
 459         dev->dev_private = (void *)dev_priv;
 460
 461         return 0;
 462 }
 463
 464 int i830_dma_init(struct inode *inode, struct file *filp,
 465                   unsigned int cmd, unsigned long arg)
 466 {
 467         drm_file_t *priv = filp->private_data;
 468         drm_device_t *dev = priv->dev;
 469         drm_i830_private_t *dev_priv;
 470         drm_i830_init_t init;
 471         int retcode = 0;
 472
 473         if (copy_from_user(&init, (void * __user) arg, sizeof(init)))
 474                 return -EFAULT;
 475
 476         switch(init.func) {
 477                 case I830_INIT_DMA:
 478                         dev_priv = DRM(alloc)(sizeof(drm_i830_private_t),
 479                                               DRM_MEM_DRIVER);
 480                         if(dev_priv == NULL) return -ENOMEM;
 481                         retcode = i830_dma_initialize(dev, dev_priv, &init);
 482                 break;
 483                 case I830_CLEANUP_DMA:
 484                         retcode = i830_dma_cleanup(dev);
 485                 break;
 486                 default:
 487                         retcode = -EINVAL;
 488                 break;
 489         }
 490
 491         return retcode;
 492 }
 493
 494 #define GFX_OP_STIPPLE           ((0x3<<29)|(0x1d<<24)|(0x83<<16))
 495 #define ST1_ENABLE               (1<<16)
 496 #define ST1_MASK                 (0xffff)
 497
 498 /* Most efficient way to verify state for the i830 is as it is
 499  * emitted.  Non-conformant state is silently dropped.
 500  */
 501 static void i830EmitContextVerified( drm_device_t *dev,
 502                                      unsigned int *code )
 503 {
 504         drm_i830_private_t *dev_priv = dev->dev_private;
 505         int i, j = 0;
 506         unsigned int tmp;
 507         RING_LOCALS;
 508
 509         BEGIN_LP_RING( I830_CTX_SETUP_SIZE + 4 );
 510
 511         for ( i = 0 ; i < I830_CTXREG_BLENDCOLR0 ; i++ ) {
 512                 tmp = code[i];
 513                 if ((tmp & (7<<29)) == CMD_3D &&
 514                     (tmp & (0x1f<<24)) < (0x1d<<24)) {
 515                         OUT_RING( tmp );
 516                         j++;
 517                 } else {
 518                         DRM_ERROR("Skipping %d\n", i);
 519                 }
 520         }
 521
 522         OUT_RING( STATE3D_CONST_BLEND_COLOR_CMD );
 523         OUT_RING( code[I830_CTXREG_BLENDCOLR] );
 524         j += 2;
 525
 526         for ( i = I830_CTXREG_VF ; i < I830_CTXREG_MCSB0 ; i++ ) {
 527                 tmp = code[i];
 528                 if ((tmp & (7<<29)) == CMD_3D &&
 529                     (tmp & (0x1f<<24)) < (0x1d<<24)) {
 530                         OUT_RING( tmp );
 531                         j++;
 532                 } else {
 533                         DRM_ERROR("Skipping %d\n", i);
 534                 }
 535         }
 536
 537         OUT_RING( STATE3D_MAP_COORD_SETBIND_CMD );
 538         OUT_RING( code[I830_CTXREG_MCSB1] );
 539         j += 2;
 540
 541         if (j & 1)
 542                 OUT_RING( 0 );
 543
 544         ADVANCE_LP_RING();
 545 }
 546
 547 static void i830EmitTexVerified( drm_device_t *dev, unsigned int *code )
 548 {
 549         drm_i830_private_t *dev_priv = dev->dev_private;
 550         int i, j = 0;
 551         unsigned int tmp;
 552         RING_LOCALS;
 553
 554         if (code[I830_TEXREG_MI0] == GFX_OP_MAP_INFO ||
 555             (code[I830_TEXREG_MI0] & ~(0xf*LOAD_TEXTURE_MAP0)) ==
 556             (STATE3D_LOAD_STATE_IMMEDIATE_2|4)) {
 557
 558                 BEGIN_LP_RING( I830_TEX_SETUP_SIZE );
 559
 560                 OUT_RING( code[I830_TEXREG_MI0] ); /* TM0LI */
 561                 OUT_RING( code[I830_TEXREG_MI1] ); /* TM0S0 */
 562                 OUT_RING( code[I830_TEXREG_MI2] ); /* TM0S1 */
 563                 OUT_RING( code[I830_TEXREG_MI3] ); /* TM0S2 */
 564                 OUT_RING( code[I830_TEXREG_MI4] ); /* TM0S3 */
 565                 OUT_RING( code[I830_TEXREG_MI5] ); /* TM0S4 */
 566
 567                 for ( i = 6 ; i < I830_TEX_SETUP_SIZE ; i++ ) {
 568                         tmp = code[i];
 569                         OUT_RING( tmp );
 570                         j++;
 571                 }
 572
 573                 if (j & 1)
 574                         OUT_RING( 0 );
 575
 576                 ADVANCE_LP_RING();
 577         }
 578         else
 579                 printk("rejected packet %x\n", code[0]);
 580 }
 581
 582 static void i830EmitTexBlendVerified( drm_device_t *dev,
 583                                       unsigned int *code,
 584                                       unsigned int num)
 585 {
 586         drm_i830_private_t *dev_priv = dev->dev_private;
 587         int i, j = 0;
 588         unsigned int tmp;
 589         RING_LOCALS;
 590
 591         if (!num)
 592                 return;
 593
 594         BEGIN_LP_RING( num + 1 );
 595
 596         for ( i = 0 ; i < num ; i++ ) {
 597                 tmp = code[i];
 598                 OUT_RING( tmp );
 599                 j++;
 600         }
 601
 602         if (j & 1)
 603                 OUT_RING( 0 );
 604
 605         ADVANCE_LP_RING();
 606 }
 607
 608 static void i830EmitTexPalette( drm_device_t *dev,
 609                                 unsigned int *palette,
 610                                 int number,
 611                                 int is_shared )
 612 {
 613         drm_i830_private_t *dev_priv = dev->dev_private;
 614         int i;
 615         RING_LOCALS;
 616
 617         return;
 618
 619         BEGIN_LP_RING( 258 );
 620
 621         if(is_shared == 1) {
 622                 OUT_RING(CMD_OP_MAP_PALETTE_LOAD |
 623                          MAP_PALETTE_NUM(0) |
 624                          MAP_PALETTE_BOTH);
 625         } else {
 626                 OUT_RING(CMD_OP_MAP_PALETTE_LOAD | MAP_PALETTE_NUM(number));
 627         }
 628         for(i = 0; i < 256; i++) {
 629                 OUT_RING(palette[i]);
 630         }
 631         OUT_RING(0);
 632         /* KW:  WHERE IS THE ADVANCE_LP_RING?  This is effectively a noop!
 633          */
 634 }
 635
 636 /* Need to do some additional checking when setting the dest buffer.
 637  */
 638 static void i830EmitDestVerified( drm_device_t *dev,
 639                                   unsigned int *code )
 640 {
 641         drm_i830_private_t *dev_priv = dev->dev_private;
 642         unsigned int tmp;
 643         RING_LOCALS;
 644
 645         BEGIN_LP_RING( I830_DEST_SETUP_SIZE + 10 );
 646
 647
 648         tmp = code[I830_DESTREG_CBUFADDR];
 649         if (tmp == dev_priv->front_di1 || tmp == dev_priv->back_di1) {
 650                 if (((int)outring) & 8) {
 651                         OUT_RING(0);
 652                         OUT_RING(0);
 653                 }
 654
 655                 OUT_RING( CMD_OP_DESTBUFFER_INFO );
 656                 OUT_RING( BUF_3D_ID_COLOR_BACK |
 657                           BUF_3D_PITCH(dev_priv->back_pitch * dev_priv->cpp) |
 658                           BUF_3D_USE_FENCE);
 659                 OUT_RING( tmp );
 660                 OUT_RING( 0 );
 661
 662                 OUT_RING( CMD_OP_DESTBUFFER_INFO );
 663                 OUT_RING( BUF_3D_ID_DEPTH | BUF_3D_USE_FENCE |
 664                           BUF_3D_PITCH(dev_priv->depth_pitch * dev_priv->cpp));
 665                 OUT_RING( dev_priv->zi1 );
 666                 OUT_RING( 0 );
 667         } else {
 668                 DRM_ERROR("bad di1 %x (allow %x or %x)\n",
 669                           tmp, dev_priv->front_di1, dev_priv->back_di1);
 670         }
 671
 672         /* invarient:
 673          */
 674
 675
 676         OUT_RING( GFX_OP_DESTBUFFER_VARS );
 677         OUT_RING( code[I830_DESTREG_DV1] );
 678
 679         OUT_RING( GFX_OP_DRAWRECT_INFO );
 680         OUT_RING( code[I830_DESTREG_DR1] );
 681         OUT_RING( code[I830_DESTREG_DR2] );
 682         OUT_RING( code[I830_DESTREG_DR3] );
 683         OUT_RING( code[I830_DESTREG_DR4] );
 684
 685         /* Need to verify this */
 686         tmp = code[I830_DESTREG_SENABLE];
 687         if((tmp & ~0x3) == GFX_OP_SCISSOR_ENABLE) {
 688                 OUT_RING( tmp );
 689         } else {
 690                 DRM_ERROR("bad scissor enable\n");
 691                 OUT_RING( 0 );
 692         }
 693
 694         OUT_RING( GFX_OP_SCISSOR_RECT );
 695         OUT_RING( code[I830_DESTREG_SR1] );
 696         OUT_RING( code[I830_DESTREG_SR2] );
 697         OUT_RING( 0 );
 698
 699         ADVANCE_LP_RING();
 700 }
 701
 702 static void i830EmitStippleVerified( drm_device_t *dev,
 703                                      unsigned int *code )
 704 {
 705         drm_i830_private_t *dev_priv = dev->dev_private;
 706         RING_LOCALS;
 707
 708         BEGIN_LP_RING( 2 );
 709         OUT_RING( GFX_OP_STIPPLE );
 710         OUT_RING( code[1] );
 711         ADVANCE_LP_RING();
 712 }
 713
 714
 715 static void i830EmitState( drm_device_t *dev )
 716 {
 717         drm_i830_private_t *dev_priv = dev->dev_private;
 718         drm_i830_sarea_t *sarea_priv = dev_priv->sarea_priv;
 719         unsigned int dirty = sarea_priv->dirty;
 720
 721         DRM_DEBUG("%s %x\n", __FUNCTION__, dirty);
 722
 723         if (dirty & I830_UPLOAD_BUFFERS) {
 724                 i830EmitDestVerified( dev, sarea_priv->BufferState );
 725                 sarea_priv->dirty &= ~I830_UPLOAD_BUFFERS;
 726         }
 727
 728         if (dirty & I830_UPLOAD_CTX) {
 729                 i830EmitContextVerified( dev, sarea_priv->ContextState );
 730                 sarea_priv->dirty &= ~I830_UPLOAD_CTX;
 731         }
 732
 733         if (dirty & I830_UPLOAD_TEX0) {
 734                 i830EmitTexVerified( dev, sarea_priv->TexState[0] );
 735                 sarea_priv->dirty &= ~I830_UPLOAD_TEX0;
 736         }
 737
 738         if (dirty & I830_UPLOAD_TEX1) {
 739                 i830EmitTexVerified( dev, sarea_priv->TexState[1] );
 740                 sarea_priv->dirty &= ~I830_UPLOAD_TEX1;
 741         }
 742
 743         if (dirty & I830_UPLOAD_TEXBLEND0) {
 744                 i830EmitTexBlendVerified( dev, sarea_priv->TexBlendState[0],
 745                                 sarea_priv->TexBlendStateWordsUsed[0]);
 746                 sarea_priv->dirty &= ~I830_UPLOAD_TEXBLEND0;
 747         }
 748
 749         if (dirty & I830_UPLOAD_TEXBLEND1) {
 750                 i830EmitTexBlendVerified( dev, sarea_priv->TexBlendState[1],
 751                                 sarea_priv->TexBlendStateWordsUsed[1]);
 752                 sarea_priv->dirty &= ~I830_UPLOAD_TEXBLEND1;
 753         }
 754
 755         if (dirty & I830_UPLOAD_TEX_PALETTE_SHARED) {
 756                 i830EmitTexPalette(dev, sarea_priv->Palette[0], 0, 1);
 757         } else {
 758                 if (dirty & I830_UPLOAD_TEX_PALETTE_N(0)) {
 759                         i830EmitTexPalette(dev, sarea_priv->Palette[0], 0, 0);
 760                         sarea_priv->dirty &= ~I830_UPLOAD_TEX_PALETTE_N(0);
 761                 }
 762                 if (dirty & I830_UPLOAD_TEX_PALETTE_N(1)) {
 763                         i830EmitTexPalette(dev, sarea_priv->Palette[1], 1, 0);
 764                         sarea_priv->dirty &= ~I830_UPLOAD_TEX_PALETTE_N(1);
 765                 }
 766
 767                 /* 1.3:
 768                  */
 769 #if 0
 770                 if (dirty & I830_UPLOAD_TEX_PALETTE_N(2)) {
 771                         i830EmitTexPalette(dev, sarea_priv->Palette2[0], 0, 0);
 772                         sarea_priv->dirty &= ~I830_UPLOAD_TEX_PALETTE_N(2);
 773                 }
 774                 if (dirty & I830_UPLOAD_TEX_PALETTE_N(3)) {
 775                         i830EmitTexPalette(dev, sarea_priv->Palette2[1], 1, 0);
 776                         sarea_priv->dirty &= ~I830_UPLOAD_TEX_PALETTE_N(2);
 777                 }
 778 #endif
 779         }
 780
 781         /* 1.3:
 782          */
 783         if (dirty & I830_UPLOAD_STIPPLE) {
 784                 i830EmitStippleVerified( dev,
 785                                          sarea_priv->StippleState);
 786                 sarea_priv->dirty &= ~I830_UPLOAD_STIPPLE;
 787         }
 788
 789         if (dirty & I830_UPLOAD_TEX2) {
 790                 i830EmitTexVerified( dev, sarea_priv->TexState2 );
 791                 sarea_priv->dirty &= ~I830_UPLOAD_TEX2;
 792         }
 793
 794         if (dirty & I830_UPLOAD_TEX3) {
 795                 i830EmitTexVerified( dev, sarea_priv->TexState3 );
 796                 sarea_priv->dirty &= ~I830_UPLOAD_TEX3;
 797         }
 798
 799
 800         if (dirty & I830_UPLOAD_TEXBLEND2) {
 801                 i830EmitTexBlendVerified(
 802                         dev,
 803                         sarea_priv->TexBlendState2,
 804                         sarea_priv->TexBlendStateWordsUsed2);
 805
 806                 sarea_priv->dirty &= ~I830_UPLOAD_TEXBLEND2;
 807         }
 808
 809         if (dirty & I830_UPLOAD_TEXBLEND3) {
 810                 i830EmitTexBlendVerified(
 811                         dev,
 812                         sarea_priv->TexBlendState3,
 813                         sarea_priv->TexBlendStateWordsUsed3);
 814                 sarea_priv->dirty &= ~I830_UPLOAD_TEXBLEND3;
 815         }
 816 }
 817
 818 /* ================================================================
 819  * Performance monitoring functions
 820  */
 821
 822 static void i830_fill_box( drm_device_t *dev,
 823                            int x, int y, int w, int h,
 824                            int r, int g, int b )
 825 {
 826         drm_i830_private_t *dev_priv = dev->dev_private;
 827         u32 color;
 828         unsigned int BR13, CMD;
 829         RING_LOCALS;
 830
 831         BR13 = (0xF0 << 16) | (dev_priv->pitch * dev_priv->cpp) | (1<<24);
 832         CMD = XY_COLOR_BLT_CMD;
 833         x += dev_priv->sarea_priv->boxes[0].x1;
 834         y += dev_priv->sarea_priv->boxes[0].y1;
 835
 836         if (dev_priv->cpp == 4) {
 837                 BR13 |= (1<<25);
 838                 CMD |= (XY_COLOR_BLT_WRITE_ALPHA | XY_COLOR_BLT_WRITE_RGB);
 839                 color = (((0xff) << 24) | (r << 16) | (g <<  8) | b);
 840         } else {
 841                 color = (((r & 0xf8) << 8) |
 842                          ((g & 0xfc) << 3) |
 843                          ((b & 0xf8) >> 3));
 844         }
 845
 846         BEGIN_LP_RING( 6 );
 847         OUT_RING( CMD );
 848         OUT_RING( BR13 );
 849         OUT_RING( (y << 16) | x );
 850         OUT_RING( ((y+h) << 16) | (x+w) );
 851
 852         if ( dev_priv->current_page == 1 ) {
 853                 OUT_RING( dev_priv->front_offset );
 854         } else {
 855                 OUT_RING( dev_priv->back_offset );
 856         }
 857
 858         OUT_RING( color );
 859         ADVANCE_LP_RING();
 860 }
 861
 862 static void i830_cp_performance_boxes( drm_device_t *dev )
 863 {
 864         drm_i830_private_t *dev_priv = dev->dev_private;
 865
 866         /* Purple box for page flipping
 867          */
 868         if ( dev_priv->sarea_priv->perf_boxes & I830_BOX_FLIP )
 869                 i830_fill_box( dev, 4, 4, 8, 8, 255, 0, 255 );
 870
 871         /* Red box if we have to wait for idle at any point
 872          */
 873         if ( dev_priv->sarea_priv->perf_boxes & I830_BOX_WAIT )
 874                 i830_fill_box( dev, 16, 4, 8, 8, 255, 0, 0 );
 875
 876         /* Blue box: lost context?
 877          */
 878         if ( dev_priv->sarea_priv->perf_boxes & I830_BOX_LOST_CONTEXT )
 879                 i830_fill_box( dev, 28, 4, 8, 8, 0, 0, 255 );
 880
 881         /* Yellow box for texture swaps
 882          */
 883         if ( dev_priv->sarea_priv->perf_boxes & I830_BOX_TEXTURE_LOAD )
 884                 i830_fill_box( dev, 40, 4, 8, 8, 255, 255, 0 );
 885
 886         /* Green box if hardware never idles (as far as we can tell)
 887          */
 888         if ( !(dev_priv->sarea_priv->perf_boxes & I830_BOX_RING_EMPTY) )
 889                 i830_fill_box( dev, 64, 4, 8, 8, 0, 255, 0 );
 890
 891
 892         /* Draw bars indicating number of buffers allocated
 893          * (not a great measure, easily confused)
 894          */
 895         if (dev_priv->dma_used) {
 896                 int bar = dev_priv->dma_used / 10240;
 897                 if (bar > 100) bar = 100;
 898                 if (bar < 1) bar = 1;
 899                 i830_fill_box( dev, 4, 16, bar, 4, 196, 128, 128 );
 900                 dev_priv->dma_used = 0;
 901         }
 902
 903         dev_priv->sarea_priv->perf_boxes = 0;
 904 }
 905
 906 static void i830_dma_dispatch_clear( drm_device_t *dev, int flags,
 907                                     unsigned int clear_color,
 908                                     unsigned int clear_zval,
 909                                     unsigned int clear_depthmask)
 910 {
 911         drm_i830_private_t *dev_priv = dev->dev_private;
 912         drm_i830_sarea_t *sarea_priv = dev_priv->sarea_priv;
 913         int nbox = sarea_priv->nbox;
 914         drm_clip_rect_t *pbox = sarea_priv->boxes;
 915         int pitch = dev_priv->pitch;
 916         int cpp = dev_priv->cpp;
 917         int i;
 918         unsigned int BR13, CMD, D_CMD;
 919         RING_LOCALS;
 920
 921
 922         if ( dev_priv->current_page == 1 ) {
 923                 unsigned int tmp = flags;
 924
 925                 flags &= ~(I830_FRONT | I830_BACK);
 926                 if ( tmp & I830_FRONT ) flags |= I830_BACK;
 927                 if ( tmp & I830_BACK )  flags |= I830_FRONT;
 928         }
 929
 930         i830_kernel_lost_context(dev);
 931
 932         switch(cpp) {
 933         case 2:
 934                 BR13 = (0xF0 << 16) | (pitch * cpp) | (1<<24);
 935                 D_CMD = CMD = XY_COLOR_BLT_CMD;
 936                 break;
 937         case 4:
 938                 BR13 = (0xF0 << 16) | (pitch * cpp) | (1<<24) | (1<<25);
 939                 CMD = (XY_COLOR_BLT_CMD | XY_COLOR_BLT_WRITE_ALPHA |
 940                        XY_COLOR_BLT_WRITE_RGB);
 941                 D_CMD = XY_COLOR_BLT_CMD;
 942                 if(clear_depthmask & 0x00ffffff)
 943                         D_CMD |= XY_COLOR_BLT_WRITE_RGB;
 944                 if(clear_depthmask & 0xff000000)
 945                         D_CMD |= XY_COLOR_BLT_WRITE_ALPHA;
 946                 break;
 947         default:
 948                 BR13 = (0xF0 << 16) | (pitch * cpp) | (1<<24);
 949                 D_CMD = CMD = XY_COLOR_BLT_CMD;
 950                 break;
 951         }
 952
 953         if (nbox > I830_NR_SAREA_CLIPRECTS)
 954                 nbox = I830_NR_SAREA_CLIPRECTS;
 955
 956         for (i = 0 ; i < nbox ; i++, pbox++) {
 957                 if (pbox->x1 > pbox->x2 ||
 958                     pbox->y1 > pbox->y2 ||
 959                     pbox->x2 > dev_priv->w ||
 960                     pbox->y2 > dev_priv->h)
 961                         continue;
 962
 963                 if ( flags & I830_FRONT ) {
 964                         DRM_DEBUG("clear front\n");
 965                         BEGIN_LP_RING( 6 );
 966                         OUT_RING( CMD );
 967                         OUT_RING( BR13 );
 968                         OUT_RING( (pbox->y1 << 16) | pbox->x1 );
 969                         OUT_RING( (pbox->y2 << 16) | pbox->x2 );
 970                         OUT_RING( dev_priv->front_offset );
 971                         OUT_RING( clear_color );
 972                         ADVANCE_LP_RING();
 973                 }
 974
 975                 if ( flags & I830_BACK ) {
 976                         DRM_DEBUG("clear back\n");
 977                         BEGIN_LP_RING( 6 );
 978                         OUT_RING( CMD );
 979                         OUT_RING( BR13 );
 980                         OUT_RING( (pbox->y1 << 16) | pbox->x1 );
 981                         OUT_RING( (pbox->y2 << 16) | pbox->x2 );
 982                         OUT_RING( dev_priv->back_offset );
 983                         OUT_RING( clear_color );
 984                         ADVANCE_LP_RING();
 985                 }
 986
 987                 if ( flags & I830_DEPTH ) {
 988                         DRM_DEBUG("clear depth\n");
 989                         BEGIN_LP_RING( 6 );
 990                         OUT_RING( D_CMD );
 991                         OUT_RING( BR13 );
 992                         OUT_RING( (pbox->y1 << 16) | pbox->x1 );
 993                         OUT_RING( (pbox->y2 << 16) | pbox->x2 );
 994                         OUT_RING( dev_priv->depth_offset );
 995                         OUT_RING( clear_zval );
 996                         ADVANCE_LP_RING();
 997                 }
 998         }
 999 }
1000
1001 static void i830_dma_dispatch_swap( drm_device_t *dev )
1002 {
1003         drm_i830_private_t *dev_priv = dev->dev_private;
1004         drm_i830_sarea_t *sarea_priv = dev_priv->sarea_priv;
1005         int nbox = sarea_priv->nbox;
1006         drm_clip_rect_t *pbox = sarea_priv->boxes;
1007         int pitch = dev_priv->pitch;
1008         int cpp = dev_priv->cpp;
1009         int i;
1010         unsigned int CMD, BR13;
1011         RING_LOCALS;
1012
1013         DRM_DEBUG("swapbuffers\n");
1014
1015         i830_kernel_lost_context(dev);
1016
1017         if (dev_priv->do_boxes)
1018                 i830_cp_performance_boxes( dev );
1019
1020         switch(cpp) {
1021         case 2:
1022                 BR13 = (pitch * cpp) | (0xCC << 16) | (1<<24);
1023                 CMD = XY_SRC_COPY_BLT_CMD;
1024                 break;
1025         case 4:
1026                 BR13 = (pitch * cpp) | (0xCC << 16) | (1<<24) | (1<<25);
1027                 CMD = (XY_SRC_COPY_BLT_CMD | XY_SRC_COPY_BLT_WRITE_ALPHA |
1028                        XY_SRC_COPY_BLT_WRITE_RGB);
1029                 break;
1030         default:
1031                 BR13 = (pitch * cpp) | (0xCC << 16) | (1<<24);
1032                 CMD = XY_SRC_COPY_BLT_CMD;
1033                 break;
1034         }
1035
1036
1037         if (nbox > I830_NR_SAREA_CLIPRECTS)
1038                 nbox = I830_NR_SAREA_CLIPRECTS;
1039
1040         for (i = 0 ; i < nbox; i++, pbox++)
1041         {
1042                 if (pbox->x1 > pbox->x2 ||
1043                     pbox->y1 > pbox->y2 ||
1044                     pbox->x2 > dev_priv->w ||
1045                     pbox->y2 > dev_priv->h)
1046                         continue;
1047
1048                 DRM_DEBUG("dispatch swap %d,%d-%d,%d!\n",
1049                           pbox->x1, pbox->y1,
1050                           pbox->x2, pbox->y2);
1051
1052                 BEGIN_LP_RING( 8 );
1053                 OUT_RING( CMD );
1054                 OUT_RING( BR13 );
1055                 OUT_RING( (pbox->y1 << 16) | pbox->x1 );
1056                 OUT_RING( (pbox->y2 << 16) | pbox->x2 );
1057
1058                 if (dev_priv->current_page == 0)
1059                         OUT_RING( dev_priv->front_offset );
1060                 else
1061                         OUT_RING( dev_priv->back_offset );
1062
1063                 OUT_RING( (pbox->y1 << 16) | pbox->x1 );
1064                 OUT_RING( BR13 & 0xffff );
1065
1066                 if (dev_priv->current_page == 0)
1067                         OUT_RING( dev_priv->back_offset );
1068                 else
1069                         OUT_RING( dev_priv->front_offset );
1070
1071                 ADVANCE_LP_RING();
1072         }
1073 }
1074
1075 static void i830_dma_dispatch_flip( drm_device_t *dev )
1076 {
1077         drm_i830_private_t *dev_priv = dev->dev_private;
1078         RING_LOCALS;
1079
1080         DRM_DEBUG( "%s: page=%d pfCurrentPage=%d\n",
1081                    __FUNCTION__,
1082                    dev_priv->current_page,
1083                    dev_priv->sarea_priv->pf_current_page);
1084
1085         i830_kernel_lost_context(dev);
1086
1087         if (dev_priv->do_boxes) {
1088                 dev_priv->sarea_priv->perf_boxes |= I830_BOX_FLIP;
1089                 i830_cp_performance_boxes( dev );
1090         }
1091
1092
1093         BEGIN_LP_RING( 2 );
1094         OUT_RING( INST_PARSER_CLIENT | INST_OP_FLUSH | INST_FLUSH_MAP_CACHE );
1095         OUT_RING( 0 );
1096         ADVANCE_LP_RING();
1097
1098         BEGIN_LP_RING( 6 );
1099         OUT_RING( CMD_OP_DISPLAYBUFFER_INFO | ASYNC_FLIP );
1100         OUT_RING( 0 );
1101         if ( dev_priv->current_page == 0 ) {
1102                 OUT_RING( dev_priv->back_offset );
1103                 dev_priv->current_page = 1;
1104         } else {
1105                 OUT_RING( dev_priv->front_offset );
1106                 dev_priv->current_page = 0;
1107         }
1108         OUT_RING(0);
1109         ADVANCE_LP_RING();
1110
1111
1112         BEGIN_LP_RING( 2 );
1113         OUT_RING( MI_WAIT_FOR_EVENT |
1114                   MI_WAIT_FOR_PLANE_A_FLIP );
1115         OUT_RING( 0 );
1116         ADVANCE_LP_RING();
1117
1118
1119         dev_priv->sarea_priv->pf_current_page = dev_priv->current_page;
1120 }
1121
1122 static void i830_dma_dispatch_vertex(drm_device_t *dev,
1123                                      drm_buf_t *buf,
1124                                      int discard,
1125                                      int used)
1126 {
1127         drm_i830_private_t *dev_priv = dev->dev_private;
1128         drm_i830_buf_priv_t *buf_priv = buf->dev_private;
1129         drm_i830_sarea_t *sarea_priv = dev_priv->sarea_priv;
1130         drm_clip_rect_t *box = sarea_priv->boxes;
1131         int nbox = sarea_priv->nbox;
1132         unsigned long address = (unsigned long)buf->bus_address;
1133         unsigned long start = address - dev->agp->base;
1134         int i = 0, u;
1135         RING_LOCALS;
1136
1137         i830_kernel_lost_context(dev);
1138
1139         if (nbox > I830_NR_SAREA_CLIPRECTS)
1140                 nbox = I830_NR_SAREA_CLIPRECTS;
1141
1142         if (discard) {
1143                 u = cmpxchg(buf_priv->in_use, I830_BUF_CLIENT,
1144                             I830_BUF_HARDWARE);
1145                 if(u != I830_BUF_CLIENT) {
1146                         DRM_DEBUG("xxxx 2\n");
1147                 }
1148         }
1149
1150         if (used > 4*1023)
1151                 used = 0;
1152
1153         if (sarea_priv->dirty)
1154            i830EmitState( dev );
1155
1156         DRM_DEBUG("dispatch vertex addr 0x%lx, used 0x%x nbox %d\n",
1157                   address, used, nbox);
1158
1159         dev_priv->counter++;
1160         DRM_DEBUG(  "dispatch counter : %ld\n", dev_priv->counter);
1161         DRM_DEBUG(  "i830_dma_dispatch\n");
1162         DRM_DEBUG(  "start : %lx\n", start);
1163         DRM_DEBUG(  "used : %d\n", used);
1164         DRM_DEBUG(  "start + used - 4 : %ld\n", start + used - 4);
1165
1166         if (buf_priv->currently_mapped == I830_BUF_MAPPED) {
1167                 u32 *vp = buf_priv->kernel_virtual;
1168
1169                 vp[0] = (GFX_OP_PRIMITIVE |
1170                         sarea_priv->vertex_prim |
1171                         ((used/4)-2));
1172
1173                 if (dev_priv->use_mi_batchbuffer_start) {
1174                         vp[used/4] = MI_BATCH_BUFFER_END;
1175                         used += 4;
1176                 }
1177
1178                 if (used & 4) {
1179                         vp[used/4] = 0;
1180                         used += 4;
1181                 }
1182
1183                 i830_unmap_buffer(buf);
1184         }
1185
1186         if (used) {
1187                 do {
1188                         if (i < nbox) {
1189                                 BEGIN_LP_RING(6);
1190                                 OUT_RING( GFX_OP_DRAWRECT_INFO );
1191                                 OUT_RING( sarea_priv->BufferState[I830_DESTREG_DR1] );
1192                                 OUT_RING( box[i].x1 | (box[i].y1<<16) );
1193                                 OUT_RING( box[i].x2 | (box[i].y2<<16) );
1194                                 OUT_RING( sarea_priv->BufferState[I830_DESTREG_DR4] );
1195                                 OUT_RING( 0 );
1196                                 ADVANCE_LP_RING();
1197                         }
1198
1199                         if (dev_priv->use_mi_batchbuffer_start) {
1200                                 BEGIN_LP_RING(2);
1201                                 OUT_RING( MI_BATCH_BUFFER_START | (2<<6) );
1202                                 OUT_RING( start | MI_BATCH_NON_SECURE );
1203                                 ADVANCE_LP_RING();
1204                         }
1205                         else {
1206                                 BEGIN_LP_RING(4);
1207                                 OUT_RING( MI_BATCH_BUFFER );
1208                                 OUT_RING( start | MI_BATCH_NON_SECURE );
1209                                 OUT_RING( start + used - 4 );
1210                                 OUT_RING( 0 );
1211                                 ADVANCE_LP_RING();
1212                         }
1213
1214                 } while (++i < nbox);
1215         }
1216
1217         if (discard) {
1218                 dev_priv->counter++;
1219
1220                 (void) cmpxchg(buf_priv->in_use, I830_BUF_CLIENT,
1221                                I830_BUF_HARDWARE);
1222
1223                 BEGIN_LP_RING(8);
1224                 OUT_RING( CMD_STORE_DWORD_IDX );
1225                 OUT_RING( 20 );
1226                 OUT_RING( dev_priv->counter );
1227                 OUT_RING( CMD_STORE_DWORD_IDX );
1228                 OUT_RING( buf_priv->my_use_idx );
1229                 OUT_RING( I830_BUF_FREE );
1230                 OUT_RING( CMD_REPORT_HEAD );
1231                 OUT_RING( 0 );
1232                 ADVANCE_LP_RING();
1233         }
1234 }
1235
1236
1237 void i830_dma_quiescent(drm_device_t *dev)
1238 {
1239         drm_i830_private_t *dev_priv = dev->dev_private;
1240         RING_LOCALS;
1241
1242         i830_kernel_lost_context(dev);
1243
1244         BEGIN_LP_RING(4);
1245         OUT_RING( INST_PARSER_CLIENT | INST_OP_FLUSH | INST_FLUSH_MAP_CACHE );
1246         OUT_RING( CMD_REPORT_HEAD );
1247         OUT_RING( 0 );
1248         OUT_RING( 0 );
1249         ADVANCE_LP_RING();
1250
1251         i830_wait_ring( dev, dev_priv->ring.Size - 8, __FUNCTION__ );
1252 }
1253
1254 static int i830_flush_queue(drm_device_t *dev)
1255 {
1256         drm_i830_private_t *dev_priv = dev->dev_private;
1257         drm_device_dma_t *dma = dev->dma;
1258         int i, ret = 0;
1259         RING_LOCALS;
1260
1261         i830_kernel_lost_context(dev);
1262
1263         BEGIN_LP_RING(2);
1264         OUT_RING( CMD_REPORT_HEAD );
1265         OUT_RING( 0 );
1266         ADVANCE_LP_RING();
1267
1268         i830_wait_ring( dev, dev_priv->ring.Size - 8, __FUNCTION__ );
1269
1270         for (i = 0; i < dma->buf_count; i++) {
1271                 drm_buf_t *buf = dma->buflist[ i ];
1272                 drm_i830_buf_priv_t *buf_priv = buf->dev_private;
1273
1274                 int used = cmpxchg(buf_priv->in_use, I830_BUF_HARDWARE,
1275                                    I830_BUF_FREE);
1276
1277                 if (used == I830_BUF_HARDWARE)
1278                         DRM_DEBUG("reclaimed from HARDWARE\n");
1279                 if (used == I830_BUF_CLIENT)
1280                         DRM_DEBUG("still on client\n");
1281         }
1282
1283         return ret;
1284 }
1285
1286 /* Must be called with the lock held */
1287 void i830_reclaim_buffers( struct file *filp )
1288 {
1289         drm_file_t    *priv   = filp->private_data;
1290         drm_device_t  *dev    = priv->dev;
1291         drm_device_dma_t *dma = dev->dma;
1292         int              i;
1293
1294         if (!dma) return;
1295         if (!dev->dev_private) return;
1296         if (!dma->buflist) return;
1297
1298         i830_flush_queue(dev);
1299
1300         for (i = 0; i < dma->buf_count; i++) {
1301                 drm_buf_t *buf = dma->buflist[ i ];
1302                 drm_i830_buf_priv_t *buf_priv = buf->dev_private;
1303
1304                 if (buf->filp == filp && buf_priv) {
1305                         int used = cmpxchg(buf_priv->in_use, I830_BUF_CLIENT,
1306                                            I830_BUF_FREE);
1307
1308                         if (used == I830_BUF_CLIENT)
1309                                 DRM_DEBUG("reclaimed from client\n");
1310                         if(buf_priv->currently_mapped == I830_BUF_MAPPED)
1311                                 buf_priv->currently_mapped = I830_BUF_UNMAPPED;
1312                 }
1313         }
1314 }
1315
1316 int i830_flush_ioctl(struct inode *inode, struct file *filp,
1317                      unsigned int cmd, unsigned long arg)
1318 {
1319         drm_file_t        *priv   = filp->private_data;
1320         drm_device_t      *dev    = priv->dev;
1321
1322         if(!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) {
1323                 DRM_ERROR("i830_flush_ioctl called without lock held\n");
1324                 return -EINVAL;
1325         }
1326
1327         i830_flush_queue(dev);
1328         return 0;
1329 }
1330
1331 int i830_dma_vertex(struct inode *inode, struct file *filp,
1332                unsigned int cmd, unsigned long arg)
1333 {
1334         drm_file_t *priv = filp->private_data;
1335         drm_device_t *dev = priv->dev;
1336         drm_device_dma_t *dma = dev->dma;
1337         drm_i830_private_t *dev_priv = (drm_i830_private_t *)dev->dev_private;
1338         u32 *hw_status = dev_priv->hw_status_page;
1339         drm_i830_sarea_t *sarea_priv = (drm_i830_sarea_t *)
1340                                         dev_priv->sarea_priv;
1341         drm_i830_vertex_t vertex;
1342
1343         if (copy_from_user(&vertex, (drm_i830_vertex_t __user *)arg, sizeof(vertex)))
1344                 return -EFAULT;
1345
1346         if(!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) {
1347                 DRM_ERROR("i830_dma_vertex called without lock held\n");
1348                 return -EINVAL;
1349         }
1350
1351         DRM_DEBUG("i830 dma vertex, idx %d used %d discard %d\n",
1352                   vertex.idx, vertex.used, vertex.discard);
1353
1354         if(vertex.idx < 0 || vertex.idx > dma->buf_count) return -EINVAL;
1355
1356         i830_dma_dispatch_vertex( dev,
1357                                   dma->buflist[ vertex.idx ],
1358                                   vertex.discard, vertex.used );
1359
1360         sarea_priv->last_enqueue = dev_priv->counter-1;
1361         sarea_priv->last_dispatch = (int) hw_status[5];
1362
1363         return 0;
1364 }
1365
1366 int i830_clear_bufs(struct inode *inode, struct file *filp,
1367                    unsigned int cmd, unsigned long arg)
1368 {
1369         drm_file_t *priv = filp->private_data;
1370         drm_device_t *dev = priv->dev;
1371         drm_i830_clear_t clear;
1372
1373         if (copy_from_user(&clear, (drm_i830_clear_t __user *)arg, sizeof(clear)))
1374                 return -EFAULT;
1375
1376         if(!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) {
1377                 DRM_ERROR("i830_clear_bufs called without lock held\n");
1378                 return -EINVAL;
1379         }
1380
1381         /* GH: Someone's doing nasty things... */
1382         if (!dev->dev_private) {
1383                 return -EINVAL;
1384         }
1385
1386         i830_dma_dispatch_clear( dev, clear.flags,
1387                                  clear.clear_color,
1388                                  clear.clear_depth,
1389                                  clear.clear_depthmask);
1390         return 0;
1391 }
1392
1393 int i830_swap_bufs(struct inode *inode, struct file *filp,
1394                   unsigned int cmd, unsigned long arg)
1395 {
1396         drm_file_t *priv = filp->private_data;
1397         drm_device_t *dev = priv->dev;
1398
1399         DRM_DEBUG("i830_swap_bufs\n");
1400
1401         if(!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) {
1402                 DRM_ERROR("i830_swap_buf called without lock held\n");
1403                 return -EINVAL;
1404         }
1405
1406         i830_dma_dispatch_swap( dev );
1407         return 0;
1408 }
1409
1410
1411
1412 /* Not sure why this isn't set all the time:
1413  */
1414 static void i830_do_init_pageflip( drm_device_t *dev )
1415 {
1416         drm_i830_private_t *dev_priv = dev->dev_private;
1417
1418         DRM_DEBUG("%s\n", __FUNCTION__);
1419         dev_priv->page_flipping = 1;
1420         dev_priv->current_page = 0;
1421         dev_priv->sarea_priv->pf_current_page = dev_priv->current_page;
1422 }
1423
1424 int i830_do_cleanup_pageflip( drm_device_t *dev )
1425 {
1426         drm_i830_private_t *dev_priv = dev->dev_private;
1427
1428         DRM_DEBUG("%s\n", __FUNCTION__);
1429         if (dev_priv->current_page != 0)
1430                 i830_dma_dispatch_flip( dev );
1431
1432         dev_priv->page_flipping = 0;
1433         return 0;
1434 }
1435
1436 int i830_flip_bufs(struct inode *inode, struct file *filp,
1437                    unsigned int cmd, unsigned long arg)
1438 {
1439         drm_file_t *priv = filp->private_data;
1440         drm_device_t *dev = priv->dev;
1441         drm_i830_private_t *dev_priv = dev->dev_private;
1442
1443         DRM_DEBUG("%s\n", __FUNCTION__);
1444
1445         if(!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) {
1446                 DRM_ERROR("i830_flip_buf called without lock held\n");
1447                 return -EINVAL;
1448         }
1449
1450         if (!dev_priv->page_flipping)
1451                 i830_do_init_pageflip( dev );
1452
1453         i830_dma_dispatch_flip( dev );
1454         return 0;
1455 }
1456
1457 int i830_getage(struct inode *inode, struct file *filp, unsigned int cmd,
1458                 unsigned long arg)
1459 {
1460         drm_file_t        *priv     = filp->private_data;
1461         drm_device_t      *dev      = priv->dev;
1462         drm_i830_private_t *dev_priv = (drm_i830_private_t *)dev->dev_private;
1463         u32 *hw_status = dev_priv->hw_status_page;
1464         drm_i830_sarea_t *sarea_priv = (drm_i830_sarea_t *)
1465                                         dev_priv->sarea_priv;
1466
1467         sarea_priv->last_dispatch = (int) hw_status[5];
1468         return 0;
1469 }
1470
1471 int i830_getbuf(struct inode *inode, struct file *filp, unsigned int cmd,
1472                 unsigned long arg)
1473 {
1474         drm_file_t        *priv     = filp->private_data;
1475         drm_device_t      *dev      = priv->dev;
1476         int               retcode   = 0;
1477         drm_i830_dma_t    d;
1478         drm_i830_private_t *dev_priv = (drm_i830_private_t *)dev->dev_private;
1479         u32 *hw_status = dev_priv->hw_status_page;
1480         drm_i830_sarea_t *sarea_priv = (drm_i830_sarea_t *)
1481                                         dev_priv->sarea_priv;
1482
1483         DRM_DEBUG("getbuf\n");
1484         if (copy_from_user(&d, (drm_i830_dma_t __user *)arg, sizeof(d)))
1485                 return -EFAULT;
1486
1487         if(!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) {
1488                 DRM_ERROR("i830_dma called without lock held\n");
1489                 return -EINVAL;
1490         }
1491
1492         d.granted = 0;
1493
1494         retcode = i830_dma_get_buffer(dev, &d, filp);
1495
1496         DRM_DEBUG("i830_dma: %d returning %d, granted = %d\n",
1497                   current->pid, retcode, d.granted);
1498
1499         if (copy_to_user((drm_dma_t __user *)arg, &d, sizeof(d)))
1500                 return -EFAULT;
1501         sarea_priv->last_dispatch = (int) hw_status[5];
1502
1503         return retcode;
1504 }
1505
1506 int i830_copybuf(struct inode *inode,
1507                  struct file *filp,
1508                  unsigned int cmd,
1509                  unsigned long arg)
1510 {
1511         /* Never copy - 2.4.x doesn't need it */
1512         return 0;
1513 }
1514
1515 int i830_docopy(struct inode *inode, struct file *filp, unsigned int cmd,
1516                 unsigned long arg)
1517 {
1518         return 0;
1519 }
1520
1521
1522
1523 int i830_getparam( struct inode *inode, struct file *filp, unsigned int cmd,
1524                       unsigned long arg )
1525 {
1526         drm_file_t        *priv     = filp->private_data;
1527         drm_device_t      *dev      = priv->dev;
1528         drm_i830_private_t *dev_priv = dev->dev_private;
1529         drm_i830_getparam_t param;
1530         int value;
1531
1532         if ( !dev_priv ) {
1533                 DRM_ERROR( "%s called with no initialization\n", __FUNCTION__ );
1534                 return -EINVAL;
1535         }
1536
1537         if (copy_from_user(&param, (drm_i830_getparam_t __user *)arg, sizeof(param) ))
1538                 return -EFAULT;
1539
1540         switch( param.param ) {
1541         case I830_PARAM_IRQ_ACTIVE:
1542                 value = dev->irq_enabled;
1543                 break;
1544         default:
1545                 return -EINVAL;
1546         }
1547
1548         if ( copy_to_user( param.value, &value, sizeof(int) ) ) {
1549                 DRM_ERROR( "copy_to_user\n" );
1550                 return -EFAULT;
1551         }
1552
1553         return 0;
1554 }
1555
1556
1557 int i830_setparam( struct inode *inode, struct file *filp, unsigned int cmd,
1558                    unsigned long arg )
1559 {
1560         drm_file_t        *priv     = filp->private_data;
1561         drm_device_t      *dev      = priv->dev;
1562         drm_i830_private_t *dev_priv = dev->dev_private;
1563         drm_i830_setparam_t param;
1564
1565         if ( !dev_priv ) {
1566                 DRM_ERROR( "%s called with no initialization\n", __FUNCTION__ );
1567                 return -EINVAL;
1568         }
1569
1570         if (copy_from_user(&param, (drm_i830_setparam_t __user *)arg, sizeof(param) ))
1571                 return -EFAULT;
1572
1573         switch( param.param ) {
1574         case I830_SETPARAM_USE_MI_BATCHBUFFER_START:
1575                 dev_priv->use_mi_batchbuffer_start = param.value;
1576                 break;
1577         default:
1578                 return -EINVAL;
1579         }
1580
1581         return 0;
1582 }
1583
1584
1585 static void i830_driver_pretakedown(drm_device_t *dev)
1586 {
1587         i830_dma_cleanup( dev );
1588 }
1589
1590 static void i830_driver_release(drm_device_t *dev, struct file *filp)
1591 {
1592         i830_reclaim_buffers(filp);
1593 }
1594
1595 static int i830_driver_dma_quiescent(drm_device_t *dev)
1596 {
1597         i830_dma_quiescent( dev );
1598         return 0;
1599 }
1600
1601 void i830_driver_register_fns(drm_device_t *dev)
1602 {
1603         dev->driver_features = DRIVER_USE_AGP | DRIVER_REQUIRE_AGP | DRIVER_USE_MTRR | DRIVER_HAVE_DMA | DRIVER_DMA_QUEUE;
1604 #if USE_IRQS
1605         dev->driver_features |= DRIVER_HAVE_IRQ | DRIVER_SHARED_IRQ;
1606 #endif
1607         dev->dev_priv_size = sizeof(drm_i830_buf_priv_t);
1608         dev->fn_tbl.pretakedown = i830_driver_pretakedown;
1609         dev->fn_tbl.release = i830_driver_release;
1610         dev->fn_tbl.dma_quiescent = i830_driver_dma_quiescent;
1611         dev->fn_tbl.reclaim_buffers = i830_reclaim_buffers;
1612 #if USE_IRQS
1613         dev->fn_tbl.irq_preinstall = i830_driver_irq_preinstall;
1614         dev->fn_tbl.irq_postinstall = i830_driver_irq_postinstall;
1615         dev->fn_tbl.irq_uninstall = i830_driver_irq_uninstall;
1616         dev->fn_tbl.irq_handler = i830_driver_irq_handler;
1617 #endif
1618         dev->counters += 4;
1619         dev->types[6] = _DRM_STAT_IRQ;
1620         dev->types[7] = _DRM_STAT_PRIMARY;
1621         dev->types[8] = _DRM_STAT_SECONDARY;
1622         dev->types[9] = _DRM_STAT_DMA;
1623 }
1624