drivers/char/drm/i830_dma.c

   1 /* i830_dma.c -- DMA support for the I830 -*- linux-c -*-
   2  * Created: Mon Dec 13 01:50:01 1999 by jhartmann@precisioninsight.com
   3  *
   4  * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
   5  * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
   6  * All Rights Reserved.
   7  *
   8  * Permission is hereby granted, free of charge, to any person obtaining a
   9  * copy of this software and associated documentation files (the "Software"),
  10  * to deal in the Software without restriction, including without limitation
  11  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  12  * and/or sell copies of the Software, and to permit persons to whom the
  13  * Software is furnished to do so, subject to the following conditions:
  14  *
  15  * The above copyright notice and this permission notice (including the next
  16  * paragraph) shall be included in all copies or substantial portions of the
  17  * Software.
  18  *
  19  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  20  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  21  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  22  * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
  23  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  24  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  25  * DEALINGS IN THE SOFTWARE.
  26  *
  27  * Authors: Rickard E. (Rik) Faith <faith@valinux.com>
  28  *          Jeff Hartmann <jhartmann@valinux.com>
  29  *          Keith Whitwell <keith@tungstengraphics.com>
  30  *          Abraham vd Merwe <abraham@2d3d.co.za>
  31  *
  32  */
  33
  34 #include "i830.h"
  35 #include "drmP.h"
  36 #include "drm.h"
  37 #include "i830_drm.h"
  38 #include "i830_drv.h"
  39 #include <linux/interrupt.h>    /* For task queue support */
  40 #include <linux/pagemap.h>      /* For FASTCALL on unlock_page() */
  41 #include <linux/delay.h>
  42 #include <asm/uaccess.h>
  43
  44 #define I830_BUF_FREE           2
  45 #define I830_BUF_CLIENT         1
  46 #define I830_BUF_HARDWARE       0
  47
  48 #define I830_BUF_UNMAPPED 0
  49 #define I830_BUF_MAPPED   1
  50
  51 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,4,2)
  52 #define down_write down
  53 #define up_write up
  54 #endif
  55
  56 static inline void i830_print_status_page(drm_device_t *dev)
  57 {
  58         drm_device_dma_t *dma = dev->dma;
  59         drm_i830_private_t *dev_priv = dev->dev_private;
  60         u32 *temp = dev_priv->hw_status_page;
  61         int i;
  62
  63         DRM_DEBUG(  "hw_status: Interrupt Status : %x\n", temp[0]);
  64         DRM_DEBUG(  "hw_status: LpRing Head ptr : %x\n", temp[1]);
  65         DRM_DEBUG(  "hw_status: IRing Head ptr : %x\n", temp[2]);
  66         DRM_DEBUG(  "hw_status: Reserved : %x\n", temp[3]);
  67         DRM_DEBUG(  "hw_status: Driver Counter : %d\n", temp[5]);
  68         for(i = 9; i < dma->buf_count + 9; i++) {
  69                 DRM_DEBUG( "buffer status idx : %d used: %d\n", i - 9, temp[i]);
  70         }
  71 }
  72
  73 static drm_buf_t *i830_freelist_get(drm_device_t *dev)
  74 {
  75         drm_device_dma_t *dma = dev->dma;
  76         int              i;
  77         int              used;
  78
  79         /* Linear search might not be the best solution */
  80
  81         for (i = 0; i < dma->buf_count; i++) {
  82                 drm_buf_t *buf = dma->buflist[ i ];
  83                 drm_i830_buf_priv_t *buf_priv = buf->dev_private;
  84                 /* In use is already a pointer */
  85                 used = cmpxchg(buf_priv->in_use, I830_BUF_FREE,
  86                                I830_BUF_CLIENT);
  87                 if(used == I830_BUF_FREE) {
  88                         return buf;
  89                 }
  90         }
  91         return NULL;
  92 }
  93
  94 /* This should only be called if the buffer is not sent to the hardware
  95  * yet, the hardware updates in use for us once its on the ring buffer.
  96  */
  97
  98 static int i830_freelist_put(drm_device_t *dev, drm_buf_t *buf)
  99 {
 100         drm_i830_buf_priv_t *buf_priv = buf->dev_private;
 101         int used;
 102
 103         /* In use is already a pointer */
 104         used = cmpxchg(buf_priv->in_use, I830_BUF_CLIENT, I830_BUF_FREE);
 105         if(used != I830_BUF_CLIENT) {
 106                 DRM_ERROR("Freeing buffer thats not in use : %d\n", buf->idx);
 107                 return -EINVAL;
 108         }
 109
 110         return 0;
 111 }
 112
 113 static struct file_operations i830_buffer_fops = {
 114         .open    = DRM(open),
 115         .flush   = DRM(flush),
 116         .release = DRM(release),
 117         .ioctl   = DRM(ioctl),
 118         .mmap    = i830_mmap_buffers,
 119         .fasync  = DRM(fasync),
 120 };
 121
 122 int i830_mmap_buffers(struct file *filp, struct vm_area_struct *vma)
 123 {
 124         drm_file_t          *priv         = filp->private_data;
 125         drm_device_t        *dev;
 126         drm_i830_private_t  *dev_priv;
 127         drm_buf_t           *buf;
 128         drm_i830_buf_priv_t *buf_priv;
 129
 130         lock_kernel();
 131         dev      = priv->dev;
 132         dev_priv = dev->dev_private;
 133         buf      = dev_priv->mmap_buffer;
 134         buf_priv = buf->dev_private;
 135
 136         vma->vm_flags |= (VM_IO | VM_DONTCOPY);
 137         vma->vm_file = filp;
 138
 139         buf_priv->currently_mapped = I830_BUF_MAPPED;
 140         unlock_kernel();
 141
 142         if (remap_page_range(DRM_RPR_ARG(vma) vma->vm_start,
 143                              VM_OFFSET(vma),
 144                              vma->vm_end - vma->vm_start,
 145                              vma->vm_page_prot)) return -EAGAIN;
 146         return 0;
 147 }
 148
 149 static int i830_map_buffer(drm_buf_t *buf, struct file *filp)
 150 {
 151         drm_file_t        *priv   = filp->private_data;
 152         drm_device_t      *dev    = priv->dev;
 153         drm_i830_buf_priv_t *buf_priv = buf->dev_private;
 154         drm_i830_private_t *dev_priv = dev->dev_private;
 155         struct file_operations *old_fops;
 156         int retcode = 0;
 157
 158         if(buf_priv->currently_mapped == I830_BUF_MAPPED) return -EINVAL;
 159
 160         down_write( &current->mm->mmap_sem );
 161         old_fops = filp->f_op;
 162         filp->f_op = &i830_buffer_fops;
 163         dev_priv->mmap_buffer = buf;
 164         buf_priv->virtual = (void __user *)do_mmap(filp, 0, buf->total,
 165                                             PROT_READ|PROT_WRITE,
 166                                             MAP_SHARED,
 167                                             buf->bus_address);
 168         dev_priv->mmap_buffer = NULL;
 169         filp->f_op = old_fops;
 170         if (IS_ERR(buf_priv->virtual)) {
 171                 /* Real error */
 172                 DRM_ERROR("mmap error\n");
 173                 retcode = PTR_ERR(buf_priv->virtual);
 174                 buf_priv->virtual = 0;
 175         }
 176         up_write( &current->mm->mmap_sem );
 177
 178         return retcode;
 179 }
 180
 181 static int i830_unmap_buffer(drm_buf_t *buf)
 182 {
 183         drm_i830_buf_priv_t *buf_priv = buf->dev_private;
 184         int retcode = 0;
 185
 186         if(buf_priv->currently_mapped != I830_BUF_MAPPED)
 187                 return -EINVAL;
 188
 189         down_write(&current->mm->mmap_sem);
 190         retcode = do_munmap(current->mm,
 191                             (unsigned long)buf_priv->virtual,
 192                             (size_t) buf->total);
 193         up_write(&current->mm->mmap_sem);
 194
 195         buf_priv->currently_mapped = I830_BUF_UNMAPPED;
 196         buf_priv->virtual = 0;
 197
 198         return retcode;
 199 }
 200
 201 static int i830_dma_get_buffer(drm_device_t *dev, drm_i830_dma_t *d,
 202                                struct file *filp)
 203 {
 204         drm_buf_t         *buf;
 205         drm_i830_buf_priv_t *buf_priv;
 206         int retcode = 0;
 207
 208         buf = i830_freelist_get(dev);
 209         if (!buf) {
 210                 retcode = -ENOMEM;
 211                 DRM_DEBUG("retcode=%d\n", retcode);
 212                 return retcode;
 213         }
 214
 215         retcode = i830_map_buffer(buf, filp);
 216         if(retcode) {
 217                 i830_freelist_put(dev, buf);
 218                 DRM_ERROR("mapbuf failed, retcode %d\n", retcode);
 219                 return retcode;
 220         }
 221         buf->filp = filp;
 222         buf_priv = buf->dev_private;
 223         d->granted = 1;
 224         d->request_idx = buf->idx;
 225         d->request_size = buf->total;
 226         d->virtual = buf_priv->virtual;
 227
 228         return retcode;
 229 }
 230
 231 int i830_dma_cleanup(drm_device_t *dev)
 232 {
 233         drm_device_dma_t *dma = dev->dma;
 234
 235 #if __HAVE_IRQ
 236         /* Make sure interrupts are disabled here because the uninstall ioctl
 237          * may not have been called from userspace and after dev_private
 238          * is freed, it's too late.
 239          */
 240         if ( dev->irq_enabled ) DRM(irq_uninstall)(dev);
 241 #endif
 242
 243         if (dev->dev_private) {
 244                 int i;
 245                 drm_i830_private_t *dev_priv =
 246                         (drm_i830_private_t *) dev->dev_private;
 247
 248                 if (dev_priv->ring.virtual_start) {
 249                         DRM(ioremapfree)((void *) dev_priv->ring.virtual_start,
 250                                          dev_priv->ring.Size, dev);
 251                 }
 252                 if (dev_priv->hw_status_page) {
 253                         pci_free_consistent(dev->pdev, PAGE_SIZE,
 254                                             dev_priv->hw_status_page,
 255                                             dev_priv->dma_status_page);
 256                         /* Need to rewrite hardware status page */
 257                         I830_WRITE(0x02080, 0x1ffff000);
 258                 }
 259
 260                 DRM(free)(dev->dev_private, sizeof(drm_i830_private_t),
 261                          DRM_MEM_DRIVER);
 262                 dev->dev_private = NULL;
 263
 264                 for (i = 0; i < dma->buf_count; i++) {
 265                         drm_buf_t *buf = dma->buflist[ i ];
 266                         drm_i830_buf_priv_t *buf_priv = buf->dev_private;
 267                         if ( buf_priv->kernel_virtual && buf->total )
 268                                 DRM(ioremapfree)(buf_priv->kernel_virtual, buf->total, dev);
 269                 }
 270         }
 271         return 0;
 272 }
 273
 274 int i830_wait_ring(drm_device_t *dev, int n, const char *caller)
 275 {
 276         drm_i830_private_t *dev_priv = dev->dev_private;
 277         drm_i830_ring_buffer_t *ring = &(dev_priv->ring);
 278         int iters = 0;
 279         unsigned long end;
 280         unsigned int last_head = I830_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
 281
 282         end = jiffies + (HZ*3);
 283         while (ring->space < n) {
 284                 ring->head = I830_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
 285                 ring->space = ring->head - (ring->tail+8);
 286                 if (ring->space < 0) ring->space += ring->Size;
 287
 288                 if (ring->head != last_head) {
 289                         end = jiffies + (HZ*3);
 290                         last_head = ring->head;
 291                 }
 292
 293                 iters++;
 294                 if(time_before(end, jiffies)) {
 295                         DRM_ERROR("space: %d wanted %d\n", ring->space, n);
 296                         DRM_ERROR("lockup\n");
 297                         goto out_wait_ring;
 298                 }
 299                 udelay(1);
 300                 dev_priv->sarea_priv->perf_boxes |= I830_BOX_WAIT;
 301         }
 302
 303 out_wait_ring:
 304         return iters;
 305 }
 306
 307 static void i830_kernel_lost_context(drm_device_t *dev)
 308 {
 309         drm_i830_private_t *dev_priv = dev->dev_private;
 310         drm_i830_ring_buffer_t *ring = &(dev_priv->ring);
 311
 312         ring->head = I830_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
 313         ring->tail = I830_READ(LP_RING + RING_TAIL) & TAIL_ADDR;
 314         ring->space = ring->head - (ring->tail+8);
 315         if (ring->space < 0) ring->space += ring->Size;
 316
 317         if (ring->head == ring->tail)
 318                 dev_priv->sarea_priv->perf_boxes |= I830_BOX_RING_EMPTY;
 319 }
 320
 321 static int i830_freelist_init(drm_device_t *dev, drm_i830_private_t *dev_priv)
 322 {
 323         drm_device_dma_t *dma = dev->dma;
 324         int my_idx = 36;
 325         u32 *hw_status = (u32 *)(dev_priv->hw_status_page + my_idx);
 326         int i;
 327
 328         if(dma->buf_count > 1019) {
 329                 /* Not enough space in the status page for the freelist */
 330                 return -EINVAL;
 331         }
 332
 333         for (i = 0; i < dma->buf_count; i++) {
 334                 drm_buf_t *buf = dma->buflist[ i ];
 335                 drm_i830_buf_priv_t *buf_priv = buf->dev_private;
 336
 337                 buf_priv->in_use = hw_status++;
 338                 buf_priv->my_use_idx = my_idx;
 339                 my_idx += 4;
 340
 341                 *buf_priv->in_use = I830_BUF_FREE;
 342
 343                 buf_priv->kernel_virtual = DRM(ioremap)(buf->bus_address,
 344                                                         buf->total, dev);
 345         }
 346         return 0;
 347 }
 348
 349 static int i830_dma_initialize(drm_device_t *dev,
 350                                drm_i830_private_t *dev_priv,
 351                                drm_i830_init_t *init)
 352 {
 353         struct list_head *list;
 354
 355         memset(dev_priv, 0, sizeof(drm_i830_private_t));
 356
 357         list_for_each(list, &dev->maplist->head) {
 358                 drm_map_list_t *r_list = list_entry(list, drm_map_list_t, head);
 359                 if( r_list->map &&
 360                     r_list->map->type == _DRM_SHM &&
 361                     r_list->map->flags & _DRM_CONTAINS_LOCK ) {
 362                         dev_priv->sarea_map = r_list->map;
 363                         break;
 364                 }
 365         }
 366
 367         if(!dev_priv->sarea_map) {
 368                 dev->dev_private = (void *)dev_priv;
 369                 i830_dma_cleanup(dev);
 370                 DRM_ERROR("can not find sarea!\n");
 371                 return -EINVAL;
 372         }
 373         DRM_FIND_MAP( dev_priv->mmio_map, init->mmio_offset );
 374         if(!dev_priv->mmio_map) {
 375                 dev->dev_private = (void *)dev_priv;
 376                 i830_dma_cleanup(dev);
 377                 DRM_ERROR("can not find mmio map!\n");
 378                 return -EINVAL;
 379         }
 380         DRM_FIND_MAP( dev_priv->buffer_map, init->buffers_offset );
 381         if(!dev_priv->buffer_map) {
 382                 dev->dev_private = (void *)dev_priv;
 383                 i830_dma_cleanup(dev);
 384                 DRM_ERROR("can not find dma buffer map!\n");
 385                 return -EINVAL;
 386         }
 387
 388         dev_priv->sarea_priv = (drm_i830_sarea_t *)
 389                 ((u8 *)dev_priv->sarea_map->handle +
 390                  init->sarea_priv_offset);
 391
 392         dev_priv->ring.Start = init->ring_start;
 393         dev_priv->ring.End = init->ring_end;
 394         dev_priv->ring.Size = init->ring_size;
 395
 396         dev_priv->ring.virtual_start = DRM(ioremap)(dev->agp->base +
 397                                                     init->ring_start,
 398                                                     init->ring_size, dev);
 399
 400         if (dev_priv->ring.virtual_start == NULL) {
 401                 dev->dev_private = (void *) dev_priv;
 402                 i830_dma_cleanup(dev);
 403                 DRM_ERROR("can not ioremap virtual address for"
 404                           " ring buffer\n");
 405                 return -ENOMEM;
 406         }
 407
 408         dev_priv->ring.tail_mask = dev_priv->ring.Size - 1;
 409
 410         dev_priv->w = init->w;
 411         dev_priv->h = init->h;
 412         dev_priv->pitch = init->pitch;
 413         dev_priv->back_offset = init->back_offset;
 414         dev_priv->depth_offset = init->depth_offset;
 415         dev_priv->front_offset = init->front_offset;
 416
 417         dev_priv->front_di1 = init->front_offset | init->pitch_bits;
 418         dev_priv->back_di1 = init->back_offset | init->pitch_bits;
 419         dev_priv->zi1 = init->depth_offset | init->pitch_bits;
 420
 421         DRM_DEBUG("front_di1 %x\n",    dev_priv->front_di1);
 422         DRM_DEBUG("back_offset %x\n", dev_priv->back_offset);
 423         DRM_DEBUG("back_di1 %x\n",    dev_priv->back_di1);
 424         DRM_DEBUG("pitch_bits %x\n",    init->pitch_bits);
 425
 426         dev_priv->cpp = init->cpp;
 427         /* We are using separate values as placeholders for mechanisms for
 428          * private backbuffer/depthbuffer usage.
 429          */
 430
 431         dev_priv->back_pitch = init->back_pitch;
 432         dev_priv->depth_pitch = init->depth_pitch;
 433         dev_priv->do_boxes = 0;
 434         dev_priv->use_mi_batchbuffer_start = 0;
 435
 436         /* Program Hardware Status Page */
 437         dev_priv->hw_status_page =
 438                 pci_alloc_consistent(dev->pdev, PAGE_SIZE,
 439                                                 &dev_priv->dma_status_page);
 440         if (!dev_priv->hw_status_page) {
 441                 dev->dev_private = (void *)dev_priv;
 442                 i830_dma_cleanup(dev);
 443                 DRM_ERROR("Can not allocate hardware status page\n");
 444                 return -ENOMEM;
 445         }
 446         memset(dev_priv->hw_status_page, 0, PAGE_SIZE);
 447         DRM_DEBUG("hw status page @ %p\n", dev_priv->hw_status_page);
 448
 449         I830_WRITE(0x02080, dev_priv->dma_status_page);
 450         DRM_DEBUG("Enabled hardware status page\n");
 451
 452         /* Now we need to init our freelist */
 453         if(i830_freelist_init(dev, dev_priv) != 0) {
 454                 dev->dev_private = (void *)dev_priv;
 455                 i830_dma_cleanup(dev);
 456                 DRM_ERROR("Not enough space in the status page for"
 457                           " the freelist\n");
 458                 return -ENOMEM;
 459         }
 460         dev->dev_private = (void *)dev_priv;
 461
 462         return 0;
 463 }
 464
 465 int i830_dma_init(struct inode *inode, struct file *filp,
 466                   unsigned int cmd, unsigned long __user arg)
 467 {
 468         drm_file_t *priv = filp->private_data;
 469         drm_device_t *dev = priv->dev;
 470         drm_i830_private_t *dev_priv;
 471         drm_i830_init_t init;
 472         int retcode = 0;
 473
 474         if (copy_from_user(&init, (void * __user) arg, sizeof(init)))
 475                 return -EFAULT;
 476
 477         switch(init.func) {
 478                 case I830_INIT_DMA:
 479                         dev_priv = DRM(alloc)(sizeof(drm_i830_private_t),
 480                                               DRM_MEM_DRIVER);
 481                         if(dev_priv == NULL) return -ENOMEM;
 482                         retcode = i830_dma_initialize(dev, dev_priv, &init);
 483                 break;
 484                 case I830_CLEANUP_DMA:
 485                         retcode = i830_dma_cleanup(dev);
 486                 break;
 487                 default:
 488                         retcode = -EINVAL;
 489                 break;
 490         }
 491
 492         return retcode;
 493 }
 494
 495 #define GFX_OP_STIPPLE           ((0x3<<29)|(0x1d<<24)|(0x83<<16))
 496 #define ST1_ENABLE               (1<<16)
 497 #define ST1_MASK                 (0xffff)
 498
 499 /* Most efficient way to verify state for the i830 is as it is
 500  * emitted.  Non-conformant state is silently dropped.
 501  */
 502 static void i830EmitContextVerified( drm_device_t *dev,
 503                                      unsigned int *code )
 504 {
 505         drm_i830_private_t *dev_priv = dev->dev_private;
 506         int i, j = 0;
 507         unsigned int tmp;
 508         RING_LOCALS;
 509
 510         BEGIN_LP_RING( I830_CTX_SETUP_SIZE + 4 );
 511
 512         for ( i = 0 ; i < I830_CTXREG_BLENDCOLR0 ; i++ ) {
 513                 tmp = code[i];
 514                 if ((tmp & (7<<29)) == CMD_3D &&
 515                     (tmp & (0x1f<<24)) < (0x1d<<24)) {
 516                         OUT_RING( tmp );
 517                         j++;
 518                 } else {
 519                         DRM_ERROR("Skipping %d\n", i);
 520                 }
 521         }
 522
 523         OUT_RING( STATE3D_CONST_BLEND_COLOR_CMD );
 524         OUT_RING( code[I830_CTXREG_BLENDCOLR] );
 525         j += 2;
 526
 527         for ( i = I830_CTXREG_VF ; i < I830_CTXREG_MCSB0 ; i++ ) {
 528                 tmp = code[i];
 529                 if ((tmp & (7<<29)) == CMD_3D &&
 530                     (tmp & (0x1f<<24)) < (0x1d<<24)) {
 531                         OUT_RING( tmp );
 532                         j++;
 533                 } else {
 534                         DRM_ERROR("Skipping %d\n", i);
 535                 }
 536         }
 537
 538         OUT_RING( STATE3D_MAP_COORD_SETBIND_CMD );
 539         OUT_RING( code[I830_CTXREG_MCSB1] );
 540         j += 2;
 541
 542         if (j & 1)
 543                 OUT_RING( 0 );
 544
 545         ADVANCE_LP_RING();
 546 }
 547
 548 static void i830EmitTexVerified( drm_device_t *dev, unsigned int *code )
 549 {
 550         drm_i830_private_t *dev_priv = dev->dev_private;
 551         int i, j = 0;
 552         unsigned int tmp;
 553         RING_LOCALS;
 554
 555         if (code[I830_TEXREG_MI0] == GFX_OP_MAP_INFO ||
 556             (code[I830_TEXREG_MI0] & ~(0xf*LOAD_TEXTURE_MAP0)) ==
 557             (STATE3D_LOAD_STATE_IMMEDIATE_2|4)) {
 558
 559                 BEGIN_LP_RING( I830_TEX_SETUP_SIZE );
 560
 561                 OUT_RING( code[I830_TEXREG_MI0] ); /* TM0LI */
 562                 OUT_RING( code[I830_TEXREG_MI1] ); /* TM0S0 */
 563                 OUT_RING( code[I830_TEXREG_MI2] ); /* TM0S1 */
 564                 OUT_RING( code[I830_TEXREG_MI3] ); /* TM0S2 */
 565                 OUT_RING( code[I830_TEXREG_MI4] ); /* TM0S3 */
 566                 OUT_RING( code[I830_TEXREG_MI5] ); /* TM0S4 */
 567
 568                 for ( i = 6 ; i < I830_TEX_SETUP_SIZE ; i++ ) {
 569                         tmp = code[i];
 570                         OUT_RING( tmp );
 571                         j++;
 572                 }
 573
 574                 if (j & 1)
 575                         OUT_RING( 0 );
 576
 577                 ADVANCE_LP_RING();
 578         }
 579         else
 580                 printk("rejected packet %x\n", code[0]);
 581 }
 582
 583 static void i830EmitTexBlendVerified( drm_device_t *dev,
 584                                       unsigned int *code,
 585                                       unsigned int num)
 586 {
 587         drm_i830_private_t *dev_priv = dev->dev_private;
 588         int i, j = 0;
 589         unsigned int tmp;
 590         RING_LOCALS;
 591
 592         if (!num)
 593                 return;
 594
 595         BEGIN_LP_RING( num + 1 );
 596
 597         for ( i = 0 ; i < num ; i++ ) {
 598                 tmp = code[i];
 599                 OUT_RING( tmp );
 600                 j++;
 601         }
 602
 603         if (j & 1)
 604                 OUT_RING( 0 );
 605
 606         ADVANCE_LP_RING();
 607 }
 608
 609 static void i830EmitTexPalette( drm_device_t *dev,
 610                                 unsigned int *palette,
 611                                 int number,
 612                                 int is_shared )
 613 {
 614         drm_i830_private_t *dev_priv = dev->dev_private;
 615         int i;
 616         RING_LOCALS;
 617
 618         return;
 619
 620         BEGIN_LP_RING( 258 );
 621
 622         if(is_shared == 1) {
 623                 OUT_RING(CMD_OP_MAP_PALETTE_LOAD |
 624                          MAP_PALETTE_NUM(0) |
 625                          MAP_PALETTE_BOTH);
 626         } else {
 627                 OUT_RING(CMD_OP_MAP_PALETTE_LOAD | MAP_PALETTE_NUM(number));
 628         }
 629         for(i = 0; i < 256; i++) {
 630                 OUT_RING(palette[i]);
 631         }
 632         OUT_RING(0);
 633         /* KW:  WHERE IS THE ADVANCE_LP_RING?  This is effectively a noop!
 634          */
 635 }
 636
 637 /* Need to do some additional checking when setting the dest buffer.
 638  */
 639 static void i830EmitDestVerified( drm_device_t *dev,
 640                                   unsigned int *code )
 641 {
 642         drm_i830_private_t *dev_priv = dev->dev_private;
 643         unsigned int tmp;
 644         RING_LOCALS;
 645
 646         BEGIN_LP_RING( I830_DEST_SETUP_SIZE + 10 );
 647
 648
 649         tmp = code[I830_DESTREG_CBUFADDR];
 650         if (tmp == dev_priv->front_di1 || tmp == dev_priv->back_di1) {
 651                 if (((int)outring) & 8) {
 652                         OUT_RING(0);
 653                         OUT_RING(0);
 654                 }
 655
 656                 OUT_RING( CMD_OP_DESTBUFFER_INFO );
 657                 OUT_RING( BUF_3D_ID_COLOR_BACK |
 658                           BUF_3D_PITCH(dev_priv->back_pitch * dev_priv->cpp) |
 659                           BUF_3D_USE_FENCE);
 660                 OUT_RING( tmp );
 661                 OUT_RING( 0 );
 662
 663                 OUT_RING( CMD_OP_DESTBUFFER_INFO );
 664                 OUT_RING( BUF_3D_ID_DEPTH | BUF_3D_USE_FENCE |
 665                           BUF_3D_PITCH(dev_priv->depth_pitch * dev_priv->cpp));
 666                 OUT_RING( dev_priv->zi1 );
 667                 OUT_RING( 0 );
 668         } else {
 669                 DRM_ERROR("bad di1 %x (allow %x or %x)\n",
 670                           tmp, dev_priv->front_di1, dev_priv->back_di1);
 671         }
 672
 673         /* invarient:
 674          */
 675
 676
 677         OUT_RING( GFX_OP_DESTBUFFER_VARS );
 678         OUT_RING( code[I830_DESTREG_DV1] );
 679
 680         OUT_RING( GFX_OP_DRAWRECT_INFO );
 681         OUT_RING( code[I830_DESTREG_DR1] );
 682         OUT_RING( code[I830_DESTREG_DR2] );
 683         OUT_RING( code[I830_DESTREG_DR3] );
 684         OUT_RING( code[I830_DESTREG_DR4] );
 685
 686         /* Need to verify this */
 687         tmp = code[I830_DESTREG_SENABLE];
 688         if((tmp & ~0x3) == GFX_OP_SCISSOR_ENABLE) {
 689                 OUT_RING( tmp );
 690         } else {
 691                 DRM_ERROR("bad scissor enable\n");
 692                 OUT_RING( 0 );
 693         }
 694
 695         OUT_RING( GFX_OP_SCISSOR_RECT );
 696         OUT_RING( code[I830_DESTREG_SR1] );
 697         OUT_RING( code[I830_DESTREG_SR2] );
 698         OUT_RING( 0 );
 699
 700         ADVANCE_LP_RING();
 701 }
 702
 703 static void i830EmitStippleVerified( drm_device_t *dev,
 704                                      unsigned int *code )
 705 {
 706         drm_i830_private_t *dev_priv = dev->dev_private;
 707         RING_LOCALS;
 708
 709         BEGIN_LP_RING( 2 );
 710         OUT_RING( GFX_OP_STIPPLE );
 711         OUT_RING( code[1] );
 712         ADVANCE_LP_RING();
 713 }
 714
 715
 716 static void i830EmitState( drm_device_t *dev )
 717 {
 718         drm_i830_private_t *dev_priv = dev->dev_private;
 719         drm_i830_sarea_t *sarea_priv = dev_priv->sarea_priv;
 720         unsigned int dirty = sarea_priv->dirty;
 721
 722         DRM_DEBUG("%s %x\n", __FUNCTION__, dirty);
 723
 724         if (dirty & I830_UPLOAD_BUFFERS) {
 725                 i830EmitDestVerified( dev, sarea_priv->BufferState );
 726                 sarea_priv->dirty &= ~I830_UPLOAD_BUFFERS;
 727         }
 728
 729         if (dirty & I830_UPLOAD_CTX) {
 730                 i830EmitContextVerified( dev, sarea_priv->ContextState );
 731                 sarea_priv->dirty &= ~I830_UPLOAD_CTX;
 732         }
 733
 734         if (dirty & I830_UPLOAD_TEX0) {
 735                 i830EmitTexVerified( dev, sarea_priv->TexState[0] );
 736                 sarea_priv->dirty &= ~I830_UPLOAD_TEX0;
 737         }
 738
 739         if (dirty & I830_UPLOAD_TEX1) {
 740                 i830EmitTexVerified( dev, sarea_priv->TexState[1] );
 741                 sarea_priv->dirty &= ~I830_UPLOAD_TEX1;
 742         }
 743
 744         if (dirty & I830_UPLOAD_TEXBLEND0) {
 745                 i830EmitTexBlendVerified( dev, sarea_priv->TexBlendState[0],
 746                                 sarea_priv->TexBlendStateWordsUsed[0]);
 747                 sarea_priv->dirty &= ~I830_UPLOAD_TEXBLEND0;
 748         }
 749
 750         if (dirty & I830_UPLOAD_TEXBLEND1) {
 751                 i830EmitTexBlendVerified( dev, sarea_priv->TexBlendState[1],
 752                                 sarea_priv->TexBlendStateWordsUsed[1]);
 753                 sarea_priv->dirty &= ~I830_UPLOAD_TEXBLEND1;
 754         }
 755
 756         if (dirty & I830_UPLOAD_TEX_PALETTE_SHARED) {
 757                 i830EmitTexPalette(dev, sarea_priv->Palette[0], 0, 1);
 758         } else {
 759                 if (dirty & I830_UPLOAD_TEX_PALETTE_N(0)) {
 760                         i830EmitTexPalette(dev, sarea_priv->Palette[0], 0, 0);
 761                         sarea_priv->dirty &= ~I830_UPLOAD_TEX_PALETTE_N(0);
 762                 }
 763                 if (dirty & I830_UPLOAD_TEX_PALETTE_N(1)) {
 764                         i830EmitTexPalette(dev, sarea_priv->Palette[1], 1, 0);
 765                         sarea_priv->dirty &= ~I830_UPLOAD_TEX_PALETTE_N(1);
 766                 }
 767
 768                 /* 1.3:
 769                  */
 770 #if 0
 771                 if (dirty & I830_UPLOAD_TEX_PALETTE_N(2)) {
 772                         i830EmitTexPalette(dev, sarea_priv->Palette2[0], 0, 0);
 773                         sarea_priv->dirty &= ~I830_UPLOAD_TEX_PALETTE_N(2);
 774                 }
 775                 if (dirty & I830_UPLOAD_TEX_PALETTE_N(3)) {
 776                         i830EmitTexPalette(dev, sarea_priv->Palette2[1], 1, 0);
 777                         sarea_priv->dirty &= ~I830_UPLOAD_TEX_PALETTE_N(2);
 778                 }
 779 #endif
 780         }
 781
 782         /* 1.3:
 783          */
 784         if (dirty & I830_UPLOAD_STIPPLE) {
 785                 i830EmitStippleVerified( dev,
 786                                          sarea_priv->StippleState);
 787                 sarea_priv->dirty &= ~I830_UPLOAD_STIPPLE;
 788         }
 789
 790         if (dirty & I830_UPLOAD_TEX2) {
 791                 i830EmitTexVerified( dev, sarea_priv->TexState2 );
 792                 sarea_priv->dirty &= ~I830_UPLOAD_TEX2;
 793         }
 794
 795         if (dirty & I830_UPLOAD_TEX3) {
 796                 i830EmitTexVerified( dev, sarea_priv->TexState3 );
 797                 sarea_priv->dirty &= ~I830_UPLOAD_TEX3;
 798         }
 799
 800
 801         if (dirty & I830_UPLOAD_TEXBLEND2) {
 802                 i830EmitTexBlendVerified(
 803                         dev,
 804                         sarea_priv->TexBlendState2,
 805                         sarea_priv->TexBlendStateWordsUsed2);
 806
 807                 sarea_priv->dirty &= ~I830_UPLOAD_TEXBLEND2;
 808         }
 809
 810         if (dirty & I830_UPLOAD_TEXBLEND3) {
 811                 i830EmitTexBlendVerified(
 812                         dev,
 813                         sarea_priv->TexBlendState3,
 814                         sarea_priv->TexBlendStateWordsUsed3);
 815                 sarea_priv->dirty &= ~I830_UPLOAD_TEXBLEND3;
 816         }
 817 }
 818
 819 /* ================================================================
 820  * Performance monitoring functions
 821  */
 822
 823 static void i830_fill_box( drm_device_t *dev,
 824                            int x, int y, int w, int h,
 825                            int r, int g, int b )
 826 {
 827         drm_i830_private_t *dev_priv = dev->dev_private;
 828         u32 color;
 829         unsigned int BR13, CMD;
 830         RING_LOCALS;
 831
 832         BR13 = (0xF0 << 16) | (dev_priv->pitch * dev_priv->cpp) | (1<<24);
 833         CMD = XY_COLOR_BLT_CMD;
 834         x += dev_priv->sarea_priv->boxes[0].x1;
 835         y += dev_priv->sarea_priv->boxes[0].y1;
 836
 837         if (dev_priv->cpp == 4) {
 838                 BR13 |= (1<<25);
 839                 CMD |= (XY_COLOR_BLT_WRITE_ALPHA | XY_COLOR_BLT_WRITE_RGB);
 840                 color = (((0xff) << 24) | (r << 16) | (g <<  8) | b);
 841         } else {
 842                 color = (((r & 0xf8) << 8) |
 843                          ((g & 0xfc) << 3) |
 844                          ((b & 0xf8) >> 3));
 845         }
 846
 847         BEGIN_LP_RING( 6 );
 848         OUT_RING( CMD );
 849         OUT_RING( BR13 );
 850         OUT_RING( (y << 16) | x );
 851         OUT_RING( ((y+h) << 16) | (x+w) );
 852
 853         if ( dev_priv->current_page == 1 ) {
 854                 OUT_RING( dev_priv->front_offset );
 855         } else {
 856                 OUT_RING( dev_priv->back_offset );
 857         }
 858
 859         OUT_RING( color );
 860         ADVANCE_LP_RING();
 861 }
 862
 863 static void i830_cp_performance_boxes( drm_device_t *dev )
 864 {
 865         drm_i830_private_t *dev_priv = dev->dev_private;
 866
 867         /* Purple box for page flipping
 868          */
 869         if ( dev_priv->sarea_priv->perf_boxes & I830_BOX_FLIP )
 870                 i830_fill_box( dev, 4, 4, 8, 8, 255, 0, 255 );
 871
 872         /* Red box if we have to wait for idle at any point
 873          */
 874         if ( dev_priv->sarea_priv->perf_boxes & I830_BOX_WAIT )
 875                 i830_fill_box( dev, 16, 4, 8, 8, 255, 0, 0 );
 876
 877         /* Blue box: lost context?
 878          */
 879         if ( dev_priv->sarea_priv->perf_boxes & I830_BOX_LOST_CONTEXT )
 880                 i830_fill_box( dev, 28, 4, 8, 8, 0, 0, 255 );
 881
 882         /* Yellow box for texture swaps
 883          */
 884         if ( dev_priv->sarea_priv->perf_boxes & I830_BOX_TEXTURE_LOAD )
 885                 i830_fill_box( dev, 40, 4, 8, 8, 255, 255, 0 );
 886
 887         /* Green box if hardware never idles (as far as we can tell)
 888          */
 889         if ( !(dev_priv->sarea_priv->perf_boxes & I830_BOX_RING_EMPTY) )
 890                 i830_fill_box( dev, 64, 4, 8, 8, 0, 255, 0 );
 891
 892
 893         /* Draw bars indicating number of buffers allocated
 894          * (not a great measure, easily confused)
 895          */
 896         if (dev_priv->dma_used) {
 897                 int bar = dev_priv->dma_used / 10240;
 898                 if (bar > 100) bar = 100;
 899                 if (bar < 1) bar = 1;
 900                 i830_fill_box( dev, 4, 16, bar, 4, 196, 128, 128 );
 901                 dev_priv->dma_used = 0;
 902         }
 903
 904         dev_priv->sarea_priv->perf_boxes = 0;
 905 }
 906
 907 static void i830_dma_dispatch_clear( drm_device_t *dev, int flags,
 908                                     unsigned int clear_color,
 909                                     unsigned int clear_zval,
 910                                     unsigned int clear_depthmask)
 911 {
 912         drm_i830_private_t *dev_priv = dev->dev_private;
 913         drm_i830_sarea_t *sarea_priv = dev_priv->sarea_priv;
 914         int nbox = sarea_priv->nbox;
 915         drm_clip_rect_t *pbox = sarea_priv->boxes;
 916         int pitch = dev_priv->pitch;
 917         int cpp = dev_priv->cpp;
 918         int i;
 919         unsigned int BR13, CMD, D_CMD;
 920         RING_LOCALS;
 921
 922
 923         if ( dev_priv->current_page == 1 ) {
 924                 unsigned int tmp = flags;
 925
 926                 flags &= ~(I830_FRONT | I830_BACK);
 927                 if ( tmp & I830_FRONT ) flags |= I830_BACK;
 928                 if ( tmp & I830_BACK )  flags |= I830_FRONT;
 929         }
 930
 931         i830_kernel_lost_context(dev);
 932
 933         switch(cpp) {
 934         case 2:
 935                 BR13 = (0xF0 << 16) | (pitch * cpp) | (1<<24);
 936                 D_CMD = CMD = XY_COLOR_BLT_CMD;
 937                 break;
 938         case 4:
 939                 BR13 = (0xF0 << 16) | (pitch * cpp) | (1<<24) | (1<<25);
 940                 CMD = (XY_COLOR_BLT_CMD | XY_COLOR_BLT_WRITE_ALPHA |
 941                        XY_COLOR_BLT_WRITE_RGB);
 942                 D_CMD = XY_COLOR_BLT_CMD;
 943                 if(clear_depthmask & 0x00ffffff)
 944                         D_CMD |= XY_COLOR_BLT_WRITE_RGB;
 945                 if(clear_depthmask & 0xff000000)
 946                         D_CMD |= XY_COLOR_BLT_WRITE_ALPHA;
 947                 break;
 948         default:
 949                 BR13 = (0xF0 << 16) | (pitch * cpp) | (1<<24);
 950                 D_CMD = CMD = XY_COLOR_BLT_CMD;
 951                 break;
 952         }
 953
 954         if (nbox > I830_NR_SAREA_CLIPRECTS)
 955                 nbox = I830_NR_SAREA_CLIPRECTS;
 956
 957         for (i = 0 ; i < nbox ; i++, pbox++) {
 958                 if (pbox->x1 > pbox->x2 ||
 959                     pbox->y1 > pbox->y2 ||
 960                     pbox->x2 > dev_priv->w ||
 961                     pbox->y2 > dev_priv->h)
 962                         continue;
 963
 964                 if ( flags & I830_FRONT ) {
 965                         DRM_DEBUG("clear front\n");
 966                         BEGIN_LP_RING( 6 );
 967                         OUT_RING( CMD );
 968                         OUT_RING( BR13 );
 969                         OUT_RING( (pbox->y1 << 16) | pbox->x1 );
 970                         OUT_RING( (pbox->y2 << 16) | pbox->x2 );
 971                         OUT_RING( dev_priv->front_offset );
 972                         OUT_RING( clear_color );
 973                         ADVANCE_LP_RING();
 974                 }
 975
 976                 if ( flags & I830_BACK ) {
 977                         DRM_DEBUG("clear back\n");
 978                         BEGIN_LP_RING( 6 );
 979                         OUT_RING( CMD );
 980                         OUT_RING( BR13 );
 981                         OUT_RING( (pbox->y1 << 16) | pbox->x1 );
 982                         OUT_RING( (pbox->y2 << 16) | pbox->x2 );
 983                         OUT_RING( dev_priv->back_offset );
 984                         OUT_RING( clear_color );
 985                         ADVANCE_LP_RING();
 986                 }
 987
 988                 if ( flags & I830_DEPTH ) {
 989                         DRM_DEBUG("clear depth\n");
 990                         BEGIN_LP_RING( 6 );
 991                         OUT_RING( D_CMD );
 992                         OUT_RING( BR13 );
 993                         OUT_RING( (pbox->y1 << 16) | pbox->x1 );
 994                         OUT_RING( (pbox->y2 << 16) | pbox->x2 );
 995                         OUT_RING( dev_priv->depth_offset );
 996                         OUT_RING( clear_zval );
 997                         ADVANCE_LP_RING();
 998                 }
 999         }
1000 }
1001
1002 static void i830_dma_dispatch_swap( drm_device_t *dev )
1003 {
1004         drm_i830_private_t *dev_priv = dev->dev_private;
1005         drm_i830_sarea_t *sarea_priv = dev_priv->sarea_priv;
1006         int nbox = sarea_priv->nbox;
1007         drm_clip_rect_t *pbox = sarea_priv->boxes;
1008         int pitch = dev_priv->pitch;
1009         int cpp = dev_priv->cpp;
1010         int i;
1011         unsigned int CMD, BR13;
1012         RING_LOCALS;
1013
1014         DRM_DEBUG("swapbuffers\n");
1015
1016         i830_kernel_lost_context(dev);
1017
1018         if (dev_priv->do_boxes)
1019                 i830_cp_performance_boxes( dev );
1020
1021         switch(cpp) {
1022         case 2:
1023                 BR13 = (pitch * cpp) | (0xCC << 16) | (1<<24);
1024                 CMD = XY_SRC_COPY_BLT_CMD;
1025                 break;
1026         case 4:
1027                 BR13 = (pitch * cpp) | (0xCC << 16) | (1<<24) | (1<<25);
1028                 CMD = (XY_SRC_COPY_BLT_CMD | XY_SRC_COPY_BLT_WRITE_ALPHA |
1029                        XY_SRC_COPY_BLT_WRITE_RGB);
1030                 break;
1031         default:
1032                 BR13 = (pitch * cpp) | (0xCC << 16) | (1<<24);
1033                 CMD = XY_SRC_COPY_BLT_CMD;
1034                 break;
1035         }
1036
1037
1038         if (nbox > I830_NR_SAREA_CLIPRECTS)
1039                 nbox = I830_NR_SAREA_CLIPRECTS;
1040
1041         for (i = 0 ; i < nbox; i++, pbox++)
1042         {
1043                 if (pbox->x1 > pbox->x2 ||
1044                     pbox->y1 > pbox->y2 ||
1045                     pbox->x2 > dev_priv->w ||
1046                     pbox->y2 > dev_priv->h)
1047                         continue;
1048
1049                 DRM_DEBUG("dispatch swap %d,%d-%d,%d!\n",
1050                           pbox->x1, pbox->y1,
1051                           pbox->x2, pbox->y2);
1052
1053                 BEGIN_LP_RING( 8 );
1054                 OUT_RING( CMD );
1055                 OUT_RING( BR13 );
1056                 OUT_RING( (pbox->y1 << 16) | pbox->x1 );
1057                 OUT_RING( (pbox->y2 << 16) | pbox->x2 );
1058
1059                 if (dev_priv->current_page == 0)
1060                         OUT_RING( dev_priv->front_offset );
1061                 else
1062                         OUT_RING( dev_priv->back_offset );
1063
1064                 OUT_RING( (pbox->y1 << 16) | pbox->x1 );
1065                 OUT_RING( BR13 & 0xffff );
1066
1067                 if (dev_priv->current_page == 0)
1068                         OUT_RING( dev_priv->back_offset );
1069                 else
1070                         OUT_RING( dev_priv->front_offset );
1071
1072                 ADVANCE_LP_RING();
1073         }
1074 }
1075
1076 static void i830_dma_dispatch_flip( drm_device_t *dev )
1077 {
1078         drm_i830_private_t *dev_priv = dev->dev_private;
1079         RING_LOCALS;
1080
1081         DRM_DEBUG( "%s: page=%d pfCurrentPage=%d\n",
1082                    __FUNCTION__,
1083                    dev_priv->current_page,
1084                    dev_priv->sarea_priv->pf_current_page);
1085
1086         i830_kernel_lost_context(dev);
1087
1088         if (dev_priv->do_boxes) {
1089                 dev_priv->sarea_priv->perf_boxes |= I830_BOX_FLIP;
1090                 i830_cp_performance_boxes( dev );
1091         }
1092
1093
1094         BEGIN_LP_RING( 2 );
1095         OUT_RING( INST_PARSER_CLIENT | INST_OP_FLUSH | INST_FLUSH_MAP_CACHE );
1096         OUT_RING( 0 );
1097         ADVANCE_LP_RING();
1098
1099         BEGIN_LP_RING( 6 );
1100         OUT_RING( CMD_OP_DISPLAYBUFFER_INFO | ASYNC_FLIP );
1101         OUT_RING( 0 );
1102         if ( dev_priv->current_page == 0 ) {
1103                 OUT_RING( dev_priv->back_offset );
1104                 dev_priv->current_page = 1;
1105         } else {
1106                 OUT_RING( dev_priv->front_offset );
1107                 dev_priv->current_page = 0;
1108         }
1109         OUT_RING(0);
1110         ADVANCE_LP_RING();
1111
1112
1113         BEGIN_LP_RING( 2 );
1114         OUT_RING( MI_WAIT_FOR_EVENT |
1115                   MI_WAIT_FOR_PLANE_A_FLIP );
1116         OUT_RING( 0 );
1117         ADVANCE_LP_RING();
1118
1119
1120         dev_priv->sarea_priv->pf_current_page = dev_priv->current_page;
1121 }
1122
1123 static void i830_dma_dispatch_vertex(drm_device_t *dev,
1124                                      drm_buf_t *buf,
1125                                      int discard,
1126                                      int used)
1127 {
1128         drm_i830_private_t *dev_priv = dev->dev_private;
1129         drm_i830_buf_priv_t *buf_priv = buf->dev_private;
1130         drm_i830_sarea_t *sarea_priv = dev_priv->sarea_priv;
1131         drm_clip_rect_t *box = sarea_priv->boxes;
1132         int nbox = sarea_priv->nbox;
1133         unsigned long address = (unsigned long)buf->bus_address;
1134         unsigned long start = address - dev->agp->base;
1135         int i = 0, u;
1136         RING_LOCALS;
1137
1138         i830_kernel_lost_context(dev);
1139
1140         if (nbox > I830_NR_SAREA_CLIPRECTS)
1141                 nbox = I830_NR_SAREA_CLIPRECTS;
1142
1143         if (discard) {
1144                 u = cmpxchg(buf_priv->in_use, I830_BUF_CLIENT,
1145                             I830_BUF_HARDWARE);
1146                 if(u != I830_BUF_CLIENT) {
1147                         DRM_DEBUG("xxxx 2\n");
1148                 }
1149         }
1150
1151         if (used > 4*1023)
1152                 used = 0;
1153
1154         if (sarea_priv->dirty)
1155            i830EmitState( dev );
1156
1157         DRM_DEBUG("dispatch vertex addr 0x%lx, used 0x%x nbox %d\n",
1158                   address, used, nbox);
1159
1160         dev_priv->counter++;
1161         DRM_DEBUG(  "dispatch counter : %ld\n", dev_priv->counter);
1162         DRM_DEBUG(  "i830_dma_dispatch\n");
1163         DRM_DEBUG(  "start : %lx\n", start);
1164         DRM_DEBUG(  "used : %d\n", used);
1165         DRM_DEBUG(  "start + used - 4 : %ld\n", start + used - 4);
1166
1167         if (buf_priv->currently_mapped == I830_BUF_MAPPED) {
1168                 u32  *vp = buf_priv->virtual;
1169
1170                 put_user( (GFX_OP_PRIMITIVE |
1171                          sarea_priv->vertex_prim |
1172                           ((used/4)-2)), &vp[0]);
1173
1174                 if (dev_priv->use_mi_batchbuffer_start) {
1175                         put_user(MI_BATCH_BUFFER_END, &vp[used/4]);
1176                         used += 4;
1177                 }
1178
1179                 if (used & 4) {
1180                         put_user(0, &vp[used/4]);
1181                         used += 4;
1182                 }
1183
1184                 i830_unmap_buffer(buf);
1185         }
1186
1187         if (used) {
1188                 do {
1189                         if (i < nbox) {
1190                                 BEGIN_LP_RING(6);
1191                                 OUT_RING( GFX_OP_DRAWRECT_INFO );
1192                                 OUT_RING( sarea_priv->BufferState[I830_DESTREG_DR1] );
1193                                 OUT_RING( box[i].x1 | (box[i].y1<<16) );
1194                                 OUT_RING( box[i].x2 | (box[i].y2<<16) );
1195                                 OUT_RING( sarea_priv->BufferState[I830_DESTREG_DR4] );
1196                                 OUT_RING( 0 );
1197                                 ADVANCE_LP_RING();
1198                         }
1199
1200                         if (dev_priv->use_mi_batchbuffer_start) {
1201                                 BEGIN_LP_RING(2);
1202                                 OUT_RING( MI_BATCH_BUFFER_START | (2<<6) );
1203                                 OUT_RING( start | MI_BATCH_NON_SECURE );
1204                                 ADVANCE_LP_RING();
1205                         }
1206                         else {
1207                                 BEGIN_LP_RING(4);
1208                                 OUT_RING( MI_BATCH_BUFFER );
1209                                 OUT_RING( start | MI_BATCH_NON_SECURE );
1210                                 OUT_RING( start + used - 4 );
1211                                 OUT_RING( 0 );
1212                                 ADVANCE_LP_RING();
1213                         }
1214
1215                 } while (++i < nbox);
1216         }
1217
1218         if (discard) {
1219                 dev_priv->counter++;
1220
1221                 (void) cmpxchg(buf_priv->in_use, I830_BUF_CLIENT,
1222                                I830_BUF_HARDWARE);
1223
1224                 BEGIN_LP_RING(8);
1225                 OUT_RING( CMD_STORE_DWORD_IDX );
1226                 OUT_RING( 20 );
1227                 OUT_RING( dev_priv->counter );
1228                 OUT_RING( CMD_STORE_DWORD_IDX );
1229                 OUT_RING( buf_priv->my_use_idx );
1230                 OUT_RING( I830_BUF_FREE );
1231                 OUT_RING( CMD_REPORT_HEAD );
1232                 OUT_RING( 0 );
1233                 ADVANCE_LP_RING();
1234         }
1235 }
1236
1237
1238 void i830_dma_quiescent(drm_device_t *dev)
1239 {
1240         drm_i830_private_t *dev_priv = dev->dev_private;
1241         RING_LOCALS;
1242
1243         i830_kernel_lost_context(dev);
1244
1245         BEGIN_LP_RING(4);
1246         OUT_RING( INST_PARSER_CLIENT | INST_OP_FLUSH | INST_FLUSH_MAP_CACHE );
1247         OUT_RING( CMD_REPORT_HEAD );
1248         OUT_RING( 0 );
1249         OUT_RING( 0 );
1250         ADVANCE_LP_RING();
1251
1252         i830_wait_ring( dev, dev_priv->ring.Size - 8, __FUNCTION__ );
1253 }
1254
1255 static int i830_flush_queue(drm_device_t *dev)
1256 {
1257         drm_i830_private_t *dev_priv = dev->dev_private;
1258         drm_device_dma_t *dma = dev->dma;
1259         int i, ret = 0;
1260         RING_LOCALS;
1261
1262         i830_kernel_lost_context(dev);
1263
1264         BEGIN_LP_RING(2);
1265         OUT_RING( CMD_REPORT_HEAD );
1266         OUT_RING( 0 );
1267         ADVANCE_LP_RING();
1268
1269         i830_wait_ring( dev, dev_priv->ring.Size - 8, __FUNCTION__ );
1270
1271         for (i = 0; i < dma->buf_count; i++) {
1272                 drm_buf_t *buf = dma->buflist[ i ];
1273                 drm_i830_buf_priv_t *buf_priv = buf->dev_private;
1274
1275                 int used = cmpxchg(buf_priv->in_use, I830_BUF_HARDWARE,
1276                                    I830_BUF_FREE);
1277
1278                 if (used == I830_BUF_HARDWARE)
1279                         DRM_DEBUG("reclaimed from HARDWARE\n");
1280                 if (used == I830_BUF_CLIENT)
1281                         DRM_DEBUG("still on client\n");
1282         }
1283
1284         return ret;
1285 }
1286
1287 /* Must be called with the lock held */
1288 void i830_reclaim_buffers( struct file *filp )
1289 {
1290         drm_file_t    *priv   = filp->private_data;
1291         drm_device_t  *dev    = priv->dev;
1292         drm_device_dma_t *dma = dev->dma;
1293         int              i;
1294
1295         if (!dma) return;
1296         if (!dev->dev_private) return;
1297         if (!dma->buflist) return;
1298
1299         i830_flush_queue(dev);
1300
1301         for (i = 0; i < dma->buf_count; i++) {
1302                 drm_buf_t *buf = dma->buflist[ i ];
1303                 drm_i830_buf_priv_t *buf_priv = buf->dev_private;
1304
1305                 if (buf->filp == filp && buf_priv) {
1306                         int used = cmpxchg(buf_priv->in_use, I830_BUF_CLIENT,
1307                                            I830_BUF_FREE);
1308
1309                         if (used == I830_BUF_CLIENT)
1310                                 DRM_DEBUG("reclaimed from client\n");
1311                         if(buf_priv->currently_mapped == I830_BUF_MAPPED)
1312                                 buf_priv->currently_mapped = I830_BUF_UNMAPPED;
1313                 }
1314         }
1315 }
1316
1317 int i830_flush_ioctl(struct inode *inode, struct file *filp,
1318                      unsigned int cmd, unsigned long __user arg)
1319 {
1320         drm_file_t        *priv   = filp->private_data;
1321         drm_device_t      *dev    = priv->dev;
1322
1323         if(!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) {
1324                 DRM_ERROR("i830_flush_ioctl called without lock held\n");
1325                 return -EINVAL;
1326         }
1327
1328         i830_flush_queue(dev);
1329         return 0;
1330 }
1331
1332 int i830_dma_vertex(struct inode *inode, struct file *filp,
1333                unsigned int cmd, unsigned long __user arg)
1334 {
1335         drm_file_t *priv = filp->private_data;
1336         drm_device_t *dev = priv->dev;
1337         drm_device_dma_t *dma = dev->dma;
1338         drm_i830_private_t *dev_priv = (drm_i830_private_t *)dev->dev_private;
1339         u32 *hw_status = dev_priv->hw_status_page;
1340         drm_i830_sarea_t *sarea_priv = (drm_i830_sarea_t *)
1341                                         dev_priv->sarea_priv;
1342         drm_i830_vertex_t vertex;
1343
1344         if (copy_from_user(&vertex, (drm_i830_vertex_t __user *)arg, sizeof(vertex)))
1345                 return -EFAULT;
1346
1347         if(!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) {
1348                 DRM_ERROR("i830_dma_vertex called without lock held\n");
1349                 return -EINVAL;
1350         }
1351
1352         DRM_DEBUG("i830 dma vertex, idx %d used %d discard %d\n",
1353                   vertex.idx, vertex.used, vertex.discard);
1354
1355         if(vertex.idx < 0 || vertex.idx > dma->buf_count) return -EINVAL;
1356
1357         i830_dma_dispatch_vertex( dev,
1358                                   dma->buflist[ vertex.idx ],
1359                                   vertex.discard, vertex.used );
1360
1361         sarea_priv->last_enqueue = dev_priv->counter-1;
1362         sarea_priv->last_dispatch = (int) hw_status[5];
1363
1364         return 0;
1365 }
1366
1367 int i830_clear_bufs(struct inode *inode, struct file *filp,
1368                    unsigned int cmd, unsigned long __user arg)
1369 {
1370         drm_file_t *priv = filp->private_data;
1371         drm_device_t *dev = priv->dev;
1372         drm_i830_clear_t clear;
1373
1374         if (copy_from_user(&clear, (drm_i830_clear_t __user *)arg, sizeof(clear)))
1375                 return -EFAULT;
1376
1377         if(!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) {
1378                 DRM_ERROR("i830_clear_bufs called without lock held\n");
1379                 return -EINVAL;
1380         }
1381
1382         /* GH: Someone's doing nasty things... */
1383         if (!dev->dev_private) {
1384                 return -EINVAL;
1385         }
1386
1387         i830_dma_dispatch_clear( dev, clear.flags,
1388                                  clear.clear_color,
1389                                  clear.clear_depth,
1390                                  clear.clear_depthmask);
1391         return 0;
1392 }
1393
1394 int i830_swap_bufs(struct inode *inode, struct file *filp,
1395                   unsigned int cmd, unsigned long __user arg)
1396 {
1397         drm_file_t *priv = filp->private_data;
1398         drm_device_t *dev = priv->dev;
1399
1400         DRM_DEBUG("i830_swap_bufs\n");
1401
1402         if(!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) {
1403                 DRM_ERROR("i830_swap_buf called without lock held\n");
1404                 return -EINVAL;
1405         }
1406
1407         i830_dma_dispatch_swap( dev );
1408         return 0;
1409 }
1410
1411
1412
1413 /* Not sure why this isn't set all the time:
1414  */
1415 static void i830_do_init_pageflip( drm_device_t *dev )
1416 {
1417         drm_i830_private_t *dev_priv = dev->dev_private;
1418
1419         DRM_DEBUG("%s\n", __FUNCTION__);
1420         dev_priv->page_flipping = 1;
1421         dev_priv->current_page = 0;
1422         dev_priv->sarea_priv->pf_current_page = dev_priv->current_page;
1423 }
1424
1425 int i830_do_cleanup_pageflip( drm_device_t *dev )
1426 {
1427         drm_i830_private_t *dev_priv = dev->dev_private;
1428
1429         DRM_DEBUG("%s\n", __FUNCTION__);
1430         if (dev_priv->current_page != 0)
1431                 i830_dma_dispatch_flip( dev );
1432
1433         dev_priv->page_flipping = 0;
1434         return 0;
1435 }
1436
1437 int i830_flip_bufs(struct inode *inode, struct file *filp,
1438                    unsigned int cmd, unsigned long __user arg)
1439 {
1440         drm_file_t *priv = filp->private_data;
1441         drm_device_t *dev = priv->dev;
1442         drm_i830_private_t *dev_priv = dev->dev_private;
1443
1444         DRM_DEBUG("%s\n", __FUNCTION__);
1445
1446         if(!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) {
1447                 DRM_ERROR("i830_flip_buf called without lock held\n");
1448                 return -EINVAL;
1449         }
1450
1451         if (!dev_priv->page_flipping)
1452                 i830_do_init_pageflip( dev );
1453
1454         i830_dma_dispatch_flip( dev );
1455         return 0;
1456 }
1457
1458 int i830_getage(struct inode *inode, struct file *filp, unsigned int cmd,
1459                 unsigned long __user arg)
1460 {
1461         drm_file_t        *priv     = filp->private_data;
1462         drm_device_t      *dev      = priv->dev;
1463         drm_i830_private_t *dev_priv = (drm_i830_private_t *)dev->dev_private;
1464         u32 *hw_status = dev_priv->hw_status_page;
1465         drm_i830_sarea_t *sarea_priv = (drm_i830_sarea_t *)
1466                                         dev_priv->sarea_priv;
1467
1468         sarea_priv->last_dispatch = (int) hw_status[5];
1469         return 0;
1470 }
1471
1472 int i830_getbuf(struct inode *inode, struct file *filp, unsigned int cmd,
1473                 unsigned long __user arg)
1474 {
1475         drm_file_t        *priv     = filp->private_data;
1476         drm_device_t      *dev      = priv->dev;
1477         int               retcode   = 0;
1478         drm_i830_dma_t    d;
1479         drm_i830_private_t *dev_priv = (drm_i830_private_t *)dev->dev_private;
1480         u32 *hw_status = dev_priv->hw_status_page;
1481         drm_i830_sarea_t *sarea_priv = (drm_i830_sarea_t *)
1482                                         dev_priv->sarea_priv;
1483
1484         DRM_DEBUG("getbuf\n");
1485         if (copy_from_user(&d, (drm_i830_dma_t __user *)arg, sizeof(d)))
1486                 return -EFAULT;
1487
1488         if(!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) {
1489                 DRM_ERROR("i830_dma called without lock held\n");
1490                 return -EINVAL;
1491         }
1492
1493         d.granted = 0;
1494
1495         retcode = i830_dma_get_buffer(dev, &d, filp);
1496
1497         DRM_DEBUG("i830_dma: %d returning %d, granted = %d\n",
1498                   current->pid, retcode, d.granted);
1499
1500         if (copy_to_user((drm_dma_t __user *)arg, &d, sizeof(d)))
1501                 return -EFAULT;
1502         sarea_priv->last_dispatch = (int) hw_status[5];
1503
1504         return retcode;
1505 }
1506
1507 int i830_copybuf(struct inode *inode,
1508                  struct file *filp,
1509                  unsigned int cmd,
1510                  unsigned long __user arg)
1511 {
1512         /* Never copy - 2.4.x doesn't need it */
1513         return 0;
1514 }
1515
1516 int i830_docopy(struct inode *inode, struct file *filp, unsigned int cmd,
1517                 unsigned long arg)
1518 {
1519         return 0;
1520 }
1521
1522
1523
1524 int i830_getparam( struct inode *inode, struct file *filp, unsigned int cmd,
1525                       unsigned long __user arg )
1526 {
1527         drm_file_t        *priv     = filp->private_data;
1528         drm_device_t      *dev      = priv->dev;
1529         drm_i830_private_t *dev_priv = dev->dev_private;
1530         drm_i830_getparam_t param;
1531         int value;
1532
1533         if ( !dev_priv ) {
1534                 DRM_ERROR( "%s called with no initialization\n", __FUNCTION__ );
1535                 return -EINVAL;
1536         }
1537
1538         if (copy_from_user(&param, (drm_i830_getparam_t __user *)arg, sizeof(param) ))
1539                 return -EFAULT;
1540
1541         switch( param.param ) {
1542         case I830_PARAM_IRQ_ACTIVE:
1543                 value = dev->irq_enabled;
1544                 break;
1545         default:
1546                 return -EINVAL;
1547         }
1548
1549         if ( copy_to_user( param.value, &value, sizeof(int) ) ) {
1550                 DRM_ERROR( "copy_to_user\n" );
1551                 return -EFAULT;
1552         }
1553
1554         return 0;
1555 }
1556
1557
1558 int i830_setparam( struct inode *inode, struct file *filp, unsigned int cmd,
1559                    unsigned long __user arg )
1560 {
1561         drm_file_t        *priv     = filp->private_data;
1562         drm_device_t      *dev      = priv->dev;
1563         drm_i830_private_t *dev_priv = dev->dev_private;
1564         drm_i830_setparam_t param;
1565
1566         if ( !dev_priv ) {
1567                 DRM_ERROR( "%s called with no initialization\n", __FUNCTION__ );
1568                 return -EINVAL;
1569         }
1570
1571         if (copy_from_user(&param, (drm_i830_setparam_t __user *)arg, sizeof(param) ))
1572                 return -EFAULT;
1573
1574         switch( param.param ) {
1575         case I830_SETPARAM_USE_MI_BATCHBUFFER_START:
1576                 dev_priv->use_mi_batchbuffer_start = param.value;
1577                 break;
1578         default:
1579                 return -EINVAL;
1580         }
1581
1582         return 0;
1583 }