drivers/char/drm/mga_dma.c

   1 /* mga_dma.c -- DMA support for mga g200/g400 -*- linux-c -*-
   2  * Created: Mon Dec 13 01:50:01 1999 by jhartmann@precisioninsight.com
   3  *
   4  * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
   5  * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
   6  * All Rights Reserved.
   7  *
   8  * Permission is hereby granted, free of charge, to any person obtaining a
   9  * copy of this software and associated documentation files (the "Software"),
  10  * to deal in the Software without restriction, including without limitation
  11  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  12  * and/or sell copies of the Software, and to permit persons to whom the
  13  * Software is furnished to do so, subject to the following conditions:
  14  *
  15  * The above copyright notice and this permission notice (including the next
  16  * paragraph) shall be included in all copies or substantial portions of the
  17  * Software.
  18  *
  19  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  20  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  21  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  22  * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
  23  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  24  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  25  * DEALINGS IN THE SOFTWARE.
  26  *
  27  * Authors:
  28  *    Rickard E. (Rik) Faith <faith@valinux.com>
  29  *    Jeff Hartmann <jhartmann@valinux.com>
  30  *    Keith Whitwell <keith@tungstengraphics.com>
  31  *
  32  * Rewritten by:
  33  *    Gareth Hughes <gareth@valinux.com>
  34  */
  35
  36 #include "mga.h"
  37 #include "drmP.h"
  38 #include "drm.h"
  39 #include "mga_drm.h"
  40 #include "mga_drv.h"
  41
  42 #define MGA_DEFAULT_USEC_TIMEOUT        10000
  43 #define MGA_FREELIST_DEBUG              0
  44
  45
  46 /* ================================================================
  47  * Engine control
  48  */
  49
  50 int mga_do_wait_for_idle( drm_mga_private_t *dev_priv )
  51 {
  52         u32 status = 0;
  53         int i;
  54         DRM_DEBUG( "\n" );
  55
  56         for ( i = 0 ; i < dev_priv->usec_timeout ; i++ ) {
  57                 status = MGA_READ( MGA_STATUS ) & MGA_ENGINE_IDLE_MASK;
  58                 if ( status == MGA_ENDPRDMASTS ) {
  59                         MGA_WRITE8( MGA_CRTC_INDEX, 0 );
  60                         return 0;
  61                 }
  62                 DRM_UDELAY( 1 );
  63         }
  64
  65 #if MGA_DMA_DEBUG
  66         DRM_ERROR( "failed!\n" );
  67         DRM_INFO( "   status=0x%08x\n", status );
  68 #endif
  69         return DRM_ERR(EBUSY);
  70 }
  71
  72 int mga_do_dma_idle( drm_mga_private_t *dev_priv )
  73 {
  74         u32 status = 0;
  75         int i;
  76         DRM_DEBUG( "\n" );
  77
  78         for ( i = 0 ; i < dev_priv->usec_timeout ; i++ ) {
  79                 status = MGA_READ( MGA_STATUS ) & MGA_DMA_IDLE_MASK;
  80                 if ( status == MGA_ENDPRDMASTS ) return 0;
  81                 DRM_UDELAY( 1 );
  82         }
  83
  84 #if MGA_DMA_DEBUG
  85         DRM_ERROR( "failed! status=0x%08x\n", status );
  86 #endif
  87         return DRM_ERR(EBUSY);
  88 }
  89
  90 int mga_do_dma_reset( drm_mga_private_t *dev_priv )
  91 {
  92         drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
  93         drm_mga_primary_buffer_t *primary = &dev_priv->prim;
  94
  95         DRM_DEBUG( "\n" );
  96
  97         /* The primary DMA stream should look like new right about now.
  98          */
  99         primary->tail = 0;
 100         primary->space = primary->size;
 101         primary->last_flush = 0;
 102
 103         sarea_priv->last_wrap = 0;
 104
 105         /* FIXME: Reset counters, buffer ages etc...
 106          */
 107
 108         /* FIXME: What else do we need to reinitialize?  WARP stuff?
 109          */
 110
 111         return 0;
 112 }
 113
 114 int mga_do_engine_reset( drm_mga_private_t *dev_priv )
 115 {
 116         DRM_DEBUG( "\n" );
 117
 118         /* Okay, so we've completely screwed up and locked the engine.
 119          * How about we clean up after ourselves?
 120          */
 121         MGA_WRITE( MGA_RST, MGA_SOFTRESET );
 122         DRM_UDELAY( 15 );                               /* Wait at least 10 usecs */
 123         MGA_WRITE( MGA_RST, 0 );
 124
 125         /* Initialize the registers that get clobbered by the soft
 126          * reset.  Many of the core register values survive a reset,
 127          * but the drawing registers are basically all gone.
 128          *
 129          * 3D clients should probably die after calling this.  The X
 130          * server should reset the engine state to known values.
 131          */
 132 #if 0
 133         MGA_WRITE( MGA_PRIMPTR,
 134                    virt_to_bus((void *)dev_priv->prim.status_page) |
 135                    MGA_PRIMPTREN0 |
 136                    MGA_PRIMPTREN1 );
 137 #endif
 138
 139         MGA_WRITE( MGA_ICLEAR, MGA_SOFTRAPICLR );
 140         MGA_WRITE( MGA_IEN,    MGA_SOFTRAPIEN );
 141
 142         /* The primary DMA stream should look like new right about now.
 143          */
 144         mga_do_dma_reset( dev_priv );
 145
 146         /* This bad boy will never fail.
 147          */
 148         return 0;
 149 }
 150
 151
 152 /* ================================================================
 153  * Primary DMA stream
 154  */
 155
 156 void mga_do_dma_flush( drm_mga_private_t *dev_priv )
 157 {
 158         drm_mga_primary_buffer_t *primary = &dev_priv->prim;
 159         u32 head, tail;
 160         u32 status = 0;
 161         int i;
 162         DMA_LOCALS;
 163         DRM_DEBUG( "\n" );
 164
 165         /* We need to wait so that we can do an safe flush */
 166         for ( i = 0 ; i < dev_priv->usec_timeout ; i++ ) {
 167                 status = MGA_READ( MGA_STATUS ) & MGA_ENGINE_IDLE_MASK;
 168                 if ( status == MGA_ENDPRDMASTS ) break;
 169                 DRM_UDELAY( 1 );
 170         }
 171
 172         if ( primary->tail == primary->last_flush ) {
 173                 DRM_DEBUG( "   bailing out...\n" );
 174                 return;
 175         }
 176
 177         tail = primary->tail + dev_priv->primary->offset;
 178
 179         /* We need to pad the stream between flushes, as the card
 180          * actually (partially?) reads the first of these commands.
 181          * See page 4-16 in the G400 manual, middle of the page or so.
 182          */
 183         BEGIN_DMA( 1 );
 184
 185         DMA_BLOCK( MGA_DMAPAD,  0x00000000,
 186                    MGA_DMAPAD,  0x00000000,
 187                    MGA_DMAPAD,  0x00000000,
 188                    MGA_DMAPAD,  0x00000000 );
 189
 190         ADVANCE_DMA();
 191
 192         primary->last_flush = primary->tail;
 193
 194         head = MGA_READ( MGA_PRIMADDRESS );
 195
 196         if ( head <= tail ) {
 197                 primary->space = primary->size - primary->tail;
 198         } else {
 199                 primary->space = head - tail;
 200         }
 201
 202         DRM_DEBUG( "   head = 0x%06lx\n", head - dev_priv->primary->offset );
 203         DRM_DEBUG( "   tail = 0x%06lx\n", tail - dev_priv->primary->offset );
 204         DRM_DEBUG( "  space = 0x%06x\n", primary->space );
 205
 206         mga_flush_write_combine();
 207         MGA_WRITE( MGA_PRIMEND, tail | MGA_PAGPXFER );
 208
 209         DRM_DEBUG( "done.\n" );
 210 }
 211
 212 void mga_do_dma_wrap_start( drm_mga_private_t *dev_priv )
 213 {
 214         drm_mga_primary_buffer_t *primary = &dev_priv->prim;
 215         u32 head, tail;
 216         DMA_LOCALS;
 217         DRM_DEBUG( "\n" );
 218
 219         BEGIN_DMA_WRAP();
 220
 221         DMA_BLOCK( MGA_DMAPAD,  0x00000000,
 222                    MGA_DMAPAD,  0x00000000,
 223                    MGA_DMAPAD,  0x00000000,
 224                    MGA_DMAPAD,  0x00000000 );
 225
 226         ADVANCE_DMA();
 227
 228         tail = primary->tail + dev_priv->primary->offset;
 229
 230         primary->tail = 0;
 231         primary->last_flush = 0;
 232         primary->last_wrap++;
 233
 234         head = MGA_READ( MGA_PRIMADDRESS );
 235
 236         if ( head == dev_priv->primary->offset ) {
 237                 primary->space = primary->size;
 238         } else {
 239                 primary->space = head - dev_priv->primary->offset;
 240         }
 241
 242         DRM_DEBUG( "   head = 0x%06lx\n",
 243                   head - dev_priv->primary->offset );
 244         DRM_DEBUG( "   tail = 0x%06x\n", primary->tail );
 245         DRM_DEBUG( "   wrap = %d\n", primary->last_wrap );
 246         DRM_DEBUG( "  space = 0x%06x\n", primary->space );
 247
 248         mga_flush_write_combine();
 249         MGA_WRITE( MGA_PRIMEND, tail | MGA_PAGPXFER );
 250
 251         set_bit( 0, &primary->wrapped );
 252         DRM_DEBUG( "done.\n" );
 253 }
 254
 255 void mga_do_dma_wrap_end( drm_mga_private_t *dev_priv )
 256 {
 257         drm_mga_primary_buffer_t *primary = &dev_priv->prim;
 258         drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
 259         u32 head = dev_priv->primary->offset;
 260         DRM_DEBUG( "\n" );
 261
 262         sarea_priv->last_wrap++;
 263         DRM_DEBUG( "   wrap = %d\n", sarea_priv->last_wrap );
 264
 265         mga_flush_write_combine();
 266         MGA_WRITE( MGA_PRIMADDRESS, head | MGA_DMA_GENERAL );
 267
 268         clear_bit( 0, &primary->wrapped );
 269         DRM_DEBUG( "done.\n" );
 270 }
 271
 272
 273 /* ================================================================
 274  * Freelist management
 275  */
 276
 277 #define MGA_BUFFER_USED         ~0
 278 #define MGA_BUFFER_FREE         0
 279
 280 #if MGA_FREELIST_DEBUG
 281 static void mga_freelist_print( drm_device_t *dev )
 282 {
 283         drm_mga_private_t *dev_priv = dev->dev_private;
 284         drm_mga_freelist_t *entry;
 285
 286         DRM_INFO( "\n" );
 287         DRM_INFO( "current dispatch: last=0x%x done=0x%x\n",
 288                   dev_priv->sarea_priv->last_dispatch,
 289                   (unsigned int)(MGA_READ( MGA_PRIMADDRESS ) -
 290                                  dev_priv->primary->offset) );
 291         DRM_INFO( "current freelist:\n" );
 292
 293         for ( entry = dev_priv->head->next ; entry ; entry = entry->next ) {
 294                 DRM_INFO( "   %p   idx=%2d  age=0x%x 0x%06lx\n",
 295                           entry, entry->buf->idx, entry->age.head,
 296                           entry->age.head - dev_priv->primary->offset );
 297         }
 298         DRM_INFO( "\n" );
 299 }
 300 #endif
 301
 302 static int mga_freelist_init( drm_device_t *dev, drm_mga_private_t *dev_priv )
 303 {
 304         drm_device_dma_t *dma = dev->dma;
 305         drm_buf_t *buf;
 306         drm_mga_buf_priv_t *buf_priv;
 307         drm_mga_freelist_t *entry;
 308         int i;
 309         DRM_DEBUG( "count=%d\n", dma->buf_count );
 310
 311         dev_priv->head = DRM(alloc)( sizeof(drm_mga_freelist_t),
 312                                      DRM_MEM_DRIVER );
 313         if ( dev_priv->head == NULL )
 314                 return DRM_ERR(ENOMEM);
 315
 316         memset( dev_priv->head, 0, sizeof(drm_mga_freelist_t) );
 317         SET_AGE( &dev_priv->head->age, MGA_BUFFER_USED, 0 );
 318
 319         for ( i = 0 ; i < dma->buf_count ; i++ ) {
 320                 buf = dma->buflist[i];
 321                 buf_priv = buf->dev_private;
 322
 323                 entry = DRM(alloc)( sizeof(drm_mga_freelist_t),
 324                                     DRM_MEM_DRIVER );
 325                 if ( entry == NULL )
 326                         return DRM_ERR(ENOMEM);
 327
 328                 memset( entry, 0, sizeof(drm_mga_freelist_t) );
 329
 330                 entry->next = dev_priv->head->next;
 331                 entry->prev = dev_priv->head;
 332                 SET_AGE( &entry->age, MGA_BUFFER_FREE, 0 );
 333                 entry->buf = buf;
 334
 335                 if ( dev_priv->head->next != NULL )
 336                         dev_priv->head->next->prev = entry;
 337                 if ( entry->next == NULL )
 338                         dev_priv->tail = entry;
 339
 340                 buf_priv->list_entry = entry;
 341                 buf_priv->discard = 0;
 342                 buf_priv->dispatched = 0;
 343
 344                 dev_priv->head->next = entry;
 345         }
 346
 347         return 0;
 348 }
 349
 350 static void mga_freelist_cleanup( drm_device_t *dev )
 351 {
 352         drm_mga_private_t *dev_priv = dev->dev_private;
 353         drm_mga_freelist_t *entry;
 354         drm_mga_freelist_t *next;
 355         DRM_DEBUG( "\n" );
 356
 357         entry = dev_priv->head;
 358         while ( entry ) {
 359                 next = entry->next;
 360                 DRM(free)( entry, sizeof(drm_mga_freelist_t), DRM_MEM_DRIVER );
 361                 entry = next;
 362         }
 363
 364         dev_priv->head = dev_priv->tail = NULL;
 365 }
 366
 367 #if 0
 368 /* FIXME: Still needed?
 369  */
 370 static void mga_freelist_reset( drm_device_t *dev )
 371 {
 372         drm_device_dma_t *dma = dev->dma;
 373         drm_buf_t *buf;
 374         drm_mga_buf_priv_t *buf_priv;
 375         int i;
 376
 377         for ( i = 0 ; i < dma->buf_count ; i++ ) {
 378                 buf = dma->buflist[i];
 379                 buf_priv = buf->dev_private;
 380                 SET_AGE( &buf_priv->list_entry->age,
 381                          MGA_BUFFER_FREE, 0 );
 382         }
 383 }
 384 #endif
 385
 386 static drm_buf_t *mga_freelist_get( drm_device_t *dev )
 387 {
 388         drm_mga_private_t *dev_priv = dev->dev_private;
 389         drm_mga_freelist_t *next;
 390         drm_mga_freelist_t *prev;
 391         drm_mga_freelist_t *tail = dev_priv->tail;
 392         u32 head, wrap;
 393         DRM_DEBUG( "\n" );
 394
 395         head = MGA_READ( MGA_PRIMADDRESS );
 396         wrap = dev_priv->sarea_priv->last_wrap;
 397
 398         DRM_DEBUG( "   tail=0x%06lx %d\n",
 399                    tail->age.head ?
 400                    tail->age.head - dev_priv->primary->offset : 0,
 401                    tail->age.wrap );
 402         DRM_DEBUG( "   head=0x%06lx %d\n",
 403                    head - dev_priv->primary->offset, wrap );
 404
 405         if ( TEST_AGE( &tail->age, head, wrap ) ) {
 406                 prev = dev_priv->tail->prev;
 407                 next = dev_priv->tail;
 408                 prev->next = NULL;
 409                 next->prev = next->next = NULL;
 410                 dev_priv->tail = prev;
 411                 SET_AGE( &next->age, MGA_BUFFER_USED, 0 );
 412                 return next->buf;
 413         }
 414
 415         DRM_DEBUG( "returning NULL!\n" );
 416         return NULL;
 417 }
 418
 419 int mga_freelist_put( drm_device_t *dev, drm_buf_t *buf )
 420 {
 421         drm_mga_private_t *dev_priv = dev->dev_private;
 422         drm_mga_buf_priv_t *buf_priv = buf->dev_private;
 423         drm_mga_freelist_t *head, *entry, *prev;
 424
 425         DRM_DEBUG( "age=0x%06lx wrap=%d\n",
 426                    buf_priv->list_entry->age.head -
 427                    dev_priv->primary->offset,
 428                    buf_priv->list_entry->age.wrap );
 429
 430         entry = buf_priv->list_entry;
 431         head = dev_priv->head;
 432
 433         if ( buf_priv->list_entry->age.head == MGA_BUFFER_USED ) {
 434                 SET_AGE( &entry->age, MGA_BUFFER_FREE, 0 );
 435                 prev = dev_priv->tail;
 436                 prev->next = entry;
 437                 entry->prev = prev;
 438                 entry->next = NULL;
 439         } else {
 440                 prev = head->next;
 441                 head->next = entry;
 442                 prev->prev = entry;
 443                 entry->prev = head;
 444                 entry->next = prev;
 445         }
 446
 447         return 0;
 448 }
 449
 450
 451 /* ================================================================
 452  * DMA initialization, cleanup
 453  */
 454
 455 static int mga_do_init_dma( drm_device_t *dev, drm_mga_init_t *init )
 456 {
 457         drm_mga_private_t *dev_priv;
 458         int ret;
 459         DRM_DEBUG( "\n" );
 460
 461         dev_priv = DRM(alloc)( sizeof(drm_mga_private_t), DRM_MEM_DRIVER );
 462         if ( !dev_priv )
 463                 return DRM_ERR(ENOMEM);
 464
 465         memset( dev_priv, 0, sizeof(drm_mga_private_t) );
 466
 467         dev_priv->chipset = init->chipset;
 468
 469         dev_priv->usec_timeout = MGA_DEFAULT_USEC_TIMEOUT;
 470
 471         if ( init->sgram ) {
 472                 dev_priv->clear_cmd = MGA_DWGCTL_CLEAR | MGA_ATYPE_BLK;
 473         } else {
 474                 dev_priv->clear_cmd = MGA_DWGCTL_CLEAR | MGA_ATYPE_RSTR;
 475         }
 476         dev_priv->maccess       = init->maccess;
 477
 478         dev_priv->fb_cpp        = init->fb_cpp;
 479         dev_priv->front_offset  = init->front_offset;
 480         dev_priv->front_pitch   = init->front_pitch;
 481         dev_priv->back_offset   = init->back_offset;
 482         dev_priv->back_pitch    = init->back_pitch;
 483
 484         dev_priv->depth_cpp     = init->depth_cpp;
 485         dev_priv->depth_offset  = init->depth_offset;
 486         dev_priv->depth_pitch   = init->depth_pitch;
 487
 488         /* FIXME: Need to support AGP textures...
 489          */
 490         dev_priv->texture_offset = init->texture_offset[0];
 491         dev_priv->texture_size = init->texture_size[0];
 492
 493         DRM_GETSAREA();
 494
 495         if(!dev_priv->sarea) {
 496                 DRM_ERROR( "failed to find sarea!\n" );
 497                 /* Assign dev_private so we can do cleanup. */
 498                 dev->dev_private = (void *)dev_priv;
 499                 mga_do_cleanup_dma( dev );
 500                 return DRM_ERR(EINVAL);
 501         }
 502
 503         DRM_FIND_MAP( dev_priv->mmio, init->mmio_offset );
 504         if(!dev_priv->mmio) {
 505                 DRM_ERROR( "failed to find mmio region!\n" );
 506                 /* Assign dev_private so we can do cleanup. */
 507                 dev->dev_private = (void *)dev_priv;
 508                 mga_do_cleanup_dma( dev );
 509                 return DRM_ERR(EINVAL);
 510         }
 511         DRM_FIND_MAP( dev_priv->status, init->status_offset );
 512         if(!dev_priv->status) {
 513                 DRM_ERROR( "failed to find status page!\n" );
 514                 /* Assign dev_private so we can do cleanup. */
 515                 dev->dev_private = (void *)dev_priv;
 516                 mga_do_cleanup_dma( dev );
 517                 return DRM_ERR(EINVAL);
 518         }
 519
 520         DRM_FIND_MAP( dev_priv->warp, init->warp_offset );
 521         if(!dev_priv->warp) {
 522                 DRM_ERROR( "failed to find warp microcode region!\n" );
 523                 /* Assign dev_private so we can do cleanup. */
 524                 dev->dev_private = (void *)dev_priv;
 525                 mga_do_cleanup_dma( dev );
 526                 return DRM_ERR(EINVAL);
 527         }
 528         DRM_FIND_MAP( dev_priv->primary, init->primary_offset );
 529         if(!dev_priv->primary) {
 530                 DRM_ERROR( "failed to find primary dma region!\n" );
 531                 /* Assign dev_private so we can do cleanup. */
 532                 dev->dev_private = (void *)dev_priv;
 533                 mga_do_cleanup_dma( dev );
 534                 return DRM_ERR(EINVAL);
 535         }
 536         DRM_FIND_MAP( dev_priv->buffers, init->buffers_offset );
 537         if(!dev_priv->buffers) {
 538                 DRM_ERROR( "failed to find dma buffer region!\n" );
 539                 /* Assign dev_private so we can do cleanup. */
 540                 dev->dev_private = (void *)dev_priv;
 541                 mga_do_cleanup_dma( dev );
 542                 return DRM_ERR(EINVAL);
 543         }
 544
 545         dev_priv->sarea_priv =
 546                 (drm_mga_sarea_t *)((u8 *)dev_priv->sarea->handle +
 547                                     init->sarea_priv_offset);
 548
 549         DRM_IOREMAP( dev_priv->warp, dev );
 550         DRM_IOREMAP( dev_priv->primary, dev );
 551         DRM_IOREMAP( dev_priv->buffers, dev );
 552
 553         if(!dev_priv->warp->handle ||
 554            !dev_priv->primary->handle ||
 555            !dev_priv->buffers->handle ) {
 556                 DRM_ERROR( "failed to ioremap agp regions!\n" );
 557                 /* Assign dev_private so we can do cleanup. */
 558                 dev->dev_private = (void *)dev_priv;
 559                 mga_do_cleanup_dma( dev );
 560                 return DRM_ERR(ENOMEM);
 561         }
 562
 563         ret = mga_warp_install_microcode( dev_priv );
 564         if ( ret < 0 ) {
 565                 DRM_ERROR( "failed to install WARP ucode!\n" );
 566                 /* Assign dev_private so we can do cleanup. */
 567                 dev->dev_private = (void *)dev_priv;
 568                 mga_do_cleanup_dma( dev );
 569                 return ret;
 570         }
 571
 572         ret = mga_warp_init( dev_priv );
 573         if ( ret < 0 ) {
 574                 DRM_ERROR( "failed to init WARP engine!\n" );
 575                 /* Assign dev_private so we can do cleanup. */
 576                 dev->dev_private = (void *)dev_priv;
 577                 mga_do_cleanup_dma( dev );
 578                 return ret;
 579         }
 580
 581         dev_priv->prim.status = (u32 *)dev_priv->status->handle;
 582
 583         mga_do_wait_for_idle( dev_priv );
 584
 585         /* Init the primary DMA registers.
 586          */
 587         MGA_WRITE( MGA_PRIMADDRESS,
 588                    dev_priv->primary->offset | MGA_DMA_GENERAL );
 589 #if 0
 590         MGA_WRITE( MGA_PRIMPTR,
 591                    virt_to_bus((void *)dev_priv->prim.status) |
 592                    MGA_PRIMPTREN0 |     /* Soft trap, SECEND, SETUPEND */
 593                    MGA_PRIMPTREN1 );    /* DWGSYNC */
 594 #endif
 595
 596         dev_priv->prim.start = (u8 *)dev_priv->primary->handle;
 597         dev_priv->prim.end = ((u8 *)dev_priv->primary->handle
 598                               + dev_priv->primary->size);
 599         dev_priv->prim.size = dev_priv->primary->size;
 600
 601         dev_priv->prim.tail = 0;
 602         dev_priv->prim.space = dev_priv->prim.size;
 603         dev_priv->prim.wrapped = 0;
 604
 605         dev_priv->prim.last_flush = 0;
 606         dev_priv->prim.last_wrap = 0;
 607
 608         dev_priv->prim.high_mark = 256 * DMA_BLOCK_SIZE;
 609
 610         dev_priv->prim.status[0] = dev_priv->primary->offset;
 611         dev_priv->prim.status[1] = 0;
 612
 613         dev_priv->sarea_priv->last_wrap = 0;
 614         dev_priv->sarea_priv->last_frame.head = 0;
 615         dev_priv->sarea_priv->last_frame.wrap = 0;
 616
 617         if ( mga_freelist_init( dev, dev_priv ) < 0 ) {
 618                 DRM_ERROR( "could not initialize freelist\n" );
 619                 /* Assign dev_private so we can do cleanup. */
 620                 dev->dev_private = (void *)dev_priv;
 621                 mga_do_cleanup_dma( dev );
 622                 return DRM_ERR(ENOMEM);
 623         }
 624
 625         /* Make dev_private visable to others. */
 626         dev->dev_private = (void *)dev_priv;
 627         return 0;
 628 }
 629
 630 int mga_do_cleanup_dma( drm_device_t *dev )
 631 {
 632         DRM_DEBUG( "\n" );
 633
 634 #if __HAVE_IRQ
 635         /* Make sure interrupts are disabled here because the uninstall ioctl
 636          * may not have been called from userspace and after dev_private
 637          * is freed, it's too late.
 638          */
 639         if ( dev->irq_enabled ) DRM(irq_uninstall)(dev);
 640 #endif
 641
 642         if ( dev->dev_private ) {
 643                 drm_mga_private_t *dev_priv = dev->dev_private;
 644
 645                 if ( dev_priv->warp != NULL )
 646                         DRM_IOREMAPFREE( dev_priv->warp, dev );
 647                 if ( dev_priv->primary != NULL )
 648                         DRM_IOREMAPFREE( dev_priv->primary, dev );
 649                 if ( dev_priv->buffers != NULL )
 650                         DRM_IOREMAPFREE( dev_priv->buffers, dev );
 651
 652                 if ( dev_priv->head != NULL ) {
 653                         mga_freelist_cleanup( dev );
 654                 }
 655
 656                 DRM(free)( dev->dev_private, sizeof(drm_mga_private_t),
 657                            DRM_MEM_DRIVER );
 658                 dev->dev_private = NULL;
 659         }
 660
 661         return 0;
 662 }
 663
 664 int mga_dma_init( DRM_IOCTL_ARGS )
 665 {
 666         DRM_DEVICE;
 667         drm_mga_init_t init;
 668
 669         LOCK_TEST_WITH_RETURN( dev, filp );
 670
 671         DRM_COPY_FROM_USER_IOCTL( init, (drm_mga_init_t *)data, sizeof(init) );
 672
 673         switch ( init.func ) {
 674         case MGA_INIT_DMA:
 675                 return mga_do_init_dma( dev, &init );
 676         case MGA_CLEANUP_DMA:
 677                 return mga_do_cleanup_dma( dev );
 678         }
 679
 680         return DRM_ERR(EINVAL);
 681 }
 682
 683
 684 /* ================================================================
 685  * Primary DMA stream management
 686  */
 687
 688 int mga_dma_flush( DRM_IOCTL_ARGS )
 689 {
 690         DRM_DEVICE;
 691         drm_mga_private_t *dev_priv = (drm_mga_private_t *)dev->dev_private;
 692         drm_lock_t lock;
 693
 694         LOCK_TEST_WITH_RETURN( dev, filp );
 695
 696         DRM_COPY_FROM_USER_IOCTL( lock, (drm_lock_t *)data, sizeof(lock) );
 697
 698         DRM_DEBUG( "%s%s%s\n",
 699                    (lock.flags & _DRM_LOCK_FLUSH) ?     "flush, " : "",
 700                    (lock.flags & _DRM_LOCK_FLUSH_ALL) ? "flush all, " : "",
 701                    (lock.flags & _DRM_LOCK_QUIESCENT) ? "idle, " : "" );
 702
 703         WRAP_WAIT_WITH_RETURN( dev_priv );
 704
 705         if ( lock.flags & (_DRM_LOCK_FLUSH | _DRM_LOCK_FLUSH_ALL) ) {
 706                 mga_do_dma_flush( dev_priv );
 707         }
 708
 709         if ( lock.flags & _DRM_LOCK_QUIESCENT ) {
 710 #if MGA_DMA_DEBUG
 711                 int ret = mga_do_wait_for_idle( dev_priv );
 712                 if ( ret < 0 )
 713                         DRM_INFO( "%s: -EBUSY\n", __FUNCTION__ );
 714                 return ret;
 715 #else
 716                 return mga_do_wait_for_idle( dev_priv );
 717 #endif
 718         } else {
 719                 return 0;
 720         }
 721 }
 722
 723 int mga_dma_reset( DRM_IOCTL_ARGS )
 724 {
 725         DRM_DEVICE;
 726         drm_mga_private_t *dev_priv = (drm_mga_private_t *)dev->dev_private;
 727
 728         LOCK_TEST_WITH_RETURN( dev, filp );
 729
 730         return mga_do_dma_reset( dev_priv );
 731 }
 732
 733
 734 /* ================================================================
 735  * DMA buffer management
 736  */
 737
 738 static int mga_dma_get_buffers( DRMFILE filp,
 739                                 drm_device_t *dev, drm_dma_t *d )
 740 {
 741         drm_buf_t *buf;
 742         int i;
 743
 744         for ( i = d->granted_count ; i < d->request_count ; i++ ) {
 745                 buf = mga_freelist_get( dev );
 746                 if ( !buf ) return DRM_ERR(EAGAIN);
 747
 748                 buf->filp = filp;
 749
 750                 if ( DRM_COPY_TO_USER( &d->request_indices[i],
 751                                    &buf->idx, sizeof(buf->idx) ) )
 752                         return DRM_ERR(EFAULT);
 753                 if ( DRM_COPY_TO_USER( &d->request_sizes[i],
 754                                    &buf->total, sizeof(buf->total) ) )
 755                         return DRM_ERR(EFAULT);
 756
 757                 d->granted_count++;
 758         }
 759         return 0;
 760 }
 761
 762 int mga_dma_buffers( DRM_IOCTL_ARGS )
 763 {
 764         DRM_DEVICE;
 765         drm_device_dma_t *dma = dev->dma;
 766         drm_mga_private_t *dev_priv = (drm_mga_private_t *)dev->dev_private;
 767         drm_dma_t d;
 768         int ret = 0;
 769
 770         LOCK_TEST_WITH_RETURN( dev, filp );
 771
 772         DRM_COPY_FROM_USER_IOCTL( d, (drm_dma_t *)data, sizeof(d) );
 773
 774         /* Please don't send us buffers.
 775          */
 776         if ( d.send_count != 0 ) {
 777                 DRM_ERROR( "Process %d trying to send %d buffers via drmDMA\n",
 778                            DRM_CURRENTPID, d.send_count );
 779                 return DRM_ERR(EINVAL);
 780         }
 781
 782         /* We'll send you buffers.
 783          */
 784         if ( d.request_count < 0 || d.request_count > dma->buf_count ) {
 785                 DRM_ERROR( "Process %d trying to get %d buffers (of %d max)\n",
 786                            DRM_CURRENTPID, d.request_count, dma->buf_count );
 787                 return DRM_ERR(EINVAL);
 788         }
 789
 790         WRAP_TEST_WITH_RETURN( dev_priv );
 791
 792         d.granted_count = 0;
 793
 794         if ( d.request_count ) {
 795                 ret = mga_dma_get_buffers( filp, dev, &d );
 796         }
 797
 798         DRM_COPY_TO_USER_IOCTL( (drm_dma_t *)data, d, sizeof(d) );
 799
 800         return ret;
 801 }