drivers/char/tlclk.c

   1 /*
   2  * Telecom Clock driver for Intel NetStructure(tm) MPCBL0010
   3  *
   4  * Copyright (C) 2005 Kontron Canada
   5  *
   6  * All rights reserved.
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License as published by
  10  * the Free Software Foundation; either version 2 of the License, or (at
  11  * your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful, but
  14  * WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
  16  * NON INFRINGEMENT.  See the GNU General Public License for more
  17  * details.
  18  *
  19  * You should have received a copy of the GNU General Public License
  20  * along with this program; if not, write to the Free Software
  21  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  22  *
  23  * Send feedback to <sebastien.bouchard@ca.kontron.com> and the current
  24  * Maintainer  <mark.gross@intel.com>
  25  *
  26  * Description : This is the TELECOM CLOCK module driver for the ATCA
  27  * MPCBL0010 ATCA computer.
  28  */
  29
  30 #include <linux/module.h>
  31 #include <linux/init.h>
  32 #include <linux/sched.h>
  33 #include <linux/kernel.h>       /* printk() */
  34 #include <linux/fs.h>           /* everything... */
  35 #include <linux/errno.h>        /* error codes */
  36 #include <linux/slab.h>
  37 #include <linux/ioport.h>
  38 #include <linux/interrupt.h>
  39 #include <linux/spinlock.h>
  40 #include <linux/timer.h>
  41 #include <linux/sysfs.h>
  42 #include <linux/device.h>
  43 #include <linux/miscdevice.h>
  44 #include <linux/platform_device.h>
  45 #include <asm/io.h>             /* inb/outb */
  46 #include <asm/uaccess.h>
  47
  48 MODULE_AUTHOR("Sebastien Bouchard <sebastien.bouchard@ca.kontron.com>");
  49 MODULE_LICENSE("GPL");
  50
  51 /*Hardware Reset of the PLL */
  52 #define RESET_ON        0x00
  53 #define RESET_OFF       0x01
  54
  55 /* MODE SELECT */
  56 #define NORMAL_MODE     0x00
  57 #define HOLDOVER_MODE   0x10
  58 #define FREERUN_MODE    0x20
  59
  60 /* FILTER SELECT */
  61 #define FILTER_6HZ      0x04
  62 #define FILTER_12HZ     0x00
  63
  64 /* SELECT REFERENCE FREQUENCY */
  65 #define REF_CLK1_8kHz           0x00
  66 #define REF_CLK2_19_44MHz       0x02
  67
  68 /* Select primary or secondary redundant clock */
  69 #define PRIMARY_CLOCK   0x00
  70 #define SECONDARY_CLOCK 0x01
  71
  72 /* CLOCK TRANSMISSION DEFINE */
  73 #define CLK_8kHz        0xff
  74 #define CLK_16_384MHz   0xfb
  75
  76 #define CLK_1_544MHz    0x00
  77 #define CLK_2_048MHz    0x01
  78 #define CLK_4_096MHz    0x02
  79 #define CLK_6_312MHz    0x03
  80 #define CLK_8_192MHz    0x04
  81 #define CLK_19_440MHz   0x06
  82
  83 #define CLK_8_592MHz    0x08
  84 #define CLK_11_184MHz   0x09
  85 #define CLK_34_368MHz   0x0b
  86 #define CLK_44_736MHz   0x0a
  87
  88 /* RECEIVED REFERENCE */
  89 #define AMC_B1 0
  90 #define AMC_B2 1
  91
  92 /* HARDWARE SWITCHING DEFINE */
  93 #define HW_ENABLE       0x80
  94 #define HW_DISABLE      0x00
  95
  96 /* HARDWARE SWITCHING MODE DEFINE */
  97 #define PLL_HOLDOVER    0x40
  98 #define LOST_CLOCK      0x00
  99
 100 /* ALARMS DEFINE */
 101 #define UNLOCK_MASK     0x10
 102 #define HOLDOVER_MASK   0x20
 103 #define SEC_LOST_MASK   0x40
 104 #define PRI_LOST_MASK   0x80
 105
 106 /* INTERRUPT CAUSE DEFINE */
 107
 108 #define PRI_LOS_01_MASK         0x01
 109 #define PRI_LOS_10_MASK         0x02
 110
 111 #define SEC_LOS_01_MASK         0x04
 112 #define SEC_LOS_10_MASK         0x08
 113
 114 #define HOLDOVER_01_MASK        0x10
 115 #define HOLDOVER_10_MASK        0x20
 116
 117 #define UNLOCK_01_MASK          0x40
 118 #define UNLOCK_10_MASK          0x80
 119
 120 struct tlclk_alarms {
 121         __u32 lost_clocks;
 122         __u32 lost_primary_clock;
 123         __u32 lost_secondary_clock;
 124         __u32 primary_clock_back;
 125         __u32 secondary_clock_back;
 126         __u32 switchover_primary;
 127         __u32 switchover_secondary;
 128         __u32 pll_holdover;
 129         __u32 pll_end_holdover;
 130         __u32 pll_lost_sync;
 131         __u32 pll_sync;
 132 };
 133 /* Telecom clock I/O register definition */
 134 #define TLCLK_BASE 0xa08
 135 #define TLCLK_REG0 TLCLK_BASE
 136 #define TLCLK_REG1 (TLCLK_BASE+1)
 137 #define TLCLK_REG2 (TLCLK_BASE+2)
 138 #define TLCLK_REG3 (TLCLK_BASE+3)
 139 #define TLCLK_REG4 (TLCLK_BASE+4)
 140 #define TLCLK_REG5 (TLCLK_BASE+5)
 141 #define TLCLK_REG6 (TLCLK_BASE+6)
 142 #define TLCLK_REG7 (TLCLK_BASE+7)
 143
 144 #define SET_PORT_BITS(port, mask, val) outb(((inb(port) & mask) | val), port)
 145
 146 /* 0 = Dynamic allocation of the major device number */
 147 #define TLCLK_MAJOR 0
 148
 149 /* sysfs interface definition:
 150 Upon loading the driver will create a sysfs directory under
 151 /sys/devices/platform/telco_clock.
 152
 153 This directory exports the following interfaces.  There operation is
 154 documented in the MCPBL0010 TPS under the Telecom Clock API section, 11.4.
 155 alarms                          :
 156 current_ref                     :
 157 received_ref_clk3a              :
 158 received_ref_clk3b              :
 159 enable_clk3a_output             :
 160 enable_clk3b_output             :
 161 enable_clka0_output             :
 162 enable_clka1_output             :
 163 enable_clkb0_output             :
 164 enable_clkb1_output             :
 165 filter_select                   :
 166 hardware_switching              :
 167 hardware_switching_mode         :
 168 telclock_version                :
 169 mode_select                     :
 170 refalign                        :
 171 reset                           :
 172 select_amcb1_transmit_clock     :
 173 select_amcb2_transmit_clock     :
 174 select_redundant_clock          :
 175 select_ref_frequency            :
 176
 177 All sysfs interfaces are integers in hex format, i.e echo 99 > refalign
 178 has the same effect as echo 0x99 > refalign.
 179 */
 180
 181 static unsigned int telclk_interrupt;
 182
 183 static int int_events;          /* Event that generate a interrupt */
 184 static int got_event;           /* if events processing have been done */
 185
 186 static void switchover_timeout(unsigned long data);
 187 static struct timer_list switchover_timer =
 188         TIMER_INITIALIZER(switchover_timeout , 0, 0);
 189 static unsigned long tlclk_timer_data;
 190
 191 static struct tlclk_alarms *alarm_events;
 192
 193 static DEFINE_SPINLOCK(event_lock);
 194
 195 static int tlclk_major = TLCLK_MAJOR;
 196
 197 static irqreturn_t tlclk_interrupt(int irq, void *dev_id);
 198
 199 static DECLARE_WAIT_QUEUE_HEAD(wq);
 200
 201 static unsigned long useflags;
 202 static DEFINE_MUTEX(tlclk_mutex);
 203
 204 static int tlclk_open(struct inode *inode, struct file *filp)
 205 {
 206         int result;
 207
 208         if (test_and_set_bit(0, &useflags))
 209                 return -EBUSY;
 210                 /* this legacy device is always one per system and it doesn't
 211                  * know how to handle multiple concurrent clients.
 212                  */
 213
 214         /* Make sure there is no interrupt pending while
 215          * initialising interrupt handler */
 216         inb(TLCLK_REG6);
 217
 218         /* This device is wired through the FPGA IO space of the ATCA blade
 219          * we can't share this IRQ */
 220         result = request_irq(telclk_interrupt, &tlclk_interrupt,
 221                              IRQF_DISABLED, "telco_clock", tlclk_interrupt);
 222         if (result == -EBUSY) {
 223                 printk(KERN_ERR "tlclk: Interrupt can't be reserved.\n");
 224                 return -EBUSY;
 225         }
 226         inb(TLCLK_REG6);        /* Clear interrupt events */
 227
 228         return 0;
 229 }
 230
 231 static int tlclk_release(struct inode *inode, struct file *filp)
 232 {
 233         free_irq(telclk_interrupt, tlclk_interrupt);
 234         clear_bit(0, &useflags);
 235
 236         return 0;
 237 }
 238
 239 static ssize_t tlclk_read(struct file *filp, char __user *buf, size_t count,
 240                 loff_t *f_pos)
 241 {
 242         if (count < sizeof(struct tlclk_alarms))
 243                 return -EIO;
 244         if (mutex_lock_interruptible(&tlclk_mutex))
 245                 return -EINTR;
 246
 247
 248         wait_event_interruptible(wq, got_event);
 249         if (copy_to_user(buf, alarm_events, sizeof(struct tlclk_alarms))) {
 250                 mutex_unlock(&tlclk_mutex);
 251                 return -EFAULT;
 252         }
 253
 254         memset(alarm_events, 0, sizeof(struct tlclk_alarms));
 255         got_event = 0;
 256
 257         mutex_unlock(&tlclk_mutex);
 258         return  sizeof(struct tlclk_alarms);
 259 }
 260
 261 static const struct file_operations tlclk_fops = {
 262         .read = tlclk_read,
 263         .open = tlclk_open,
 264         .release = tlclk_release,
 265
 266 };
 267
 268 static struct miscdevice tlclk_miscdev = {
 269         .minor = MISC_DYNAMIC_MINOR,
 270         .name = "telco_clock",
 271         .fops = &tlclk_fops,
 272 };
 273
 274 static ssize_t show_current_ref(struct device *d,
 275                 struct device_attribute *attr, char *buf)
 276 {
 277         unsigned long ret_val;
 278         unsigned long flags;
 279
 280         spin_lock_irqsave(&event_lock, flags);
 281         ret_val = ((inb(TLCLK_REG1) & 0x08) >> 3);
 282         spin_unlock_irqrestore(&event_lock, flags);
 283
 284         return sprintf(buf, "0x%lX\n", ret_val);
 285 }
 286
 287 static DEVICE_ATTR(current_ref, S_IRUGO, show_current_ref, NULL);
 288
 289
 290 static ssize_t show_telclock_version(struct device *d,
 291                 struct device_attribute *attr, char *buf)
 292 {
 293         unsigned long ret_val;
 294         unsigned long flags;
 295
 296         spin_lock_irqsave(&event_lock, flags);
 297         ret_val = inb(TLCLK_REG5);
 298         spin_unlock_irqrestore(&event_lock, flags);
 299
 300         return sprintf(buf, "0x%lX\n", ret_val);
 301 }
 302
 303 static DEVICE_ATTR(telclock_version, S_IRUGO,
 304                 show_telclock_version, NULL);
 305
 306 static ssize_t show_alarms(struct device *d,
 307                 struct device_attribute *attr,  char *buf)
 308 {
 309         unsigned long ret_val;
 310         unsigned long flags;
 311
 312         spin_lock_irqsave(&event_lock, flags);
 313         ret_val = (inb(TLCLK_REG2) & 0xf0);
 314         spin_unlock_irqrestore(&event_lock, flags);
 315
 316         return sprintf(buf, "0x%lX\n", ret_val);
 317 }
 318
 319 static DEVICE_ATTR(alarms, S_IRUGO, show_alarms, NULL);
 320
 321 static ssize_t store_received_ref_clk3a(struct device *d,
 322                  struct device_attribute *attr, const char *buf, size_t count)
 323 {
 324         unsigned long tmp;
 325         unsigned char val;
 326         unsigned long flags;
 327
 328         sscanf(buf, "%lX", &tmp);
 329         dev_dbg(d, ": tmp = 0x%lX\n", tmp);
 330
 331         val = (unsigned char)tmp;
 332         spin_lock_irqsave(&event_lock, flags);
 333         SET_PORT_BITS(TLCLK_REG1, 0xef, val);
 334         spin_unlock_irqrestore(&event_lock, flags);
 335
 336         return strnlen(buf, count);
 337 }
 338
 339 static DEVICE_ATTR(received_ref_clk3a, (S_IWUSR|S_IWGRP), NULL,
 340                 store_received_ref_clk3a);
 341
 342
 343 static ssize_t store_received_ref_clk3b(struct device *d,
 344                  struct device_attribute *attr, const char *buf, size_t count)
 345 {
 346         unsigned long tmp;
 347         unsigned char val;
 348         unsigned long flags;
 349
 350         sscanf(buf, "%lX", &tmp);
 351         dev_dbg(d, ": tmp = 0x%lX\n", tmp);
 352
 353         val = (unsigned char)tmp;
 354         spin_lock_irqsave(&event_lock, flags);
 355         SET_PORT_BITS(TLCLK_REG1, 0xdf, val << 1);
 356         spin_unlock_irqrestore(&event_lock, flags);
 357
 358         return strnlen(buf, count);
 359 }
 360
 361 static DEVICE_ATTR(received_ref_clk3b, (S_IWUSR|S_IWGRP), NULL,
 362                 store_received_ref_clk3b);
 363
 364
 365 static ssize_t store_enable_clk3b_output(struct device *d,
 366                  struct device_attribute *attr, const char *buf, size_t count)
 367 {
 368         unsigned long tmp;
 369         unsigned char val;
 370         unsigned long flags;
 371
 372         sscanf(buf, "%lX", &tmp);
 373         dev_dbg(d, ": tmp = 0x%lX\n", tmp);
 374
 375         val = (unsigned char)tmp;
 376         spin_lock_irqsave(&event_lock, flags);
 377         SET_PORT_BITS(TLCLK_REG3, 0x7f, val << 7);
 378         spin_unlock_irqrestore(&event_lock, flags);
 379
 380         return strnlen(buf, count);
 381 }
 382
 383 static DEVICE_ATTR(enable_clk3b_output, (S_IWUSR|S_IWGRP), NULL,
 384                 store_enable_clk3b_output);
 385
 386 static ssize_t store_enable_clk3a_output(struct device *d,
 387                  struct device_attribute *attr, const char *buf, size_t count)
 388 {
 389         unsigned long flags;
 390         unsigned long tmp;
 391         unsigned char val;
 392
 393         sscanf(buf, "%lX", &tmp);
 394         dev_dbg(d, "tmp = 0x%lX\n", tmp);
 395
 396         val = (unsigned char)tmp;
 397         spin_lock_irqsave(&event_lock, flags);
 398         SET_PORT_BITS(TLCLK_REG3, 0xbf, val << 6);
 399         spin_unlock_irqrestore(&event_lock, flags);
 400
 401         return strnlen(buf, count);
 402 }
 403
 404 static DEVICE_ATTR(enable_clk3a_output, (S_IWUSR|S_IWGRP), NULL,
 405                 store_enable_clk3a_output);
 406
 407 static ssize_t store_enable_clkb1_output(struct device *d,
 408                  struct device_attribute *attr, const char *buf, size_t count)
 409 {
 410         unsigned long flags;
 411         unsigned long tmp;
 412         unsigned char val;
 413
 414         sscanf(buf, "%lX", &tmp);
 415         dev_dbg(d, "tmp = 0x%lX\n", tmp);
 416
 417         val = (unsigned char)tmp;
 418         spin_lock_irqsave(&event_lock, flags);
 419         SET_PORT_BITS(TLCLK_REG2, 0xf7, val << 3);
 420         spin_unlock_irqrestore(&event_lock, flags);
 421
 422         return strnlen(buf, count);
 423 }
 424
 425 static DEVICE_ATTR(enable_clkb1_output, (S_IWUSR|S_IWGRP), NULL,
 426                 store_enable_clkb1_output);
 427
 428
 429 static ssize_t store_enable_clka1_output(struct device *d,
 430                  struct device_attribute *attr, const char *buf, size_t count)
 431 {
 432         unsigned long flags;
 433         unsigned long tmp;
 434         unsigned char val;
 435
 436         sscanf(buf, "%lX", &tmp);
 437         dev_dbg(d, "tmp = 0x%lX\n", tmp);
 438
 439         val = (unsigned char)tmp;
 440         spin_lock_irqsave(&event_lock, flags);
 441         SET_PORT_BITS(TLCLK_REG2, 0xfb, val << 2);
 442         spin_unlock_irqrestore(&event_lock, flags);
 443
 444         return strnlen(buf, count);
 445 }
 446
 447 static DEVICE_ATTR(enable_clka1_output, (S_IWUSR|S_IWGRP), NULL,
 448                 store_enable_clka1_output);
 449
 450 static ssize_t store_enable_clkb0_output(struct device *d,
 451                  struct device_attribute *attr, const char *buf, size_t count)
 452 {
 453         unsigned long flags;
 454         unsigned long tmp;
 455         unsigned char val;
 456
 457         sscanf(buf, "%lX", &tmp);
 458         dev_dbg(d, "tmp = 0x%lX\n", tmp);
 459
 460         val = (unsigned char)tmp;
 461         spin_lock_irqsave(&event_lock, flags);
 462         SET_PORT_BITS(TLCLK_REG2, 0xfd, val << 1);
 463         spin_unlock_irqrestore(&event_lock, flags);
 464
 465         return strnlen(buf, count);
 466 }
 467
 468 static DEVICE_ATTR(enable_clkb0_output, (S_IWUSR|S_IWGRP), NULL,
 469                 store_enable_clkb0_output);
 470
 471 static ssize_t store_enable_clka0_output(struct device *d,
 472                  struct device_attribute *attr, const char *buf, size_t count)
 473 {
 474         unsigned long flags;
 475         unsigned long tmp;
 476         unsigned char val;
 477
 478         sscanf(buf, "%lX", &tmp);
 479         dev_dbg(d, "tmp = 0x%lX\n", tmp);
 480
 481         val = (unsigned char)tmp;
 482         spin_lock_irqsave(&event_lock, flags);
 483         SET_PORT_BITS(TLCLK_REG2, 0xfe, val);
 484         spin_unlock_irqrestore(&event_lock, flags);
 485
 486         return strnlen(buf, count);
 487 }
 488
 489 static DEVICE_ATTR(enable_clka0_output, (S_IWUSR|S_IWGRP), NULL,
 490                 store_enable_clka0_output);
 491
 492 static ssize_t store_select_amcb2_transmit_clock(struct device *d,
 493                 struct device_attribute *attr, const char *buf, size_t count)
 494 {
 495         unsigned long flags;
 496         unsigned long tmp;
 497         unsigned char val;
 498
 499         sscanf(buf, "%lX", &tmp);
 500         dev_dbg(d, "tmp = 0x%lX\n", tmp);
 501
 502         val = (unsigned char)tmp;
 503         spin_lock_irqsave(&event_lock, flags);
 504                 if ((val == CLK_8kHz) || (val == CLK_16_384MHz)) {
 505                         SET_PORT_BITS(TLCLK_REG3, 0xc7, 0x28);
 506                         SET_PORT_BITS(TLCLK_REG1, 0xfb, ~val);
 507                 } else if (val >= CLK_8_592MHz) {
 508                         SET_PORT_BITS(TLCLK_REG3, 0xc7, 0x38);
 509                         switch (val) {
 510                         case CLK_8_592MHz:
 511                                 SET_PORT_BITS(TLCLK_REG0, 0xfc, 2);
 512                                 break;
 513                         case CLK_11_184MHz:
 514                                 SET_PORT_BITS(TLCLK_REG0, 0xfc, 0);
 515                                 break;
 516                         case CLK_34_368MHz:
 517                                 SET_PORT_BITS(TLCLK_REG0, 0xfc, 3);
 518                                 break;
 519                         case CLK_44_736MHz:
 520                                 SET_PORT_BITS(TLCLK_REG0, 0xfc, 1);
 521                                 break;
 522                         }
 523                 } else
 524                         SET_PORT_BITS(TLCLK_REG3, 0xc7, val << 3);
 525
 526         spin_unlock_irqrestore(&event_lock, flags);
 527
 528         return strnlen(buf, count);
 529 }
 530
 531 static DEVICE_ATTR(select_amcb2_transmit_clock, (S_IWUSR|S_IWGRP), NULL,
 532         store_select_amcb2_transmit_clock);
 533
 534 static ssize_t store_select_amcb1_transmit_clock(struct device *d,
 535                  struct device_attribute *attr, const char *buf, size_t count)
 536 {
 537         unsigned long tmp;
 538         unsigned char val;
 539         unsigned long flags;
 540
 541         sscanf(buf, "%lX", &tmp);
 542         dev_dbg(d, "tmp = 0x%lX\n", tmp);
 543
 544         val = (unsigned char)tmp;
 545         spin_lock_irqsave(&event_lock, flags);
 546                 if ((val == CLK_8kHz) || (val == CLK_16_384MHz)) {
 547                         SET_PORT_BITS(TLCLK_REG3, 0xf8, 0x5);
 548                         SET_PORT_BITS(TLCLK_REG1, 0xfb, ~val);
 549                 } else if (val >= CLK_8_592MHz) {
 550                         SET_PORT_BITS(TLCLK_REG3, 0xf8, 0x7);
 551                         switch (val) {
 552                         case CLK_8_592MHz:
 553                                 SET_PORT_BITS(TLCLK_REG0, 0xfc, 2);
 554                                 break;
 555                         case CLK_11_184MHz:
 556                                 SET_PORT_BITS(TLCLK_REG0, 0xfc, 0);
 557                                 break;
 558                         case CLK_34_368MHz:
 559                                 SET_PORT_BITS(TLCLK_REG0, 0xfc, 3);
 560                                 break;
 561                         case CLK_44_736MHz:
 562                                 SET_PORT_BITS(TLCLK_REG0, 0xfc, 1);
 563                                 break;
 564                         }
 565                 } else
 566                         SET_PORT_BITS(TLCLK_REG3, 0xf8, val);
 567         spin_unlock_irqrestore(&event_lock, flags);
 568
 569         return strnlen(buf, count);
 570 }
 571
 572 static DEVICE_ATTR(select_amcb1_transmit_clock, (S_IWUSR|S_IWGRP), NULL,
 573                 store_select_amcb1_transmit_clock);
 574
 575 static ssize_t store_select_redundant_clock(struct device *d,
 576                  struct device_attribute *attr, const char *buf, size_t count)
 577 {
 578         unsigned long tmp;
 579         unsigned char val;
 580         unsigned long flags;
 581
 582         sscanf(buf, "%lX", &tmp);
 583         dev_dbg(d, "tmp = 0x%lX\n", tmp);
 584
 585         val = (unsigned char)tmp;
 586         spin_lock_irqsave(&event_lock, flags);
 587         SET_PORT_BITS(TLCLK_REG1, 0xfe, val);
 588         spin_unlock_irqrestore(&event_lock, flags);
 589
 590         return strnlen(buf, count);
 591 }
 592
 593 static DEVICE_ATTR(select_redundant_clock, (S_IWUSR|S_IWGRP), NULL,
 594                 store_select_redundant_clock);
 595
 596 static ssize_t store_select_ref_frequency(struct device *d,
 597                  struct device_attribute *attr, const char *buf, size_t count)
 598 {
 599         unsigned long tmp;
 600         unsigned char val;
 601         unsigned long flags;
 602
 603         sscanf(buf, "%lX", &tmp);
 604         dev_dbg(d, "tmp = 0x%lX\n", tmp);
 605
 606         val = (unsigned char)tmp;
 607         spin_lock_irqsave(&event_lock, flags);
 608         SET_PORT_BITS(TLCLK_REG1, 0xfd, val);
 609         spin_unlock_irqrestore(&event_lock, flags);
 610
 611         return strnlen(buf, count);
 612 }
 613
 614 static DEVICE_ATTR(select_ref_frequency, (S_IWUSR|S_IWGRP), NULL,
 615                 store_select_ref_frequency);
 616
 617 static ssize_t store_filter_select(struct device *d,
 618                  struct device_attribute *attr, const char *buf, size_t count)
 619 {
 620         unsigned long tmp;
 621         unsigned char val;
 622         unsigned long flags;
 623
 624         sscanf(buf, "%lX", &tmp);
 625         dev_dbg(d, "tmp = 0x%lX\n", tmp);
 626
 627         val = (unsigned char)tmp;
 628         spin_lock_irqsave(&event_lock, flags);
 629         SET_PORT_BITS(TLCLK_REG0, 0xfb, val);
 630         spin_unlock_irqrestore(&event_lock, flags);
 631
 632         return strnlen(buf, count);
 633 }
 634
 635 static DEVICE_ATTR(filter_select, (S_IWUSR|S_IWGRP), NULL, store_filter_select);
 636
 637 static ssize_t store_hardware_switching_mode(struct device *d,
 638                  struct device_attribute *attr, const char *buf, size_t count)
 639 {
 640         unsigned long tmp;
 641         unsigned char val;
 642         unsigned long flags;
 643
 644         sscanf(buf, "%lX", &tmp);
 645         dev_dbg(d, "tmp = 0x%lX\n", tmp);
 646
 647         val = (unsigned char)tmp;
 648         spin_lock_irqsave(&event_lock, flags);
 649         SET_PORT_BITS(TLCLK_REG0, 0xbf, val);
 650         spin_unlock_irqrestore(&event_lock, flags);
 651
 652         return strnlen(buf, count);
 653 }
 654
 655 static DEVICE_ATTR(hardware_switching_mode, (S_IWUSR|S_IWGRP), NULL,
 656                 store_hardware_switching_mode);
 657
 658 static ssize_t store_hardware_switching(struct device *d,
 659                  struct device_attribute *attr, const char *buf, size_t count)
 660 {
 661         unsigned long tmp;
 662         unsigned char val;
 663         unsigned long flags;
 664
 665         sscanf(buf, "%lX", &tmp);
 666         dev_dbg(d, "tmp = 0x%lX\n", tmp);
 667
 668         val = (unsigned char)tmp;
 669         spin_lock_irqsave(&event_lock, flags);
 670         SET_PORT_BITS(TLCLK_REG0, 0x7f, val);
 671         spin_unlock_irqrestore(&event_lock, flags);
 672
 673         return strnlen(buf, count);
 674 }
 675
 676 static DEVICE_ATTR(hardware_switching, (S_IWUSR|S_IWGRP), NULL,
 677                 store_hardware_switching);
 678
 679 static ssize_t store_refalign (struct device *d,
 680                  struct device_attribute *attr, const char *buf, size_t count)
 681 {
 682         unsigned long tmp;
 683         unsigned long flags;
 684
 685         sscanf(buf, "%lX", &tmp);
 686         dev_dbg(d, "tmp = 0x%lX\n", tmp);
 687         spin_lock_irqsave(&event_lock, flags);
 688         SET_PORT_BITS(TLCLK_REG0, 0xf7, 0);
 689         SET_PORT_BITS(TLCLK_REG0, 0xf7, 0x08);
 690         SET_PORT_BITS(TLCLK_REG0, 0xf7, 0);
 691         spin_unlock_irqrestore(&event_lock, flags);
 692
 693         return strnlen(buf, count);
 694 }
 695
 696 static DEVICE_ATTR(refalign, (S_IWUSR|S_IWGRP), NULL, store_refalign);
 697
 698 static ssize_t store_mode_select (struct device *d,
 699                  struct device_attribute *attr, const char *buf, size_t count)
 700 {
 701         unsigned long tmp;
 702         unsigned char val;
 703         unsigned long flags;
 704
 705         sscanf(buf, "%lX", &tmp);
 706         dev_dbg(d, "tmp = 0x%lX\n", tmp);
 707
 708         val = (unsigned char)tmp;
 709         spin_lock_irqsave(&event_lock, flags);
 710         SET_PORT_BITS(TLCLK_REG0, 0xcf, val);
 711         spin_unlock_irqrestore(&event_lock, flags);
 712
 713         return strnlen(buf, count);
 714 }
 715
 716 static DEVICE_ATTR(mode_select, (S_IWUSR|S_IWGRP), NULL, store_mode_select);
 717
 718 static ssize_t store_reset (struct device *d,
 719                  struct device_attribute *attr, const char *buf, size_t count)
 720 {
 721         unsigned long tmp;
 722         unsigned char val;
 723         unsigned long flags;
 724
 725         sscanf(buf, "%lX", &tmp);
 726         dev_dbg(d, "tmp = 0x%lX\n", tmp);
 727
 728         val = (unsigned char)tmp;
 729         spin_lock_irqsave(&event_lock, flags);
 730         SET_PORT_BITS(TLCLK_REG4, 0xfd, val);
 731         spin_unlock_irqrestore(&event_lock, flags);
 732
 733         return strnlen(buf, count);
 734 }
 735
 736 static DEVICE_ATTR(reset, (S_IWUSR|S_IWGRP), NULL, store_reset);
 737
 738 static struct attribute *tlclk_sysfs_entries[] = {
 739         &dev_attr_current_ref.attr,
 740         &dev_attr_telclock_version.attr,
 741         &dev_attr_alarms.attr,
 742         &dev_attr_received_ref_clk3a.attr,
 743         &dev_attr_received_ref_clk3b.attr,
 744         &dev_attr_enable_clk3a_output.attr,
 745         &dev_attr_enable_clk3b_output.attr,
 746         &dev_attr_enable_clkb1_output.attr,
 747         &dev_attr_enable_clka1_output.attr,
 748         &dev_attr_enable_clkb0_output.attr,
 749         &dev_attr_enable_clka0_output.attr,
 750         &dev_attr_select_amcb1_transmit_clock.attr,
 751         &dev_attr_select_amcb2_transmit_clock.attr,
 752         &dev_attr_select_redundant_clock.attr,
 753         &dev_attr_select_ref_frequency.attr,
 754         &dev_attr_filter_select.attr,
 755         &dev_attr_hardware_switching_mode.attr,
 756         &dev_attr_hardware_switching.attr,
 757         &dev_attr_refalign.attr,
 758         &dev_attr_mode_select.attr,
 759         &dev_attr_reset.attr,
 760         NULL
 761 };
 762
 763 static struct attribute_group tlclk_attribute_group = {
 764         .name = NULL,           /* put in device directory */
 765         .attrs = tlclk_sysfs_entries,
 766 };
 767
 768 static struct platform_device *tlclk_device;
 769
 770 static int __init tlclk_init(void)
 771 {
 772         int ret;
 773
 774         ret = register_chrdev(tlclk_major, "telco_clock", &tlclk_fops);
 775         if (ret < 0) {
 776                 printk(KERN_ERR "tlclk: can't get major %d.\n", tlclk_major);
 777                 return ret;
 778         }
 779         tlclk_major = ret;
 780         alarm_events = kzalloc( sizeof(struct tlclk_alarms), GFP_KERNEL);
 781         if (!alarm_events)
 782                 goto out1;
 783
 784         /* Read telecom clock IRQ number (Set by BIOS) */
 785         if (!request_region(TLCLK_BASE, 8, "telco_clock")) {
 786                 printk(KERN_ERR "tlclk: request_region 0x%X failed.\n",
 787                         TLCLK_BASE);
 788                 ret = -EBUSY;
 789                 goto out2;
 790         }
 791         telclk_interrupt = (inb(TLCLK_REG7) & 0x0f);
 792
 793         if (0x0F == telclk_interrupt ) { /* not MCPBL0010 ? */
 794                 printk(KERN_ERR "telclk_interrup = 0x%x non-mcpbl0010 hw.\n",
 795                         telclk_interrupt);
 796                 ret = -ENXIO;
 797                 goto out3;
 798         }
 799
 800         init_timer(&switchover_timer);
 801
 802         ret = misc_register(&tlclk_miscdev);
 803         if (ret < 0) {
 804                 printk(KERN_ERR "tlclk: misc_register returns %d.\n", ret);
 805                 goto out3;
 806         }
 807
 808         tlclk_device = platform_device_register_simple("telco_clock",
 809                                 -1, NULL, 0);
 810         if (IS_ERR(tlclk_device)) {
 811                 printk(KERN_ERR "tlclk: platform_device_register failed.\n");
 812                 ret = PTR_ERR(tlclk_device);
 813                 goto out4;
 814         }
 815
 816         ret = sysfs_create_group(&tlclk_device->dev.kobj,
 817                         &tlclk_attribute_group);
 818         if (ret) {
 819                 printk(KERN_ERR "tlclk: failed to create sysfs device attributes.\n");
 820                 goto out5;
 821         }
 822
 823         return 0;
 824 out5:
 825         platform_device_unregister(tlclk_device);
 826 out4:
 827         misc_deregister(&tlclk_miscdev);
 828 out3:
 829         release_region(TLCLK_BASE, 8);
 830 out2:
 831         kfree(alarm_events);
 832 out1:
 833         unregister_chrdev(tlclk_major, "telco_clock");
 834         return ret;
 835 }
 836
 837 static void __exit tlclk_cleanup(void)
 838 {
 839         sysfs_remove_group(&tlclk_device->dev.kobj, &tlclk_attribute_group);
 840         platform_device_unregister(tlclk_device);
 841         misc_deregister(&tlclk_miscdev);
 842         unregister_chrdev(tlclk_major, "telco_clock");
 843
 844         release_region(TLCLK_BASE, 8);
 845         del_timer_sync(&switchover_timer);
 846         kfree(alarm_events);
 847
 848 }
 849
 850 static void switchover_timeout(unsigned long data)
 851 {
 852         unsigned long flags = *(unsigned long *) data;
 853
 854         if ((flags & 1)) {
 855                 if ((inb(TLCLK_REG1) & 0x08) != (flags & 0x08))
 856                         alarm_events->switchover_primary++;
 857         } else {
 858                 if ((inb(TLCLK_REG1) & 0x08) != (flags & 0x08))
 859                         alarm_events->switchover_secondary++;
 860         }
 861
 862         /* Alarm processing is done, wake up read task */
 863         del_timer(&switchover_timer);
 864         got_event = 1;
 865         wake_up(&wq);
 866 }
 867
 868 static irqreturn_t tlclk_interrupt(int irq, void *dev_id)
 869 {
 870         unsigned long flags;
 871
 872         spin_lock_irqsave(&event_lock, flags);
 873         /* Read and clear interrupt events */
 874         int_events = inb(TLCLK_REG6);
 875
 876         /* Primary_Los changed from 0 to 1 ? */
 877         if (int_events & PRI_LOS_01_MASK) {
 878                 if (inb(TLCLK_REG2) & SEC_LOST_MASK)
 879                         alarm_events->lost_clocks++;
 880                 else
 881                         alarm_events->lost_primary_clock++;
 882         }
 883
 884         /* Primary_Los changed from 1 to 0 ? */
 885         if (int_events & PRI_LOS_10_MASK) {
 886                 alarm_events->primary_clock_back++;
 887                 SET_PORT_BITS(TLCLK_REG1, 0xFE, 1);
 888         }
 889         /* Secondary_Los changed from 0 to 1 ? */
 890         if (int_events & SEC_LOS_01_MASK) {
 891                 if (inb(TLCLK_REG2) & PRI_LOST_MASK)
 892                         alarm_events->lost_clocks++;
 893                 else
 894                         alarm_events->lost_secondary_clock++;
 895         }
 896         /* Secondary_Los changed from 1 to 0 ? */
 897         if (int_events & SEC_LOS_10_MASK) {
 898                 alarm_events->secondary_clock_back++;
 899                 SET_PORT_BITS(TLCLK_REG1, 0xFE, 0);
 900         }
 901         if (int_events & HOLDOVER_10_MASK)
 902                 alarm_events->pll_end_holdover++;
 903
 904         if (int_events & UNLOCK_01_MASK)
 905                 alarm_events->pll_lost_sync++;
 906
 907         if (int_events & UNLOCK_10_MASK)
 908                 alarm_events->pll_sync++;
 909
 910         /* Holdover changed from 0 to 1 ? */
 911         if (int_events & HOLDOVER_01_MASK) {
 912                 alarm_events->pll_holdover++;
 913
 914                 /* TIMEOUT in ~10ms */
 915                 switchover_timer.expires = jiffies + msecs_to_jiffies(10);
 916                 tlclk_timer_data = inb(TLCLK_REG1);
 917                 switchover_timer.data = (unsigned long) &tlclk_timer_data;
 918                 mod_timer(&switchover_timer, switchover_timer.expires);
 919         } else {
 920                 got_event = 1;
 921                 wake_up(&wq);
 922         }
 923         spin_unlock_irqrestore(&event_lock, flags);
 924
 925         return IRQ_HANDLED;
 926 }
 927
 928 module_init(tlclk_init);
 929 module_exit(tlclk_cleanup);