drivers/i2c/busses/i2c-mpc.c

   1 /*
   2  * (C) Copyright 2003-2004
   3  * Humboldt Solutions Ltd, adrian@humboldt.co.uk.
   4
   5  * This is a combined i2c adapter and algorithm driver for the
   6  * MPC107/Tsi107 PowerPC northbridge and processors that include
   7  * the same I2C unit (8240, 8245, 85xx).
   8  *
   9  * Release 0.6
  10  *
  11  * This file is licensed under the terms of the GNU General Public
  12  * License version 2. This program is licensed "as is" without any
  13  * warranty of any kind, whether express or implied.
  14  */
  15
  16 #include <linux/config.h>
  17 #include <linux/kernel.h>
  18 #include <linux/module.h>
  19 #include <linux/sched.h>
  20 #include <linux/init.h>
  21 #include <linux/pci.h>
  22 #include <asm/io.h>
  23 #include <asm/ocp.h>
  24 #include <linux/i2c.h>
  25 #include <linux/interrupt.h>
  26
  27 #define MPC_I2C_ADDR  0x00
  28 #define MPC_I2C_FDR     0x04
  29 #define MPC_I2C_CR      0x08
  30 #define MPC_I2C_SR      0x0c
  31 #define MPC_I2C_DR      0x10
  32 #define MPC_I2C_DFSRR 0x14
  33 #define MPC_I2C_REGION 0x20
  34
  35 #define CCR_MEN  0x80
  36 #define CCR_MIEN 0x40
  37 #define CCR_MSTA 0x20
  38 #define CCR_MTX  0x10
  39 #define CCR_TXAK 0x08
  40 #define CCR_RSTA 0x04
  41
  42 #define CSR_MCF  0x80
  43 #define CSR_MAAS 0x40
  44 #define CSR_MBB  0x20
  45 #define CSR_MAL  0x10
  46 #define CSR_SRW  0x04
  47 #define CSR_MIF  0x02
  48 #define CSR_RXAK 0x01
  49
  50 struct mpc_i2c {
  51         char *base;
  52         struct ocp_def *ocpdef;
  53         u32 interrupt;
  54         wait_queue_head_t queue;
  55         struct i2c_adapter adap;
  56 };
  57
  58 static __inline__ void writeccr(struct mpc_i2c *i2c, u32 x)
  59 {
  60         writeb(x, i2c->base + MPC_I2C_CR);
  61 }
  62
  63 static irqreturn_t mpc_i2c_isr(int irq, void *dev_id, struct pt_regs *regs)
  64 {
  65         struct mpc_i2c *i2c = dev_id;
  66         if (readb(i2c->base + MPC_I2C_SR) & CSR_MIF) {
  67                 /* Read again to allow register to stabilise */
  68                 i2c->interrupt = readb(i2c->base + MPC_I2C_SR);
  69                 writeb(0, i2c->base + MPC_I2C_SR);
  70                 wake_up_interruptible(&i2c->queue);
  71         }
  72         return IRQ_HANDLED;
  73 }
  74
  75 static int i2c_wait(struct mpc_i2c *i2c, unsigned timeout, int writing)
  76 {
  77         DECLARE_WAITQUEUE(wait, current);
  78         unsigned long orig_jiffies = jiffies;
  79         u32 x;
  80         int result = 0;
  81
  82         if (i2c->ocpdef->irq == OCP_IRQ_NA) {
  83                 while (!(readb(i2c->base + MPC_I2C_SR) & CSR_MIF)) {
  84                         schedule();
  85                         if (time_after(jiffies, orig_jiffies + timeout)) {
  86                                 pr_debug("I2C: timeout\n");
  87                                 result = -EIO;
  88                                 break;
  89                         }
  90                 }
  91                 x = readb(i2c->base + MPC_I2C_SR);
  92                 writeb(0, i2c->base + MPC_I2C_SR);
  93         } else {
  94                 add_wait_queue(&i2c->queue, &wait);
  95                 while (!(i2c->interrupt & CSR_MIF)) {
  96                         set_current_state(TASK_INTERRUPTIBLE);
  97                         if (signal_pending(current)) {
  98                                 pr_debug("I2C: Interrupted\n");
  99                                 result = -EINTR;
 100                                 break;
 101                         }
 102                         if (time_after(jiffies, orig_jiffies + timeout)) {
 103                                 pr_debug("I2C: timeout\n");
 104                                 result = -EIO;
 105                                 break;
 106                         }
 107                         schedule_timeout(timeout);
 108                 }
 109                 current->state = TASK_RUNNING;
 110                 remove_wait_queue(&i2c->queue, &wait);
 111                 x = i2c->interrupt;
 112                 i2c->interrupt = 0;
 113         }
 114
 115         if (result < -0)
 116                 return result;
 117
 118         if (!(x & CSR_MCF)) {
 119                 pr_debug("I2C: unfinished\n");
 120                 return -EIO;
 121         }
 122
 123         if (x & CSR_MAL) {
 124                 pr_debug("I2C: MAL\n");
 125                 return -EIO;
 126         }
 127
 128         if (writing && (x & CSR_RXAK)) {
 129                 pr_debug("I2C: No RXAK\n");
 130                 /* generate stop */
 131                 writeccr(i2c, CCR_MEN);
 132                 return -EIO;
 133         }
 134         return 0;
 135 }
 136
 137 static void mpc_i2c_setclock(struct mpc_i2c *i2c)
 138 {
 139         struct ocp_fs_i2c_data *i2c_data = i2c->ocpdef->additions;
 140         /* Set clock and filters */
 141         if (i2c_data && (i2c_data->flags & FS_I2C_SEPARATE_DFSRR)) {
 142                 writeb(0x31, i2c->base + MPC_I2C_FDR);
 143                 writeb(0x10, i2c->base + MPC_I2C_DFSRR);
 144         } else if (i2c_data && (i2c_data->flags & FS_I2C_CLOCK_5200))
 145                 writeb(0x3f, i2c->base + MPC_I2C_FDR);
 146         else
 147                 writel(0x1031, i2c->base + MPC_I2C_FDR);
 148 }
 149
 150 static void mpc_i2c_start(struct mpc_i2c *i2c)
 151 {
 152         /* Clear arbitration */
 153         writeb(0, i2c->base + MPC_I2C_SR);
 154         /* Start with MEN */
 155         writeccr(i2c, CCR_MEN);
 156 }
 157
 158 static void mpc_i2c_stop(struct mpc_i2c *i2c)
 159 {
 160         writeccr(i2c, CCR_MEN);
 161 }
 162
 163 static int mpc_write(struct mpc_i2c *i2c, int target,
 164                      const u8 * data, int length, int restart)
 165 {
 166         int i;
 167         unsigned timeout = HZ;
 168         u32 flags = restart ? CCR_RSTA : 0;
 169
 170         /* Start with MEN */
 171         if (!restart)
 172                 writeccr(i2c, CCR_MEN);
 173         /* Start as master */
 174         writeccr(i2c, CCR_MIEN | CCR_MEN | CCR_MSTA | CCR_MTX | flags);
 175         /* Write target byte */
 176         writeb((target << 1), i2c->base + MPC_I2C_DR);
 177
 178         if (i2c_wait(i2c, timeout, 1) < 0)
 179                 return -1;
 180
 181         for (i = 0; i < length; i++) {
 182                 /* Write data byte */
 183                 writeb(data[i], i2c->base + MPC_I2C_DR);
 184
 185                 if (i2c_wait(i2c, timeout, 1) < 0)
 186                         return -1;
 187         }
 188
 189         return 0;
 190 }
 191
 192 static int mpc_read(struct mpc_i2c *i2c, int target,
 193                     u8 * data, int length, int restart)
 194 {
 195         unsigned timeout = HZ;
 196         int i;
 197         u32 flags = restart ? CCR_RSTA : 0;
 198
 199         /* Start with MEN */
 200         if (!restart)
 201                 writeccr(i2c, CCR_MEN);
 202         /* Switch to read - restart */
 203         writeccr(i2c, CCR_MIEN | CCR_MEN | CCR_MSTA | CCR_MTX | flags);
 204         /* Write target address byte - this time with the read flag set */
 205         writeb((target << 1) | 1, i2c->base + MPC_I2C_DR);
 206
 207         if (i2c_wait(i2c, timeout, 1) < 0)
 208                 return -1;
 209
 210         if (length) {
 211                 if (length == 1)
 212                         writeccr(i2c, CCR_MIEN | CCR_MEN | CCR_MSTA | CCR_TXAK);
 213                 else
 214                         writeccr(i2c, CCR_MIEN | CCR_MEN | CCR_MSTA);
 215                 /* Dummy read */
 216                 readb(i2c->base + MPC_I2C_DR);
 217         }
 218
 219         for (i = 0; i < length; i++) {
 220                 if (i2c_wait(i2c, timeout, 0) < 0)
 221                         return -1;
 222
 223                 /* Generate txack on next to last byte */
 224                 if (i == length - 2)
 225                         writeccr(i2c, CCR_MIEN | CCR_MEN | CCR_MSTA | CCR_TXAK);
 226                 /* Generate stop on last byte */
 227                 if (i == length - 1)
 228                         writeccr(i2c, CCR_MIEN | CCR_MEN | CCR_TXAK);
 229                 data[i] = readb(i2c->base + MPC_I2C_DR);
 230         }
 231
 232         return length;
 233 }
 234
 235 static int mpc_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], int num)
 236 {
 237         struct i2c_msg *pmsg;
 238         int i;
 239         int ret = 0;
 240         unsigned long orig_jiffies = jiffies;
 241         struct mpc_i2c *i2c = i2c_get_adapdata(adap);
 242
 243         mpc_i2c_start(i2c);
 244
 245         /* Allow bus up to 1s to become not busy */
 246         while (readb(i2c->base + MPC_I2C_SR) & CSR_MBB) {
 247                 if (signal_pending(current)) {
 248                         pr_debug("I2C: Interrupted\n");
 249                         return -EINTR;
 250                 }
 251                 if (time_after(jiffies, orig_jiffies + HZ)) {
 252                         pr_debug("I2C: timeout\n");
 253                         return -EIO;
 254                 }
 255                 schedule();
 256         }
 257
 258         for (i = 0; ret >= 0 && i < num; i++) {
 259                 pmsg = &msgs[i];
 260                 pr_debug("Doing %s %d bytes to 0x%02x - %d of %d messages\n",
 261                          pmsg->flags & I2C_M_RD ? "read" : "write",
 262                          pmsg->len, pmsg->addr, i + 1, num);
 263                 if (pmsg->flags & I2C_M_RD)
 264                         ret =
 265                             mpc_read(i2c, pmsg->addr, pmsg->buf, pmsg->len, i);
 266                 else
 267                         ret =
 268                             mpc_write(i2c, pmsg->addr, pmsg->buf, pmsg->len, i);
 269         }
 270         mpc_i2c_stop(i2c);
 271         return (ret < 0) ? ret : num;
 272 }
 273
 274 static u32 mpc_functionality(struct i2c_adapter *adap)
 275 {
 276         return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
 277 }
 278
 279 static struct i2c_algorithm mpc_algo = {
 280         .name = "MPC algorithm",
 281         .id = I2C_ALGO_MPC107,
 282         .master_xfer = mpc_xfer,
 283         .functionality = mpc_functionality,
 284 };
 285
 286 static struct i2c_adapter mpc_ops = {
 287         .owner = THIS_MODULE,
 288         .name = "MPC adapter",
 289         .id = I2C_ALGO_MPC107 | I2C_HW_MPC107,
 290         .algo = &mpc_algo,
 291         .class = I2C_CLASS_HWMON,
 292         .timeout = 1,
 293         .retries = 1
 294 };
 295
 296 static int __devinit mpc_i2c_probe(struct ocp_device *ocp)
 297 {
 298         int result = 0;
 299         struct mpc_i2c *i2c;
 300
 301         if (!(i2c = kmalloc(sizeof(*i2c), GFP_KERNEL))) {
 302                 return -ENOMEM;
 303         }
 304         i2c->ocpdef = ocp->def;
 305         init_waitqueue_head(&i2c->queue);
 306
 307         if (!request_mem_region(ocp->def->paddr, MPC_I2C_REGION, "i2c-mpc")) {
 308                 printk(KERN_ERR "i2c-mpc - resource unavailable\n");
 309                 return -ENODEV;
 310         }
 311
 312         i2c->base = ioremap(ocp->def->paddr, MPC_I2C_REGION);
 313
 314         if (!i2c->base) {
 315                 printk(KERN_ERR "i2c-mpc - failed to map controller\n");
 316                 result = -ENOMEM;
 317                 goto fail_map;
 318         }
 319
 320         if (ocp->def->irq != OCP_IRQ_NA)
 321                 if ((result = request_irq(ocp->def->irq, mpc_i2c_isr,
 322                                           0, "i2c-mpc", i2c)) < 0) {
 323                         printk(KERN_ERR
 324                                "i2c-mpc - failed to attach interrupt\n");
 325                         goto fail_irq;
 326                 }
 327
 328         i2c->adap = mpc_ops;
 329         i2c_set_adapdata(&i2c->adap, i2c);
 330         if ((result = i2c_add_adapter(&i2c->adap)) < 0) {
 331                 printk(KERN_ERR "i2c-mpc - failed to add adapter\n");
 332                 goto fail_add;
 333         }
 334
 335         mpc_i2c_setclock(i2c);
 336         ocp_set_drvdata(ocp, i2c);
 337         return result;
 338
 339       fail_add:
 340         if (ocp->def->irq != OCP_IRQ_NA)
 341                 free_irq(ocp->def->irq, 0);
 342       fail_irq:
 343         iounmap(i2c->base);
 344       fail_map:
 345         release_mem_region(ocp->def->paddr, MPC_I2C_REGION);
 346         kfree(i2c);
 347         return result;
 348 }
 349 static void __devexit mpc_i2c_remove(struct ocp_device *ocp)
 350 {
 351         struct mpc_i2c *i2c = ocp_get_drvdata(ocp);
 352         ocp_set_drvdata(ocp, NULL);
 353         i2c_del_adapter(&i2c->adap);
 354
 355         if (ocp->def->irq != OCP_IRQ_NA)
 356                 free_irq(i2c->ocpdef->irq, i2c);
 357         iounmap(i2c->base);
 358         release_mem_region(i2c->ocpdef->paddr, MPC_I2C_REGION);
 359         kfree(i2c);
 360 }
 361
 362 static struct ocp_device_id mpc_iic_ids[] __devinitdata = {
 363         {.vendor = OCP_VENDOR_FREESCALE,.function = OCP_FUNC_IIC},
 364         {.vendor = OCP_VENDOR_INVALID}
 365 };
 366
 367 MODULE_DEVICE_TABLE(ocp, mpc_iic_ids);
 368
 369 static struct ocp_driver mpc_iic_driver = {
 370         .name = "iic",
 371         .id_table = mpc_iic_ids,
 372         .probe = mpc_i2c_probe,
 373         .remove = __devexit_p(mpc_i2c_remove)
 374 };
 375
 376 static int __init iic_init(void)
 377 {
 378         return ocp_register_driver(&mpc_iic_driver);
 379 }
 380
 381 static void __exit iic_exit(void)
 382 {
 383         ocp_unregister_driver(&mpc_iic_driver);
 384 }
 385
 386 module_init(iic_init);
 387 module_exit(iic_exit);
 388
 389 MODULE_AUTHOR("Adrian Cox <adrian@humboldt.co.uk>");
 390 MODULE_DESCRIPTION
 391     ("I2C-Bus adapter for MPC107 bridge and MPC824x/85xx/52xx processors");
 392 MODULE_LICENSE("GPL");