drivers/i2c/chips/w83781d.c

   1 /*
   2     w83781d.c - Part of lm_sensors, Linux kernel modules for hardware
   3                 monitoring
   4     Copyright (c) 1998 - 2001  Frodo Looijaard <frodol@dds.nl>,
   5     Philip Edelbrock <phil@netroedge.com>,
   6     and Mark Studebaker <mdsxyz123@yahoo.com>
   7
   8     This program is free software; you can redistribute it and/or modify
   9     it under the terms of the GNU General Public License as published by
  10     the Free Software Foundation; either version 2 of the License, or
  11     (at your option) any later version.
  12
  13     This program is distributed in the hope that it will be useful,
  14     but WITHOUT ANY WARRANTY; without even the implied warranty of
  15     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16     GNU General Public License for more details.
  17
  18     You should have received a copy of the GNU General Public License
  19     along with this program; if not, write to the Free Software
  20     Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  21 */
  22
  23 /*
  24     Supports following chips:
  25
  26     Chip        #vin    #fanin  #pwm    #temp   wchipid vendid  i2c     ISA
  27     as99127f    7       3       0       3       0x31    0x12c3  yes     no
  28     as99127f rev.2 (type_name = as99127f)       0x31    0x5ca3  yes     no
  29     w83781d     7       3       0       3       0x10-1  0x5ca3  yes     yes
  30     w83627hf    9       3       2       3       0x21    0x5ca3  yes     yes(LPC)
  31     w83627thf   9       3       2       3       0x90    0x5ca3  no      yes(LPC)
  32     w83782d     9       3       2-4     3       0x30    0x5ca3  yes     yes
  33     w83783s     5-6     3       2       1-2     0x40    0x5ca3  yes     no
  34     w83697hf    8       2       2       2       0x60    0x5ca3  no      yes(LPC)
  35
  36 */
  37
  38 #include <linux/config.h>
  39 #include <linux/module.h>
  40 #include <linux/init.h>
  41 #include <linux/slab.h>
  42 #include <linux/i2c.h>
  43 #include <linux/i2c-sensor.h>
  44 #include <linux/i2c-vid.h>
  45 #include <asm/io.h>
  46 #include "lm75.h"
  47
  48 /* RT Table support #defined so we can take it out if it gets bothersome */
  49 #define W83781D_RT                      1
  50
  51 /* Addresses to scan */
  52 static unsigned short normal_i2c[] = { I2C_CLIENT_END };
  53 static unsigned short normal_i2c_range[] = { 0x20, 0x2f, I2C_CLIENT_END };
  54 static unsigned int normal_isa[] = { 0x0290, I2C_CLIENT_ISA_END };
  55 static unsigned int normal_isa_range[] = { I2C_CLIENT_ISA_END };
  56
  57 /* Insmod parameters */
  58 SENSORS_INSMOD_6(w83781d, w83782d, w83783s, w83627hf, as99127f, w83697hf);
  59 I2C_CLIENT_MODULE_PARM(force_subclients, "List of subclient addresses: "
  60                     "{bus, clientaddr, subclientaddr1, subclientaddr2}");
  61
  62 static int init = 1;
  63 MODULE_PARM(init, "i");
  64 MODULE_PARM_DESC(init, "Set to zero to bypass chip initialization");
  65
  66 /* Constants specified below */
  67
  68 /* Length of ISA address segment */
  69 #define W83781D_EXTENT                  8
  70
  71 /* Where are the ISA address/data registers relative to the base address */
  72 #define W83781D_ADDR_REG_OFFSET         5
  73 #define W83781D_DATA_REG_OFFSET         6
  74
  75 /* The W83781D registers */
  76 /* The W83782D registers for nr=7,8 are in bank 5 */
  77 #define W83781D_REG_IN_MAX(nr)          ((nr < 7) ? (0x2b + (nr) * 2) : \
  78                                                     (0x554 + (((nr) - 7) * 2)))
  79 #define W83781D_REG_IN_MIN(nr)          ((nr < 7) ? (0x2c + (nr) * 2) : \
  80                                                     (0x555 + (((nr) - 7) * 2)))
  81 #define W83781D_REG_IN(nr)              ((nr < 7) ? (0x20 + (nr)) : \
  82                                                     (0x550 + (nr) - 7))
  83
  84 #define W83781D_REG_FAN_MIN(nr)         (0x3a + (nr))
  85 #define W83781D_REG_FAN(nr)             (0x27 + (nr))
  86
  87 #define W83781D_REG_BANK                0x4E
  88 #define W83781D_REG_TEMP2_CONFIG        0x152
  89 #define W83781D_REG_TEMP3_CONFIG        0x252
  90 #define W83781D_REG_TEMP(nr)            ((nr == 3) ? (0x0250) : \
  91                                         ((nr == 2) ? (0x0150) : \
  92                                                      (0x27)))
  93 #define W83781D_REG_TEMP_HYST(nr)       ((nr == 3) ? (0x253) : \
  94                                         ((nr == 2) ? (0x153) : \
  95                                                      (0x3A)))
  96 #define W83781D_REG_TEMP_OVER(nr)       ((nr == 3) ? (0x255) : \
  97                                         ((nr == 2) ? (0x155) : \
  98                                                      (0x39)))
  99
 100 #define W83781D_REG_CONFIG              0x40
 101 #define W83781D_REG_ALARM1              0x41
 102 #define W83781D_REG_ALARM2              0x42
 103 #define W83781D_REG_ALARM3              0x450   /* not on W83781D */
 104
 105 #define W83781D_REG_IRQ                 0x4C
 106 #define W83781D_REG_BEEP_CONFIG         0x4D
 107 #define W83781D_REG_BEEP_INTS1          0x56
 108 #define W83781D_REG_BEEP_INTS2          0x57
 109 #define W83781D_REG_BEEP_INTS3          0x453   /* not on W83781D */
 110
 111 #define W83781D_REG_VID_FANDIV          0x47
 112
 113 #define W83781D_REG_CHIPID              0x49
 114 #define W83781D_REG_WCHIPID             0x58
 115 #define W83781D_REG_CHIPMAN             0x4F
 116 #define W83781D_REG_PIN                 0x4B
 117
 118 /* 782D/783S only */
 119 #define W83781D_REG_VBAT                0x5D
 120
 121 /* PWM 782D (1-4) and 783S (1-2) only */
 122 #define W83781D_REG_PWM1                0x5B    /* 782d and 783s/627hf datasheets disagree */
 123                                                 /* on which is which; */
 124 #define W83781D_REG_PWM2                0x5A    /* We follow the 782d convention here, */
 125                                                 /* However 782d is probably wrong. */
 126 #define W83781D_REG_PWM3                0x5E
 127 #define W83781D_REG_PWM4                0x5F
 128 #define W83781D_REG_PWMCLK12            0x5C
 129 #define W83781D_REG_PWMCLK34            0x45C
 130 static const u8 regpwm[] = { W83781D_REG_PWM1, W83781D_REG_PWM2,
 131         W83781D_REG_PWM3, W83781D_REG_PWM4
 132 };
 133
 134 #define W83781D_REG_PWM(nr)             (regpwm[(nr) - 1])
 135
 136 #define W83781D_REG_I2C_ADDR            0x48
 137 #define W83781D_REG_I2C_SUBADDR         0x4A
 138
 139 /* The following are undocumented in the data sheets however we
 140    received the information in an email from Winbond tech support */
 141 /* Sensor selection - not on 781d */
 142 #define W83781D_REG_SCFG1               0x5D
 143 static const u8 BIT_SCFG1[] = { 0x02, 0x04, 0x08 };
 144
 145 #define W83781D_REG_SCFG2               0x59
 146 static const u8 BIT_SCFG2[] = { 0x10, 0x20, 0x40 };
 147
 148 #define W83781D_DEFAULT_BETA            3435
 149
 150 /* RT Table registers */
 151 #define W83781D_REG_RT_IDX              0x50
 152 #define W83781D_REG_RT_VAL              0x51
 153
 154 /* Conversions. Rounding and limit checking is only done on the TO_REG
 155    variants. Note that you should be a bit careful with which arguments
 156    these macros are called: arguments may be evaluated more than once.
 157    Fixing this is just not worth it. */
 158 #define IN_TO_REG(val)                  (SENSORS_LIMIT((((val) * 10 + 8)/16),0,255))
 159 #define IN_FROM_REG(val)                (((val) * 16) / 10)
 160
 161 static inline u8
 162 FAN_TO_REG(long rpm, int div)
 163 {
 164         if (rpm == 0)
 165                 return 255;
 166         rpm = SENSORS_LIMIT(rpm, 1, 1000000);
 167         return SENSORS_LIMIT((1350000 + rpm * div / 2) / (rpm * div), 1, 254);
 168 }
 169
 170 #define FAN_FROM_REG(val,div)           ((val) == 0   ? -1 : \
 171                                         ((val) == 255 ? 0 : \
 172                                                         1350000 / ((val) * (div))))
 173
 174 #define TEMP_TO_REG(val)                (SENSORS_LIMIT(((val) < 0 ? (val)+0x100*1000 \
 175                                                 : (val)) / 1000, 0, 0xff))
 176 #define TEMP_FROM_REG(val)              (((val) & 0x80 ? (val)-0x100 : (val)) * 1000)
 177
 178 #define AS99127_TEMP_ADD_TO_REG(val)    (SENSORS_LIMIT((((val) < 0 ? (val)+0x10000*250 \
 179                                                 : (val)) / 250) << 7, 0, 0xffff))
 180 #define AS99127_TEMP_ADD_FROM_REG(val)  ((((val) & 0x8000 ? (val)-0x10000 : (val)) \
 181                                                 >> 7) * 250)
 182
 183 #define ALARMS_FROM_REG(val)            (val)
 184 #define PWM_FROM_REG(val)               (val)
 185 #define PWM_TO_REG(val)                 (SENSORS_LIMIT((val),0,255))
 186 #define BEEP_MASK_FROM_REG(val)         (val)
 187 #define BEEP_MASK_TO_REG(val)           ((val) & 0xffffff)
 188
 189 #define BEEP_ENABLE_TO_REG(val)         ((val) ? 1 : 0)
 190 #define BEEP_ENABLE_FROM_REG(val)       ((val) ? 1 : 0)
 191
 192 #define DIV_FROM_REG(val)               (1 << (val))
 193
 194 static inline u8
 195 DIV_TO_REG(long val, enum chips type)
 196 {
 197         int i;
 198         val = SENSORS_LIMIT(val, 1,
 199                             ((type == w83781d
 200                               || type == as99127f) ? 8 : 128)) >> 1;
 201         for (i = 0; i < 6; i++) {
 202                 if (val == 0)
 203                         break;
 204                 val >>= 1;
 205         }
 206         return ((u8) i);
 207 }
 208
 209 /* There are some complications in a module like this. First off, W83781D chips
 210    may be both present on the SMBus and the ISA bus, and we have to handle
 211    those cases separately at some places. Second, there might be several
 212    W83781D chips available (well, actually, that is probably never done; but
 213    it is a clean illustration of how to handle a case like that). Finally,
 214    a specific chip may be attached to *both* ISA and SMBus, and we would
 215    not like to detect it double. Fortunately, in the case of the W83781D at
 216    least, a register tells us what SMBus address we are on, so that helps
 217    a bit - except if there could be more than one SMBus. Groan. No solution
 218    for this yet. */
 219
 220 /* This module may seem overly long and complicated. In fact, it is not so
 221    bad. Quite a lot of bookkeeping is done. A real driver can often cut
 222    some corners. */
 223
 224 /* For each registered W83781D, we need to keep some data in memory. That
 225    data is pointed to by w83781d_list[NR]->data. The structure itself is
 226    dynamically allocated, at the same time when a new w83781d client is
 227    allocated. */
 228 struct w83781d_data {
 229         struct i2c_client client;
 230         struct semaphore lock;
 231         enum chips type;
 232
 233         struct semaphore update_lock;
 234         char valid;             /* !=0 if following fields are valid */
 235         unsigned long last_updated;     /* In jiffies */
 236
 237         struct i2c_client *lm75[2];     /* for secondary I2C addresses */
 238         /* array of 2 pointers to subclients */
 239
 240         u8 in[9];               /* Register value - 8 & 9 for 782D only */
 241         u8 in_max[9];           /* Register value - 8 & 9 for 782D only */
 242         u8 in_min[9];           /* Register value - 8 & 9 for 782D only */
 243         u8 fan[3];              /* Register value */
 244         u8 fan_min[3];          /* Register value */
 245         u8 temp;
 246         u8 temp_max;            /* Register value */
 247         u8 temp_max_hyst;       /* Register value */
 248         u16 temp_add[2];        /* Register value */
 249         u16 temp_max_add[2];    /* Register value */
 250         u16 temp_max_hyst_add[2];       /* Register value */
 251         u8 fan_div[3];          /* Register encoding, shifted right */
 252         u8 vid;                 /* Register encoding, combined */
 253         u32 alarms;             /* Register encoding, combined */
 254         u32 beep_mask;          /* Register encoding, combined */
 255         u8 beep_enable;         /* Boolean */
 256         u8 pwm[4];              /* Register value */
 257         u8 pwmenable[4];        /* Boolean */
 258         u16 sens[3];            /* 782D/783S only.
 259                                    1 = pentium diode; 2 = 3904 diode;
 260                                    3000-5000 = thermistor beta.
 261                                    Default = 3435.
 262                                    Other Betas unimplemented */
 263 #ifdef W83781D_RT
 264         u8 rt[3][32];           /* Register value */
 265 #endif
 266         u8 vrm;
 267 };
 268
 269 static int w83781d_attach_adapter(struct i2c_adapter *adapter);
 270 static int w83781d_detect(struct i2c_adapter *adapter, int address, int kind);
 271 static int w83781d_detach_client(struct i2c_client *client);
 272
 273 static int w83781d_read_value(struct i2c_client *client, u16 register);
 274 static int w83781d_write_value(struct i2c_client *client, u16 register,
 275                                u16 value);
 276 static struct w83781d_data *w83781d_update_device(struct device *dev);
 277 static void w83781d_init_client(struct i2c_client *client);
 278
 279 static struct i2c_driver w83781d_driver = {
 280         .owner = THIS_MODULE,
 281         .name = "w83781d",
 282         .id = I2C_DRIVERID_W83781D,
 283         .flags = I2C_DF_NOTIFY,
 284         .attach_adapter = w83781d_attach_adapter,
 285         .detach_client = w83781d_detach_client,
 286 };
 287
 288 /* following are the sysfs callback functions */
 289 #define show_in_reg(reg) \
 290 static ssize_t show_##reg (struct device *dev, char *buf, int nr) \
 291 { \
 292         struct w83781d_data *data = w83781d_update_device(dev); \
 293         return sprintf(buf,"%ld\n", (long)IN_FROM_REG(data->reg[nr] * 10)); \
 294 }
 295 show_in_reg(in);
 296 show_in_reg(in_min);
 297 show_in_reg(in_max);
 298
 299 #define store_in_reg(REG, reg) \
 300 static ssize_t store_in_##reg (struct device *dev, const char *buf, size_t count, int nr) \
 301 { \
 302         struct i2c_client *client = to_i2c_client(dev); \
 303         struct w83781d_data *data = i2c_get_clientdata(client); \
 304         u32 val; \
 305          \
 306         val = simple_strtoul(buf, NULL, 10) / 10; \
 307         data->in_##reg[nr] = IN_TO_REG(val); \
 308         w83781d_write_value(client, W83781D_REG_IN_##REG(nr), data->in_##reg[nr]); \
 309          \
 310         return count; \
 311 }
 312 store_in_reg(MIN, min);
 313 store_in_reg(MAX, max);
 314
 315 #define sysfs_in_offset(offset) \
 316 static ssize_t \
 317 show_regs_in_##offset (struct device *dev, char *buf) \
 318 { \
 319         return show_in(dev, buf, 0x##offset); \
 320 } \
 321 static DEVICE_ATTR(in##offset##_input, S_IRUGO, show_regs_in_##offset, NULL)
 322
 323 #define sysfs_in_reg_offset(reg, offset) \
 324 static ssize_t show_regs_in_##reg##offset (struct device *dev, char *buf) \
 325 { \
 326         return show_in_##reg (dev, buf, 0x##offset); \
 327 } \
 328 static ssize_t store_regs_in_##reg##offset (struct device *dev, const char *buf, size_t count) \
 329 { \
 330         return store_in_##reg (dev, buf, count, 0x##offset); \
 331 } \
 332 static DEVICE_ATTR(in##offset##_##reg, S_IRUGO| S_IWUSR, show_regs_in_##reg##offset, store_regs_in_##reg##offset)
 333
 334 #define sysfs_in_offsets(offset) \
 335 sysfs_in_offset(offset); \
 336 sysfs_in_reg_offset(min, offset); \
 337 sysfs_in_reg_offset(max, offset);
 338
 339 sysfs_in_offsets(0);
 340 sysfs_in_offsets(1);
 341 sysfs_in_offsets(2);
 342 sysfs_in_offsets(3);
 343 sysfs_in_offsets(4);
 344 sysfs_in_offsets(5);
 345 sysfs_in_offsets(6);
 346 sysfs_in_offsets(7);
 347 sysfs_in_offsets(8);
 348
 349 #define device_create_file_in(client, offset) \
 350 do { \
 351 device_create_file(&client->dev, &dev_attr_in##offset##_input); \
 352 device_create_file(&client->dev, &dev_attr_in##offset##_min); \
 353 device_create_file(&client->dev, &dev_attr_in##offset##_max); \
 354 } while (0)
 355
 356 #define show_fan_reg(reg) \
 357 static ssize_t show_##reg (struct device *dev, char *buf, int nr) \
 358 { \
 359         struct w83781d_data *data = w83781d_update_device(dev); \
 360         return sprintf(buf,"%ld\n", \
 361                 FAN_FROM_REG(data->reg[nr-1], (long)DIV_FROM_REG(data->fan_div[nr-1]))); \
 362 }
 363 show_fan_reg(fan);
 364 show_fan_reg(fan_min);
 365
 366 static ssize_t
 367 store_fan_min(struct device *dev, const char *buf, size_t count, int nr)
 368 {
 369         struct i2c_client *client = to_i2c_client(dev);
 370         struct w83781d_data *data = i2c_get_clientdata(client);
 371         u32 val;
 372
 373         val = simple_strtoul(buf, NULL, 10);
 374         data->fan_min[nr - 1] =
 375             FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr - 1]));
 376         w83781d_write_value(client, W83781D_REG_FAN_MIN(nr),
 377                             data->fan_min[nr - 1]);
 378
 379         return count;
 380 }
 381
 382 #define sysfs_fan_offset(offset) \
 383 static ssize_t show_regs_fan_##offset (struct device *dev, char *buf) \
 384 { \
 385         return show_fan(dev, buf, 0x##offset); \
 386 } \
 387 static DEVICE_ATTR(fan##offset##_input, S_IRUGO, show_regs_fan_##offset, NULL)
 388
 389 #define sysfs_fan_min_offset(offset) \
 390 static ssize_t show_regs_fan_min##offset (struct device *dev, char *buf) \
 391 { \
 392         return show_fan_min(dev, buf, 0x##offset); \
 393 } \
 394 static ssize_t store_regs_fan_min##offset (struct device *dev, const char *buf, size_t count) \
 395 { \
 396         return store_fan_min(dev, buf, count, 0x##offset); \
 397 } \
 398 static DEVICE_ATTR(fan##offset##_min, S_IRUGO | S_IWUSR, show_regs_fan_min##offset, store_regs_fan_min##offset)
 399
 400 sysfs_fan_offset(1);
 401 sysfs_fan_min_offset(1);
 402 sysfs_fan_offset(2);
 403 sysfs_fan_min_offset(2);
 404 sysfs_fan_offset(3);
 405 sysfs_fan_min_offset(3);
 406
 407 #define device_create_file_fan(client, offset) \
 408 do { \
 409 device_create_file(&client->dev, &dev_attr_fan##offset##_input); \
 410 device_create_file(&client->dev, &dev_attr_fan##offset##_min); \
 411 } while (0)
 412
 413 #define show_temp_reg(reg) \
 414 static ssize_t show_##reg (struct device *dev, char *buf, int nr) \
 415 { \
 416         struct w83781d_data *data = w83781d_update_device(dev); \
 417         if (nr >= 2) {  /* TEMP2 and TEMP3 */ \
 418                 if (data->type == as99127f) { \
 419                         return sprintf(buf,"%ld\n", \
 420                                 (long)AS99127_TEMP_ADD_FROM_REG(data->reg##_add[nr-2])); \
 421                 } else { \
 422                         return sprintf(buf,"%d\n", \
 423                                 LM75_TEMP_FROM_REG(data->reg##_add[nr-2])); \
 424                 } \
 425         } else {        /* TEMP1 */ \
 426                 return sprintf(buf,"%ld\n", (long)TEMP_FROM_REG(data->reg)); \
 427         } \
 428 }
 429 show_temp_reg(temp);
 430 show_temp_reg(temp_max);
 431 show_temp_reg(temp_max_hyst);
 432
 433 #define store_temp_reg(REG, reg) \
 434 static ssize_t store_temp_##reg (struct device *dev, const char *buf, size_t count, int nr) \
 435 { \
 436         struct i2c_client *client = to_i2c_client(dev); \
 437         struct w83781d_data *data = i2c_get_clientdata(client); \
 438         s32 val; \
 439          \
 440         val = simple_strtol(buf, NULL, 10); \
 441          \
 442         if (nr >= 2) {  /* TEMP2 and TEMP3 */ \
 443                 if (data->type == as99127f) \
 444                         data->temp_##reg##_add[nr-2] = AS99127_TEMP_ADD_TO_REG(val); \
 445                 else \
 446                         data->temp_##reg##_add[nr-2] = LM75_TEMP_TO_REG(val); \
 447                  \
 448                 w83781d_write_value(client, W83781D_REG_TEMP_##REG(nr), \
 449                                 data->temp_##reg##_add[nr-2]); \
 450         } else {        /* TEMP1 */ \
 451                 data->temp_##reg = TEMP_TO_REG(val); \
 452                 w83781d_write_value(client, W83781D_REG_TEMP_##REG(nr), \
 453                         data->temp_##reg); \
 454         } \
 455          \
 456         return count; \
 457 }
 458 store_temp_reg(OVER, max);
 459 store_temp_reg(HYST, max_hyst);
 460
 461 #define sysfs_temp_offset(offset) \
 462 static ssize_t \
 463 show_regs_temp_##offset (struct device *dev, char *buf) \
 464 { \
 465         return show_temp(dev, buf, 0x##offset); \
 466 } \
 467 static DEVICE_ATTR(temp##offset##_input, S_IRUGO, show_regs_temp_##offset, NULL)
 468
 469 #define sysfs_temp_reg_offset(reg, offset) \
 470 static ssize_t show_regs_temp_##reg##offset (struct device *dev, char *buf) \
 471 { \
 472         return show_temp_##reg (dev, buf, 0x##offset); \
 473 } \
 474 static ssize_t store_regs_temp_##reg##offset (struct device *dev, const char *buf, size_t count) \
 475 { \
 476         return store_temp_##reg (dev, buf, count, 0x##offset); \
 477 } \
 478 static DEVICE_ATTR(temp##offset##_##reg, S_IRUGO| S_IWUSR, show_regs_temp_##reg##offset, store_regs_temp_##reg##offset)
 479
 480 #define sysfs_temp_offsets(offset) \
 481 sysfs_temp_offset(offset); \
 482 sysfs_temp_reg_offset(max, offset); \
 483 sysfs_temp_reg_offset(max_hyst, offset);
 484
 485 sysfs_temp_offsets(1);
 486 sysfs_temp_offsets(2);
 487 sysfs_temp_offsets(3);
 488
 489 #define device_create_file_temp(client, offset) \
 490 do { \
 491 device_create_file(&client->dev, &dev_attr_temp##offset##_input); \
 492 device_create_file(&client->dev, &dev_attr_temp##offset##_max); \
 493 device_create_file(&client->dev, &dev_attr_temp##offset##_max_hyst); \
 494 } while (0)
 495
 496 static ssize_t
 497 show_vid_reg(struct device *dev, char *buf)
 498 {
 499         struct w83781d_data *data = w83781d_update_device(dev);
 500         return sprintf(buf, "%ld\n", (long) vid_from_reg(data->vid, data->vrm));
 501 }
 502
 503 static
 504 DEVICE_ATTR(in0_ref, S_IRUGO, show_vid_reg, NULL)
 505 #define device_create_file_vid(client) \
 506 device_create_file(&client->dev, &dev_attr_in0_ref);
 507 static ssize_t
 508 show_vrm_reg(struct device *dev, char *buf)
 509 {
 510         struct w83781d_data *data = w83781d_update_device(dev);
 511         return sprintf(buf, "%ld\n", (long) data->vrm);
 512 }
 513
 514 static ssize_t
 515 store_vrm_reg(struct device *dev, const char *buf, size_t count)
 516 {
 517         struct i2c_client *client = to_i2c_client(dev);
 518         struct w83781d_data *data = i2c_get_clientdata(client);
 519         u32 val;
 520
 521         val = simple_strtoul(buf, NULL, 10);
 522         data->vrm = val;
 523
 524         return count;
 525 }
 526
 527 static
 528 DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg)
 529 #define device_create_file_vrm(client) \
 530 device_create_file(&client->dev, &dev_attr_vrm);
 531 static ssize_t
 532 show_alarms_reg(struct device *dev, char *buf)
 533 {
 534         struct w83781d_data *data = w83781d_update_device(dev);
 535         return sprintf(buf, "%ld\n", (long) ALARMS_FROM_REG(data->alarms));
 536 }
 537
 538 static
 539 DEVICE_ATTR(alarms, S_IRUGO, show_alarms_reg, NULL)
 540 #define device_create_file_alarms(client) \
 541 device_create_file(&client->dev, &dev_attr_alarms);
 542 #define show_beep_reg(REG, reg) \
 543 static ssize_t show_beep_##reg (struct device *dev, char *buf) \
 544 { \
 545         struct w83781d_data *data = w83781d_update_device(dev); \
 546         return sprintf(buf,"%ld\n", (long)BEEP_##REG##_FROM_REG(data->beep_##reg)); \
 547 }
 548 show_beep_reg(ENABLE, enable);
 549 show_beep_reg(MASK, mask);
 550
 551 #define BEEP_ENABLE                     0       /* Store beep_enable */
 552 #define BEEP_MASK                       1       /* Store beep_mask */
 553
 554 static ssize_t
 555 store_beep_reg(struct device *dev, const char *buf, size_t count,
 556                int update_mask)
 557 {
 558         struct i2c_client *client = to_i2c_client(dev);
 559         struct w83781d_data *data = i2c_get_clientdata(client);
 560         u32 val, val2;
 561
 562         val = simple_strtoul(buf, NULL, 10);
 563
 564         if (update_mask == BEEP_MASK) { /* We are storing beep_mask */
 565                 data->beep_mask = BEEP_MASK_TO_REG(val);
 566                 w83781d_write_value(client, W83781D_REG_BEEP_INTS1,
 567                                     data->beep_mask & 0xff);
 568
 569                 if ((data->type != w83781d) && (data->type != as99127f)) {
 570                         w83781d_write_value(client, W83781D_REG_BEEP_INTS3,
 571                                             ((data->beep_mask) >> 16) & 0xff);
 572                 }
 573
 574                 val2 = (data->beep_mask >> 8) & 0x7f;
 575         } else {                /* We are storing beep_enable */
 576                 val2 = w83781d_read_value(client, W83781D_REG_BEEP_INTS2) & 0x7f;
 577                 data->beep_enable = BEEP_ENABLE_TO_REG(val);
 578         }
 579
 580         w83781d_write_value(client, W83781D_REG_BEEP_INTS2,
 581                             val2 | data->beep_enable << 7);
 582
 583         return count;
 584 }
 585
 586 #define sysfs_beep(REG, reg) \
 587 static ssize_t show_regs_beep_##reg (struct device *dev, char *buf) \
 588 { \
 589         return show_beep_##reg(dev, buf); \
 590 } \
 591 static ssize_t store_regs_beep_##reg (struct device *dev, const char *buf, size_t count) \
 592 { \
 593         return store_beep_reg(dev, buf, count, BEEP_##REG); \
 594 } \
 595 static DEVICE_ATTR(beep_##reg, S_IRUGO | S_IWUSR, show_regs_beep_##reg, store_regs_beep_##reg)
 596
 597 sysfs_beep(ENABLE, enable);
 598 sysfs_beep(MASK, mask);
 599
 600 #define device_create_file_beep(client) \
 601 do { \
 602 device_create_file(&client->dev, &dev_attr_beep_enable); \
 603 device_create_file(&client->dev, &dev_attr_beep_mask); \
 604 } while (0)
 605
 606 static ssize_t
 607 show_fan_div_reg(struct device *dev, char *buf, int nr)
 608 {
 609         struct w83781d_data *data = w83781d_update_device(dev);
 610         return sprintf(buf, "%ld\n",
 611                        (long) DIV_FROM_REG(data->fan_div[nr - 1]));
 612 }
 613
 614 /* Note: we save and restore the fan minimum here, because its value is
 615    determined in part by the fan divisor.  This follows the principle of
 616    least suprise; the user doesn't expect the fan minimum to change just
 617    because the divisor changed. */
 618 static ssize_t
 619 store_fan_div_reg(struct device *dev, const char *buf, size_t count, int nr)
 620 {
 621         struct i2c_client *client = to_i2c_client(dev);
 622         struct w83781d_data *data = i2c_get_clientdata(client);
 623         unsigned long min;
 624         u8 reg;
 625
 626         /* Save fan_min */
 627         min = FAN_FROM_REG(data->fan_min[nr],
 628                            DIV_FROM_REG(data->fan_div[nr]));
 629
 630         data->fan_div[nr] = DIV_TO_REG(simple_strtoul(buf, NULL, 10),
 631                                       data->type);
 632
 633         reg = (w83781d_read_value(client, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV)
 634                & (nr==0 ? 0xcf : 0x3f))
 635             | ((data->fan_div[nr] & 0x03) << (nr==0 ? 4 : 6));
 636         w83781d_write_value(client, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV, reg);
 637
 638         /* w83781d and as99127f don't have extended divisor bits */
 639         if (data->type != w83781d && data->type != as99127f) {
 640                 reg = (w83781d_read_value(client, W83781D_REG_VBAT)
 641                        & ~(1 << (5 + nr)))
 642                     | ((data->fan_div[nr] & 0x04) << (3 + nr));
 643                 w83781d_write_value(client, W83781D_REG_VBAT, reg);
 644         }
 645
 646         /* Restore fan_min */
 647         data->fan_min[nr] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
 648         w83781d_write_value(client, W83781D_REG_FAN_MIN(nr+1), data->fan_min[nr]);
 649
 650         return count;
 651 }
 652
 653 #define sysfs_fan_div(offset) \
 654 static ssize_t show_regs_fan_div_##offset (struct device *dev, char *buf) \
 655 { \
 656         return show_fan_div_reg(dev, buf, offset); \
 657 } \
 658 static ssize_t store_regs_fan_div_##offset (struct device *dev, const char *buf, size_t count) \
 659 { \
 660         return store_fan_div_reg(dev, buf, count, offset - 1); \
 661 } \
 662 static DEVICE_ATTR(fan##offset##_div, S_IRUGO | S_IWUSR, show_regs_fan_div_##offset, store_regs_fan_div_##offset)
 663
 664 sysfs_fan_div(1);
 665 sysfs_fan_div(2);
 666 sysfs_fan_div(3);
 667
 668 #define device_create_file_fan_div(client, offset) \
 669 do { \
 670 device_create_file(&client->dev, &dev_attr_fan##offset##_div); \
 671 } while (0)
 672
 673 static ssize_t
 674 show_pwm_reg(struct device *dev, char *buf, int nr)
 675 {
 676         struct w83781d_data *data = w83781d_update_device(dev);
 677         return sprintf(buf, "%ld\n", (long) PWM_FROM_REG(data->pwm[nr - 1]));
 678 }
 679
 680 static ssize_t
 681 show_pwmenable_reg(struct device *dev, char *buf, int nr)
 682 {
 683         struct w83781d_data *data = w83781d_update_device(dev);
 684         return sprintf(buf, "%ld\n", (long) data->pwmenable[nr - 1]);
 685 }
 686
 687 static ssize_t
 688 store_pwm_reg(struct device *dev, const char *buf, size_t count, int nr)
 689 {
 690         struct i2c_client *client = to_i2c_client(dev);
 691         struct w83781d_data *data = i2c_get_clientdata(client);
 692         u32 val;
 693
 694         val = simple_strtoul(buf, NULL, 10);
 695
 696         data->pwm[nr - 1] = PWM_TO_REG(val);
 697         w83781d_write_value(client, W83781D_REG_PWM(nr), data->pwm[nr - 1]);
 698
 699         return count;
 700 }
 701
 702 static ssize_t
 703 store_pwmenable_reg(struct device *dev, const char *buf, size_t count, int nr)
 704 {
 705         struct i2c_client *client = to_i2c_client(dev);
 706         struct w83781d_data *data = i2c_get_clientdata(client);
 707         u32 val, reg;
 708
 709         val = simple_strtoul(buf, NULL, 10);
 710
 711         switch (val) {
 712         case 0:
 713         case 1:
 714                 reg = w83781d_read_value(client, W83781D_REG_PWMCLK12);
 715                 w83781d_write_value(client, W83781D_REG_PWMCLK12,
 716                                     (reg & 0xf7) | (val << 3));
 717
 718                 reg = w83781d_read_value(client, W83781D_REG_BEEP_CONFIG);
 719                 w83781d_write_value(client, W83781D_REG_BEEP_CONFIG,
 720                                     (reg & 0xef) | (!val << 4));
 721
 722                 data->pwmenable[nr - 1] = val;
 723                 break;
 724
 725         default:
 726                 return -EINVAL;
 727         }
 728
 729         return count;
 730 }
 731
 732 #define sysfs_pwm(offset) \
 733 static ssize_t show_regs_pwm_##offset (struct device *dev, char *buf) \
 734 { \
 735         return show_pwm_reg(dev, buf, offset); \
 736 } \
 737 static ssize_t store_regs_pwm_##offset (struct device *dev, const char *buf, size_t count) \
 738 { \
 739         return store_pwm_reg(dev, buf, count, offset); \
 740 } \
 741 static DEVICE_ATTR(fan##offset##_pwm, S_IRUGO | S_IWUSR, show_regs_pwm_##offset, store_regs_pwm_##offset)
 742
 743 #define sysfs_pwmenable(offset) \
 744 static ssize_t show_regs_pwmenable_##offset (struct device *dev, char *buf) \
 745 { \
 746         return show_pwmenable_reg(dev, buf, offset); \
 747 } \
 748 static ssize_t store_regs_pwmenable_##offset (struct device *dev, const char *buf, size_t count) \
 749 { \
 750         return store_pwmenable_reg(dev, buf, count, offset); \
 751 } \
 752 static DEVICE_ATTR(fan##offset##_pwm_enable, S_IRUGO | S_IWUSR, show_regs_pwmenable_##offset, store_regs_pwmenable_##offset)
 753
 754 sysfs_pwm(1);
 755 sysfs_pwm(2);
 756 sysfs_pwmenable(2);             /* only PWM2 can be enabled/disabled */
 757 sysfs_pwm(3);
 758 sysfs_pwm(4);
 759
 760 #define device_create_file_pwm(client, offset) \
 761 do { \
 762 device_create_file(&client->dev, &dev_attr_fan##offset##_pwm); \
 763 } while (0)
 764
 765 #define device_create_file_pwmenable(client, offset) \
 766 do { \
 767 device_create_file(&client->dev, &dev_attr_fan##offset##_pwm_enable); \
 768 } while (0)
 769
 770 static ssize_t
 771 show_sensor_reg(struct device *dev, char *buf, int nr)
 772 {
 773         struct w83781d_data *data = w83781d_update_device(dev);
 774         return sprintf(buf, "%ld\n", (long) data->sens[nr - 1]);
 775 }
 776
 777 static ssize_t
 778 store_sensor_reg(struct device *dev, const char *buf, size_t count, int nr)
 779 {
 780         struct i2c_client *client = to_i2c_client(dev);
 781         struct w83781d_data *data = i2c_get_clientdata(client);
 782         u32 val, tmp;
 783
 784         val = simple_strtoul(buf, NULL, 10);
 785
 786         switch (val) {
 787         case 1:         /* PII/Celeron diode */
 788                 tmp = w83781d_read_value(client, W83781D_REG_SCFG1);
 789                 w83781d_write_value(client, W83781D_REG_SCFG1,
 790                                     tmp | BIT_SCFG1[nr - 1]);
 791                 tmp = w83781d_read_value(client, W83781D_REG_SCFG2);
 792                 w83781d_write_value(client, W83781D_REG_SCFG2,
 793                                     tmp | BIT_SCFG2[nr - 1]);
 794                 data->sens[nr - 1] = val;
 795                 break;
 796         case 2:         /* 3904 */
 797                 tmp = w83781d_read_value(client, W83781D_REG_SCFG1);
 798                 w83781d_write_value(client, W83781D_REG_SCFG1,
 799                                     tmp | BIT_SCFG1[nr - 1]);
 800                 tmp = w83781d_read_value(client, W83781D_REG_SCFG2);
 801                 w83781d_write_value(client, W83781D_REG_SCFG2,
 802                                     tmp & ~BIT_SCFG2[nr - 1]);
 803                 data->sens[nr - 1] = val;
 804                 break;
 805         case W83781D_DEFAULT_BETA:      /* thermistor */
 806                 tmp = w83781d_read_value(client, W83781D_REG_SCFG1);
 807                 w83781d_write_value(client, W83781D_REG_SCFG1,
 808                                     tmp & ~BIT_SCFG1[nr - 1]);
 809                 data->sens[nr - 1] = val;
 810                 break;
 811         default:
 812                 dev_err(&client->dev,
 813                        "Invalid sensor type %ld; must be 1, 2, or %d\n",
 814                        (long) val, W83781D_DEFAULT_BETA);
 815                 break;
 816         }
 817
 818         return count;
 819 }
 820
 821 #define sysfs_sensor(offset) \
 822 static ssize_t show_regs_sensor_##offset (struct device *dev, char *buf) \
 823 { \
 824     return show_sensor_reg(dev, buf, offset); \
 825 } \
 826 static ssize_t store_regs_sensor_##offset (struct device *dev, const char *buf, size_t count) \
 827 { \
 828     return store_sensor_reg(dev, buf, count, offset); \
 829 } \
 830 static DEVICE_ATTR(temp##offset##_type, S_IRUGO | S_IWUSR, show_regs_sensor_##offset, store_regs_sensor_##offset)
 831
 832 sysfs_sensor(1);
 833 sysfs_sensor(2);
 834 sysfs_sensor(3);
 835
 836 #define device_create_file_sensor(client, offset) \
 837 do { \
 838 device_create_file(&client->dev, &dev_attr_temp##offset##_type); \
 839 } while (0)
 840
 841 #ifdef W83781D_RT
 842 static ssize_t
 843 show_rt_reg(struct device *dev, char *buf, int nr)
 844 {
 845         struct w83781d_data *data = w83781d_update_device(dev);
 846         int i, j = 0;
 847
 848         for (i = 0; i < 32; i++) {
 849                 if (i > 0)
 850                         j += sprintf(buf, " %ld", (long) data->rt[nr - 1][i]);
 851                 else
 852                         j += sprintf(buf, "%ld", (long) data->rt[nr - 1][i]);
 853         }
 854         j += sprintf(buf, "\n");
 855
 856         return j;
 857 }
 858
 859 static ssize_t
 860 store_rt_reg(struct device *dev, const char *buf, size_t count, int nr)
 861 {
 862         struct i2c_client *client = to_i2c_client(dev);
 863         struct w83781d_data *data = i2c_get_clientdata(client);
 864         u32 val, i;
 865
 866         for (i = 0; i < count; i++) {
 867                 val = simple_strtoul(buf + count, NULL, 10);
 868
 869                 /* fixme: no bounds checking 0-255 */
 870                 data->rt[nr - 1][i] = val & 0xff;
 871                 w83781d_write_value(client, W83781D_REG_RT_IDX, i);
 872                 w83781d_write_value(client, W83781D_REG_RT_VAL,
 873                                     data->rt[nr - 1][i]);
 874         }
 875
 876         return count;
 877 }
 878
 879 #define sysfs_rt(offset) \
 880 static ssize_t show_regs_rt_##offset (struct device *dev, char *buf) \
 881 { \
 882         return show_rt_reg(dev, buf, offset); \
 883 } \
 884 static ssize_t store_regs_rt_##offset (struct device *dev, const char *buf, size_t count) \
 885 { \
 886     return store_rt_reg(dev, buf, count, offset); \
 887 } \
 888 static DEVICE_ATTR(rt##offset, S_IRUGO | S_IWUSR, show_regs_rt_##offset, store_regs_rt_##offset)
 889
 890 sysfs_rt(1);
 891 sysfs_rt(2);
 892 sysfs_rt(3);
 893
 894 #define device_create_file_rt(client, offset) \
 895 do { \
 896 device_create_file(&client->dev, &dev_attr_rt##offset); \
 897 } while (0)
 898
 899 #endif                          /* ifdef W83781D_RT */
 900
 901 /* This function is called when:
 902      * w83781d_driver is inserted (when this module is loaded), for each
 903        available adapter
 904      * when a new adapter is inserted (and w83781d_driver is still present) */
 905 static int
 906 w83781d_attach_adapter(struct i2c_adapter *adapter)
 907 {
 908         if (!(adapter->class & I2C_ADAP_CLASS_SMBUS))
 909                 return 0;
 910         return i2c_detect(adapter, &addr_data, w83781d_detect);
 911 }
 912
 913 /* Assumes that adapter is of I2C, not ISA variety.
 914  * OTHERWISE DON'T CALL THIS
 915  */
 916 static int
 917 w83781d_detect_subclients(struct i2c_adapter *adapter, int address, int kind,
 918                 struct i2c_client *new_client)
 919 {
 920         int i, val1 = 0, id;
 921         int err;
 922         const char *client_name = "";
 923         struct w83781d_data *data = i2c_get_clientdata(new_client);
 924
 925         data->lm75[0] = kmalloc(sizeof(struct i2c_client), GFP_KERNEL);
 926         if (!(data->lm75[0])) {
 927                 err = -ENOMEM;
 928                 goto ERROR_SC_0;
 929         }
 930         memset(data->lm75[0], 0x00, sizeof (struct i2c_client));
 931
 932         id = i2c_adapter_id(adapter);
 933
 934         if (force_subclients[0] == id && force_subclients[1] == address) {
 935                 for (i = 2; i <= 3; i++) {
 936                         if (force_subclients[i] < 0x48 ||
 937                             force_subclients[i] > 0x4f) {
 938                                 dev_err(&new_client->dev, "Invalid subclient "
 939                                         "address %d; must be 0x48-0x4f\n",
 940                                         force_subclients[i]);
 941                                 err = -EINVAL;
 942                                 goto ERROR_SC_1;
 943                         }
 944                 }
 945                 w83781d_write_value(new_client, W83781D_REG_I2C_SUBADDR,
 946                                 (force_subclients[2] & 0x07) |
 947                                 ((force_subclients[3] & 0x07) << 4));
 948                 data->lm75[0]->addr = force_subclients[2];
 949         } else {
 950                 val1 = w83781d_read_value(new_client, W83781D_REG_I2C_SUBADDR);
 951                 data->lm75[0]->addr = 0x48 + (val1 & 0x07);
 952         }
 953
 954         if (kind != w83783s) {
 955
 956                 data->lm75[1] = kmalloc(sizeof(struct i2c_client), GFP_KERNEL);
 957                 if (!(data->lm75[1])) {
 958                         err = -ENOMEM;
 959                         goto ERROR_SC_1;
 960                 }
 961                 memset(data->lm75[1], 0x0, sizeof(struct i2c_client));
 962
 963                 if (force_subclients[0] == id &&
 964                     force_subclients[1] == address) {
 965                         data->lm75[1]->addr = force_subclients[3];
 966                 } else {
 967                         data->lm75[1]->addr = 0x48 + ((val1 >> 4) & 0x07);
 968                 }
 969                 if (data->lm75[0]->addr == data->lm75[1]->addr) {
 970                         dev_err(&new_client->dev,
 971                                "Duplicate addresses 0x%x for subclients.\n",
 972                                data->lm75[0]->addr);
 973                         err = -EBUSY;
 974                         goto ERROR_SC_2;
 975                 }
 976         }
 977
 978         if (kind == w83781d)
 979                 client_name = "w83781d subclient";
 980         else if (kind == w83782d)
 981                 client_name = "w83782d subclient";
 982         else if (kind == w83783s)
 983                 client_name = "w83783s subclient";
 984         else if (kind == w83627hf)
 985                 client_name = "w83627hf subclient";
 986         else if (kind == as99127f)
 987                 client_name = "as99127f subclient";
 988
 989         for (i = 0; i <= 1; i++) {
 990                 /* store all data in w83781d */
 991                 i2c_set_clientdata(data->lm75[i], NULL);
 992                 data->lm75[i]->adapter = adapter;
 993                 data->lm75[i]->driver = &w83781d_driver;
 994                 data->lm75[i]->flags = 0;
 995                 strlcpy(data->lm75[i]->name, client_name,
 996                         I2C_NAME_SIZE);
 997                 if ((err = i2c_attach_client(data->lm75[i]))) {
 998                         dev_err(&new_client->dev, "Subclient %d "
 999                                 "registration at address 0x%x "
1000                                 "failed.\n", i, data->lm75[i]->addr);
1001                         if (i == 1)
1002                                 goto ERROR_SC_3;
1003                         goto ERROR_SC_2;
1004                 }
1005                 if (kind == w83783s)
1006                         break;
1007         }
1008
1009         return 0;
1010
1011 /* Undo inits in case of errors */
1012 ERROR_SC_3:
1013         i2c_detach_client(data->lm75[0]);
1014 ERROR_SC_2:
1015         if (NULL != data->lm75[1])
1016                 kfree(data->lm75[1]);
1017 ERROR_SC_1:
1018         if (NULL != data->lm75[0])
1019                 kfree(data->lm75[0]);
1020 ERROR_SC_0:
1021         return err;
1022 }
1023
1024 static int
1025 w83781d_detect(struct i2c_adapter *adapter, int address, int kind)
1026 {
1027         int i = 0, val1 = 0, val2;
1028         struct i2c_client *new_client;
1029         struct w83781d_data *data;
1030         int err;
1031         const char *client_name = "";
1032         int is_isa = i2c_is_isa_adapter(adapter);
1033         enum vendor { winbond, asus } vendid;
1034
1035         if (!is_isa
1036             && !i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) {
1037                 err = -EINVAL;
1038                 goto ERROR0;
1039         }
1040
1041         /* Prevent users from forcing a kind for a bus it isn't supposed
1042            to possibly be on */
1043         if (is_isa && (kind == as99127f || kind == w83783s)) {
1044                 dev_err(&adapter->dev,
1045                         "Cannot force I2C-only chip for ISA address 0x%02x.\n",
1046                         address);
1047                 err = -EINVAL;
1048                 goto ERROR0;
1049         }
1050         if (!is_isa && kind == w83697hf) {
1051                 dev_err(&adapter->dev,
1052                         "Cannot force ISA-only chip for I2C address 0x%02x.\n",
1053                         address);
1054                 err = -EINVAL;
1055                 goto ERROR0;
1056         }
1057
1058         if (is_isa)
1059                 if (!request_region(address, W83781D_EXTENT, "w83781d")) {
1060                         err = -EBUSY;
1061                         goto ERROR0;
1062                 }
1063
1064         /* Probe whether there is anything available on this address. Already
1065            done for SMBus clients */
1066         if (kind < 0) {
1067                 if (is_isa) {
1068
1069 #define REALLY_SLOW_IO
1070                         /* We need the timeouts for at least some LM78-like
1071                            chips. But only if we read 'undefined' registers. */
1072                         i = inb_p(address + 1);
1073                         if (inb_p(address + 2) != i) {
1074                                 err = -ENODEV;
1075                                 goto ERROR1;
1076                         }
1077                         if (inb_p(address + 3) != i) {
1078                                 err = -ENODEV;
1079                                 goto ERROR1;
1080                         }
1081                         if (inb_p(address + 7) != i) {
1082                                 err = -ENODEV;
1083                                 goto ERROR1;
1084                         }
1085 #undef REALLY_SLOW_IO
1086
1087                         /* Let's just hope nothing breaks here */
1088                         i = inb_p(address + 5) & 0x7f;
1089                         outb_p(~i & 0x7f, address + 5);
1090                         if ((inb_p(address + 5) & 0x7f) != (~i & 0x7f)) {
1091                                 outb_p(i, address + 5);
1092                                 err = -ENODEV;
1093                                 goto ERROR1;
1094                         }
1095                 }
1096         }
1097
1098         /* OK. For now, we presume we have a valid client. We now create the
1099            client structure, even though we cannot fill it completely yet.
1100            But it allows us to access w83781d_{read,write}_value. */
1101
1102         if (!(data = kmalloc(sizeof(struct w83781d_data), GFP_KERNEL))) {
1103                 err = -ENOMEM;
1104                 goto ERROR1;
1105         }
1106         memset(data, 0, sizeof(struct w83781d_data));
1107
1108         new_client = &data->client;
1109         i2c_set_clientdata(new_client, data);
1110         new_client->addr = address;
1111         init_MUTEX(&data->lock);
1112         new_client->adapter = adapter;
1113         new_client->driver = &w83781d_driver;
1114         new_client->flags = 0;
1115
1116         /* Now, we do the remaining detection. */
1117
1118         /* The w8378?d may be stuck in some other bank than bank 0. This may
1119            make reading other information impossible. Specify a force=... or
1120            force_*=... parameter, and the Winbond will be reset to the right
1121            bank. */
1122         if (kind < 0) {
1123                 if (w83781d_read_value(new_client, W83781D_REG_CONFIG) & 0x80){
1124                         err = -ENODEV;
1125                         goto ERROR2;
1126                 }
1127                 val1 = w83781d_read_value(new_client, W83781D_REG_BANK);
1128                 val2 = w83781d_read_value(new_client, W83781D_REG_CHIPMAN);
1129                 /* Check for Winbond or Asus ID if in bank 0 */
1130                 if ((!(val1 & 0x07)) &&
1131                     (((!(val1 & 0x80)) && (val2 != 0xa3) && (val2 != 0xc3))
1132                      || ((val1 & 0x80) && (val2 != 0x5c) && (val2 != 0x12)))) {
1133                         err = -ENODEV;
1134                         goto ERROR2;
1135                 }
1136                 /* If Winbond SMBus, check address at 0x48.
1137                    Asus doesn't support, except for as99127f rev.2 */
1138                 if ((!is_isa) && (((!(val1 & 0x80)) && (val2 == 0xa3)) ||
1139                                   ((val1 & 0x80) && (val2 == 0x5c)))) {
1140                         if (w83781d_read_value
1141                             (new_client, W83781D_REG_I2C_ADDR) != address) {
1142                                 err = -ENODEV;
1143                                 goto ERROR2;
1144                         }
1145                 }
1146         }
1147
1148         /* We have either had a force parameter, or we have already detected the
1149            Winbond. Put it now into bank 0 and Vendor ID High Byte */
1150         w83781d_write_value(new_client, W83781D_REG_BANK,
1151                             (w83781d_read_value(new_client,
1152                                                 W83781D_REG_BANK) & 0x78) |
1153                             0x80);
1154
1155         /* Determine the chip type. */
1156         if (kind <= 0) {
1157                 /* get vendor ID */
1158                 val2 = w83781d_read_value(new_client, W83781D_REG_CHIPMAN);
1159                 if (val2 == 0x5c)
1160                         vendid = winbond;
1161                 else if (val2 == 0x12)
1162                         vendid = asus;
1163                 else {
1164                         err = -ENODEV;
1165                         goto ERROR2;
1166                 }
1167
1168                 val1 = w83781d_read_value(new_client, W83781D_REG_WCHIPID);
1169                 if ((val1 == 0x10 || val1 == 0x11) && vendid == winbond)
1170                         kind = w83781d;
1171                 else if (val1 == 0x30 && vendid == winbond)
1172                         kind = w83782d;
1173                 else if (val1 == 0x40 && vendid == winbond && !is_isa
1174                                 && address == 0x2d)
1175                         kind = w83783s;
1176                 else if ((val1 == 0x21 || val1 == 0x90) && vendid == winbond)
1177                         kind = w83627hf;
1178                 else if (val1 == 0x31 && !is_isa && address >= 0x28)
1179                         kind = as99127f;
1180                 else if (val1 == 0x60 && vendid == winbond && is_isa)
1181                         kind = w83697hf;
1182                 else {
1183                         if (kind == 0)
1184                                 dev_warn(&new_client->dev,
1185                                        "Ignoring 'force' parameter for unknown chip at"
1186                                        "adapter %d, address 0x%02x\n",
1187                                        i2c_adapter_id(adapter), address);
1188                         err = -EINVAL;
1189                         goto ERROR2;
1190                 }
1191         }
1192
1193         if (kind == w83781d) {
1194                 client_name = "w83781d";
1195         } else if (kind == w83782d) {
1196                 client_name = "w83782d";
1197         } else if (kind == w83783s) {
1198                 client_name = "w83783s";
1199         } else if (kind == w83627hf) {
1200                 if (val1 == 0x90)
1201                         client_name = "w83627thf";
1202                 else
1203                         client_name = "w83627hf";
1204         } else if (kind == as99127f) {
1205                 client_name = "as99127f";
1206         } else if (kind == w83697hf) {
1207                 client_name = "w83697hf";
1208         }
1209
1210         /* Fill in the remaining client fields and put into the global list */
1211         strlcpy(new_client->name, client_name, I2C_NAME_SIZE);
1212         data->type = kind;
1213
1214         data->valid = 0;
1215         init_MUTEX(&data->update_lock);
1216
1217         /* Tell the I2C layer a new client has arrived */
1218         if ((err = i2c_attach_client(new_client)))
1219                 goto ERROR2;
1220
1221         /* attach secondary i2c lm75-like clients */
1222         if (!is_isa) {
1223                 if ((err = w83781d_detect_subclients(adapter, address,
1224                                 kind, new_client)))
1225                         goto ERROR3;
1226         } else {
1227                 data->lm75[0] = NULL;
1228                 data->lm75[1] = NULL;
1229         }
1230
1231         /* Initialize the chip */
1232         w83781d_init_client(new_client);
1233
1234         /* A few vars need to be filled upon startup */
1235         for (i = 1; i <= 3; i++) {
1236                 data->fan_min[i - 1] = w83781d_read_value(new_client,
1237                                         W83781D_REG_FAN_MIN(i));
1238         }
1239         if (kind != w83781d && kind != as99127f)
1240                 for (i = 0; i < 4; i++)
1241                         data->pwmenable[i] = 1;
1242
1243         /* Register sysfs hooks */
1244         device_create_file_in(new_client, 0);
1245         if (kind != w83783s && kind != w83697hf)
1246                 device_create_file_in(new_client, 1);
1247         device_create_file_in(new_client, 2);
1248         device_create_file_in(new_client, 3);
1249         device_create_file_in(new_client, 4);
1250         device_create_file_in(new_client, 5);
1251         device_create_file_in(new_client, 6);
1252         if (kind != as99127f && kind != w83781d && kind != w83783s) {
1253                 device_create_file_in(new_client, 7);
1254                 device_create_file_in(new_client, 8);
1255         }
1256
1257         device_create_file_fan(new_client, 1);
1258         device_create_file_fan(new_client, 2);
1259         if (kind != w83697hf)
1260                 device_create_file_fan(new_client, 3);
1261
1262         device_create_file_temp(new_client, 1);
1263         device_create_file_temp(new_client, 2);
1264         if (kind != w83783s && kind != w83697hf)
1265                 device_create_file_temp(new_client, 3);
1266
1267         if (kind != w83697hf)
1268                 device_create_file_vid(new_client);
1269
1270         if (kind != w83697hf)
1271                 device_create_file_vrm(new_client);
1272
1273         device_create_file_fan_div(new_client, 1);
1274         device_create_file_fan_div(new_client, 2);
1275         if (kind != w83697hf)
1276                 device_create_file_fan_div(new_client, 3);
1277
1278         device_create_file_alarms(new_client);
1279
1280         device_create_file_beep(new_client);
1281
1282         if (kind != w83781d && kind != as99127f) {
1283                 device_create_file_pwm(new_client, 1);
1284                 device_create_file_pwm(new_client, 2);
1285                 device_create_file_pwmenable(new_client, 2);
1286         }
1287         if (kind == w83782d && !is_isa) {
1288                 device_create_file_pwm(new_client, 3);
1289                 device_create_file_pwm(new_client, 4);
1290         }
1291
1292         if (kind != as99127f && kind != w83781d) {
1293                 device_create_file_sensor(new_client, 1);
1294                 device_create_file_sensor(new_client, 2);
1295                 if (kind != w83783s && kind != w83697hf)
1296                         device_create_file_sensor(new_client, 3);
1297         }
1298 #ifdef W83781D_RT
1299         if (kind == w83781d) {
1300                 device_create_file_rt(new_client, 1);
1301                 device_create_file_rt(new_client, 2);
1302                 device_create_file_rt(new_client, 3);
1303         }
1304 #endif
1305
1306         return 0;
1307
1308 ERROR3:
1309         i2c_detach_client(new_client);
1310 ERROR2:
1311         kfree(data);
1312 ERROR1:
1313         if (is_isa)
1314                 release_region(address, W83781D_EXTENT);
1315 ERROR0:
1316         return err;
1317 }
1318
1319 static int
1320 w83781d_detach_client(struct i2c_client *client)
1321 {
1322         int err;
1323
1324         if (i2c_is_isa_client(client))
1325                 release_region(client->addr, W83781D_EXTENT);
1326
1327         if ((err = i2c_detach_client(client))) {
1328                 dev_err(&client->dev,
1329                        "Client deregistration failed, client not detached.\n");
1330                 return err;
1331         }
1332
1333         kfree(i2c_get_clientdata(client));
1334
1335         return 0;
1336 }
1337
1338 /* The SMBus locks itself, usually, but nothing may access the Winbond between
1339    bank switches. ISA access must always be locked explicitly!
1340    We ignore the W83781D BUSY flag at this moment - it could lead to deadlocks,
1341    would slow down the W83781D access and should not be necessary.
1342    There are some ugly typecasts here, but the good news is - they should
1343    nowhere else be necessary! */
1344 static int
1345 w83781d_read_value(struct i2c_client *client, u16 reg)
1346 {
1347         struct w83781d_data *data = i2c_get_clientdata(client);
1348         int res, word_sized, bank;
1349         struct i2c_client *cl;
1350
1351         down(&data->lock);
1352         if (i2c_is_isa_client(client)) {
1353                 word_sized = (((reg & 0xff00) == 0x100)
1354                               || ((reg & 0xff00) == 0x200))
1355                     && (((reg & 0x00ff) == 0x50)
1356                         || ((reg & 0x00ff) == 0x53)
1357                         || ((reg & 0x00ff) == 0x55));
1358                 if (reg & 0xff00) {
1359                         outb_p(W83781D_REG_BANK,
1360                                client->addr + W83781D_ADDR_REG_OFFSET);
1361                         outb_p(reg >> 8,
1362                                client->addr + W83781D_DATA_REG_OFFSET);
1363                 }
1364                 outb_p(reg & 0xff, client->addr + W83781D_ADDR_REG_OFFSET);
1365                 res = inb_p(client->addr + W83781D_DATA_REG_OFFSET);
1366                 if (word_sized) {
1367                         outb_p((reg & 0xff) + 1,
1368                                client->addr + W83781D_ADDR_REG_OFFSET);
1369                         res =
1370                             (res << 8) + inb_p(client->addr +
1371                                                W83781D_DATA_REG_OFFSET);
1372                 }
1373                 if (reg & 0xff00) {
1374                         outb_p(W83781D_REG_BANK,
1375                                client->addr + W83781D_ADDR_REG_OFFSET);
1376                         outb_p(0, client->addr + W83781D_DATA_REG_OFFSET);
1377                 }
1378         } else {
1379                 bank = (reg >> 8) & 0x0f;
1380                 if (bank > 2)
1381                         /* switch banks */
1382                         i2c_smbus_write_byte_data(client, W83781D_REG_BANK,
1383                                                   bank);
1384                 if (bank == 0 || bank > 2) {
1385                         res = i2c_smbus_read_byte_data(client, reg & 0xff);
1386                 } else {
1387                         /* switch to subclient */
1388                         cl = data->lm75[bank - 1];
1389                         /* convert from ISA to LM75 I2C addresses */
1390                         switch (reg & 0xff) {
1391                         case 0x50:      /* TEMP */
1392                                 res = swab16(i2c_smbus_read_word_data(cl, 0));
1393                                 break;
1394                         case 0x52:      /* CONFIG */
1395                                 res = i2c_smbus_read_byte_data(cl, 1);
1396                                 break;
1397                         case 0x53:      /* HYST */
1398                                 res = swab16(i2c_smbus_read_word_data(cl, 2));
1399                                 break;
1400                         case 0x55:      /* OVER */
1401                         default:
1402                                 res = swab16(i2c_smbus_read_word_data(cl, 3));
1403                                 break;
1404                         }
1405                 }
1406                 if (bank > 2)
1407                         i2c_smbus_write_byte_data(client, W83781D_REG_BANK, 0);
1408         }
1409         up(&data->lock);
1410         return res;
1411 }
1412
1413 static int
1414 w83781d_write_value(struct i2c_client *client, u16 reg, u16 value)
1415 {
1416         struct w83781d_data *data = i2c_get_clientdata(client);
1417         int word_sized, bank;
1418         struct i2c_client *cl;
1419
1420         down(&data->lock);
1421         if (i2c_is_isa_client(client)) {
1422                 word_sized = (((reg & 0xff00) == 0x100)
1423                               || ((reg & 0xff00) == 0x200))
1424                     && (((reg & 0x00ff) == 0x53)
1425                         || ((reg & 0x00ff) == 0x55));
1426                 if (reg & 0xff00) {
1427                         outb_p(W83781D_REG_BANK,
1428                                client->addr + W83781D_ADDR_REG_OFFSET);
1429                         outb_p(reg >> 8,
1430                                client->addr + W83781D_DATA_REG_OFFSET);
1431                 }
1432                 outb_p(reg & 0xff, client->addr + W83781D_ADDR_REG_OFFSET);
1433                 if (word_sized) {
1434                         outb_p(value >> 8,
1435                                client->addr + W83781D_DATA_REG_OFFSET);
1436                         outb_p((reg & 0xff) + 1,
1437                                client->addr + W83781D_ADDR_REG_OFFSET);
1438                 }
1439                 outb_p(value & 0xff, client->addr + W83781D_DATA_REG_OFFSET);
1440                 if (reg & 0xff00) {
1441                         outb_p(W83781D_REG_BANK,
1442                                client->addr + W83781D_ADDR_REG_OFFSET);
1443                         outb_p(0, client->addr + W83781D_DATA_REG_OFFSET);
1444                 }
1445         } else {
1446                 bank = (reg >> 8) & 0x0f;
1447                 if (bank > 2)
1448                         /* switch banks */
1449                         i2c_smbus_write_byte_data(client, W83781D_REG_BANK,
1450                                                   bank);
1451                 if (bank == 0 || bank > 2) {
1452                         i2c_smbus_write_byte_data(client, reg & 0xff,
1453                                                   value & 0xff);
1454                 } else {
1455                         /* switch to subclient */
1456                         cl = data->lm75[bank - 1];
1457                         /* convert from ISA to LM75 I2C addresses */
1458                         switch (reg & 0xff) {
1459                         case 0x52:      /* CONFIG */
1460                                 i2c_smbus_write_byte_data(cl, 1, value & 0xff);
1461                                 break;
1462                         case 0x53:      /* HYST */
1463                                 i2c_smbus_write_word_data(cl, 2, swab16(value));
1464                                 break;
1465                         case 0x55:      /* OVER */
1466                                 i2c_smbus_write_word_data(cl, 3, swab16(value));
1467                                 break;
1468                         }
1469                 }
1470                 if (bank > 2)
1471                         i2c_smbus_write_byte_data(client, W83781D_REG_BANK, 0);
1472         }
1473         up(&data->lock);
1474         return 0;
1475 }
1476
1477 /* Called when we have found a new W83781D. It should set limits, etc. */
1478 static void
1479 w83781d_init_client(struct i2c_client *client)
1480 {
1481         struct w83781d_data *data = i2c_get_clientdata(client);
1482         int vid = 0, i, p;
1483         int type = data->type;
1484         u8 tmp;
1485
1486         if (init && type != as99127f) { /* this resets registers we don't have
1487                                            documentation for on the as99127f */
1488                 /* save these registers */
1489                 i = w83781d_read_value(client, W83781D_REG_BEEP_CONFIG);
1490                 p = w83781d_read_value(client, W83781D_REG_PWMCLK12);
1491                 /* Reset all except Watchdog values and last conversion values
1492                    This sets fan-divs to 2, among others */
1493                 w83781d_write_value(client, W83781D_REG_CONFIG, 0x80);
1494                 /* Restore the registers and disable power-on abnormal beep.
1495                    This saves FAN 1/2/3 input/output values set by BIOS. */
1496                 w83781d_write_value(client, W83781D_REG_BEEP_CONFIG, i | 0x80);
1497                 w83781d_write_value(client, W83781D_REG_PWMCLK12, p);
1498                 /* Disable master beep-enable (reset turns it on).
1499                    Individual beep_mask should be reset to off but for some reason
1500                    disabling this bit helps some people not get beeped */
1501                 w83781d_write_value(client, W83781D_REG_BEEP_INTS2, 0);
1502         }
1503
1504         if (type != w83697hf) {
1505                 vid = w83781d_read_value(client, W83781D_REG_VID_FANDIV) & 0x0f;
1506                 vid |=
1507                     (w83781d_read_value(client, W83781D_REG_CHIPID) & 0x01) <<
1508                     4;
1509                 data->vrm = DEFAULT_VRM;
1510                 vid = vid_from_reg(vid, data->vrm);
1511         }
1512
1513         if ((type != w83781d) && (type != as99127f)) {
1514                 tmp = w83781d_read_value(client, W83781D_REG_SCFG1);
1515                 for (i = 1; i <= 3; i++) {
1516                         if (!(tmp & BIT_SCFG1[i - 1])) {
1517                                 data->sens[i - 1] = W83781D_DEFAULT_BETA;
1518                         } else {
1519                                 if (w83781d_read_value
1520                                     (client,
1521                                      W83781D_REG_SCFG2) & BIT_SCFG2[i - 1])
1522                                         data->sens[i - 1] = 1;
1523                                 else
1524                                         data->sens[i - 1] = 2;
1525                         }
1526                         if ((type == w83783s || type == w83697hf) && (i == 2))
1527                                 break;
1528                 }
1529         }
1530 #ifdef W83781D_RT
1531 /*
1532    Fill up the RT Tables.
1533    We assume that they are 32 bytes long, in order for temp 1-3.
1534    Data sheet documentation is sparse.
1535    We also assume that it is only for the 781D although I suspect
1536    that the others support it as well....
1537 */
1538
1539         if (init && type == w83781d) {
1540                 u16 k = 0;
1541 /*
1542     Auto-indexing doesn't seem to work...
1543     w83781d_write_value(client,W83781D_REG_RT_IDX,0);
1544 */
1545                 for (i = 0; i < 3; i++) {
1546                         int j;
1547                         for (j = 0; j < 32; j++) {
1548                                 w83781d_write_value(client,
1549                                                     W83781D_REG_RT_IDX, k++);
1550                                 data->rt[i][j] =
1551                                     w83781d_read_value(client,
1552                                                        W83781D_REG_RT_VAL);
1553                         }
1554                 }
1555         }
1556 #endif                          /* W83781D_RT */
1557
1558         if (init) {
1559                 if (type != w83783s && type != w83697hf) {
1560                         w83781d_write_value(client, W83781D_REG_TEMP3_CONFIG,
1561                                             0x00);
1562                 }
1563                 if (type != w83781d) {
1564                         /* enable comparator mode for temp2 and temp3 so
1565                            alarm indication will work correctly */
1566                         i = w83781d_read_value(client, W83781D_REG_IRQ);
1567                         if (!(i & 0x40))
1568                                 w83781d_write_value(client, W83781D_REG_IRQ,
1569                                                     i | 0x40);
1570                 }
1571         }
1572
1573         /* Start monitoring */
1574         w83781d_write_value(client, W83781D_REG_CONFIG,
1575                             (w83781d_read_value(client,
1576                                                 W83781D_REG_CONFIG) & 0xf7)
1577                             | 0x01);
1578 }
1579
1580 static struct w83781d_data *w83781d_update_device(struct device *dev)
1581 {
1582         struct i2c_client *client = to_i2c_client(dev);
1583         struct w83781d_data *data = i2c_get_clientdata(client);
1584         int i;
1585
1586         down(&data->update_lock);
1587
1588         if (time_after
1589             (jiffies - data->last_updated, (unsigned long) (HZ + HZ / 2))
1590             || time_before(jiffies, data->last_updated) || !data->valid) {
1591                 pr_debug("Starting device update\n");
1592
1593                 for (i = 0; i <= 8; i++) {
1594                         if ((data->type == w83783s || data->type == w83697hf)
1595                             && (i == 1))
1596                                 continue;       /* 783S has no in1 */
1597                         data->in[i] =
1598                             w83781d_read_value(client, W83781D_REG_IN(i));
1599                         data->in_min[i] =
1600                             w83781d_read_value(client, W83781D_REG_IN_MIN(i));
1601                         data->in_max[i] =
1602                             w83781d_read_value(client, W83781D_REG_IN_MAX(i));
1603                         if ((data->type != w83782d) && (data->type != w83697hf)
1604                             && (data->type != w83627hf) && (i == 6))
1605                                 break;
1606                 }
1607                 for (i = 1; i <= 3; i++) {
1608                         data->fan[i - 1] =
1609                             w83781d_read_value(client, W83781D_REG_FAN(i));
1610                         data->fan_min[i - 1] =
1611                             w83781d_read_value(client, W83781D_REG_FAN_MIN(i));
1612                 }
1613                 if (data->type != w83781d && data->type != as99127f) {
1614                         for (i = 1; i <= 4; i++) {
1615                                 data->pwm[i - 1] =
1616                                     w83781d_read_value(client,
1617                                                        W83781D_REG_PWM(i));
1618                                 if ((data->type != w83782d
1619                                      || i2c_is_isa_client(client))
1620                                     && i == 2)
1621                                         break;
1622                         }
1623                         /* Only PWM2 can be disabled */
1624                         data->pwmenable[1] = (w83781d_read_value(client,
1625                                               W83781D_REG_PWMCLK12) & 0x08) >> 3;
1626                 }
1627
1628                 data->temp = w83781d_read_value(client, W83781D_REG_TEMP(1));
1629                 data->temp_max =
1630                     w83781d_read_value(client, W83781D_REG_TEMP_OVER(1));
1631                 data->temp_max_hyst =
1632                     w83781d_read_value(client, W83781D_REG_TEMP_HYST(1));
1633                 data->temp_add[0] =
1634                     w83781d_read_value(client, W83781D_REG_TEMP(2));
1635                 data->temp_max_add[0] =
1636                     w83781d_read_value(client, W83781D_REG_TEMP_OVER(2));
1637                 data->temp_max_hyst_add[0] =
1638                     w83781d_read_value(client, W83781D_REG_TEMP_HYST(2));
1639                 if (data->type != w83783s && data->type != w83697hf) {
1640                         data->temp_add[1] =
1641                             w83781d_read_value(client, W83781D_REG_TEMP(3));
1642                         data->temp_max_add[1] =
1643                             w83781d_read_value(client,
1644                                                W83781D_REG_TEMP_OVER(3));
1645                         data->temp_max_hyst_add[1] =
1646                             w83781d_read_value(client,
1647                                                W83781D_REG_TEMP_HYST(3));
1648                 }
1649                 i = w83781d_read_value(client, W83781D_REG_VID_FANDIV);
1650                 if (data->type != w83697hf) {
1651                         data->vid = i & 0x0f;
1652                         data->vid |=
1653                             (w83781d_read_value(client, W83781D_REG_CHIPID) &
1654                              0x01)
1655                             << 4;
1656                 }
1657                 data->fan_div[0] = (i >> 4) & 0x03;
1658                 data->fan_div[1] = (i >> 6) & 0x03;
1659                 if (data->type != w83697hf) {
1660                         data->fan_div[2] = (w83781d_read_value(client,
1661                                                                W83781D_REG_PIN)
1662                                             >> 6) & 0x03;
1663                 }
1664                 if ((data->type != w83781d) && (data->type != as99127f)) {
1665                         i = w83781d_read_value(client, W83781D_REG_VBAT);
1666                         data->fan_div[0] |= (i >> 3) & 0x04;
1667                         data->fan_div[1] |= (i >> 4) & 0x04;
1668                         if (data->type != w83697hf)
1669                                 data->fan_div[2] |= (i >> 5) & 0x04;
1670                 }
1671                 data->alarms =
1672                     w83781d_read_value(client,
1673                                        W83781D_REG_ALARM1) +
1674                     (w83781d_read_value(client, W83781D_REG_ALARM2) << 8);
1675                 if ((data->type == w83782d) || (data->type == w83627hf)) {
1676                         data->alarms |=
1677                             w83781d_read_value(client,
1678                                                W83781D_REG_ALARM3) << 16;
1679                 }
1680                 i = w83781d_read_value(client, W83781D_REG_BEEP_INTS2);
1681                 data->beep_enable = i >> 7;
1682                 data->beep_mask = ((i & 0x7f) << 8) +
1683                     w83781d_read_value(client, W83781D_REG_BEEP_INTS1);
1684                 if ((data->type != w83781d) && (data->type != as99127f)) {
1685                         data->beep_mask |=
1686                             w83781d_read_value(client,
1687                                                W83781D_REG_BEEP_INTS3) << 16;
1688                 }
1689                 data->last_updated = jiffies;
1690                 data->valid = 1;
1691         }
1692
1693         up(&data->update_lock);
1694
1695         return data;
1696 }
1697
1698 static int __init
1699 sensors_w83781d_init(void)
1700 {
1701         return i2c_add_driver(&w83781d_driver);
1702 }
1703
1704 static void __exit
1705 sensors_w83781d_exit(void)
1706 {
1707         i2c_del_driver(&w83781d_driver);
1708 }
1709
1710 MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl>, "
1711               "Philip Edelbrock <phil@netroedge.com>, "
1712               "and Mark Studebaker <mdsxyz123@yahoo.com>");
1713 MODULE_DESCRIPTION("W83781D driver");
1714 MODULE_LICENSE("GPL");
1715
1716 module_init(sensors_w83781d_init);
1717 module_exit(sensors_w83781d_exit);