drivers/ide/ide-iops.c

   1 /*
   2  * linux/drivers/ide/ide-iops.c Version 0.37    Mar 05, 2003
   3  *
   4  *  Copyright (C) 2000-2002     Andre Hedrick <andre@linux-ide.org>
   5  *  Copyright (C) 2003          Red Hat <alan@redhat.com>
   6  *
   7  */
   8
   9 #include <linux/module.h>
  10 #include <linux/types.h>
  11 #include <linux/string.h>
  12 #include <linux/kernel.h>
  13 #include <linux/timer.h>
  14 #include <linux/mm.h>
  15 #include <linux/interrupt.h>
  16 #include <linux/major.h>
  17 #include <linux/errno.h>
  18 #include <linux/genhd.h>
  19 #include <linux/blkpg.h>
  20 #include <linux/slab.h>
  21 #include <linux/pci.h>
  22 #include <linux/delay.h>
  23 #include <linux/hdreg.h>
  24 #include <linux/ide.h>
  25 #include <linux/bitops.h>
  26 #include <linux/nmi.h>
  27
  28 #include <asm/byteorder.h>
  29 #include <asm/irq.h>
  30 #include <asm/uaccess.h>
  31 #include <asm/io.h>
  32
  33 /*
  34  *      Conventional PIO operations for ATA devices
  35  */
  36
  37 static u8 ide_inb (unsigned long port)
  38 {
  39         return (u8) inb(port);
  40 }
  41
  42 static u16 ide_inw (unsigned long port)
  43 {
  44         return (u16) inw(port);
  45 }
  46
  47 static void ide_insw (unsigned long port, void *addr, u32 count)
  48 {
  49         insw(port, addr, count);
  50 }
  51
  52 static u32 ide_inl (unsigned long port)
  53 {
  54         return (u32) inl(port);
  55 }
  56
  57 static void ide_insl (unsigned long port, void *addr, u32 count)
  58 {
  59         insl(port, addr, count);
  60 }
  61
  62 static void ide_outb (u8 val, unsigned long port)
  63 {
  64         outb(val, port);
  65 }
  66
  67 static void ide_outbsync (ide_drive_t *drive, u8 addr, unsigned long port)
  68 {
  69         outb(addr, port);
  70 }
  71
  72 static void ide_outw (u16 val, unsigned long port)
  73 {
  74         outw(val, port);
  75 }
  76
  77 static void ide_outsw (unsigned long port, void *addr, u32 count)
  78 {
  79         outsw(port, addr, count);
  80 }
  81
  82 static void ide_outl (u32 val, unsigned long port)
  83 {
  84         outl(val, port);
  85 }
  86
  87 static void ide_outsl (unsigned long port, void *addr, u32 count)
  88 {
  89         outsl(port, addr, count);
  90 }
  91
  92 void default_hwif_iops (ide_hwif_t *hwif)
  93 {
  94         hwif->OUTB      = ide_outb;
  95         hwif->OUTBSYNC  = ide_outbsync;
  96         hwif->OUTW      = ide_outw;
  97         hwif->OUTL      = ide_outl;
  98         hwif->OUTSW     = ide_outsw;
  99         hwif->OUTSL     = ide_outsl;
 100         hwif->INB       = ide_inb;
 101         hwif->INW       = ide_inw;
 102         hwif->INL       = ide_inl;
 103         hwif->INSW      = ide_insw;
 104         hwif->INSL      = ide_insl;
 105 }
 106
 107 /*
 108  *      MMIO operations, typically used for SATA controllers
 109  */
 110
 111 static u8 ide_mm_inb (unsigned long port)
 112 {
 113         return (u8) readb((void __iomem *) port);
 114 }
 115
 116 static u16 ide_mm_inw (unsigned long port)
 117 {
 118         return (u16) readw((void __iomem *) port);
 119 }
 120
 121 static void ide_mm_insw (unsigned long port, void *addr, u32 count)
 122 {
 123         __ide_mm_insw((void __iomem *) port, addr, count);
 124 }
 125
 126 static u32 ide_mm_inl (unsigned long port)
 127 {
 128         return (u32) readl((void __iomem *) port);
 129 }
 130
 131 static void ide_mm_insl (unsigned long port, void *addr, u32 count)
 132 {
 133         __ide_mm_insl((void __iomem *) port, addr, count);
 134 }
 135
 136 static void ide_mm_outb (u8 value, unsigned long port)
 137 {
 138         writeb(value, (void __iomem *) port);
 139 }
 140
 141 static void ide_mm_outbsync (ide_drive_t *drive, u8 value, unsigned long port)
 142 {
 143         writeb(value, (void __iomem *) port);
 144 }
 145
 146 static void ide_mm_outw (u16 value, unsigned long port)
 147 {
 148         writew(value, (void __iomem *) port);
 149 }
 150
 151 static void ide_mm_outsw (unsigned long port, void *addr, u32 count)
 152 {
 153         __ide_mm_outsw((void __iomem *) port, addr, count);
 154 }
 155
 156 static void ide_mm_outl (u32 value, unsigned long port)
 157 {
 158         writel(value, (void __iomem *) port);
 159 }
 160
 161 static void ide_mm_outsl (unsigned long port, void *addr, u32 count)
 162 {
 163         __ide_mm_outsl((void __iomem *) port, addr, count);
 164 }
 165
 166 void default_hwif_mmiops (ide_hwif_t *hwif)
 167 {
 168         hwif->OUTB      = ide_mm_outb;
 169         /* Most systems will need to override OUTBSYNC, alas however
 170            this one is controller specific! */
 171         hwif->OUTBSYNC  = ide_mm_outbsync;
 172         hwif->OUTW      = ide_mm_outw;
 173         hwif->OUTL      = ide_mm_outl;
 174         hwif->OUTSW     = ide_mm_outsw;
 175         hwif->OUTSL     = ide_mm_outsl;
 176         hwif->INB       = ide_mm_inb;
 177         hwif->INW       = ide_mm_inw;
 178         hwif->INL       = ide_mm_inl;
 179         hwif->INSW      = ide_mm_insw;
 180         hwif->INSL      = ide_mm_insl;
 181 }
 182
 183 EXPORT_SYMBOL(default_hwif_mmiops);
 184
 185 u32 ide_read_24 (ide_drive_t *drive)
 186 {
 187         u8 hcyl = HWIF(drive)->INB(IDE_HCYL_REG);
 188         u8 lcyl = HWIF(drive)->INB(IDE_LCYL_REG);
 189         u8 sect = HWIF(drive)->INB(IDE_SECTOR_REG);
 190         return (hcyl<<16)|(lcyl<<8)|sect;
 191 }
 192
 193 void SELECT_DRIVE (ide_drive_t *drive)
 194 {
 195         if (HWIF(drive)->selectproc)
 196                 HWIF(drive)->selectproc(drive);
 197         HWIF(drive)->OUTB(drive->select.all, IDE_SELECT_REG);
 198 }
 199
 200 EXPORT_SYMBOL(SELECT_DRIVE);
 201
 202 void SELECT_INTERRUPT (ide_drive_t *drive)
 203 {
 204         if (HWIF(drive)->intrproc)
 205                 HWIF(drive)->intrproc(drive);
 206         else
 207                 HWIF(drive)->OUTB(drive->ctl|2, IDE_CONTROL_REG);
 208 }
 209
 210 void SELECT_MASK (ide_drive_t *drive, int mask)
 211 {
 212         if (HWIF(drive)->maskproc)
 213                 HWIF(drive)->maskproc(drive, mask);
 214 }
 215
 216 void QUIRK_LIST (ide_drive_t *drive)
 217 {
 218         if (HWIF(drive)->quirkproc)
 219                 drive->quirk_list = HWIF(drive)->quirkproc(drive);
 220 }
 221
 222 /*
 223  * Some localbus EIDE interfaces require a special access sequence
 224  * when using 32-bit I/O instructions to transfer data.  We call this
 225  * the "vlb_sync" sequence, which consists of three successive reads
 226  * of the sector count register location, with interrupts disabled
 227  * to ensure that the reads all happen together.
 228  */
 229 static void ata_vlb_sync(ide_drive_t *drive, unsigned long port)
 230 {
 231         (void) HWIF(drive)->INB(port);
 232         (void) HWIF(drive)->INB(port);
 233         (void) HWIF(drive)->INB(port);
 234 }
 235
 236 /*
 237  * This is used for most PIO data transfers *from* the IDE interface
 238  */
 239 static void ata_input_data(ide_drive_t *drive, void *buffer, u32 wcount)
 240 {
 241         ide_hwif_t *hwif        = HWIF(drive);
 242         u8 io_32bit             = drive->io_32bit;
 243
 244         if (io_32bit) {
 245                 if (io_32bit & 2) {
 246                         unsigned long flags;
 247                         local_irq_save(flags);
 248                         ata_vlb_sync(drive, IDE_NSECTOR_REG);
 249                         hwif->INSL(IDE_DATA_REG, buffer, wcount);
 250                         local_irq_restore(flags);
 251                 } else
 252                         hwif->INSL(IDE_DATA_REG, buffer, wcount);
 253         } else {
 254                 hwif->INSW(IDE_DATA_REG, buffer, wcount<<1);
 255         }
 256 }
 257
 258 /*
 259  * This is used for most PIO data transfers *to* the IDE interface
 260  */
 261 static void ata_output_data(ide_drive_t *drive, void *buffer, u32 wcount)
 262 {
 263         ide_hwif_t *hwif        = HWIF(drive);
 264         u8 io_32bit             = drive->io_32bit;
 265
 266         if (io_32bit) {
 267                 if (io_32bit & 2) {
 268                         unsigned long flags;
 269                         local_irq_save(flags);
 270                         ata_vlb_sync(drive, IDE_NSECTOR_REG);
 271                         hwif->OUTSL(IDE_DATA_REG, buffer, wcount);
 272                         local_irq_restore(flags);
 273                 } else
 274                         hwif->OUTSL(IDE_DATA_REG, buffer, wcount);
 275         } else {
 276                 hwif->OUTSW(IDE_DATA_REG, buffer, wcount<<1);
 277         }
 278 }
 279
 280 /*
 281  * The following routines are mainly used by the ATAPI drivers.
 282  *
 283  * These routines will round up any request for an odd number of bytes,
 284  * so if an odd bytecount is specified, be sure that there's at least one
 285  * extra byte allocated for the buffer.
 286  */
 287
 288 static void atapi_input_bytes(ide_drive_t *drive, void *buffer, u32 bytecount)
 289 {
 290         ide_hwif_t *hwif = HWIF(drive);
 291
 292         ++bytecount;
 293 #if defined(CONFIG_ATARI) || defined(CONFIG_Q40)
 294         if (MACH_IS_ATARI || MACH_IS_Q40) {
 295                 /* Atari has a byte-swapped IDE interface */
 296                 insw_swapw(IDE_DATA_REG, buffer, bytecount / 2);
 297                 return;
 298         }
 299 #endif /* CONFIG_ATARI || CONFIG_Q40 */
 300         hwif->ata_input_data(drive, buffer, bytecount / 4);
 301         if ((bytecount & 0x03) >= 2)
 302                 hwif->INSW(IDE_DATA_REG, ((u8 *)buffer)+(bytecount & ~0x03), 1);
 303 }
 304
 305 static void atapi_output_bytes(ide_drive_t *drive, void *buffer, u32 bytecount)
 306 {
 307         ide_hwif_t *hwif = HWIF(drive);
 308
 309         ++bytecount;
 310 #if defined(CONFIG_ATARI) || defined(CONFIG_Q40)
 311         if (MACH_IS_ATARI || MACH_IS_Q40) {
 312                 /* Atari has a byte-swapped IDE interface */
 313                 outsw_swapw(IDE_DATA_REG, buffer, bytecount / 2);
 314                 return;
 315         }
 316 #endif /* CONFIG_ATARI || CONFIG_Q40 */
 317         hwif->ata_output_data(drive, buffer, bytecount / 4);
 318         if ((bytecount & 0x03) >= 2)
 319                 hwif->OUTSW(IDE_DATA_REG, ((u8*)buffer)+(bytecount & ~0x03), 1);
 320 }
 321
 322 void default_hwif_transport(ide_hwif_t *hwif)
 323 {
 324         hwif->ata_input_data            = ata_input_data;
 325         hwif->ata_output_data           = ata_output_data;
 326         hwif->atapi_input_bytes         = atapi_input_bytes;
 327         hwif->atapi_output_bytes        = atapi_output_bytes;
 328 }
 329
 330 /*
 331  * Beginning of Taskfile OPCODE Library and feature sets.
 332  */
 333 void ide_fix_driveid (struct hd_driveid *id)
 334 {
 335 #ifndef __LITTLE_ENDIAN
 336 # ifdef __BIG_ENDIAN
 337         int i;
 338         u16 *stringcast;
 339
 340         id->config         = __le16_to_cpu(id->config);
 341         id->cyls           = __le16_to_cpu(id->cyls);
 342         id->reserved2      = __le16_to_cpu(id->reserved2);
 343         id->heads          = __le16_to_cpu(id->heads);
 344         id->track_bytes    = __le16_to_cpu(id->track_bytes);
 345         id->sector_bytes   = __le16_to_cpu(id->sector_bytes);
 346         id->sectors        = __le16_to_cpu(id->sectors);
 347         id->vendor0        = __le16_to_cpu(id->vendor0);
 348         id->vendor1        = __le16_to_cpu(id->vendor1);
 349         id->vendor2        = __le16_to_cpu(id->vendor2);
 350         stringcast = (u16 *)&id->serial_no[0];
 351         for (i = 0; i < (20/2); i++)
 352                 stringcast[i] = __le16_to_cpu(stringcast[i]);
 353         id->buf_type       = __le16_to_cpu(id->buf_type);
 354         id->buf_size       = __le16_to_cpu(id->buf_size);
 355         id->ecc_bytes      = __le16_to_cpu(id->ecc_bytes);
 356         stringcast = (u16 *)&id->fw_rev[0];
 357         for (i = 0; i < (8/2); i++)
 358                 stringcast[i] = __le16_to_cpu(stringcast[i]);
 359         stringcast = (u16 *)&id->model[0];
 360         for (i = 0; i < (40/2); i++)
 361                 stringcast[i] = __le16_to_cpu(stringcast[i]);
 362         id->dword_io       = __le16_to_cpu(id->dword_io);
 363         id->reserved50     = __le16_to_cpu(id->reserved50);
 364         id->field_valid    = __le16_to_cpu(id->field_valid);
 365         id->cur_cyls       = __le16_to_cpu(id->cur_cyls);
 366         id->cur_heads      = __le16_to_cpu(id->cur_heads);
 367         id->cur_sectors    = __le16_to_cpu(id->cur_sectors);
 368         id->cur_capacity0  = __le16_to_cpu(id->cur_capacity0);
 369         id->cur_capacity1  = __le16_to_cpu(id->cur_capacity1);
 370         id->lba_capacity   = __le32_to_cpu(id->lba_capacity);
 371         id->dma_1word      = __le16_to_cpu(id->dma_1word);
 372         id->dma_mword      = __le16_to_cpu(id->dma_mword);
 373         id->eide_pio_modes = __le16_to_cpu(id->eide_pio_modes);
 374         id->eide_dma_min   = __le16_to_cpu(id->eide_dma_min);
 375         id->eide_dma_time  = __le16_to_cpu(id->eide_dma_time);
 376         id->eide_pio       = __le16_to_cpu(id->eide_pio);
 377         id->eide_pio_iordy = __le16_to_cpu(id->eide_pio_iordy);
 378         for (i = 0; i < 2; ++i)
 379                 id->words69_70[i] = __le16_to_cpu(id->words69_70[i]);
 380         for (i = 0; i < 4; ++i)
 381                 id->words71_74[i] = __le16_to_cpu(id->words71_74[i]);
 382         id->queue_depth    = __le16_to_cpu(id->queue_depth);
 383         for (i = 0; i < 4; ++i)
 384                 id->words76_79[i] = __le16_to_cpu(id->words76_79[i]);
 385         id->major_rev_num  = __le16_to_cpu(id->major_rev_num);
 386         id->minor_rev_num  = __le16_to_cpu(id->minor_rev_num);
 387         id->command_set_1  = __le16_to_cpu(id->command_set_1);
 388         id->command_set_2  = __le16_to_cpu(id->command_set_2);
 389         id->cfsse          = __le16_to_cpu(id->cfsse);
 390         id->cfs_enable_1   = __le16_to_cpu(id->cfs_enable_1);
 391         id->cfs_enable_2   = __le16_to_cpu(id->cfs_enable_2);
 392         id->csf_default    = __le16_to_cpu(id->csf_default);
 393         id->dma_ultra      = __le16_to_cpu(id->dma_ultra);
 394         id->trseuc         = __le16_to_cpu(id->trseuc);
 395         id->trsEuc         = __le16_to_cpu(id->trsEuc);
 396         id->CurAPMvalues   = __le16_to_cpu(id->CurAPMvalues);
 397         id->mprc           = __le16_to_cpu(id->mprc);
 398         id->hw_config      = __le16_to_cpu(id->hw_config);
 399         id->acoustic       = __le16_to_cpu(id->acoustic);
 400         id->msrqs          = __le16_to_cpu(id->msrqs);
 401         id->sxfert         = __le16_to_cpu(id->sxfert);
 402         id->sal            = __le16_to_cpu(id->sal);
 403         id->spg            = __le32_to_cpu(id->spg);
 404         id->lba_capacity_2 = __le64_to_cpu(id->lba_capacity_2);
 405         for (i = 0; i < 22; i++)
 406                 id->words104_125[i]   = __le16_to_cpu(id->words104_125[i]);
 407         id->last_lun       = __le16_to_cpu(id->last_lun);
 408         id->word127        = __le16_to_cpu(id->word127);
 409         id->dlf            = __le16_to_cpu(id->dlf);
 410         id->csfo           = __le16_to_cpu(id->csfo);
 411         for (i = 0; i < 26; i++)
 412                 id->words130_155[i] = __le16_to_cpu(id->words130_155[i]);
 413         id->word156        = __le16_to_cpu(id->word156);
 414         for (i = 0; i < 3; i++)
 415                 id->words157_159[i] = __le16_to_cpu(id->words157_159[i]);
 416         id->cfa_power      = __le16_to_cpu(id->cfa_power);
 417         for (i = 0; i < 14; i++)
 418                 id->words161_175[i] = __le16_to_cpu(id->words161_175[i]);
 419         for (i = 0; i < 31; i++)
 420                 id->words176_205[i] = __le16_to_cpu(id->words176_205[i]);
 421         for (i = 0; i < 48; i++)
 422                 id->words206_254[i] = __le16_to_cpu(id->words206_254[i]);
 423         id->integrity_word  = __le16_to_cpu(id->integrity_word);
 424 # else
 425 #  error "Please fix <asm/byteorder.h>"
 426 # endif
 427 #endif
 428 }
 429
 430 /* FIXME: exported for use by the USB storage (isd200.c) code only */
 431 EXPORT_SYMBOL(ide_fix_driveid);
 432
 433 void ide_fixstring (u8 *s, const int bytecount, const int byteswap)
 434 {
 435         u8 *p = s, *end = &s[bytecount & ~1]; /* bytecount must be even */
 436
 437         if (byteswap) {
 438                 /* convert from big-endian to host byte order */
 439                 for (p = end ; p != s;) {
 440                         unsigned short *pp = (unsigned short *) (p -= 2);
 441                         *pp = ntohs(*pp);
 442                 }
 443         }
 444         /* strip leading blanks */
 445         while (s != end && *s == ' ')
 446                 ++s;
 447         /* compress internal blanks and strip trailing blanks */
 448         while (s != end && *s) {
 449                 if (*s++ != ' ' || (s != end && *s && *s != ' '))
 450                         *p++ = *(s-1);
 451         }
 452         /* wipe out trailing garbage */
 453         while (p != end)
 454                 *p++ = '\0';
 455 }
 456
 457 EXPORT_SYMBOL(ide_fixstring);
 458
 459 /*
 460  * Needed for PCI irq sharing
 461  */
 462 int drive_is_ready (ide_drive_t *drive)
 463 {
 464         ide_hwif_t *hwif        = HWIF(drive);
 465         u8 stat                 = 0;
 466
 467         if (drive->waiting_for_dma)
 468                 return hwif->ide_dma_test_irq(drive);
 469
 470 #if 0
 471         /* need to guarantee 400ns since last command was issued */
 472         udelay(1);
 473 #endif
 474
 475 #ifdef CONFIG_IDEPCI_SHARE_IRQ
 476         /*
 477          * We do a passive status test under shared PCI interrupts on
 478          * cards that truly share the ATA side interrupt, but may also share
 479          * an interrupt with another pci card/device.  We make no assumptions
 480          * about possible isa-pnp and pci-pnp issues yet.
 481          */
 482         if (IDE_CONTROL_REG)
 483                 stat = hwif->INB(IDE_ALTSTATUS_REG);
 484         else
 485 #endif /* CONFIG_IDEPCI_SHARE_IRQ */
 486                 /* Note: this may clear a pending IRQ!! */
 487                 stat = hwif->INB(IDE_STATUS_REG);
 488
 489         if (stat & BUSY_STAT)
 490                 /* drive busy:  definitely not interrupting */
 491                 return 0;
 492
 493         /* drive ready: *might* be interrupting */
 494         return 1;
 495 }
 496
 497 EXPORT_SYMBOL(drive_is_ready);
 498
 499 /*
 500  * Global for All, and taken from ide-pmac.c. Can be called
 501  * with spinlock held & IRQs disabled, so don't schedule !
 502  */
 503 int wait_for_ready (ide_drive_t *drive, int timeout)
 504 {
 505         ide_hwif_t *hwif        = HWIF(drive);
 506         u8 stat                 = 0;
 507
 508         while(--timeout) {
 509                 stat = hwif->INB(IDE_STATUS_REG);
 510                 if (!(stat & BUSY_STAT)) {
 511                         if (drive->ready_stat == 0)
 512                                 break;
 513                         else if ((stat & drive->ready_stat)||(stat & ERR_STAT))
 514                                 break;
 515                 }
 516                 mdelay(1);
 517         }
 518         if ((stat & ERR_STAT) || timeout <= 0) {
 519                 if (stat & ERR_STAT) {
 520                         printk(KERN_ERR "%s: wait_for_ready, "
 521                                 "error status: %x\n", drive->name, stat);
 522                 }
 523                 return 1;
 524         }
 525         return 0;
 526 }
 527
 528 /*
 529  * This routine busy-waits for the drive status to be not "busy".
 530  * It then checks the status for all of the "good" bits and none
 531  * of the "bad" bits, and if all is okay it returns 0.  All other
 532  * cases return 1 after invoking ide_error() -- caller should just return.
 533  *
 534  * This routine should get fixed to not hog the cpu during extra long waits..
 535  * That could be done by busy-waiting for the first jiffy or two, and then
 536  * setting a timer to wake up at half second intervals thereafter,
 537  * until timeout is achieved, before timing out.
 538  */
 539 int ide_wait_stat (ide_startstop_t *startstop, ide_drive_t *drive, u8 good, u8 bad, unsigned long timeout)
 540 {
 541         ide_hwif_t *hwif = HWIF(drive);
 542         u8 stat;
 543         int i;
 544         unsigned long flags;
 545
 546         /* bail early if we've exceeded max_failures */
 547         if (drive->max_failures && (drive->failures > drive->max_failures)) {
 548                 *startstop = ide_stopped;
 549                 return 1;
 550         }
 551
 552         udelay(1);      /* spec allows drive 400ns to assert "BUSY" */
 553         if ((stat = hwif->INB(IDE_STATUS_REG)) & BUSY_STAT) {
 554                 local_irq_set(flags);
 555                 timeout += jiffies;
 556                 while ((stat = hwif->INB(IDE_STATUS_REG)) & BUSY_STAT) {
 557                         if (time_after(jiffies, timeout)) {
 558                                 /*
 559                                  * One last read after the timeout in case
 560                                  * heavy interrupt load made us not make any
 561                                  * progress during the timeout..
 562                                  */
 563                                 stat = hwif->INB(IDE_STATUS_REG);
 564                                 if (!(stat & BUSY_STAT))
 565                                         break;
 566
 567                                 local_irq_restore(flags);
 568                                 *startstop = ide_error(drive, "status timeout", stat);
 569                                 return 1;
 570                         }
 571                 }
 572                 local_irq_restore(flags);
 573         }
 574         /*
 575          * Allow status to settle, then read it again.
 576          * A few rare drives vastly violate the 400ns spec here,
 577          * so we'll wait up to 10usec for a "good" status
 578          * rather than expensively fail things immediately.
 579          * This fix courtesy of Matthew Faupel & Niccolo Rigacci.
 580          */
 581         for (i = 0; i < 10; i++) {
 582                 udelay(1);
 583                 if (OK_STAT((stat = hwif->INB(IDE_STATUS_REG)), good, bad))
 584                         return 0;
 585         }
 586         *startstop = ide_error(drive, "status error", stat);
 587         return 1;
 588 }
 589
 590 EXPORT_SYMBOL(ide_wait_stat);
 591
 592 /*
 593  *  All hosts that use the 80c ribbon must use!
 594  *  The name is derived from upper byte of word 93 and the 80c ribbon.
 595  */
 596 u8 eighty_ninty_three (ide_drive_t *drive)
 597 {
 598         if(HWIF(drive)->udma_four == 0)
 599                 return 0;
 600
 601         printk(KERN_INFO "%s: hw_config=%04x\n",
 602                          drive->name, drive->id->hw_config);
 603
 604         /* Check for SATA but only if we are ATA5 or higher */
 605         if (drive->id->hw_config == 0 && (drive->id->major_rev_num & 0x7FE0))
 606                 return 1;
 607         if (!(drive->id->hw_config & 0x6000))
 608                 return 0;
 609 #ifndef CONFIG_IDEDMA_IVB
 610         if(!(drive->id->hw_config & 0x4000))
 611                 return 0;
 612 #endif /* CONFIG_IDEDMA_IVB */
 613 /*
 614  * FIXME: enable this after fixing master/slave IDENTIFY order,
 615  *        also ignore the result if the slave device is pre-ATA3 one
 616  */
 617 #if 0
 618         if (!(drive->id->hw_config & 0x2000))
 619                 return 0;
 620 #endif
 621         return 1;
 622 }
 623
 624 EXPORT_SYMBOL(eighty_ninty_three);
 625
 626 int ide_ata66_check (ide_drive_t *drive, ide_task_t *args)
 627 {
 628         if ((args->tfRegister[IDE_COMMAND_OFFSET] == WIN_SETFEATURES) &&
 629             (args->tfRegister[IDE_SECTOR_OFFSET] > XFER_UDMA_2) &&
 630             (args->tfRegister[IDE_FEATURE_OFFSET] == SETFEATURES_XFER)) {
 631 #ifndef CONFIG_IDEDMA_IVB
 632                 if ((drive->id->hw_config & 0x6000) == 0) {
 633 #else /* !CONFIG_IDEDMA_IVB */
 634                 if (((drive->id->hw_config & 0x2000) == 0) ||
 635                     ((drive->id->hw_config & 0x4000) == 0)) {
 636 #endif /* CONFIG_IDEDMA_IVB */
 637                         printk("%s: Speed warnings UDMA 3/4/5 is not "
 638                                 "functional.\n", drive->name);
 639                         return 1;
 640                 }
 641                 if (!HWIF(drive)->udma_four) {
 642                         printk("%s: Speed warnings UDMA 3/4/5 is not "
 643                                 "functional.\n",
 644                                 HWIF(drive)->name);
 645                         return 1;
 646                 }
 647         }
 648         return 0;
 649 }
 650
 651 /*
 652  * Backside of HDIO_DRIVE_CMD call of SETFEATURES_XFER.
 653  * 1 : Safe to update drive->id DMA registers.
 654  * 0 : OOPs not allowed.
 655  */
 656 int set_transfer (ide_drive_t *drive, ide_task_t *args)
 657 {
 658         if ((args->tfRegister[IDE_COMMAND_OFFSET] == WIN_SETFEATURES) &&
 659             (args->tfRegister[IDE_SECTOR_OFFSET] >= XFER_SW_DMA_0) &&
 660             (args->tfRegister[IDE_FEATURE_OFFSET] == SETFEATURES_XFER) &&
 661             (drive->id->dma_ultra ||
 662              drive->id->dma_mword ||
 663              drive->id->dma_1word))
 664                 return 1;
 665
 666         return 0;
 667 }
 668
 669 #ifdef CONFIG_BLK_DEV_IDEDMA
 670 static u8 ide_auto_reduce_xfer (ide_drive_t *drive)
 671 {
 672         if (!drive->crc_count)
 673                 return drive->current_speed;
 674         drive->crc_count = 0;
 675
 676         switch(drive->current_speed) {
 677                 case XFER_UDMA_7:       return XFER_UDMA_6;
 678                 case XFER_UDMA_6:       return XFER_UDMA_5;
 679                 case XFER_UDMA_5:       return XFER_UDMA_4;
 680                 case XFER_UDMA_4:       return XFER_UDMA_3;
 681                 case XFER_UDMA_3:       return XFER_UDMA_2;
 682                 case XFER_UDMA_2:       return XFER_UDMA_1;
 683                 case XFER_UDMA_1:       return XFER_UDMA_0;
 684                         /*
 685                          * OOPS we do not goto non Ultra DMA modes
 686                          * without iCRC's available we force
 687                          * the system to PIO and make the user
 688                          * invoke the ATA-1 ATA-2 DMA modes.
 689                          */
 690                 case XFER_UDMA_0:
 691                 default:                return XFER_PIO_4;
 692         }
 693 }
 694 #endif /* CONFIG_BLK_DEV_IDEDMA */
 695
 696 /*
 697  * Update the
 698  */
 699 int ide_driveid_update (ide_drive_t *drive)
 700 {
 701         ide_hwif_t *hwif        = HWIF(drive);
 702         struct hd_driveid *id;
 703 #if 0
 704         id = kmalloc(SECTOR_WORDS*4, GFP_ATOMIC);
 705         if (!id)
 706                 return 0;
 707
 708         taskfile_lib_get_identify(drive, (char *)&id);
 709
 710         ide_fix_driveid(id);
 711         if (id) {
 712                 drive->id->dma_ultra = id->dma_ultra;
 713                 drive->id->dma_mword = id->dma_mword;
 714                 drive->id->dma_1word = id->dma_1word;
 715                 /* anything more ? */
 716                 kfree(id);
 717         }
 718         return 1;
 719 #else
 720         /*
 721          * Re-read drive->id for possible DMA mode
 722          * change (copied from ide-probe.c)
 723          */
 724         unsigned long timeout, flags;
 725
 726         SELECT_MASK(drive, 1);
 727         if (IDE_CONTROL_REG)
 728                 hwif->OUTB(drive->ctl,IDE_CONTROL_REG);
 729         msleep(50);
 730         hwif->OUTB(WIN_IDENTIFY, IDE_COMMAND_REG);
 731         timeout = jiffies + WAIT_WORSTCASE;
 732         do {
 733                 if (time_after(jiffies, timeout)) {
 734                         SELECT_MASK(drive, 0);
 735                         return 0;       /* drive timed-out */
 736                 }
 737                 msleep(50);     /* give drive a breather */
 738         } while (hwif->INB(IDE_ALTSTATUS_REG) & BUSY_STAT);
 739         msleep(50);     /* wait for IRQ and DRQ_STAT */
 740         if (!OK_STAT(hwif->INB(IDE_STATUS_REG),DRQ_STAT,BAD_R_STAT)) {
 741                 SELECT_MASK(drive, 0);
 742                 printk("%s: CHECK for good STATUS\n", drive->name);
 743                 return 0;
 744         }
 745         local_irq_save(flags);
 746         SELECT_MASK(drive, 0);
 747         id = kmalloc(SECTOR_WORDS*4, GFP_ATOMIC);
 748         if (!id) {
 749                 local_irq_restore(flags);
 750                 return 0;
 751         }
 752         ata_input_data(drive, id, SECTOR_WORDS);
 753         (void) hwif->INB(IDE_STATUS_REG);       /* clear drive IRQ */
 754         local_irq_enable();
 755         local_irq_restore(flags);
 756         ide_fix_driveid(id);
 757         if (id) {
 758                 drive->id->dma_ultra = id->dma_ultra;
 759                 drive->id->dma_mword = id->dma_mword;
 760                 drive->id->dma_1word = id->dma_1word;
 761                 /* anything more ? */
 762                 kfree(id);
 763         }
 764
 765         return 1;
 766 #endif
 767 }
 768
 769 /*
 770  * Similar to ide_wait_stat(), except it never calls ide_error internally.
 771  * This is a kludge to handle the new ide_config_drive_speed() function,
 772  * and should not otherwise be used anywhere.  Eventually, the tuneproc's
 773  * should be updated to return ide_startstop_t, in which case we can get
 774  * rid of this abomination again.  :)   -ml
 775  *
 776  * It is gone..........
 777  *
 778  * const char *msg == consider adding for verbose errors.
 779  */
 780 int ide_config_drive_speed (ide_drive_t *drive, u8 speed)
 781 {
 782         ide_hwif_t *hwif        = HWIF(drive);
 783         int     i, error        = 1;
 784         u8 stat;
 785
 786 //      while (HWGROUP(drive)->busy)
 787 //              msleep(50);
 788
 789 #ifdef CONFIG_BLK_DEV_IDEDMA
 790         if (hwif->ide_dma_check)         /* check if host supports DMA */
 791                 hwif->ide_dma_host_off(drive);
 792 #endif
 793
 794         /*
 795          * Don't use ide_wait_cmd here - it will
 796          * attempt to set_geometry and recalibrate,
 797          * but for some reason these don't work at
 798          * this point (lost interrupt).
 799          */
 800         /*
 801          * Select the drive, and issue the SETFEATURES command
 802          */
 803         disable_irq_nosync(hwif->irq);
 804
 805         /*
 806          *      FIXME: we race against the running IRQ here if
 807          *      this is called from non IRQ context. If we use
 808          *      disable_irq() we hang on the error path. Work
 809          *      is needed.
 810          */
 811
 812         udelay(1);
 813         SELECT_DRIVE(drive);
 814         SELECT_MASK(drive, 0);
 815         udelay(1);
 816         if (IDE_CONTROL_REG)
 817                 hwif->OUTB(drive->ctl | 2, IDE_CONTROL_REG);
 818         hwif->OUTB(speed, IDE_NSECTOR_REG);
 819         hwif->OUTB(SETFEATURES_XFER, IDE_FEATURE_REG);
 820         hwif->OUTB(WIN_SETFEATURES, IDE_COMMAND_REG);
 821         if ((IDE_CONTROL_REG) && (drive->quirk_list == 2))
 822                 hwif->OUTB(drive->ctl, IDE_CONTROL_REG);
 823         udelay(1);
 824         /*
 825          * Wait for drive to become non-BUSY
 826          */
 827         if ((stat = hwif->INB(IDE_STATUS_REG)) & BUSY_STAT) {
 828                 unsigned long flags, timeout;
 829                 local_irq_set(flags);
 830                 timeout = jiffies + WAIT_CMD;
 831                 while ((stat = hwif->INB(IDE_STATUS_REG)) & BUSY_STAT) {
 832                         if (time_after(jiffies, timeout))
 833                                 break;
 834                 }
 835                 local_irq_restore(flags);
 836         }
 837
 838         /*
 839          * Allow status to settle, then read it again.
 840          * A few rare drives vastly violate the 400ns spec here,
 841          * so we'll wait up to 10usec for a "good" status
 842          * rather than expensively fail things immediately.
 843          * This fix courtesy of Matthew Faupel & Niccolo Rigacci.
 844          */
 845         for (i = 0; i < 10; i++) {
 846                 udelay(1);
 847                 if (OK_STAT((stat = hwif->INB(IDE_STATUS_REG)), DRIVE_READY, BUSY_STAT|DRQ_STAT|ERR_STAT)) {
 848                         error = 0;
 849                         break;
 850                 }
 851         }
 852
 853         SELECT_MASK(drive, 0);
 854
 855         enable_irq(hwif->irq);
 856
 857         if (error) {
 858                 (void) ide_dump_status(drive, "set_drive_speed_status", stat);
 859                 return error;
 860         }
 861
 862         drive->id->dma_ultra &= ~0xFF00;
 863         drive->id->dma_mword &= ~0x0F00;
 864         drive->id->dma_1word &= ~0x0F00;
 865
 866 #ifdef CONFIG_BLK_DEV_IDEDMA
 867         if (speed >= XFER_SW_DMA_0)
 868                 hwif->ide_dma_host_on(drive);
 869         else if (hwif->ide_dma_check)   /* check if host supports DMA */
 870                 hwif->ide_dma_off_quietly(drive);
 871 #endif
 872
 873         switch(speed) {
 874                 case XFER_UDMA_7:   drive->id->dma_ultra |= 0x8080; break;
 875                 case XFER_UDMA_6:   drive->id->dma_ultra |= 0x4040; break;
 876                 case XFER_UDMA_5:   drive->id->dma_ultra |= 0x2020; break;
 877                 case XFER_UDMA_4:   drive->id->dma_ultra |= 0x1010; break;
 878                 case XFER_UDMA_3:   drive->id->dma_ultra |= 0x0808; break;
 879                 case XFER_UDMA_2:   drive->id->dma_ultra |= 0x0404; break;
 880                 case XFER_UDMA_1:   drive->id->dma_ultra |= 0x0202; break;
 881                 case XFER_UDMA_0:   drive->id->dma_ultra |= 0x0101; break;
 882                 case XFER_MW_DMA_2: drive->id->dma_mword |= 0x0404; break;
 883                 case XFER_MW_DMA_1: drive->id->dma_mword |= 0x0202; break;
 884                 case XFER_MW_DMA_0: drive->id->dma_mword |= 0x0101; break;
 885                 case XFER_SW_DMA_2: drive->id->dma_1word |= 0x0404; break;
 886                 case XFER_SW_DMA_1: drive->id->dma_1word |= 0x0202; break;
 887                 case XFER_SW_DMA_0: drive->id->dma_1word |= 0x0101; break;
 888                 default: break;
 889         }
 890         if (!drive->init_speed)
 891                 drive->init_speed = speed;
 892         drive->current_speed = speed;
 893         return error;
 894 }
 895
 896 EXPORT_SYMBOL(ide_config_drive_speed);
 897
 898
 899 /*
 900  * This should get invoked any time we exit the driver to
 901  * wait for an interrupt response from a drive.  handler() points
 902  * at the appropriate code to handle the next interrupt, and a
 903  * timer is started to prevent us from waiting forever in case
 904  * something goes wrong (see the ide_timer_expiry() handler later on).
 905  *
 906  * See also ide_execute_command
 907  */
 908 static void __ide_set_handler (ide_drive_t *drive, ide_handler_t *handler,
 909                       unsigned int timeout, ide_expiry_t *expiry)
 910 {
 911         ide_hwgroup_t *hwgroup = HWGROUP(drive);
 912
 913         if (hwgroup->handler != NULL) {
 914                 printk(KERN_CRIT "%s: ide_set_handler: handler not null; "
 915                         "old=%p, new=%p\n",
 916                         drive->name, hwgroup->handler, handler);
 917         }
 918         hwgroup->handler        = handler;
 919         hwgroup->expiry         = expiry;
 920         hwgroup->timer.expires  = jiffies + timeout;
 921         add_timer(&hwgroup->timer);
 922 }
 923
 924 void ide_set_handler (ide_drive_t *drive, ide_handler_t *handler,
 925                       unsigned int timeout, ide_expiry_t *expiry)
 926 {
 927         unsigned long flags;
 928         spin_lock_irqsave(&ide_lock, flags);
 929         __ide_set_handler(drive, handler, timeout, expiry);
 930         spin_unlock_irqrestore(&ide_lock, flags);
 931 }
 932
 933 EXPORT_SYMBOL(ide_set_handler);
 934
 935 /**
 936  *      ide_execute_command     -       execute an IDE command
 937  *      @drive: IDE drive to issue the command against
 938  *      @command: command byte to write
 939  *      @handler: handler for next phase
 940  *      @timeout: timeout for command
 941  *      @expiry:  handler to run on timeout
 942  *
 943  *      Helper function to issue an IDE command. This handles the
 944  *      atomicity requirements, command timing and ensures that the
 945  *      handler and IRQ setup do not race. All IDE command kick off
 946  *      should go via this function or do equivalent locking.
 947  */
 948
 949 void ide_execute_command(ide_drive_t *drive, task_ioreg_t cmd, ide_handler_t *handler, unsigned timeout, ide_expiry_t *expiry)
 950 {
 951         unsigned long flags;
 952         ide_hwgroup_t *hwgroup = HWGROUP(drive);
 953         ide_hwif_t *hwif = HWIF(drive);
 954
 955         spin_lock_irqsave(&ide_lock, flags);
 956
 957         BUG_ON(hwgroup->handler);
 958         hwgroup->handler        = handler;
 959         hwgroup->expiry         = expiry;
 960         hwgroup->timer.expires  = jiffies + timeout;
 961         add_timer(&hwgroup->timer);
 962         hwif->OUTBSYNC(drive, cmd, IDE_COMMAND_REG);
 963         /* Drive takes 400nS to respond, we must avoid the IRQ being
 964            serviced before that.
 965
 966            FIXME: we could skip this delay with care on non shared
 967            devices
 968         */
 969         ndelay(400);
 970         spin_unlock_irqrestore(&ide_lock, flags);
 971 }
 972
 973 EXPORT_SYMBOL(ide_execute_command);
 974
 975
 976 /* needed below */
 977 static ide_startstop_t do_reset1 (ide_drive_t *, int);
 978
 979 /*
 980  * atapi_reset_pollfunc() gets invoked to poll the interface for completion every 50ms
 981  * during an atapi drive reset operation. If the drive has not yet responded,
 982  * and we have not yet hit our maximum waiting time, then the timer is restarted
 983  * for another 50ms.
 984  */
 985 static ide_startstop_t atapi_reset_pollfunc (ide_drive_t *drive)
 986 {
 987         ide_hwgroup_t *hwgroup  = HWGROUP(drive);
 988         ide_hwif_t *hwif        = HWIF(drive);
 989         u8 stat;
 990
 991         SELECT_DRIVE(drive);
 992         udelay (10);
 993
 994         if (OK_STAT(stat = hwif->INB(IDE_STATUS_REG), 0, BUSY_STAT)) {
 995                 printk("%s: ATAPI reset complete\n", drive->name);
 996         } else {
 997                 if (time_before(jiffies, hwgroup->poll_timeout)) {
 998                         BUG_ON(HWGROUP(drive)->handler != NULL);
 999                         ide_set_handler(drive, &atapi_reset_pollfunc, HZ/20, NULL);
1000                         /* continue polling */
1001                         return ide_started;
1002                 }
1003                 /* end of polling */
1004                 hwgroup->polling = 0;
1005                 printk("%s: ATAPI reset timed-out, status=0x%02x\n",
1006                                 drive->name, stat);
1007                 /* do it the old fashioned way */
1008                 return do_reset1(drive, 1);
1009         }
1010         /* done polling */
1011         hwgroup->polling = 0;
1012         hwgroup->resetting = 0;
1013         return ide_stopped;
1014 }
1015
1016 /*
1017  * reset_pollfunc() gets invoked to poll the interface for completion every 50ms
1018  * during an ide reset operation. If the drives have not yet responded,
1019  * and we have not yet hit our maximum waiting time, then the timer is restarted
1020  * for another 50ms.
1021  */
1022 static ide_startstop_t reset_pollfunc (ide_drive_t *drive)
1023 {
1024         ide_hwgroup_t *hwgroup  = HWGROUP(drive);
1025         ide_hwif_t *hwif        = HWIF(drive);
1026         u8 tmp;
1027
1028         if (hwif->reset_poll != NULL) {
1029                 if (hwif->reset_poll(drive)) {
1030                         printk(KERN_ERR "%s: host reset_poll failure for %s.\n",
1031                                 hwif->name, drive->name);
1032                         return ide_stopped;
1033                 }
1034         }
1035
1036         if (!OK_STAT(tmp = hwif->INB(IDE_STATUS_REG), 0, BUSY_STAT)) {
1037                 if (time_before(jiffies, hwgroup->poll_timeout)) {
1038                         BUG_ON(HWGROUP(drive)->handler != NULL);
1039                         ide_set_handler(drive, &reset_pollfunc, HZ/20, NULL);
1040                         /* continue polling */
1041                         return ide_started;
1042                 }
1043                 printk("%s: reset timed-out, status=0x%02x\n", hwif->name, tmp);
1044                 drive->failures++;
1045         } else  {
1046                 printk("%s: reset: ", hwif->name);
1047                 if ((tmp = hwif->INB(IDE_ERROR_REG)) == 1) {
1048                         printk("success\n");
1049                         drive->failures = 0;
1050                 } else {
1051                         drive->failures++;
1052                         printk("master: ");
1053                         switch (tmp & 0x7f) {
1054                                 case 1: printk("passed");
1055                                         break;
1056                                 case 2: printk("formatter device error");
1057                                         break;
1058                                 case 3: printk("sector buffer error");
1059                                         break;
1060                                 case 4: printk("ECC circuitry error");
1061                                         break;
1062                                 case 5: printk("controlling MPU error");
1063                                         break;
1064                                 default:printk("error (0x%02x?)", tmp);
1065                         }
1066                         if (tmp & 0x80)
1067                                 printk("; slave: failed");
1068                         printk("\n");
1069                 }
1070         }
1071         hwgroup->polling = 0;   /* done polling */
1072         hwgroup->resetting = 0; /* done reset attempt */
1073         return ide_stopped;
1074 }
1075
1076 static void check_dma_crc(ide_drive_t *drive)
1077 {
1078 #ifdef CONFIG_BLK_DEV_IDEDMA
1079         if (drive->crc_count) {
1080                 (void) HWIF(drive)->ide_dma_off_quietly(drive);
1081                 ide_set_xfer_rate(drive, ide_auto_reduce_xfer(drive));
1082                 if (drive->current_speed >= XFER_SW_DMA_0)
1083                         (void) HWIF(drive)->ide_dma_on(drive);
1084         } else
1085                 (void)__ide_dma_off(drive);
1086 #endif
1087 }
1088
1089 static void ide_disk_pre_reset(ide_drive_t *drive)
1090 {
1091         int legacy = (drive->id->cfs_enable_2 & 0x0400) ? 0 : 1;
1092
1093         drive->special.all = 0;
1094         drive->special.b.set_geometry = legacy;
1095         drive->special.b.recalibrate  = legacy;
1096         if (OK_TO_RESET_CONTROLLER)
1097                 drive->mult_count = 0;
1098         if (!drive->keep_settings && !drive->using_dma)
1099                 drive->mult_req = 0;
1100         if (drive->mult_req != drive->mult_count)
1101                 drive->special.b.set_multmode = 1;
1102 }
1103
1104 static void pre_reset(ide_drive_t *drive)
1105 {
1106         if (drive->media == ide_disk)
1107                 ide_disk_pre_reset(drive);
1108         else
1109                 drive->post_reset = 1;
1110
1111         if (!drive->keep_settings) {
1112                 if (drive->using_dma) {
1113                         check_dma_crc(drive);
1114                 } else {
1115                         drive->unmask = 0;
1116                         drive->io_32bit = 0;
1117                 }
1118                 return;
1119         }
1120         if (drive->using_dma)
1121                 check_dma_crc(drive);
1122
1123         if (HWIF(drive)->pre_reset != NULL)
1124                 HWIF(drive)->pre_reset(drive);
1125
1126         if (drive->current_speed != 0xff)
1127                 drive->desired_speed = drive->current_speed;
1128         drive->current_speed = 0xff;
1129 }
1130
1131 /*
1132  * do_reset1() attempts to recover a confused drive by resetting it.
1133  * Unfortunately, resetting a disk drive actually resets all devices on
1134  * the same interface, so it can really be thought of as resetting the
1135  * interface rather than resetting the drive.
1136  *
1137  * ATAPI devices have their own reset mechanism which allows them to be
1138  * individually reset without clobbering other devices on the same interface.
1139  *
1140  * Unfortunately, the IDE interface does not generate an interrupt to let
1141  * us know when the reset operation has finished, so we must poll for this.
1142  * Equally poor, though, is the fact that this may a very long time to complete,
1143  * (up to 30 seconds worstcase).  So, instead of busy-waiting here for it,
1144  * we set a timer to poll at 50ms intervals.
1145  */
1146 static ide_startstop_t do_reset1 (ide_drive_t *drive, int do_not_try_atapi)
1147 {
1148         unsigned int unit;
1149         unsigned long flags;
1150         ide_hwif_t *hwif;
1151         ide_hwgroup_t *hwgroup;
1152
1153         spin_lock_irqsave(&ide_lock, flags);
1154         hwif = HWIF(drive);
1155         hwgroup = HWGROUP(drive);
1156
1157         /* We must not reset with running handlers */
1158         BUG_ON(hwgroup->handler != NULL);
1159
1160         /* For an ATAPI device, first try an ATAPI SRST. */
1161         if (drive->media != ide_disk && !do_not_try_atapi) {
1162                 hwgroup->resetting = 1;
1163                 pre_reset(drive);
1164                 SELECT_DRIVE(drive);
1165                 udelay (20);
1166                 hwif->OUTBSYNC(drive, WIN_SRST, IDE_COMMAND_REG);
1167                 ndelay(400);
1168                 hwgroup->poll_timeout = jiffies + WAIT_WORSTCASE;
1169                 hwgroup->polling = 1;
1170                 __ide_set_handler(drive, &atapi_reset_pollfunc, HZ/20, NULL);
1171                 spin_unlock_irqrestore(&ide_lock, flags);
1172                 return ide_started;
1173         }
1174
1175         /*
1176          * First, reset any device state data we were maintaining
1177          * for any of the drives on this interface.
1178          */
1179         for (unit = 0; unit < MAX_DRIVES; ++unit)
1180                 pre_reset(&hwif->drives[unit]);
1181
1182 #if OK_TO_RESET_CONTROLLER
1183         if (!IDE_CONTROL_REG) {
1184                 spin_unlock_irqrestore(&ide_lock, flags);
1185                 return ide_stopped;
1186         }
1187
1188         hwgroup->resetting = 1;
1189         /*
1190          * Note that we also set nIEN while resetting the device,
1191          * to mask unwanted interrupts from the interface during the reset.
1192          * However, due to the design of PC hardware, this will cause an
1193          * immediate interrupt due to the edge transition it produces.
1194          * This single interrupt gives us a "fast poll" for drives that
1195          * recover from reset very quickly, saving us the first 50ms wait time.
1196          */
1197         /* set SRST and nIEN */
1198         hwif->OUTBSYNC(drive, drive->ctl|6,IDE_CONTROL_REG);
1199         /* more than enough time */
1200         udelay(10);
1201         if (drive->quirk_list == 2) {
1202                 /* clear SRST and nIEN */
1203                 hwif->OUTBSYNC(drive, drive->ctl, IDE_CONTROL_REG);
1204         } else {
1205                 /* clear SRST, leave nIEN */
1206                 hwif->OUTBSYNC(drive, drive->ctl|2, IDE_CONTROL_REG);
1207         }
1208         /* more than enough time */
1209         udelay(10);
1210         hwgroup->poll_timeout = jiffies + WAIT_WORSTCASE;
1211         hwgroup->polling = 1;
1212         __ide_set_handler(drive, &reset_pollfunc, HZ/20, NULL);
1213
1214         /*
1215          * Some weird controller like resetting themselves to a strange
1216          * state when the disks are reset this way. At least, the Winbond
1217          * 553 documentation says that
1218          */
1219         if (hwif->resetproc != NULL) {
1220                 hwif->resetproc(drive);
1221         }
1222
1223 #endif  /* OK_TO_RESET_CONTROLLER */
1224
1225         spin_unlock_irqrestore(&ide_lock, flags);
1226         return ide_started;
1227 }
1228
1229 /*
1230  * ide_do_reset() is the entry point to the drive/interface reset code.
1231  */
1232
1233 ide_startstop_t ide_do_reset (ide_drive_t *drive)
1234 {
1235         return do_reset1(drive, 0);
1236 }
1237
1238 EXPORT_SYMBOL(ide_do_reset);
1239
1240 /*
1241  * ide_wait_not_busy() waits for the currently selected device on the hwif
1242  * to report a non-busy status, see comments in probe_hwif().
1243  */
1244 int ide_wait_not_busy(ide_hwif_t *hwif, unsigned long timeout)
1245 {
1246         u8 stat = 0;
1247
1248         while(timeout--) {
1249                 /*
1250                  * Turn this into a schedule() sleep once I'm sure
1251                  * about locking issues (2.5 work ?).
1252                  */
1253                 mdelay(1);
1254                 stat = hwif->INB(hwif->io_ports[IDE_STATUS_OFFSET]);
1255                 if ((stat & BUSY_STAT) == 0)
1256                         return 0;
1257                 /*
1258                  * Assume a value of 0xff means nothing is connected to
1259                  * the interface and it doesn't implement the pull-down
1260                  * resistor on D7.
1261                  */
1262                 if (stat == 0xff)
1263                         return -ENODEV;
1264                 touch_softlockup_watchdog();
1265                 touch_nmi_watchdog();
1266         }
1267         return -EBUSY;
1268 }
1269
1270 EXPORT_SYMBOL_GPL(ide_wait_not_busy);
1271