drivers/ide/pci/aec62xx.c

   1 /*
   2  * linux/drivers/ide/pci/aec62xx.c              Version 0.11    March 27, 2002
   3  *
   4  * Copyright (C) 1999-2002      Andre Hedrick <andre@linux-ide.org>
   5  *
   6  */
   7
   8 #include <linux/module.h>
   9 #include <linux/config.h>
  10 #include <linux/types.h>
  11 #include <linux/pci.h>
  12 #include <linux/delay.h>
  13 #include <linux/hdreg.h>
  14 #include <linux/ide.h>
  15 #include <linux/init.h>
  16
  17 #include <asm/io.h>
  18
  19 #include "aec62xx.h"
  20
  21 #if defined(DISPLAY_AEC62XX_TIMINGS) && defined(CONFIG_PROC_FS)
  22 #include <linux/stat.h>
  23 #include <linux/proc_fs.h>
  24
  25 static u8 aec62xx_proc = 0;
  26
  27 #define AEC_MAX_DEVS            5
  28
  29 static struct pci_dev *aec_devs[AEC_MAX_DEVS];
  30 static int n_aec_devs;
  31
  32 static int aec62xx_get_info (char *buffer, char **addr, off_t offset, int count)
  33 {
  34         char *p = buffer;
  35         char *chipset_nums[] = {"error", "error", "error", "error",
  36                                 "error", "error", "850UF",   "860",
  37                                  "860R",   "865",  "865R", "error"  };
  38         int len;
  39         int i;
  40
  41         for (i = 0; i < n_aec_devs; i++) {
  42                 struct pci_dev *dev     = aec_devs[i];
  43                 unsigned long iobase = pci_resource_start(dev, 4);
  44                 u8 c0 = 0, c1 = 0, art  = 0;
  45
  46                 c0 = inb(iobase + 0x02);
  47                 c1 = inb(iobase + 0x0a);
  48
  49                 p += sprintf(p, "\nController: %d\n", i);
  50                 p += sprintf(p, "Chipset: AEC%s\n", chipset_nums[dev->device]);
  51
  52                 p += sprintf(p, "--------------- Primary Channel "
  53                                 "---------------- Secondary Channel "
  54                                 "-------------\n");
  55                 (void) pci_read_config_byte(dev, 0x4a, &art);
  56                 p += sprintf(p, "                %sabled ",
  57                         (art&0x02)?" en":"dis");
  58                 p += sprintf(p, "                        %sabled\n",
  59                         (art&0x04)?" en":"dis");
  60                 p += sprintf(p, "--------------- drive0 --------- drive1 "
  61                                 "-------- drive0 ---------- drive1 ------\n");
  62                 p += sprintf(p, "DMA enabled:    %s              %s ",
  63                         (c0&0x20)?"yes":"no ",(c0&0x40)?"yes":"no ");
  64                 p += sprintf(p, "            %s               %s\n",
  65                         (c1&0x20)?"yes":"no ",(c1&0x40)?"yes":"no ");
  66
  67                 if (dev->device == PCI_DEVICE_ID_ARTOP_ATP850UF) {
  68                         (void) pci_read_config_byte(dev, 0x54, &art);
  69                         p += sprintf(p, "DMA Mode:       %s(%s)",
  70                                 (c0&0x20)?((art&0x03)?"UDMA":" DMA"):" PIO",
  71                                 (art&0x02)?"2":(art&0x01)?"1":"0");
  72                         p += sprintf(p, "          %s(%s)",
  73                                 (c0&0x40)?((art&0x0c)?"UDMA":" DMA"):" PIO",
  74                                 (art&0x08)?"2":(art&0x04)?"1":"0");
  75                         p += sprintf(p, "         %s(%s)",
  76                                 (c1&0x20)?((art&0x30)?"UDMA":" DMA"):" PIO",
  77                                 (art&0x20)?"2":(art&0x10)?"1":"0");
  78                         p += sprintf(p, "           %s(%s)\n",
  79                                 (c1&0x40)?((art&0xc0)?"UDMA":" DMA"):" PIO",
  80                                 (art&0x80)?"2":(art&0x40)?"1":"0");
  81                 } else {
  82                         /*
  83                          * case PCI_DEVICE_ID_ARTOP_ATP860:
  84                          * case PCI_DEVICE_ID_ARTOP_ATP860R:
  85                          * case PCI_DEVICE_ID_ARTOP_ATP865:
  86                          * case PCI_DEVICE_ID_ARTOP_ATP865R:
  87                          */
  88                         (void) pci_read_config_byte(dev, 0x44, &art);
  89                         p += sprintf(p, "DMA Mode:       %s(%s)",
  90                                 (c0&0x20)?((art&0x07)?"UDMA":" DMA"):" PIO",
  91                                 ((art&0x07)==0x07)?"6":
  92                                 ((art&0x06)==0x06)?"5":
  93                                 ((art&0x05)==0x05)?"4":
  94                                 ((art&0x04)==0x04)?"3":
  95                                 ((art&0x03)==0x03)?"2":
  96                                 ((art&0x02)==0x02)?"1":
  97                                 ((art&0x01)==0x01)?"0":"?");
  98                         p += sprintf(p, "          %s(%s)",
  99                                 (c0&0x40)?((art&0x70)?"UDMA":" DMA"):" PIO",
 100                                 ((art&0x70)==0x70)?"6":
 101                                 ((art&0x60)==0x60)?"5":
 102                                 ((art&0x50)==0x50)?"4":
 103                                 ((art&0x40)==0x40)?"3":
 104                                 ((art&0x30)==0x30)?"2":
 105                                 ((art&0x20)==0x20)?"1":
 106                                 ((art&0x10)==0x10)?"0":"?");
 107                         (void) pci_read_config_byte(dev, 0x45, &art);
 108                         p += sprintf(p, "         %s(%s)",
 109                                 (c1&0x20)?((art&0x07)?"UDMA":" DMA"):" PIO",
 110                                 ((art&0x07)==0x07)?"6":
 111                                 ((art&0x06)==0x06)?"5":
 112                                 ((art&0x05)==0x05)?"4":
 113                                 ((art&0x04)==0x04)?"3":
 114                                 ((art&0x03)==0x03)?"2":
 115                                 ((art&0x02)==0x02)?"1":
 116                                 ((art&0x01)==0x01)?"0":"?");
 117                         p += sprintf(p, "           %s(%s)\n",
 118                                 (c1&0x40)?((art&0x70)?"UDMA":" DMA"):" PIO",
 119                                 ((art&0x70)==0x70)?"6":
 120                                 ((art&0x60)==0x60)?"5":
 121                                 ((art&0x50)==0x50)?"4":
 122                                 ((art&0x40)==0x40)?"3":
 123                                 ((art&0x30)==0x30)?"2":
 124                                 ((art&0x20)==0x20)?"1":
 125                                 ((art&0x10)==0x10)?"0":"?");
 126                 }
 127         }
 128         /* p - buffer must be less than 4k! */
 129         len = (p - buffer) - offset;
 130         *addr = buffer + offset;
 131
 132         return len > count ? count : len;
 133 }
 134 #endif  /* defined(DISPLAY_AEC62xx_TIMINGS) && defined(CONFIG_PROC_FS) */
 135
 136 /*
 137  * TO DO: active tuning and correction of cards without a bios.
 138  */
 139 static u8 pci_bus_clock_list (u8 speed, struct chipset_bus_clock_list_entry * chipset_table)
 140 {
 141         for ( ; chipset_table->xfer_speed ; chipset_table++)
 142                 if (chipset_table->xfer_speed == speed) {
 143                         return chipset_table->chipset_settings;
 144                 }
 145         return chipset_table->chipset_settings;
 146 }
 147
 148 static u8 pci_bus_clock_list_ultra (u8 speed, struct chipset_bus_clock_list_entry * chipset_table)
 149 {
 150         for ( ; chipset_table->xfer_speed ; chipset_table++)
 151                 if (chipset_table->xfer_speed == speed) {
 152                         return chipset_table->ultra_settings;
 153                 }
 154         return chipset_table->ultra_settings;
 155 }
 156
 157 static u8 aec62xx_ratemask (ide_drive_t *drive)
 158 {
 159         ide_hwif_t *hwif        = HWIF(drive);
 160         u8 mode;
 161
 162         switch(hwif->pci_dev->device) {
 163                 case PCI_DEVICE_ID_ARTOP_ATP865:
 164                 case PCI_DEVICE_ID_ARTOP_ATP865R:
 165 #if 0
 166                         mode = (hwif->INB(hwif->dma_master) & 0x10) ? 4 : 3;
 167 #else
 168                         mode = (hwif->INB(((hwif->channel) ?
 169                                         hwif->mate->dma_status :
 170                                         hwif->dma_status)) & 0x10) ? 4 : 3;
 171 #endif
 172                         break;
 173                 case PCI_DEVICE_ID_ARTOP_ATP860:
 174                 case PCI_DEVICE_ID_ARTOP_ATP860R:
 175                         mode = 2;
 176                         break;
 177                 case PCI_DEVICE_ID_ARTOP_ATP850UF:
 178                 default:
 179                         return 1;
 180         }
 181
 182         if (!eighty_ninty_three(drive))
 183                 mode = min(mode, (u8)1);
 184         return mode;
 185 }
 186
 187 static int aec6210_tune_chipset (ide_drive_t *drive, u8 xferspeed)
 188 {
 189         ide_hwif_t *hwif        = HWIF(drive);
 190         struct pci_dev *dev     = hwif->pci_dev;
 191         u16 d_conf              = 0;
 192         u8 speed        = ide_rate_filter(aec62xx_ratemask(drive), xferspeed);
 193         u8 ultra = 0, ultra_conf = 0;
 194         u8 tmp0 = 0, tmp1 = 0, tmp2 = 0;
 195         unsigned long flags;
 196
 197         local_irq_save(flags);
 198         /* 0x40|(2*drive->dn): Active, 0x41|(2*drive->dn): Recovery */
 199         pci_read_config_word(dev, 0x40|(2*drive->dn), &d_conf);
 200         tmp0 = pci_bus_clock_list(speed, BUSCLOCK(dev));
 201         SPLIT_BYTE(tmp0,tmp1,tmp2);
 202         MAKE_WORD(d_conf,tmp1,tmp2);
 203         pci_write_config_word(dev, 0x40|(2*drive->dn), d_conf);
 204
 205         tmp1 = 0x00;
 206         tmp2 = 0x00;
 207         pci_read_config_byte(dev, 0x54, &ultra);
 208         tmp1 = ((0x00 << (2*drive->dn)) | (ultra & ~(3 << (2*drive->dn))));
 209         ultra_conf = pci_bus_clock_list_ultra(speed, BUSCLOCK(dev));
 210         tmp2 = ((ultra_conf << (2*drive->dn)) | (tmp1 & ~(3 << (2*drive->dn))));
 211         pci_write_config_byte(dev, 0x54, tmp2);
 212         local_irq_restore(flags);
 213         return(ide_config_drive_speed(drive, speed));
 214 }
 215
 216 static int aec6260_tune_chipset (ide_drive_t *drive, u8 xferspeed)
 217 {
 218         ide_hwif_t *hwif        = HWIF(drive);
 219         struct pci_dev *dev     = hwif->pci_dev;
 220         u8 speed        = ide_rate_filter(aec62xx_ratemask(drive), xferspeed);
 221         u8 unit         = (drive->select.b.unit & 0x01);
 222         u8 tmp1 = 0, tmp2 = 0;
 223         u8 ultra = 0, drive_conf = 0, ultra_conf = 0;
 224         unsigned long flags;
 225
 226         local_irq_save(flags);
 227         /* high 4-bits: Active, low 4-bits: Recovery */
 228         pci_read_config_byte(dev, 0x40|drive->dn, &drive_conf);
 229         drive_conf = pci_bus_clock_list(speed, BUSCLOCK(dev));
 230         pci_write_config_byte(dev, 0x40|drive->dn, drive_conf);
 231
 232         pci_read_config_byte(dev, (0x44|hwif->channel), &ultra);
 233         tmp1 = ((0x00 << (4*unit)) | (ultra & ~(7 << (4*unit))));
 234         ultra_conf = pci_bus_clock_list_ultra(speed, BUSCLOCK(dev));
 235         tmp2 = ((ultra_conf << (4*unit)) | (tmp1 & ~(7 << (4*unit))));
 236         pci_write_config_byte(dev, (0x44|hwif->channel), tmp2);
 237         local_irq_restore(flags);
 238         return(ide_config_drive_speed(drive, speed));
 239 }
 240
 241 static int aec62xx_tune_chipset (ide_drive_t *drive, u8 speed)
 242 {
 243         switch (HWIF(drive)->pci_dev->device) {
 244                 case PCI_DEVICE_ID_ARTOP_ATP865:
 245                 case PCI_DEVICE_ID_ARTOP_ATP865R:
 246                 case PCI_DEVICE_ID_ARTOP_ATP860:
 247                 case PCI_DEVICE_ID_ARTOP_ATP860R:
 248                         return ((int) aec6260_tune_chipset(drive, speed));
 249                 case PCI_DEVICE_ID_ARTOP_ATP850UF:
 250                         return ((int) aec6210_tune_chipset(drive, speed));
 251                 default:
 252                         return -1;
 253         }
 254 }
 255
 256 static int config_chipset_for_dma (ide_drive_t *drive)
 257 {
 258         u8 speed = ide_dma_speed(drive, aec62xx_ratemask(drive));
 259
 260         if (!(speed))
 261                 return 0;
 262
 263         (void) aec62xx_tune_chipset(drive, speed);
 264         return ide_dma_enable(drive);
 265 }
 266
 267 static void aec62xx_tune_drive (ide_drive_t *drive, u8 pio)
 268 {
 269         u8 speed = 0;
 270         u8 new_pio = XFER_PIO_0 + ide_get_best_pio_mode(drive, 255, 5, NULL);
 271
 272         switch(pio) {
 273                 case 5:         speed = new_pio; break;
 274                 case 4:         speed = XFER_PIO_4; break;
 275                 case 3:         speed = XFER_PIO_3; break;
 276                 case 2:         speed = XFER_PIO_2; break;
 277                 case 1:         speed = XFER_PIO_1; break;
 278                 default:        speed = XFER_PIO_0; break;
 279         }
 280         (void) aec62xx_tune_chipset(drive, speed);
 281 }
 282
 283 static int aec62xx_config_drive_xfer_rate (ide_drive_t *drive)
 284 {
 285         ide_hwif_t *hwif        = HWIF(drive);
 286         struct hd_driveid *id   = drive->id;
 287
 288         if ((id->capability & 1) && drive->autodma) {
 289                 /* Consult the list of known "bad" drives */
 290                 if (__ide_dma_bad_drive(drive))
 291                         goto fast_ata_pio;
 292                 if (id->field_valid & 4) {
 293                         if (id->dma_ultra & hwif->ultra_mask) {
 294                                 /* Force if Capable UltraDMA */
 295                                 int dma = config_chipset_for_dma(drive);
 296                                 if ((id->field_valid & 2) && !dma)
 297                                         goto try_dma_modes;
 298                         }
 299                 } else if (id->field_valid & 2) {
 300 try_dma_modes:
 301                         if ((id->dma_mword & hwif->mwdma_mask) ||
 302                             (id->dma_1word & hwif->swdma_mask)) {
 303                                 /* Force if Capable regular DMA modes */
 304                                 if (!config_chipset_for_dma(drive))
 305                                         goto no_dma_set;
 306                         }
 307                 } else if (__ide_dma_good_drive(drive) &&
 308                            (id->eide_dma_time < 150)) {
 309                         /* Consult the list of known "good" drives */
 310                         if (!config_chipset_for_dma(drive))
 311                                 goto no_dma_set;
 312                 } else {
 313                         goto fast_ata_pio;
 314                 }
 315                 return hwif->ide_dma_on(drive);
 316         } else if ((id->capability & 8) || (id->field_valid & 2)) {
 317 fast_ata_pio:
 318 no_dma_set:
 319                 aec62xx_tune_drive(drive, 5);
 320                 return hwif->ide_dma_off_quietly(drive);
 321         }
 322         /* IORDY not supported */
 323         return 0;
 324 }
 325
 326 static int aec62xx_irq_timeout (ide_drive_t *drive)
 327 {
 328         ide_hwif_t *hwif        = HWIF(drive);
 329         struct pci_dev *dev     = hwif->pci_dev;
 330
 331         switch(dev->device) {
 332                 case PCI_DEVICE_ID_ARTOP_ATP860:
 333                 case PCI_DEVICE_ID_ARTOP_ATP860R:
 334                 case PCI_DEVICE_ID_ARTOP_ATP865:
 335                 case PCI_DEVICE_ID_ARTOP_ATP865R:
 336                         printk(" AEC62XX time out ");
 337 #if 0
 338                         {
 339                                 int i = 0;
 340                                 u8 reg49h = 0;
 341                                 pci_read_config_byte(HWIF(drive)->pci_dev, 0x49, &reg49h);
 342                                 for (i=0;i<256;i++)
 343                                         pci_write_config_byte(HWIF(drive)->pci_dev, 0x49, reg49h|0x10);
 344                                 pci_write_config_byte(HWIF(drive)->pci_dev, 0x49, reg49h & ~0x10);
 345                         }
 346                         return 0;
 347 #endif
 348                 default:
 349                         break;
 350         }
 351 #if 0
 352         {
 353                 ide_hwif_t *hwif        = HWIF(drive);
 354                 struct pci_dev *dev     = hwif->pci_dev;
 355                 u8 tmp1 = 0, tmp2 = 0, mode6 = 0;
 356
 357                 pci_read_config_byte(dev, 0x44, &tmp1);
 358                 pci_read_config_byte(dev, 0x45, &tmp2);
 359                 printk(" AEC6280 r44=%x r45=%x ",tmp1,tmp2);
 360                 mode6 = HWIF(drive)->INB(((hwif->channel) ?
 361                                            hwif->mate->dma_status :
 362                                            hwif->dma_status));
 363                 printk(" AEC6280 133=%x ", (mode6 & 0x10));
 364         }
 365 #endif
 366         return 0;
 367 }
 368
 369 static unsigned int __devinit init_chipset_aec62xx(struct pci_dev *dev, const char *name)
 370 {
 371         int bus_speed = system_bus_clock();
 372
 373         if (dev->resource[PCI_ROM_RESOURCE].start) {
 374                 pci_write_config_dword(dev, PCI_ROM_ADDRESS, dev->resource[PCI_ROM_RESOURCE].start | PCI_ROM_ADDRESS_ENABLE);
 375                 printk(KERN_INFO "%s: ROM enabled at 0x%08lx\n", name, dev->resource[PCI_ROM_RESOURCE].start);
 376         }
 377
 378 #if defined(DISPLAY_AEC62XX_TIMINGS) && defined(CONFIG_PROC_FS)
 379         aec_devs[n_aec_devs++] = dev;
 380
 381         if (!aec62xx_proc) {
 382                 aec62xx_proc = 1;
 383                 ide_pci_create_host_proc("aec62xx", aec62xx_get_info);
 384         }
 385 #endif /* DISPLAY_AEC62XX_TIMINGS && CONFIG_PROC_FS */
 386
 387         if (bus_speed <= 33)
 388                 pci_set_drvdata(dev, (void *) aec6xxx_33_base);
 389         else
 390                 pci_set_drvdata(dev, (void *) aec6xxx_34_base);
 391
 392         return dev->irq;
 393 }
 394
 395 static void __devinit init_hwif_aec62xx(ide_hwif_t *hwif)
 396 {
 397         hwif->autodma = 0;
 398         hwif->tuneproc = &aec62xx_tune_drive;
 399         hwif->speedproc = &aec62xx_tune_chipset;
 400
 401         if (hwif->pci_dev->device == PCI_DEVICE_ID_ARTOP_ATP850UF) {
 402                 hwif->serialized = hwif->channel;
 403                 hwif->no_dsc = 1;
 404         }
 405
 406         if (hwif->mate)
 407                 hwif->mate->serialized = hwif->serialized;
 408
 409         if (!hwif->dma_base) {
 410                 hwif->drives[0].autotune = 1;
 411                 hwif->drives[1].autotune = 1;
 412                 return;
 413         }
 414
 415         hwif->ultra_mask = 0x7f;
 416         hwif->mwdma_mask = 0x07;
 417         hwif->swdma_mask = 0x07;
 418
 419         hwif->ide_dma_check     = &aec62xx_config_drive_xfer_rate;
 420         hwif->ide_dma_lostirq   = &aec62xx_irq_timeout;
 421         hwif->ide_dma_timeout   = &aec62xx_irq_timeout;
 422         if (!noautodma)
 423                 hwif->autodma = 1;
 424         hwif->drives[0].autodma = hwif->autodma;
 425         hwif->drives[1].autodma = hwif->autodma;
 426 }
 427
 428 static void __devinit init_dma_aec62xx(ide_hwif_t *hwif, unsigned long dmabase)
 429 {
 430         struct pci_dev *dev     = hwif->pci_dev;
 431
 432         if (dev->device == PCI_DEVICE_ID_ARTOP_ATP850UF) {
 433                 u8 reg54h = 0;
 434                 unsigned long flags;
 435
 436                 spin_lock_irqsave(&ide_lock, flags);
 437                 pci_read_config_byte(dev, 0x54, &reg54h);
 438                 pci_write_config_byte(dev, 0x54, reg54h & ~(hwif->channel ? 0xF0 : 0x0F));
 439                 spin_unlock_irqrestore(&ide_lock, flags);
 440         } else {
 441                 u8 ata66        = 0;
 442                 pci_read_config_byte(hwif->pci_dev, 0x49, &ata66);
 443                 if (!(hwif->udma_four))
 444                         hwif->udma_four = (ata66&(hwif->channel?0x02:0x01))?0:1;
 445         }
 446
 447         ide_setup_dma(hwif, dmabase, 8);
 448 }
 449
 450 static void __devinit init_setup_aec62xx(struct pci_dev *dev, ide_pci_device_t *d)
 451 {
 452         ide_setup_pci_device(dev, d);
 453 }
 454
 455 static void __devinit init_setup_aec6x80(struct pci_dev *dev, ide_pci_device_t *d)
 456 {
 457         unsigned long bar4reg = pci_resource_start(dev, 4);
 458
 459         if (inb(bar4reg+2) & 0x10) {
 460                 strcpy(d->name, "AEC6880");
 461                 if (dev->device == PCI_DEVICE_ID_ARTOP_ATP865R)
 462                         strcpy(d->name, "AEC6880R");
 463         } else {
 464                 strcpy(d->name, "AEC6280");
 465                 if (dev->device == PCI_DEVICE_ID_ARTOP_ATP865R)
 466                         strcpy(d->name, "AEC6280R");
 467         }
 468
 469         ide_setup_pci_device(dev, d);
 470 }
 471
 472 /**
 473  *      aec62xx_init_one        -       called when a AEC is found
 474  *      @dev: the aec62xx device
 475  *      @id: the matching pci id
 476  *
 477  *      Called when the PCI registration layer (or the IDE initialization)
 478  *      finds a device matching our IDE device tables.
 479  */
 480
 481 static int __devinit aec62xx_init_one(struct pci_dev *dev, const struct pci_device_id *id)
 482 {
 483         ide_pci_device_t *d = &aec62xx_chipsets[id->driver_data];
 484
 485         d->init_setup(dev, d);
 486         return 0;
 487 }
 488
 489 static struct pci_device_id aec62xx_pci_tbl[] = {
 490         { PCI_VENDOR_ID_ARTOP, PCI_DEVICE_ID_ARTOP_ATP850UF, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
 491         { PCI_VENDOR_ID_ARTOP, PCI_DEVICE_ID_ARTOP_ATP860,   PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1 },
 492         { PCI_VENDOR_ID_ARTOP, PCI_DEVICE_ID_ARTOP_ATP860R,  PCI_ANY_ID, PCI_ANY_ID, 0, 0, 2 },
 493         { PCI_VENDOR_ID_ARTOP, PCI_DEVICE_ID_ARTOP_ATP865,   PCI_ANY_ID, PCI_ANY_ID, 0, 0, 3 },
 494         { PCI_VENDOR_ID_ARTOP, PCI_DEVICE_ID_ARTOP_ATP865R,  PCI_ANY_ID, PCI_ANY_ID, 0, 0, 4 },
 495         { 0, },
 496 };
 497 MODULE_DEVICE_TABLE(pci, aec62xx_pci_tbl);
 498
 499 static struct pci_driver driver = {
 500         .name           = "AEC62xx_IDE",
 501         .id_table       = aec62xx_pci_tbl,
 502         .probe          = aec62xx_init_one,
 503 };
 504
 505 static int aec62xx_ide_init(void)
 506 {
 507         return ide_pci_register_driver(&driver);
 508 }
 509
 510 module_init(aec62xx_ide_init);
 511
 512 MODULE_AUTHOR("Andre Hedrick");
 513 MODULE_DESCRIPTION("PCI driver module for ARTOP AEC62xx IDE");
 514 MODULE_LICENSE("GPL");