4 * AMD 755/756/766/8111 and nVidia nForce/2/2s/3/3s IDE driver for Linux.
6 * Copyright (c) 2000-2002 Vojtech Pavlik
8 * Based on the work of:
13 * This program is free software; you can redistribute it and/or modify it
14 * under the terms of the GNU General Public License version 2 as published by
15 * the Free Software Foundation.
18 #include <linux/config.h>
19 #include <linux/module.h>
20 #include <linux/kernel.h>
21 #include <linux/ioport.h>
22 #include <linux/blkdev.h>
23 #include <linux/pci.h>
24 #include <linux/init.h>
25 #include <linux/ide.h>
28 #include "ide-timing.h"
31 #define AMD_IDE_ENABLE (0x00 + amd_config->base)
32 #define AMD_IDE_CONFIG (0x01 + amd_config->base)
33 #define AMD_CABLE_DETECT (0x02 + amd_config->base)
34 #define AMD_DRIVE_TIMING (0x08 + amd_config->base)
35 #define AMD_8BIT_TIMING (0x0e + amd_config->base)
36 #define AMD_ADDRESS_SETUP (0x0c + amd_config->base)
37 #define AMD_UDMA_TIMING (0x10 + amd_config->base)
40 #define AMD_UDMA_33 0x01
41 #define AMD_UDMA_66 0x02
42 #define AMD_UDMA_100 0x03
43 #define AMD_UDMA_133 0x04
44 #define AMD_CHECK_SWDMA 0x08
45 #define AMD_BAD_SWDMA 0x10
46 #define AMD_BAD_FIFO 0x20
47 #define AMD_CHECK_SERENADE 0x40
50 * AMD SouthBridge chips.
53 static struct amd_ide_chip {
58 { PCI_DEVICE_ID_AMD_COBRA_7401, 0x40, AMD_UDMA_33 | AMD_BAD_SWDMA },
59 { PCI_DEVICE_ID_AMD_VIPER_7409, 0x40, AMD_UDMA_66 | AMD_CHECK_SWDMA },
60 { PCI_DEVICE_ID_AMD_VIPER_7411, 0x40, AMD_UDMA_100 | AMD_BAD_FIFO },
61 { PCI_DEVICE_ID_AMD_OPUS_7441, 0x40, AMD_UDMA_100 },
62 { PCI_DEVICE_ID_AMD_8111_IDE, 0x40, AMD_UDMA_133 | AMD_CHECK_SERENADE },
63 { PCI_DEVICE_ID_NVIDIA_NFORCE_IDE, 0x50, AMD_UDMA_100 },
64 { PCI_DEVICE_ID_NVIDIA_NFORCE2_IDE, 0x50, AMD_UDMA_133 },
65 { PCI_DEVICE_ID_NVIDIA_NFORCE2S_IDE, 0x50, AMD_UDMA_133 },
66 { PCI_DEVICE_ID_NVIDIA_NFORCE2S_SATA, 0x50, AMD_UDMA_133 },
67 { PCI_DEVICE_ID_NVIDIA_NFORCE3_IDE, 0x50, AMD_UDMA_133 },
68 { PCI_DEVICE_ID_NVIDIA_NFORCE3S_IDE, 0x50, AMD_UDMA_133 },
69 { PCI_DEVICE_ID_NVIDIA_NFORCE3S_SATA, 0x50, AMD_UDMA_133 },
70 { PCI_DEVICE_ID_NVIDIA_NFORCE3S_SATA2, 0x50, AMD_UDMA_133 },
74 static struct amd_ide_chip *amd_config;
75 static ide_pci_device_t *amd_chipset;
76 static unsigned int amd_80w;
77 static unsigned int amd_clock;
79 static char *amd_dma[] = { "MWDMA16", "UDMA33", "UDMA66", "UDMA100", "UDMA133" };
80 static unsigned char amd_cyc2udma[] = { 6, 6, 5, 4, 0, 1, 1, 2, 2, 3, 3, 3, 3, 3, 3, 7 };
88 #include <linux/stat.h>
89 #include <linux/proc_fs.h>
91 static u8 amd74xx_proc;
93 static unsigned char amd_udma2cyc[] = { 4, 6, 8, 10, 3, 2, 1, 15 };
94 static unsigned long amd_base;
95 static struct pci_dev *bmide_dev;
96 extern int (*amd74xx_display_info)(char *, char **, off_t, int); /* ide-proc.c */
98 #define amd_print(format, arg...) p += sprintf(p, format "\n" , ## arg)
99 #define amd_print_drive(name, format, arg...)\
100 p += sprintf(p, name); for (i = 0; i < 4; i++) p += sprintf(p, format, ## arg); p += sprintf(p, "\n");
102 static int amd74xx_get_info(char *buffer, char **addr, off_t offset, int count)
104 int speed[4], cycle[4], setup[4], active[4], recover[4], den[4],
105 uen[4], udma[4], active8b[4], recover8b[4];
106 struct pci_dev *dev = bmide_dev;
107 unsigned int v, u, i;
113 amd_print("----------AMD BusMastering IDE Configuration----------------");
115 amd_print("Driver Version: 2.13");
116 amd_print("South Bridge: %s", pci_name(bmide_dev));
118 pci_read_config_byte(dev, PCI_REVISION_ID, &t);
119 amd_print("Revision: IDE %#x", t);
120 amd_print("Highest DMA rate: %s", amd_dma[amd_config->flags & AMD_UDMA]);
122 amd_print("BM-DMA base: %#lx", amd_base);
123 amd_print("PCI clock: %d.%dMHz", amd_clock / 1000, amd_clock / 100 % 10);
125 amd_print("-----------------------Primary IDE-------Secondary IDE------");
127 pci_read_config_byte(dev, AMD_IDE_CONFIG, &t);
128 amd_print("Prefetch Buffer: %10s%20s", (t & 0x80) ? "yes" : "no", (t & 0x20) ? "yes" : "no");
129 amd_print("Post Write Buffer: %10s%20s", (t & 0x40) ? "yes" : "no", (t & 0x10) ? "yes" : "no");
131 pci_read_config_byte(dev, AMD_IDE_ENABLE, &t);
132 amd_print("Enabled: %10s%20s", (t & 0x02) ? "yes" : "no", (t & 0x01) ? "yes" : "no");
134 c = inb(amd_base + 0x02) | (inb(amd_base + 0x0a) << 8);
135 amd_print("Simplex only: %10s%20s", (c & 0x80) ? "yes" : "no", (c & 0x8000) ? "yes" : "no");
137 amd_print("Cable Type: %10s%20s", (amd_80w & 1) ? "80w" : "40w", (amd_80w & 2) ? "80w" : "40w");
142 amd_print("-------------------drive0----drive1----drive2----drive3-----");
144 pci_read_config_byte(dev, AMD_ADDRESS_SETUP, &t);
145 pci_read_config_dword(dev, AMD_DRIVE_TIMING, &v);
146 pci_read_config_word(dev, AMD_8BIT_TIMING, &w);
147 pci_read_config_dword(dev, AMD_UDMA_TIMING, &u);
149 for (i = 0; i < 4; i++) {
150 setup[i] = ((t >> ((3 - i) << 1)) & 0x3) + 1;
151 recover8b[i] = ((w >> ((1 - (i >> 1)) << 3)) & 0xf) + 1;
152 active8b[i] = ((w >> (((1 - (i >> 1)) << 3) + 4)) & 0xf) + 1;
153 active[i] = ((v >> (((3 - i) << 3) + 4)) & 0xf) + 1;
154 recover[i] = ((v >> ((3 - i) << 3)) & 0xf) + 1;
156 udma[i] = amd_udma2cyc[((u >> ((3 - i) << 3)) & 0x7)];
157 uen[i] = ((u >> ((3 - i) << 3)) & 0x40) ? 1 : 0;
158 den[i] = (c & ((i & 1) ? 0x40 : 0x20) << ((i & 2) << 2));
160 if (den[i] && uen[i] && udma[i] == 1) {
161 speed[i] = amd_clock * 3;
162 cycle[i] = 666666 / amd_clock;
166 if (den[i] && uen[i] && udma[i] == 15) {
167 speed[i] = amd_clock * 4;
168 cycle[i] = 500000 / amd_clock;
172 speed[i] = 4 * amd_clock / ((den[i] && uen[i]) ? udma[i] : (active[i] + recover[i]) * 2);
173 cycle[i] = 1000000 * ((den[i] && uen[i]) ? udma[i] : (active[i] + recover[i]) * 2) / amd_clock / 2;
176 amd_print_drive("Transfer Mode: ", "%10s", den[i] ? (uen[i] ? "UDMA" : "DMA") : "PIO");
178 amd_print_drive("Address Setup: ", "%8dns", 1000000 * setup[i] / amd_clock);
179 amd_print_drive("Cmd Active: ", "%8dns", 1000000 * active8b[i] / amd_clock);
180 amd_print_drive("Cmd Recovery: ", "%8dns", 1000000 * recover8b[i] / amd_clock);
181 amd_print_drive("Data Active: ", "%8dns", 1000000 * active[i] / amd_clock);
182 amd_print_drive("Data Recovery: ", "%8dns", 1000000 * recover[i] / amd_clock);
183 amd_print_drive("Cycle Time: ", "%8dns", cycle[i]);
184 amd_print_drive("Transfer Rate: ", "%4d.%dMB/s", speed[i] / 1000, speed[i] / 100 % 10);
186 /* hoping p - buffer is less than 4K... */
187 len = (p - buffer) - offset;
188 *addr = buffer + offset;
190 return len > count ? count : len;
196 * amd_set_speed() writes timing values to the chipset registers
199 static void amd_set_speed(struct pci_dev *dev, unsigned char dn, struct ide_timing *timing)
203 pci_read_config_byte(dev, AMD_ADDRESS_SETUP, &t);
204 t = (t & ~(3 << ((3 - dn) << 1))) | ((FIT(timing->setup, 1, 4) - 1) << ((3 - dn) << 1));
205 pci_write_config_byte(dev, AMD_ADDRESS_SETUP, t);
207 pci_write_config_byte(dev, AMD_8BIT_TIMING + (1 - (dn >> 1)),
208 ((FIT(timing->act8b, 1, 16) - 1) << 4) | (FIT(timing->rec8b, 1, 16) - 1));
210 pci_write_config_byte(dev, AMD_DRIVE_TIMING + (3 - dn),
211 ((FIT(timing->active, 1, 16) - 1) << 4) | (FIT(timing->recover, 1, 16) - 1));
213 switch (amd_config->flags & AMD_UDMA) {
214 case AMD_UDMA_33: t = timing->udma ? (0xc0 | (FIT(timing->udma, 2, 5) - 2)) : 0x03; break;
215 case AMD_UDMA_66: t = timing->udma ? (0xc0 | amd_cyc2udma[FIT(timing->udma, 2, 10)]) : 0x03; break;
216 case AMD_UDMA_100: t = timing->udma ? (0xc0 | amd_cyc2udma[FIT(timing->udma, 1, 10)]) : 0x03; break;
217 case AMD_UDMA_133: t = timing->udma ? (0xc0 | amd_cyc2udma[FIT(timing->udma, 1, 15)]) : 0x03; break;
221 pci_write_config_byte(dev, AMD_UDMA_TIMING + (3 - dn), t);
225 * amd_set_drive() computes timing values configures the drive and
226 * the chipset to a desired transfer mode. It also can be called
230 static int amd_set_drive(ide_drive_t *drive, u8 speed)
232 ide_drive_t *peer = HWIF(drive)->drives + (~drive->dn & 1);
233 struct ide_timing t, p;
236 if (speed != XFER_PIO_SLOW && speed != drive->current_speed)
237 if (ide_config_drive_speed(drive, speed))
238 printk(KERN_WARNING "ide%d: Drive %d didn't accept speed setting. Oh, well.\n",
239 drive->dn >> 1, drive->dn & 1);
241 T = 1000000000 / amd_clock;
242 UT = T / min_t(int, max_t(int, amd_config->flags & AMD_UDMA, 1), 2);
244 ide_timing_compute(drive, speed, &t, T, UT);
247 ide_timing_compute(peer, peer->current_speed, &p, T, UT);
248 ide_timing_merge(&p, &t, &t, IDE_TIMING_8BIT);
251 if (speed == XFER_UDMA_5 && amd_clock <= 33333) t.udma = 1;
252 if (speed == XFER_UDMA_6 && amd_clock <= 33333) t.udma = 15;
254 amd_set_speed(HWIF(drive)->pci_dev, drive->dn, &t);
256 if (!drive->init_speed)
257 drive->init_speed = speed;
258 drive->current_speed = speed;
264 * amd74xx_tune_drive() is a callback from upper layers for
268 static void amd74xx_tune_drive(ide_drive_t *drive, u8 pio)
271 amd_set_drive(drive, ide_find_best_mode(drive, XFER_PIO | XFER_EPIO));
275 amd_set_drive(drive, XFER_PIO_0 + min_t(byte, pio, 5));
279 * amd74xx_dmaproc() is a callback from upper layers that can do
280 * a lot, but we use it for DMA/PIO tuning only, delegating everything
281 * else to the default ide_dmaproc().
284 static int amd74xx_ide_dma_check(ide_drive_t *drive)
286 int w80 = HWIF(drive)->udma_four;
288 u8 speed = ide_find_best_mode(drive,
289 XFER_PIO | XFER_EPIO | XFER_MWDMA | XFER_UDMA |
290 ((amd_config->flags & AMD_BAD_SWDMA) ? 0 : XFER_SWDMA) |
291 (w80 && (amd_config->flags & AMD_UDMA) >= AMD_UDMA_66 ? XFER_UDMA_66 : 0) |
292 (w80 && (amd_config->flags & AMD_UDMA) >= AMD_UDMA_100 ? XFER_UDMA_100 : 0) |
293 (w80 && (amd_config->flags & AMD_UDMA) >= AMD_UDMA_133 ? XFER_UDMA_133 : 0));
295 amd_set_drive(drive, speed);
297 if (drive->autodma && (speed & XFER_MODE) != XFER_PIO)
298 return HWIF(drive)->ide_dma_on(drive);
299 return HWIF(drive)->ide_dma_off_quietly(drive);
303 * The initialization callback. Here we determine the IDE chip type
304 * and initialize its drive independent registers.
307 static unsigned int __init init_chipset_amd74xx(struct pci_dev *dev, const char *name)
314 * Check for bad SWDMA.
317 if (amd_config->flags & AMD_CHECK_SWDMA) {
318 pci_read_config_byte(dev, PCI_REVISION_ID, &t);
320 amd_config->flags |= AMD_BAD_SWDMA;
324 * Check 80-wire cable presence.
327 switch (amd_config->flags & AMD_UDMA) {
331 pci_read_config_byte(dev, AMD_CABLE_DETECT, &t);
332 pci_read_config_dword(dev, AMD_UDMA_TIMING, &u);
333 amd_80w = ((t & 0x3) ? 1 : 0) | ((t & 0xc) ? 2 : 0);
334 for (i = 24; i >= 0; i -= 8)
335 if (((u >> i) & 4) && !(amd_80w & (1 << (1 - (i >> 4))))) {
336 printk(KERN_WARNING "%s: BIOS didn't set cable bits correctly. Enabling workaround.\n",
338 amd_80w |= (1 << (1 - (i >> 4)));
343 pci_read_config_dword(dev, AMD_UDMA_TIMING, &u);
344 for (i = 24; i >= 0; i -= 8)
346 amd_80w |= (1 << (1 - (i >> 4)));
351 * Take care of prefetch & postwrite.
354 pci_read_config_byte(dev, AMD_IDE_CONFIG, &t);
355 pci_write_config_byte(dev, AMD_IDE_CONFIG,
356 (amd_config->flags & AMD_BAD_FIFO) ? (t & 0x0f) : (t | 0xf0));
359 * Take care of incorrectly wired Serenade mainboards.
362 if ((amd_config->flags & AMD_CHECK_SERENADE) &&
363 dev->subsystem_vendor == PCI_VENDOR_ID_AMD &&
364 dev->subsystem_device == PCI_DEVICE_ID_AMD_SERENADE)
365 amd_config->flags = AMD_UDMA_100;
368 * Determine the system bus clock.
371 amd_clock = system_bus_clock() * 1000;
374 case 33000: amd_clock = 33333; break;
375 case 37000: amd_clock = 37500; break;
376 case 41000: amd_clock = 41666; break;
379 if (amd_clock < 20000 || amd_clock > 50000) {
380 printk(KERN_WARNING "%s: User given PCI clock speed impossible (%d), using 33 MHz instead.\n",
381 amd_chipset->name, amd_clock);
382 printk(KERN_WARNING "%s: Use ide0=ata66 if you want to assume 80-wire cable\n",
388 * Print the boot message.
391 pci_read_config_byte(dev, PCI_REVISION_ID, &t);
392 printk(KERN_INFO "%s: %s (rev %02x) %s controller\n",
393 amd_chipset->name, pci_name(dev), t, amd_dma[amd_config->flags & AMD_UDMA]);
396 * Register /proc/ide/amd74xx entry
399 #if defined(DISPLAY_AMD_TIMINGS) && defined(CONFIG_PROC_FS)
401 amd_base = pci_resource_start(dev, 4);
403 ide_pci_create_host_proc("amd74xx", amd74xx_get_info);
406 #endif /* DISPLAY_AMD_TIMINGS && CONFIG_PROC_FS */
411 static void __init init_hwif_amd74xx(ide_hwif_t *hwif)
417 hwif->tuneproc = &amd74xx_tune_drive;
418 hwif->speedproc = &amd_set_drive;
420 for (i = 0; i < 2; i++) {
421 hwif->drives[i].io_32bit = 1;
422 hwif->drives[i].unmask = 1;
423 hwif->drives[i].autotune = 1;
424 hwif->drives[i].dn = hwif->channel * 2 + i;
431 hwif->ultra_mask = 0x7f;
432 hwif->mwdma_mask = 0x07;
433 hwif->swdma_mask = 0x07;
435 if (!hwif->udma_four)
436 hwif->udma_four = (amd_80w >> hwif->channel) & 1;
437 hwif->ide_dma_check = &amd74xx_ide_dma_check;
440 hwif->drives[0].autodma = hwif->autodma;
441 hwif->drives[1].autodma = hwif->autodma;
444 static int __devinit amd74xx_probe(struct pci_dev *dev, const struct pci_device_id *id)
446 amd_chipset = amd74xx_chipsets + id->driver_data;
447 amd_config = amd_ide_chips + id->driver_data;
448 if (dev->device != amd_chipset->device) BUG();
449 if (dev->device != amd_config->id) BUG();
450 ide_setup_pci_device(dev, amd_chipset);
454 static struct pci_device_id amd74xx_pci_tbl[] = {
455 { PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_COBRA_7401, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
456 { PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_VIPER_7409, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1 },
457 { PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_VIPER_7411, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 2 },
458 { PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_OPUS_7441, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 3 },
459 { PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_8111_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 4 },
460 { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 5 },
461 { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE2_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 6 },
462 { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE2S_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 7 },
463 { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE2S_SATA, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 8 },
464 { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 9 },
465 { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3S_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 10 },
466 { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3S_SATA, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 11 },
467 { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3S_SATA2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 12 },
470 MODULE_DEVICE_TABLE(pci, amd74xx_pci_tbl);
472 static struct pci_driver driver = {
474 .id_table = amd74xx_pci_tbl,
475 .probe = amd74xx_probe,
478 static int amd74xx_ide_init(void)
480 return ide_pci_register_driver(&driver);
483 module_init(amd74xx_ide_init);
485 MODULE_AUTHOR("Vojtech Pavlik");
486 MODULE_DESCRIPTION("AMD PCI IDE driver");
487 MODULE_LICENSE("GPL");