drivers/ieee1394/dv1394.c

   1 /*
   2  * dv1394.c - DV input/output over IEEE 1394 on OHCI chips
   3  *   Copyright (C)2001 Daniel Maas <dmaas@dcine.com>
   4  *     receive by Dan Dennedy <dan@dennedy.org>
   5  *
   6  * based on:
   7  *  video1394.c - video driver for OHCI 1394 boards
   8  *  Copyright (C)1999,2000 Sebastien Rougeaux <sebastien.rougeaux@anu.edu.au>
   9  *
  10  * This program is free software; you can redistribute it and/or modify
  11  * it under the terms of the GNU General Public License as published by
  12  * the Free Software Foundation; either version 2 of the License, or
  13  * (at your option) any later version.
  14  *
  15  * This program is distributed in the hope that it will be useful,
  16  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  18  * GNU General Public License for more details.
  19  *
  20  * You should have received a copy of the GNU General Public License
  21  * along with this program; if not, write to the Free Software Foundation,
  22  * Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  23  */
  24
  25 /*
  26   OVERVIEW
  27
  28   I designed dv1394 as a "pipe" that you can use to shoot DV onto a
  29   FireWire bus. In transmission mode, dv1394 does the following:
  30
  31    1. accepts contiguous frames of DV data from user-space, via write()
  32       or mmap() (see dv1394.h for the complete API)
  33    2. wraps IEC 61883 packets around the DV data, inserting
  34       empty synchronization packets as necessary
  35    3. assigns accurate SYT timestamps to the outgoing packets
  36    4. shoots them out using the OHCI card's IT DMA engine
  37
  38    Thanks to Dan Dennedy, we now have a receive mode that does the following:
  39
  40    1. accepts raw IEC 61883 packets from the OHCI card
  41    2. re-assembles the DV data payloads into contiguous frames,
  42       discarding empty packets
  43    3. sends the DV data to user-space via read() or mmap()
  44 */
  45
  46 /*
  47   TODO:
  48
  49   - tunable frame-drop behavior: either loop last frame, or halt transmission
  50
  51   - use a scatter/gather buffer for DMA programs (f->descriptor_pool)
  52     so that we don't rely on allocating 64KB of contiguous kernel memory
  53     via pci_alloc_consistent()
  54
  55   DONE:
  56   - during reception, better handling of dropped frames and continuity errors
  57   - during reception, prevent DMA from bypassing the irq tasklets
  58   - reduce irq rate during reception (1/250 packets).
  59   - add many more internal buffers during reception with scatter/gather dma.
  60   - add dbc (continuity) checking on receive, increment status.dropped_frames
  61     if not continuous.
  62   - restart IT DMA after a bus reset
  63   - safely obtain and release ISO Tx channels in cooperation with OHCI driver
  64   - map received DIF blocks to their proper location in DV frame (ensure
  65     recovery if dropped packet)
  66   - handle bus resets gracefully (OHCI card seems to take care of this itself(!))
  67   - do not allow resizing the user_buf once allocated; eliminate nuke_buffer_mappings
  68   - eliminated #ifdef DV1394_DEBUG_LEVEL by inventing macros debug_printk and irq_printk
  69   - added wmb() and mb() to places where PCI read/write ordering needs to be enforced
  70   - set video->id correctly
  71   - store video_cards in an array indexed by OHCI card ID, rather than a list
  72   - implement DMA context allocation to cooperate with other users of the OHCI
  73   - fix all XXX showstoppers
  74   - disable IR/IT DMA interrupts on shutdown
  75   - flush pci writes to the card by issuing a read
  76   - devfs and character device dispatching (* needs testing with Linux 2.2.x)
  77   - switch over to the new kernel DMA API (pci_map_*()) (* needs testing on platforms with IOMMU!)
  78   - keep all video_cards in a list (for open() via chardev), set file->private_data = video
  79   - dv1394_poll should indicate POLLIN when receiving buffers are available
  80   - add proc fs interface to set cip_n, cip_d, syt_offset, and video signal
  81   - expose xmit and recv as separate devices (not exclusive)
  82   - expose NTSC and PAL as separate devices (can be overridden)
  83
  84 */
  85
  86 #include <linux/config.h>
  87 #include <linux/kernel.h>
  88 #include <linux/list.h>
  89 #include <linux/slab.h>
  90 #include <linux/interrupt.h>
  91 #include <linux/wait.h>
  92 #include <linux/errno.h>
  93 #include <linux/module.h>
  94 #include <linux/init.h>
  95 #include <linux/pci.h>
  96 #include <linux/fs.h>
  97 #include <linux/poll.h>
  98 #include <linux/smp_lock.h>
  99 #include <linux/bitops.h>
 100 #include <asm/byteorder.h>
 101 #include <asm/atomic.h>
 102 #include <asm/io.h>
 103 #include <asm/uaccess.h>
 104 #include <linux/delay.h>
 105 #include <asm/pgtable.h>
 106 #include <asm/page.h>
 107 #include <linux/sched.h>
 108 #include <linux/types.h>
 109 #include <linux/vmalloc.h>
 110 #include <linux/string.h>
 111 #include <linux/ioctl32.h>
 112 #include <linux/compat.h>
 113 #include <linux/cdev.h>
 114
 115 #include "ieee1394.h"
 116 #include "ieee1394_types.h"
 117 #include "nodemgr.h"
 118 #include "hosts.h"
 119 #include "ieee1394_core.h"
 120 #include "highlevel.h"
 121 #include "dv1394.h"
 122 #include "dv1394-private.h"
 123
 124 #include "ohci1394.h"
 125
 126 #ifndef virt_to_page
 127 #define virt_to_page(x) MAP_NR(x)
 128 #endif
 129
 130 #ifndef vmalloc_32
 131 #define vmalloc_32(x) vmalloc(x)
 132 #endif
 133
 134
 135 /* DEBUG LEVELS:
 136    0 - no debugging messages
 137    1 - some debugging messages, but none during DMA frame transmission
 138    2 - lots of messages, including during DMA frame transmission
 139        (will cause undeflows if your machine is too slow!)
 140 */
 141
 142 #define DV1394_DEBUG_LEVEL 0
 143
 144 /* for debugging use ONLY: allow more than one open() of the device */
 145 /* #define DV1394_ALLOW_MORE_THAN_ONE_OPEN 1 */
 146
 147 #if DV1394_DEBUG_LEVEL >= 2
 148 #define irq_printk( args... ) printk( args )
 149 #else
 150 #define irq_printk( args... )
 151 #endif
 152
 153 #if DV1394_DEBUG_LEVEL >= 1
 154 #define debug_printk( args... ) printk( args)
 155 #else
 156 #define debug_printk( args... )
 157 #endif
 158
 159 /* issue a dummy PCI read to force the preceding write
 160    to be posted to the PCI bus immediately */
 161
 162 static inline void flush_pci_write(struct ti_ohci *ohci)
 163 {
 164         mb();
 165         reg_read(ohci, OHCI1394_IsochronousCycleTimer);
 166 }
 167
 168 static void it_tasklet_func(unsigned long data);
 169 static void ir_tasklet_func(unsigned long data);
 170
 171 /* GLOBAL DATA */
 172
 173 /* list of all video_cards */
 174 static LIST_HEAD(dv1394_cards);
 175 static spinlock_t dv1394_cards_lock = SPIN_LOCK_UNLOCKED;
 176
 177 /* translate from a struct file* to the corresponding struct video_card* */
 178
 179 static inline struct video_card* file_to_video_card(struct file *file)
 180 {
 181         return (struct video_card*) file->private_data;
 182 }
 183
 184 /*** FRAME METHODS *********************************************************/
 185
 186 static void frame_reset(struct frame *f)
 187 {
 188         f->state = FRAME_CLEAR;
 189         f->done = 0;
 190         f->n_packets = 0;
 191         f->frame_begin_timestamp = NULL;
 192         f->assigned_timestamp = 0;
 193         f->cip_syt1 = NULL;
 194         f->cip_syt2 = NULL;
 195         f->mid_frame_timestamp = NULL;
 196         f->frame_end_timestamp = NULL;
 197         f->frame_end_branch = NULL;
 198 }
 199
 200 static struct frame* frame_new(unsigned int frame_num, struct video_card *video)
 201 {
 202         struct frame *f = kmalloc(sizeof(*f), GFP_KERNEL);
 203         if (!f)
 204                 return NULL;
 205
 206         f->video = video;
 207         f->frame_num = frame_num;
 208
 209         f->header_pool = pci_alloc_consistent(f->video->ohci->dev, PAGE_SIZE, &f->header_pool_dma);
 210         if (!f->header_pool) {
 211                 printk(KERN_ERR "dv1394: failed to allocate CIP header pool\n");
 212                 kfree(f);
 213                 return NULL;
 214         }
 215
 216         debug_printk("dv1394: frame_new: allocated CIP header pool at virt 0x%08lx (contig) dma 0x%08lx size %ld\n",
 217                      (unsigned long) f->header_pool, (unsigned long) f->header_pool_dma, PAGE_SIZE);
 218
 219         f->descriptor_pool_size = MAX_PACKETS * sizeof(struct DMA_descriptor_block);
 220         /* make it an even # of pages */
 221         f->descriptor_pool_size += PAGE_SIZE - (f->descriptor_pool_size%PAGE_SIZE);
 222
 223         f->descriptor_pool = pci_alloc_consistent(f->video->ohci->dev,
 224                                                   f->descriptor_pool_size,
 225                                                   &f->descriptor_pool_dma);
 226         if (!f->descriptor_pool) {
 227                 pci_free_consistent(f->video->ohci->dev, PAGE_SIZE, f->header_pool, f->header_pool_dma);
 228                 kfree(f);
 229                 return NULL;
 230         }
 231
 232         debug_printk("dv1394: frame_new: allocated DMA program memory at virt 0x%08lx (contig) dma 0x%08lx size %ld\n",
 233                      (unsigned long) f->descriptor_pool, (unsigned long) f->descriptor_pool_dma, f->descriptor_pool_size);
 234
 235         f->data = 0;
 236         frame_reset(f);
 237
 238         return f;
 239 }
 240
 241 static void frame_delete(struct frame *f)
 242 {
 243         pci_free_consistent(f->video->ohci->dev, PAGE_SIZE, f->header_pool, f->header_pool_dma);
 244         pci_free_consistent(f->video->ohci->dev, f->descriptor_pool_size, f->descriptor_pool, f->descriptor_pool_dma);
 245         kfree(f);
 246 }
 247
 248
 249
 250
 251 /*
 252    frame_prepare() - build the DMA program for transmitting
 253
 254    Frame_prepare() must be called OUTSIDE the video->spinlock.
 255    However, frame_prepare() must still be serialized, so
 256    it should be called WITH the video->sem taken.
 257  */
 258
 259 static void frame_prepare(struct video_card *video, unsigned int this_frame)
 260 {
 261         struct frame *f = video->frames[this_frame];
 262         int last_frame;
 263
 264         struct DMA_descriptor_block *block;
 265         dma_addr_t block_dma;
 266         struct CIP_header *cip;
 267         dma_addr_t cip_dma;
 268
 269         unsigned int n_descriptors, full_packets, packets_per_frame, payload_size;
 270
 271         /* these flags denote packets that need special attention */
 272         int empty_packet, first_packet, last_packet, mid_packet;
 273
 274         u32 *branch_address, *last_branch_address = NULL;
 275         unsigned long data_p;
 276         int first_packet_empty = 0;
 277         u32 cycleTimer, ct_sec, ct_cyc, ct_off;
 278         unsigned long irq_flags;
 279
 280         irq_printk("frame_prepare( %d ) ---------------------\n", this_frame);
 281
 282         full_packets = 0;
 283
 284
 285
 286         if (video->pal_or_ntsc == DV1394_PAL)
 287                 packets_per_frame = DV1394_PAL_PACKETS_PER_FRAME;
 288         else
 289                 packets_per_frame = DV1394_NTSC_PACKETS_PER_FRAME;
 290
 291         while ( full_packets < packets_per_frame ) {
 292                 empty_packet = first_packet = last_packet = mid_packet = 0;
 293
 294                 data_p = f->data + full_packets * 480;
 295
 296                 /************************************************/
 297                 /* allocate a descriptor block and a CIP header */
 298                 /************************************************/
 299
 300                 /* note: these should NOT cross a page boundary (DMA restriction) */
 301
 302                 if (f->n_packets >= MAX_PACKETS) {
 303                         printk(KERN_ERR "dv1394: FATAL ERROR: max packet count exceeded\n");
 304                         return;
 305                 }
 306
 307                 /* the block surely won't cross a page boundary,
 308                    since an even number of descriptor_blocks fit on a page */
 309                 block = &(f->descriptor_pool[f->n_packets]);
 310
 311                 /* DMA address of the block = offset of block relative
 312                     to the kernel base address of the descriptor pool
 313                     + DMA base address of the descriptor pool */
 314                 block_dma = ((unsigned long) block - (unsigned long) f->descriptor_pool) + f->descriptor_pool_dma;
 315
 316
 317                 /* the whole CIP pool fits on one page, so no worries about boundaries */
 318                 if ( ((unsigned long) &(f->header_pool[f->n_packets]) - (unsigned long) f->header_pool)
 319                     > PAGE_SIZE) {
 320                         printk(KERN_ERR "dv1394: FATAL ERROR: no room to allocate CIP header\n");
 321                         return;
 322                 }
 323
 324                 cip = &(f->header_pool[f->n_packets]);
 325
 326                 /* DMA address of the CIP header = offset of cip
 327                    relative to kernel base address of the header pool
 328                    + DMA base address of the header pool */
 329                 cip_dma = (unsigned long) cip % PAGE_SIZE + f->header_pool_dma;
 330
 331                 /* is this an empty packet? */
 332
 333                 if (video->cip_accum > (video->cip_d - video->cip_n)) {
 334                         empty_packet = 1;
 335                         payload_size = 8;
 336                         video->cip_accum -= (video->cip_d - video->cip_n);
 337                 } else {
 338                         payload_size = 488;
 339                         video->cip_accum += video->cip_n;
 340                 }
 341
 342                 /* there are three important packets each frame:
 343
 344                    the first packet in the frame - we ask the card to record the timestamp when
 345                                                    this packet is actually sent, so we can monitor
 346                                                    how accurate our timestamps are. Also, the first
 347                                                    packet serves as a semaphore to let us know that
 348                                                    it's OK to free the *previous* frame's DMA buffer
 349
 350                    the last packet in the frame -  this packet is used to detect buffer underflows.
 351                                                    if this is the last ready frame, the last DMA block
 352                                                    will have a branch back to the beginning of the frame
 353                                                    (so that the card will re-send the frame on underflow).
 354                                                    if this branch gets taken, we know that at least one
 355                                                    frame has been dropped. When the next frame is ready,
 356                                                    the branch is pointed to its first packet, and the
 357                                                    semaphore is disabled.
 358
 359                    a "mid" packet slightly before the end of the frame - this packet should trigger
 360                                    an interrupt so we can go and assign a timestamp to the first packet
 361                                    in the next frame. We don't use the very last packet in the frame
 362                                    for this purpose, because that would leave very little time to set
 363                                    the timestamp before DMA starts on the next frame.
 364                 */
 365
 366                 if (f->n_packets == 0) {
 367                         first_packet = 1;
 368                 } else if ( full_packets == (packets_per_frame-1) ) {
 369                         last_packet = 1;
 370                 } else if (f->n_packets == packets_per_frame) {
 371                         mid_packet = 1;
 372                 }
 373
 374
 375                 /********************/
 376                 /* setup CIP header */
 377                 /********************/
 378
 379                 /* the timestamp will be written later from the
 380                    mid-frame interrupt handler. For now we just
 381                    store the address of the CIP header(s) that
 382                    need a timestamp. */
 383
 384                 /* first packet in the frame needs a timestamp */
 385                 if (first_packet) {
 386                         f->cip_syt1 = cip;
 387                         if (empty_packet)
 388                                 first_packet_empty = 1;
 389
 390                 } else if (first_packet_empty && (f->n_packets == 1) ) {
 391                         /* if the first packet was empty, the second
 392                            packet's CIP header also needs a timestamp */
 393                         f->cip_syt2 = cip;
 394                 }
 395
 396                 fill_cip_header(cip,
 397                                 /* the node ID number of the OHCI card */
 398                                 reg_read(video->ohci, OHCI1394_NodeID) & 0x3F,
 399                                 video->continuity_counter,
 400                                 video->pal_or_ntsc,
 401                                 0xFFFF /* the timestamp is filled in later */);
 402
 403                 /* advance counter, only for full packets */
 404                 if ( ! empty_packet )
 405                         video->continuity_counter++;
 406
 407                 /******************************/
 408                 /* setup DMA descriptor block */
 409                 /******************************/
 410
 411                 /* first descriptor - OUTPUT_MORE_IMMEDIATE, for the controller's IT header */
 412                 fill_output_more_immediate( &(block->u.out.omi), 1, video->channel, 0, payload_size);
 413
 414                 if (empty_packet) {
 415                         /* second descriptor - OUTPUT_LAST for CIP header */
 416                         fill_output_last( &(block->u.out.u.empty.ol),
 417
 418                                           /* want completion status on all interesting packets */
 419                                           (first_packet || mid_packet || last_packet) ? 1 : 0,
 420
 421                                           /* want interrupts on all interesting packets */
 422                                           (first_packet || mid_packet || last_packet) ? 1 : 0,
 423
 424                                           sizeof(struct CIP_header), /* data size */
 425                                           cip_dma);
 426
 427                         if (first_packet)
 428                                 f->frame_begin_timestamp = &(block->u.out.u.empty.ol.q[3]);
 429                         else if (mid_packet)
 430                                 f->mid_frame_timestamp = &(block->u.out.u.empty.ol.q[3]);
 431                         else if (last_packet) {
 432                                 f->frame_end_timestamp = &(block->u.out.u.empty.ol.q[3]);
 433                                 f->frame_end_branch = &(block->u.out.u.empty.ol.q[2]);
 434                         }
 435
 436                         branch_address = &(block->u.out.u.empty.ol.q[2]);
 437                         n_descriptors = 3;
 438                         if (first_packet)
 439                                 f->first_n_descriptors = n_descriptors;
 440
 441                 } else { /* full packet */
 442
 443                         /* second descriptor - OUTPUT_MORE for CIP header */
 444                         fill_output_more( &(block->u.out.u.full.om),
 445                                           sizeof(struct CIP_header), /* data size */
 446                                           cip_dma);
 447
 448
 449                         /* third (and possibly fourth) descriptor - for DV data */
 450                         /* the 480-byte payload can cross a page boundary; if so,
 451                            we need to split it into two DMA descriptors */
 452
 453                         /* does the 480-byte data payload cross a page boundary? */
 454                         if ( (PAGE_SIZE- ((unsigned long)data_p % PAGE_SIZE) ) < 480 ) {
 455
 456                                 /* page boundary crossed */
 457
 458                                 fill_output_more( &(block->u.out.u.full.u.cross.om),
 459                                                   /* data size - how much of data_p fits on the first page */
 460                                                   PAGE_SIZE - (data_p % PAGE_SIZE),
 461
 462                                                   /* DMA address of data_p */
 463                                                   dma_region_offset_to_bus(&video->dv_buf,
 464                                                                            data_p - (unsigned long) video->dv_buf.kvirt));
 465
 466                                 fill_output_last( &(block->u.out.u.full.u.cross.ol),
 467
 468                                                   /* want completion status on all interesting packets */
 469                                                   (first_packet || mid_packet || last_packet) ? 1 : 0,
 470
 471                                                   /* want interrupt on all interesting packets */
 472                                                   (first_packet || mid_packet || last_packet) ? 1 : 0,
 473
 474                                                   /* data size - remaining portion of data_p */
 475                                                   480 - (PAGE_SIZE - (data_p % PAGE_SIZE)),
 476
 477                                                   /* DMA address of data_p + PAGE_SIZE - (data_p % PAGE_SIZE) */
 478                                                   dma_region_offset_to_bus(&video->dv_buf,
 479                                                                            data_p + PAGE_SIZE - (data_p % PAGE_SIZE) - (unsigned long) video->dv_buf.kvirt));
 480
 481                                 if (first_packet)
 482                                         f->frame_begin_timestamp = &(block->u.out.u.full.u.cross.ol.q[3]);
 483                                 else if (mid_packet)
 484                                         f->mid_frame_timestamp = &(block->u.out.u.full.u.cross.ol.q[3]);
 485                                 else if (last_packet) {
 486                                         f->frame_end_timestamp = &(block->u.out.u.full.u.cross.ol.q[3]);
 487                                         f->frame_end_branch = &(block->u.out.u.full.u.cross.ol.q[2]);
 488                                 }
 489
 490                                 branch_address = &(block->u.out.u.full.u.cross.ol.q[2]);
 491
 492                                 n_descriptors = 5;
 493                                 if (first_packet)
 494                                         f->first_n_descriptors = n_descriptors;
 495
 496                                 full_packets++;
 497
 498                         } else {
 499                                 /* fits on one page */
 500
 501                                 fill_output_last( &(block->u.out.u.full.u.nocross.ol),
 502
 503                                                   /* want completion status on all interesting packets */
 504                                                   (first_packet || mid_packet || last_packet) ? 1 : 0,
 505
 506                                                   /* want interrupt on all interesting packets */
 507                                                   (first_packet || mid_packet || last_packet) ? 1 : 0,
 508
 509                                                   480, /* data size (480 bytes of DV data) */
 510
 511
 512                                                   /* DMA address of data_p */
 513                                                   dma_region_offset_to_bus(&video->dv_buf,
 514                                                                            data_p - (unsigned long) video->dv_buf.kvirt));
 515
 516                                 if (first_packet)
 517                                         f->frame_begin_timestamp = &(block->u.out.u.full.u.nocross.ol.q[3]);
 518                                 else if (mid_packet)
 519                                         f->mid_frame_timestamp = &(block->u.out.u.full.u.nocross.ol.q[3]);
 520                                 else if (last_packet) {
 521                                         f->frame_end_timestamp = &(block->u.out.u.full.u.nocross.ol.q[3]);
 522                                         f->frame_end_branch = &(block->u.out.u.full.u.nocross.ol.q[2]);
 523                                 }
 524
 525                                 branch_address = &(block->u.out.u.full.u.nocross.ol.q[2]);
 526
 527                                 n_descriptors = 4;
 528                                 if (first_packet)
 529                                         f->first_n_descriptors = n_descriptors;
 530
 531                                 full_packets++;
 532                         }
 533                 }
 534
 535                 /* link this descriptor block into the DMA program by filling in
 536                    the branch address of the previous block */
 537
 538                 /* note: we are not linked into the active DMA chain yet */
 539
 540                 if (last_branch_address) {
 541                         *(last_branch_address) = cpu_to_le32(block_dma | n_descriptors);
 542                 }
 543
 544                 last_branch_address = branch_address;
 545
 546
 547                 f->n_packets++;
 548
 549         }
 550
 551         /* when we first assemble a new frame, set the final branch
 552            to loop back up to the top */
 553         *(f->frame_end_branch) = cpu_to_le32(f->descriptor_pool_dma | f->first_n_descriptors);
 554
 555         /* make the latest version of this frame visible to the PCI card */
 556         dma_region_sync_for_device(&video->dv_buf, f->data - (unsigned long) video->dv_buf.kvirt, video->frame_size);
 557
 558         /* lock against DMA interrupt */
 559         spin_lock_irqsave(&video->spinlock, irq_flags);
 560
 561         f->state = FRAME_READY;
 562
 563         video->n_clear_frames--;
 564
 565         last_frame = video->first_clear_frame - 1;
 566         if (last_frame == -1)
 567                 last_frame = video->n_frames-1;
 568
 569         video->first_clear_frame = (video->first_clear_frame + 1) % video->n_frames;
 570
 571         irq_printk("   frame %d prepared, active_frame = %d, n_clear_frames = %d, first_clear_frame = %d\n last=%d\n",
 572                    this_frame, video->active_frame, video->n_clear_frames, video->first_clear_frame, last_frame);
 573
 574         irq_printk("   begin_ts %08lx mid_ts %08lx end_ts %08lx end_br %08lx\n",
 575                    (unsigned long) f->frame_begin_timestamp,
 576                    (unsigned long) f->mid_frame_timestamp,
 577                    (unsigned long) f->frame_end_timestamp,
 578                    (unsigned long) f->frame_end_branch);
 579
 580         if (video->active_frame != -1) {
 581
 582                 /* if DMA is already active, we are almost done */
 583                 /* just link us onto the active DMA chain */
 584                 if (video->frames[last_frame]->frame_end_branch) {
 585                         u32 temp;
 586
 587                         /* point the previous frame's tail to this frame's head */
 588                         *(video->frames[last_frame]->frame_end_branch) = cpu_to_le32(f->descriptor_pool_dma | f->first_n_descriptors);
 589
 590                         /* this write MUST precede the next one, or we could silently drop frames */
 591                         wmb();
 592
 593                         /* disable the want_status semaphore on the last packet */
 594                         temp = le32_to_cpu(*(video->frames[last_frame]->frame_end_branch - 2));
 595                         temp &= 0xF7CFFFFF;
 596                         *(video->frames[last_frame]->frame_end_branch - 2) = cpu_to_le32(temp);
 597
 598                         /* flush these writes to memory ASAP */
 599                         flush_pci_write(video->ohci);
 600
 601                         /* NOTE:
 602                            ideally the writes should be "atomic": if
 603                            the OHCI card reads the want_status flag in
 604                            between them, we'll falsely report a
 605                            dropped frame. Hopefully this window is too
 606                            small to really matter, and the consequence
 607                            is rather harmless. */
 608
 609
 610                         irq_printk("     new frame %d linked onto DMA chain\n", this_frame);
 611
 612                 } else {
 613                         printk(KERN_ERR "dv1394: last frame not ready???\n");
 614                 }
 615
 616         } else {
 617
 618                 u32 transmit_sec, transmit_cyc;
 619                 u32 ts_cyc, ts_off;
 620
 621                 /* DMA is stopped, so this is the very first frame */
 622                 video->active_frame = this_frame;
 623
 624                 /* set CommandPtr to address and size of first descriptor block */
 625                 reg_write(video->ohci, video->ohci_IsoXmitCommandPtr,
 626                           video->frames[video->active_frame]->descriptor_pool_dma |
 627                           f->first_n_descriptors);
 628
 629                 /* assign a timestamp based on the current cycle time...
 630                    We'll tell the card to begin DMA 100 cycles from now,
 631                    and assign a timestamp 103 cycles from now */
 632
 633                 cycleTimer = reg_read(video->ohci, OHCI1394_IsochronousCycleTimer);
 634
 635                 ct_sec = cycleTimer >> 25;
 636                 ct_cyc = (cycleTimer >> 12) & 0x1FFF;
 637                 ct_off = cycleTimer & 0xFFF;
 638
 639                 transmit_sec = ct_sec;
 640                 transmit_cyc = ct_cyc + 100;
 641
 642                 transmit_sec += transmit_cyc/8000;
 643                 transmit_cyc %= 8000;
 644
 645                 ts_off = ct_off;
 646                 ts_cyc = transmit_cyc + 3;
 647                 ts_cyc %= 8000;
 648
 649                 f->assigned_timestamp = (ts_cyc&0xF) << 12;
 650
 651                 /* now actually write the timestamp into the appropriate CIP headers */
 652                 if (f->cip_syt1) {
 653                         f->cip_syt1->b[6] = f->assigned_timestamp >> 8;
 654                         f->cip_syt1->b[7] = f->assigned_timestamp & 0xFF;
 655                 }
 656                 if (f->cip_syt2) {
 657                         f->cip_syt2->b[6] = f->assigned_timestamp >> 8;
 658                         f->cip_syt2->b[7] = f->assigned_timestamp & 0xFF;
 659                 }
 660
 661                 /* --- start DMA --- */
 662
 663                 /* clear all bits in ContextControl register */
 664
 665                 reg_write(video->ohci, video->ohci_IsoXmitContextControlClear, 0xFFFFFFFF);
 666                 wmb();
 667
 668                 /* the OHCI card has the ability to start ISO transmission on a
 669                    particular cycle (start-on-cycle). This way we can ensure that
 670                    the first DV frame will have an accurate timestamp.
 671
 672                    However, start-on-cycle only appears to work if the OHCI card
 673                    is cycle master! Since the consequences of messing up the first
 674                    timestamp are minimal*, just disable start-on-cycle for now.
 675
 676                    * my DV deck drops the first few frames before it "locks in;"
 677                      so the first frame having an incorrect timestamp is inconsequential.
 678                 */
 679
 680 #if 0
 681                 reg_write(video->ohci, video->ohci_IsoXmitContextControlSet,
 682                           (1 << 31) /* enable start-on-cycle */
 683                           | ( (transmit_sec & 0x3) << 29)
 684                           | (transmit_cyc << 16));
 685                 wmb();
 686 #endif
 687
 688                 video->dma_running = 1;
 689
 690                 /* set the 'run' bit */
 691                 reg_write(video->ohci, video->ohci_IsoXmitContextControlSet, 0x8000);
 692                 flush_pci_write(video->ohci);
 693
 694                 /* --- DMA should be running now --- */
 695
 696                 debug_printk("    Cycle = %4u ContextControl = %08x CmdPtr = %08x\n",
 697                              (reg_read(video->ohci, OHCI1394_IsochronousCycleTimer) >> 12) & 0x1FFF,
 698                              reg_read(video->ohci, video->ohci_IsoXmitContextControlSet),
 699                              reg_read(video->ohci, video->ohci_IsoXmitCommandPtr));
 700
 701                 debug_printk("    DMA start - current cycle %4u, transmit cycle %4u (%2u), assigning ts cycle %2u\n",
 702                              ct_cyc, transmit_cyc, transmit_cyc & 0xF, ts_cyc & 0xF);
 703
 704 #if DV1394_DEBUG_LEVEL >= 2
 705                 {
 706                         /* check if DMA is really running */
 707                         int i = 0;
 708                         while (i < 20) {
 709                                 mb();
 710                                 mdelay(1);
 711                                 if (reg_read(video->ohci, video->ohci_IsoXmitContextControlSet) & (1 << 10)) {
 712                                         printk("DMA ACTIVE after %d msec\n", i);
 713                                         break;
 714                                 }
 715                                 i++;
 716                         }
 717
 718                         printk("set = %08x, cmdPtr = %08x\n",
 719                                reg_read(video->ohci, video->ohci_IsoXmitContextControlSet),
 720                                reg_read(video->ohci, video->ohci_IsoXmitCommandPtr)
 721                                );
 722
 723                         if ( ! (reg_read(video->ohci, video->ohci_IsoXmitContextControlSet) &  (1 << 10)) ) {
 724                                 printk("DMA did NOT go active after 20ms, event = %x\n",
 725                                        reg_read(video->ohci, video->ohci_IsoXmitContextControlSet) & 0x1F);
 726                         } else
 727                                 printk("DMA is RUNNING!\n");
 728                 }
 729 #endif
 730
 731         }
 732
 733
 734         spin_unlock_irqrestore(&video->spinlock, irq_flags);
 735 }
 736
 737
 738
 739 /*** RECEIVE FUNCTIONS *****************************************************/
 740
 741 /*
 742         frame method put_packet
 743
 744         map and copy the packet data to its location in the frame
 745         based upon DIF section and sequence
 746 */
 747
 748 static void inline
 749 frame_put_packet (struct frame *f, struct packet *p)
 750 {
 751         int section_type = p->data[0] >> 5;           /* section type is in bits 5 - 7 */
 752         int dif_sequence = p->data[1] >> 4;           /* dif sequence number is in bits 4 - 7 */
 753         int dif_block = p->data[2];
 754
 755         /* sanity check */
 756         if (dif_sequence > 11 || dif_block > 149) return;
 757
 758         switch (section_type) {
 759         case 0:           /* 1 Header block */
 760                 memcpy( (void *) f->data + dif_sequence * 150 * 80, p->data, 480);
 761                 break;
 762
 763         case 1:           /* 2 Subcode blocks */
 764                 memcpy( (void *) f->data + dif_sequence * 150 * 80 + (1 + dif_block) * 80, p->data, 480);
 765                 break;
 766
 767         case 2:           /* 3 VAUX blocks */
 768                 memcpy( (void *) f->data + dif_sequence * 150 * 80 + (3 + dif_block) * 80, p->data, 480);
 769                 break;
 770
 771         case 3:           /* 9 Audio blocks interleaved with video */
 772                 memcpy( (void *) f->data + dif_sequence * 150 * 80 + (6 + dif_block * 16) * 80, p->data, 480);
 773                 break;
 774
 775         case 4:           /* 135 Video blocks interleaved with audio */
 776                 memcpy( (void *) f->data + dif_sequence * 150 * 80 + (7 + (dif_block / 15) + dif_block) * 80, p->data, 480);
 777                 break;
 778
 779         default:           /* we can not handle any other data */
 780                 break;
 781         }
 782 }
 783
 784
 785 static void start_dma_receive(struct video_card *video)
 786 {
 787         if (video->first_run == 1) {
 788                 video->first_run = 0;
 789
 790                 /* start DMA once all of the frames are READY */
 791                 video->n_clear_frames = 0;
 792                 video->first_clear_frame = -1;
 793                 video->current_packet = 0;
 794                 video->active_frame = 0;
 795
 796                 /* reset iso recv control register */
 797                 reg_write(video->ohci, video->ohci_IsoRcvContextControlClear, 0xFFFFFFFF);
 798                 wmb();
 799
 800                 /* clear bufferFill, set isochHeader and speed (0=100) */
 801                 reg_write(video->ohci, video->ohci_IsoRcvContextControlSet, 0x40000000);
 802
 803                 /* match on all tags, listen on channel */
 804                 reg_write(video->ohci, video->ohci_IsoRcvContextMatch, 0xf0000000 | video->channel);
 805
 806                 /* address and first descriptor block + Z=1 */
 807                 reg_write(video->ohci, video->ohci_IsoRcvCommandPtr,
 808                           video->frames[0]->descriptor_pool_dma | 1); /* Z=1 */
 809                 wmb();
 810
 811                 video->dma_running = 1;
 812
 813                 /* run */
 814                 reg_write(video->ohci, video->ohci_IsoRcvContextControlSet, 0x8000);
 815                 flush_pci_write(video->ohci);
 816
 817                 debug_printk("dv1394: DMA started\n");
 818
 819 #if DV1394_DEBUG_LEVEL >= 2
 820                 {
 821                         int i;
 822
 823                         for (i = 0; i < 1000; ++i) {
 824                                 mdelay(1);
 825                                 if (reg_read(video->ohci, video->ohci_IsoRcvContextControlSet) & (1 << 10)) {
 826                                         printk("DMA ACTIVE after %d msec\n", i);
 827                                         break;
 828                                 }
 829                         }
 830                         if ( reg_read(video->ohci, video->ohci_IsoRcvContextControlSet) &  (1 << 11) ) {
 831                                 printk("DEAD, event = %x\n",
 832                                            reg_read(video->ohci, video->ohci_IsoRcvContextControlSet) & 0x1F);
 833                         } else
 834                                 printk("RUNNING!\n");
 835                 }
 836 #endif
 837         } else if ( reg_read(video->ohci, video->ohci_IsoRcvContextControlSet) &  (1 << 11) ) {
 838                 debug_printk("DEAD, event = %x\n",
 839                              reg_read(video->ohci, video->ohci_IsoRcvContextControlSet) & 0x1F);
 840
 841                 /* wake */
 842                 reg_write(video->ohci, video->ohci_IsoRcvContextControlSet, (1 << 12));
 843         }
 844 }
 845
 846
 847 /*
 848    receive_packets() - build the DMA program for receiving
 849 */
 850
 851 static void receive_packets(struct video_card *video)
 852 {
 853         struct DMA_descriptor_block *block = NULL;
 854         dma_addr_t block_dma = 0;
 855         struct packet *data = NULL;
 856         dma_addr_t data_dma = 0;
 857         u32 *last_branch_address = NULL;
 858         unsigned long irq_flags;
 859         int want_interrupt = 0;
 860         struct frame *f = NULL;
 861         int i, j;
 862
 863         spin_lock_irqsave(&video->spinlock, irq_flags);
 864
 865         for (j = 0; j < video->n_frames; j++) {
 866
 867                 /* connect frames */
 868                 if (j > 0 && f != NULL && f->frame_end_branch != NULL)
 869                         *(f->frame_end_branch) = cpu_to_le32(video->frames[j]->descriptor_pool_dma | 1); /* set Z=1 */
 870
 871                 f = video->frames[j];
 872
 873                 for (i = 0; i < MAX_PACKETS; i++) {
 874                         /* locate a descriptor block and packet from the buffer */
 875                         block = &(f->descriptor_pool[i]);
 876                         block_dma = ((unsigned long) block - (unsigned long) f->descriptor_pool) + f->descriptor_pool_dma;
 877
 878                         data = ((struct packet*)video->packet_buf.kvirt) + f->frame_num * MAX_PACKETS + i;
 879                         data_dma = dma_region_offset_to_bus( &video->packet_buf,
 880                                                              ((unsigned long) data - (unsigned long) video->packet_buf.kvirt) );
 881
 882                         /* setup DMA descriptor block */
 883                         want_interrupt = ((i % (MAX_PACKETS/2)) == 0 || i == (MAX_PACKETS-1));
 884                         fill_input_last( &(block->u.in.il), want_interrupt, 512, data_dma);
 885
 886                         /* link descriptors */
 887                         last_branch_address = f->frame_end_branch;
 888
 889                         if (last_branch_address != NULL)
 890                                 *(last_branch_address) = cpu_to_le32(block_dma | 1); /* set Z=1 */
 891
 892                         f->frame_end_branch = &(block->u.in.il.q[2]);
 893                 }
 894
 895         } /* next j */
 896
 897         spin_unlock_irqrestore(&video->spinlock, irq_flags);
 898
 899 }
 900
 901
 902
 903 /*** MANAGEMENT FUNCTIONS **************************************************/
 904
 905 static int do_dv1394_init(struct video_card *video, struct dv1394_init *init)
 906 {
 907         unsigned long flags, new_buf_size;
 908         int i;
 909         u64 chan_mask;
 910         int retval = -EINVAL;
 911
 912         debug_printk("dv1394: initialising %d\n", video->id);
 913         if (init->api_version != DV1394_API_VERSION)
 914                 return -EINVAL;
 915
 916         /* first sanitize all the parameters */
 917         if ( (init->n_frames < 2) || (init->n_frames > DV1394_MAX_FRAMES) )
 918                 return -EINVAL;
 919
 920         if ( (init->format != DV1394_NTSC) && (init->format != DV1394_PAL) )
 921                 return -EINVAL;
 922
 923         if ( (init->syt_offset == 0) || (init->syt_offset > 50) )
 924                 /* default SYT offset is 3 cycles */
 925                 init->syt_offset = 3;
 926
 927         if ( (init->channel > 63) || (init->channel < 0) )
 928                 init->channel = 63;
 929
 930         chan_mask = (u64)1 << init->channel;
 931
 932         /* calculate what size DMA buffer is needed */
 933         if (init->format == DV1394_NTSC)
 934                 new_buf_size = DV1394_NTSC_FRAME_SIZE * init->n_frames;
 935         else
 936                 new_buf_size = DV1394_PAL_FRAME_SIZE * init->n_frames;
 937
 938         /* round up to PAGE_SIZE */
 939         if (new_buf_size % PAGE_SIZE) new_buf_size += PAGE_SIZE - (new_buf_size % PAGE_SIZE);
 940
 941         /* don't allow the user to allocate the DMA buffer more than once */
 942         if (video->dv_buf.kvirt && video->dv_buf_size != new_buf_size) {
 943                 printk("dv1394: re-sizing the DMA buffer is not allowed\n");
 944                 return -EINVAL;
 945         }
 946
 947         /* shutdown the card if it's currently active */
 948         /* (the card should not be reset if the parameters are screwy) */
 949
 950         do_dv1394_shutdown(video, 0);
 951
 952         /* try to claim the ISO channel */
 953         spin_lock_irqsave(&video->ohci->IR_channel_lock, flags);
 954         if (video->ohci->ISO_channel_usage & chan_mask) {
 955                 spin_unlock_irqrestore(&video->ohci->IR_channel_lock, flags);
 956                 retval = -EBUSY;
 957                 goto err;
 958         }
 959         video->ohci->ISO_channel_usage |= chan_mask;
 960         spin_unlock_irqrestore(&video->ohci->IR_channel_lock, flags);
 961
 962         video->channel = init->channel;
 963
 964         /* initialize misc. fields of video */
 965         video->n_frames = init->n_frames;
 966         video->pal_or_ntsc = init->format;
 967
 968         video->cip_accum = 0;
 969         video->continuity_counter = 0;
 970
 971         video->active_frame = -1;
 972         video->first_clear_frame = 0;
 973         video->n_clear_frames = video->n_frames;
 974         video->dropped_frames = 0;
 975
 976         video->write_off = 0;
 977
 978         video->first_run = 1;
 979         video->current_packet = -1;
 980         video->first_frame = 0;
 981
 982         if (video->pal_or_ntsc == DV1394_NTSC) {
 983                 video->cip_n = init->cip_n != 0 ? init->cip_n : CIP_N_NTSC;
 984                 video->cip_d = init->cip_d != 0 ? init->cip_d : CIP_D_NTSC;
 985                 video->frame_size = DV1394_NTSC_FRAME_SIZE;
 986         } else {
 987                 video->cip_n = init->cip_n != 0 ? init->cip_n : CIP_N_PAL;
 988                 video->cip_d = init->cip_d != 0 ? init->cip_d : CIP_D_PAL;
 989                 video->frame_size = DV1394_PAL_FRAME_SIZE;
 990         }
 991
 992         video->syt_offset = init->syt_offset;
 993
 994         /* find and claim DMA contexts on the OHCI card */
 995
 996         if (video->ohci_it_ctx == -1) {
 997                 ohci1394_init_iso_tasklet(&video->it_tasklet, OHCI_ISO_TRANSMIT,
 998                                           it_tasklet_func, (unsigned long) video);
 999
1000                 if (ohci1394_register_iso_tasklet(video->ohci, &video->it_tasklet) < 0) {
1001                         printk(KERN_ERR "dv1394: could not find an available IT DMA context\n");
1002                         retval = -EBUSY;
1003                         goto err;
1004                 }
1005
1006                 video->ohci_it_ctx = video->it_tasklet.context;
1007                 debug_printk("dv1394: claimed IT DMA context %d\n", video->ohci_it_ctx);
1008         }
1009
1010         if (video->ohci_ir_ctx == -1) {
1011                 ohci1394_init_iso_tasklet(&video->ir_tasklet, OHCI_ISO_RECEIVE,
1012                                           ir_tasklet_func, (unsigned long) video);
1013
1014                 if (ohci1394_register_iso_tasklet(video->ohci, &video->ir_tasklet) < 0) {
1015                         printk(KERN_ERR "dv1394: could not find an available IR DMA context\n");
1016                         retval = -EBUSY;
1017                         goto err;
1018                 }
1019                 video->ohci_ir_ctx = video->ir_tasklet.context;
1020                 debug_printk("dv1394: claimed IR DMA context %d\n", video->ohci_ir_ctx);
1021         }
1022
1023         /* allocate struct frames */
1024         for (i = 0; i < init->n_frames; i++) {
1025                 video->frames[i] = frame_new(i, video);
1026
1027                 if (!video->frames[i]) {
1028                         printk(KERN_ERR "dv1394: Cannot allocate frame structs\n");
1029                         retval = -ENOMEM;
1030                         goto err;
1031                 }
1032         }
1033
1034         if (!video->dv_buf.kvirt) {
1035                 /* allocate the ringbuffer */
1036                 retval = dma_region_alloc(&video->dv_buf, new_buf_size, video->ohci->dev, PCI_DMA_TODEVICE);
1037                 if (retval)
1038                         goto err;
1039
1040                 video->dv_buf_size = new_buf_size;
1041
1042                 debug_printk("dv1394: Allocated %d frame buffers, total %u pages (%u DMA pages), %lu bytes\n",
1043                              video->n_frames, video->dv_buf.n_pages,
1044                              video->dv_buf.n_dma_pages, video->dv_buf_size);
1045         }
1046
1047         /* set up the frame->data pointers */
1048         for (i = 0; i < video->n_frames; i++)
1049                 video->frames[i]->data = (unsigned long) video->dv_buf.kvirt + i * video->frame_size;
1050
1051         if (!video->packet_buf.kvirt) {
1052                 /* allocate packet buffer */
1053                 video->packet_buf_size = sizeof(struct packet) * video->n_frames * MAX_PACKETS;
1054                 if (video->packet_buf_size % PAGE_SIZE)
1055                         video->packet_buf_size += PAGE_SIZE - (video->packet_buf_size % PAGE_SIZE);
1056
1057                 retval = dma_region_alloc(&video->packet_buf, video->packet_buf_size,
1058                                           video->ohci->dev, PCI_DMA_FROMDEVICE);
1059                 if (retval)
1060                         goto err;
1061
1062                 debug_printk("dv1394: Allocated %d packets in buffer, total %u pages (%u DMA pages), %lu bytes\n",
1063                                  video->n_frames*MAX_PACKETS, video->packet_buf.n_pages,
1064                                  video->packet_buf.n_dma_pages, video->packet_buf_size);
1065         }
1066
1067         /* set up register offsets for IT context */
1068         /* IT DMA context registers are spaced 16 bytes apart */
1069         video->ohci_IsoXmitContextControlSet = OHCI1394_IsoXmitContextControlSet+16*video->ohci_it_ctx;
1070         video->ohci_IsoXmitContextControlClear = OHCI1394_IsoXmitContextControlClear+16*video->ohci_it_ctx;
1071         video->ohci_IsoXmitCommandPtr = OHCI1394_IsoXmitCommandPtr+16*video->ohci_it_ctx;
1072
1073         /* enable interrupts for IT context */
1074         reg_write(video->ohci, OHCI1394_IsoXmitIntMaskSet, (1 << video->ohci_it_ctx));
1075         debug_printk("dv1394: interrupts enabled for IT context %d\n", video->ohci_it_ctx);
1076
1077         /* set up register offsets for IR context */
1078         /* IR DMA context registers are spaced 32 bytes apart */
1079         video->ohci_IsoRcvContextControlSet = OHCI1394_IsoRcvContextControlSet+32*video->ohci_ir_ctx;
1080         video->ohci_IsoRcvContextControlClear = OHCI1394_IsoRcvContextControlClear+32*video->ohci_ir_ctx;
1081         video->ohci_IsoRcvCommandPtr = OHCI1394_IsoRcvCommandPtr+32*video->ohci_ir_ctx;
1082         video->ohci_IsoRcvContextMatch = OHCI1394_IsoRcvContextMatch+32*video->ohci_ir_ctx;
1083
1084         /* enable interrupts for IR context */
1085         reg_write(video->ohci, OHCI1394_IsoRecvIntMaskSet, (1 << video->ohci_ir_ctx) );
1086         debug_printk("dv1394: interrupts enabled for IR context %d\n", video->ohci_ir_ctx);
1087
1088         return 0;
1089
1090 err:
1091         do_dv1394_shutdown(video, 1);
1092         return retval;
1093 }
1094
1095 /* if the user doesn't bother to call ioctl(INIT) before starting
1096    mmap() or read()/write(), just give him some default values */
1097
1098 static int do_dv1394_init_default(struct video_card *video)
1099 {
1100         struct dv1394_init init;
1101
1102         init.api_version = DV1394_API_VERSION;
1103         init.n_frames = DV1394_MAX_FRAMES / 4;
1104         /* the following are now set via devfs */
1105         init.channel = video->channel;
1106         init.format = video->pal_or_ntsc;
1107         init.cip_n = video->cip_n;
1108         init.cip_d = video->cip_d;
1109         init.syt_offset = video->syt_offset;
1110
1111         return do_dv1394_init(video, &init);
1112 }
1113
1114 /* do NOT call from interrupt context */
1115 static void stop_dma(struct video_card *video)
1116 {
1117         unsigned long flags;
1118         int i;
1119
1120         /* no interrupts */
1121         spin_lock_irqsave(&video->spinlock, flags);
1122
1123         video->dma_running = 0;
1124
1125         if ( (video->ohci_it_ctx == -1) && (video->ohci_ir_ctx == -1) )
1126                 goto out;
1127
1128         /* stop DMA if in progress */
1129         if ( (video->active_frame != -1) ||
1130             (reg_read(video->ohci, video->ohci_IsoXmitContextControlClear) & (1 << 10)) ||
1131             (reg_read(video->ohci, video->ohci_IsoRcvContextControlClear) &  (1 << 10)) ) {
1132
1133                 /* clear the .run bits */
1134                 reg_write(video->ohci, video->ohci_IsoXmitContextControlClear, (1 << 15));
1135                 reg_write(video->ohci, video->ohci_IsoRcvContextControlClear, (1 << 15));
1136                 flush_pci_write(video->ohci);
1137
1138                 video->active_frame = -1;
1139                 video->first_run = 1;
1140
1141                 /* wait until DMA really stops */
1142                 i = 0;
1143                 while (i < 1000) {
1144
1145                         /* wait 0.1 millisecond */
1146                         udelay(100);
1147
1148                         if ( (reg_read(video->ohci, video->ohci_IsoXmitContextControlClear) & (1 << 10)) ||
1149                             (reg_read(video->ohci, video->ohci_IsoRcvContextControlClear)  & (1 << 10)) ) {
1150                                 /* still active */
1151                                 debug_printk("dv1394: stop_dma: DMA not stopped yet\n" );
1152                                 mb();
1153                         } else {
1154                                 debug_printk("dv1394: stop_dma: DMA stopped safely after %d ms\n", i/10);
1155                                 break;
1156                         }
1157
1158                         i++;
1159                 }
1160
1161                 if (i == 1000) {
1162                         printk(KERN_ERR "dv1394: stop_dma: DMA still going after %d ms!\n", i/10);
1163                 }
1164         }
1165         else
1166                 debug_printk("dv1394: stop_dma: already stopped.\n");
1167
1168 out:
1169         spin_unlock_irqrestore(&video->spinlock, flags);
1170 }
1171
1172
1173
1174 static void do_dv1394_shutdown(struct video_card *video, int free_dv_buf)
1175 {
1176         int i;
1177
1178         debug_printk("dv1394: shutdown...\n");
1179
1180         /* stop DMA if in progress */
1181         stop_dma(video);
1182
1183         /* release the DMA contexts */
1184         if (video->ohci_it_ctx != -1) {
1185                 video->ohci_IsoXmitContextControlSet = 0;
1186                 video->ohci_IsoXmitContextControlClear = 0;
1187                 video->ohci_IsoXmitCommandPtr = 0;
1188
1189                 /* disable interrupts for IT context */
1190                 reg_write(video->ohci, OHCI1394_IsoXmitIntMaskClear, (1 << video->ohci_it_ctx));
1191
1192                 /* remove tasklet */
1193                 ohci1394_unregister_iso_tasklet(video->ohci, &video->it_tasklet);
1194                 debug_printk("dv1394: IT context %d released\n", video->ohci_it_ctx);
1195                 video->ohci_it_ctx = -1;
1196         }
1197
1198         if (video->ohci_ir_ctx != -1) {
1199                 video->ohci_IsoRcvContextControlSet = 0;
1200                 video->ohci_IsoRcvContextControlClear = 0;
1201                 video->ohci_IsoRcvCommandPtr = 0;
1202                 video->ohci_IsoRcvContextMatch = 0;
1203
1204                 /* disable interrupts for IR context */
1205                 reg_write(video->ohci, OHCI1394_IsoRecvIntMaskClear, (1 << video->ohci_ir_ctx));
1206
1207                 /* remove tasklet */
1208                 ohci1394_unregister_iso_tasklet(video->ohci, &video->ir_tasklet);
1209                 debug_printk("dv1394: IR context %d released\n", video->ohci_ir_ctx);
1210                 video->ohci_ir_ctx = -1;
1211         }
1212
1213         /* release the ISO channel */
1214         if (video->channel != -1) {
1215                 u64 chan_mask;
1216                 unsigned long flags;
1217
1218                 chan_mask = (u64)1 << video->channel;
1219
1220                 spin_lock_irqsave(&video->ohci->IR_channel_lock, flags);
1221                 video->ohci->ISO_channel_usage &= ~(chan_mask);
1222                 spin_unlock_irqrestore(&video->ohci->IR_channel_lock, flags);
1223
1224                 video->channel = -1;
1225         }
1226
1227         /* free the frame structs */
1228         for (i = 0; i < DV1394_MAX_FRAMES; i++) {
1229                 if (video->frames[i])
1230                         frame_delete(video->frames[i]);
1231                 video->frames[i] = NULL;
1232         }
1233
1234         video->n_frames = 0;
1235
1236         /* we can't free the DMA buffer unless it is guaranteed that
1237            no more user-space mappings exist */
1238
1239         if (free_dv_buf) {
1240                 dma_region_free(&video->dv_buf);
1241                 video->dv_buf_size = 0;
1242         }
1243
1244         /* free packet buffer */
1245         dma_region_free(&video->packet_buf);
1246         video->packet_buf_size = 0;
1247
1248         debug_printk("dv1394: shutdown OK\n");
1249 }
1250
1251 /*
1252        **********************************
1253        *** MMAP() THEORY OF OPERATION ***
1254        **********************************
1255
1256         The ringbuffer cannot be re-allocated or freed while
1257         a user program maintains a mapping of it. (note that a mapping
1258         can persist even after the device fd is closed!)
1259
1260         So, only let the user process allocate the DMA buffer once.
1261         To resize or deallocate it, you must close the device file
1262         and open it again.
1263
1264         Previously Dan M. hacked out a scheme that allowed the DMA
1265         buffer to change by forcefully unmapping it from the user's
1266         address space. It was prone to error because it's very hard to
1267         track all the places the buffer could have been mapped (we
1268         would have had to walk the vma list of every process in the
1269         system to be sure we found all the mappings!). Instead, we
1270         force the user to choose one buffer size and stick with
1271         it. This small sacrifice is worth the huge reduction in
1272         error-prone code in dv1394.
1273 */
1274
1275 int dv1394_mmap(struct file *file, struct vm_area_struct *vma)
1276 {
1277         struct video_card *video = file_to_video_card(file);
1278         int retval = -EINVAL;
1279
1280         /* serialize mmap */
1281         down(&video->sem);
1282
1283         if ( ! video_card_initialized(video) ) {
1284                 retval = do_dv1394_init_default(video);
1285                 if (retval)
1286                         goto out;
1287         }
1288
1289         retval = dma_region_mmap(&video->dv_buf, file, vma);
1290 out:
1291         up(&video->sem);
1292         return retval;
1293 }
1294
1295 /*** DEVICE FILE INTERFACE *************************************************/
1296
1297 /* no need to serialize, multiple threads OK */
1298 static unsigned int dv1394_poll(struct file *file, struct poll_table_struct *wait)
1299 {
1300         struct video_card *video = file_to_video_card(file);
1301         unsigned int mask = 0;
1302         unsigned long flags;
1303
1304         poll_wait(file, &video->waitq, wait);
1305
1306         spin_lock_irqsave(&video->spinlock, flags);
1307         if ( video->n_frames == 0 ) {
1308
1309         } else if ( video->active_frame == -1 ) {
1310                 /* nothing going on */
1311                 mask |= POLLOUT;
1312         } else {
1313                 /* any clear/ready buffers? */
1314                 if (video->n_clear_frames >0)
1315                         mask |= POLLOUT | POLLIN;
1316         }
1317         spin_unlock_irqrestore(&video->spinlock, flags);
1318
1319         return mask;
1320 }
1321
1322 static int dv1394_fasync(int fd, struct file *file, int on)
1323 {
1324         /* I just copied this code verbatim from Alan Cox's mouse driver example
1325            (linux/Documentation/DocBook/) */
1326
1327         struct video_card *video = file_to_video_card(file);
1328
1329         int retval = fasync_helper(fd, file, on, &video->fasync);
1330
1331         if (retval < 0)
1332                 return retval;
1333         return 0;
1334 }
1335
1336 static ssize_t dv1394_write(struct file *file, const char *buffer, size_t count, loff_t *ppos)
1337 {
1338         struct video_card *video = file_to_video_card(file);
1339         DECLARE_WAITQUEUE(wait, current);
1340         ssize_t ret;
1341         size_t cnt;
1342         unsigned long flags;
1343         int target_frame;
1344
1345         /* serialize this to prevent multi-threaded mayhem */
1346         if (file->f_flags & O_NONBLOCK) {
1347                 if (down_trylock(&video->sem))
1348                         return -EAGAIN;
1349         } else {
1350                 if (down_interruptible(&video->sem))
1351                         return -ERESTARTSYS;
1352         }
1353
1354         if ( !video_card_initialized(video) ) {
1355                 ret = do_dv1394_init_default(video);
1356                 if (ret) {
1357                         up(&video->sem);
1358                         return ret;
1359                 }
1360         }
1361
1362         ret = 0;
1363         add_wait_queue(&video->waitq, &wait);
1364
1365         while (count > 0) {
1366
1367                 /* must set TASK_INTERRUPTIBLE *before* checking for free
1368                    buffers; otherwise we could miss a wakeup if the interrupt
1369                    fires between the check and the schedule() */
1370
1371                 set_current_state(TASK_INTERRUPTIBLE);
1372
1373                 spin_lock_irqsave(&video->spinlock, flags);
1374
1375                 target_frame = video->first_clear_frame;
1376
1377                 spin_unlock_irqrestore(&video->spinlock, flags);
1378
1379                 if (video->frames[target_frame]->state == FRAME_CLEAR) {
1380
1381                         /* how much room is left in the target frame buffer */
1382                         cnt = video->frame_size - (video->write_off - target_frame * video->frame_size);
1383
1384                 } else {
1385                         /* buffer is already used */
1386                         cnt = 0;
1387                 }
1388
1389                 if (cnt > count)
1390                         cnt = count;
1391
1392                 if (cnt <= 0) {
1393                         /* no room left, gotta wait */
1394                         if (file->f_flags & O_NONBLOCK) {
1395                                 if (!ret)
1396                                         ret = -EAGAIN;
1397                                 break;
1398                         }
1399                         if (signal_pending(current)) {
1400                                 if (!ret)
1401                                         ret = -ERESTARTSYS;
1402                                 break;
1403                         }
1404
1405                         schedule();
1406
1407                         continue; /* start over from 'while(count > 0)...' */
1408                 }
1409
1410                 if (copy_from_user(video->dv_buf.kvirt + video->write_off, buffer, cnt)) {
1411                         if (!ret)
1412                                 ret = -EFAULT;
1413                         break;
1414                 }
1415
1416                 video->write_off = (video->write_off + cnt) % (video->n_frames * video->frame_size);
1417
1418                 count -= cnt;
1419                 buffer += cnt;
1420                 ret += cnt;
1421
1422                 if (video->write_off == video->frame_size * ((target_frame + 1) % video->n_frames))
1423                                 frame_prepare(video, target_frame);
1424         }
1425
1426         remove_wait_queue(&video->waitq, &wait);
1427         set_current_state(TASK_RUNNING);
1428         up(&video->sem);
1429         return ret;
1430 }
1431
1432
1433 static ssize_t dv1394_read(struct file *file,  char *buffer, size_t count, loff_t *ppos)
1434 {
1435         struct video_card *video = file_to_video_card(file);
1436         DECLARE_WAITQUEUE(wait, current);
1437         ssize_t ret;
1438         size_t cnt;
1439         unsigned long flags;
1440         int target_frame;
1441
1442         /* serialize this to prevent multi-threaded mayhem */
1443         if (file->f_flags & O_NONBLOCK) {
1444                 if (down_trylock(&video->sem))
1445                         return -EAGAIN;
1446         } else {
1447                 if (down_interruptible(&video->sem))
1448                         return -ERESTARTSYS;
1449         }
1450
1451         if ( !video_card_initialized(video) ) {
1452                 ret = do_dv1394_init_default(video);
1453                 if (ret) {
1454                         up(&video->sem);
1455                         return ret;
1456                 }
1457                 video->continuity_counter = -1;
1458
1459                 receive_packets(video);
1460
1461                 start_dma_receive(video);
1462         }
1463
1464         ret = 0;
1465         add_wait_queue(&video->waitq, &wait);
1466
1467         while (count > 0) {
1468
1469                 /* must set TASK_INTERRUPTIBLE *before* checking for free
1470                    buffers; otherwise we could miss a wakeup if the interrupt
1471                    fires between the check and the schedule() */
1472
1473                 set_current_state(TASK_INTERRUPTIBLE);
1474
1475                 spin_lock_irqsave(&video->spinlock, flags);
1476
1477                 target_frame = video->first_clear_frame;
1478
1479                 spin_unlock_irqrestore(&video->spinlock, flags);
1480
1481                 if (target_frame >= 0 &&
1482                         video->n_clear_frames > 0 &&
1483                         video->frames[target_frame]->state == FRAME_CLEAR) {
1484
1485                         /* how much room is left in the target frame buffer */
1486                         cnt = video->frame_size - (video->write_off - target_frame * video->frame_size);
1487
1488                 } else {
1489                         /* buffer is already used */
1490                         cnt = 0;
1491                 }
1492
1493                 if (cnt > count)
1494                         cnt = count;
1495
1496                 if (cnt <= 0) {
1497                         /* no room left, gotta wait */
1498                         if (file->f_flags & O_NONBLOCK) {
1499                                 if (!ret)
1500                                         ret = -EAGAIN;
1501                                 break;
1502                         }
1503                         if (signal_pending(current)) {
1504                                 if (!ret)
1505                                         ret = -ERESTARTSYS;
1506                                 break;
1507                         }
1508
1509                         schedule();
1510
1511                         continue; /* start over from 'while(count > 0)...' */
1512                 }
1513
1514                 if (copy_to_user(buffer, video->dv_buf.kvirt + video->write_off, cnt)) {
1515                                 if (!ret)
1516                                         ret = -EFAULT;
1517                                 break;
1518                 }
1519
1520                 video->write_off = (video->write_off + cnt) % (video->n_frames * video->frame_size);
1521
1522                 count -= cnt;
1523                 buffer += cnt;
1524                 ret += cnt;
1525
1526                 if (video->write_off == video->frame_size * ((target_frame + 1) % video->n_frames)) {
1527                         spin_lock_irqsave(&video->spinlock, flags);
1528                         video->n_clear_frames--;
1529                         video->first_clear_frame = (video->first_clear_frame + 1) % video->n_frames;
1530                         spin_unlock_irqrestore(&video->spinlock, flags);
1531                 }
1532         }
1533
1534         remove_wait_queue(&video->waitq, &wait);
1535         set_current_state(TASK_RUNNING);
1536         up(&video->sem);
1537         return ret;
1538 }
1539
1540
1541 /*** DEVICE IOCTL INTERFACE ************************************************/
1542
1543 /* I *think* the VFS serializes ioctl() for us, so we don't have to worry
1544    about situations like having two threads in here at once... */
1545
1546 static int dv1394_ioctl(struct inode *inode, struct file *file,
1547                            unsigned int cmd, unsigned long arg)
1548 {
1549         struct video_card *video = file_to_video_card(file);
1550         unsigned long flags;
1551         int ret = -EINVAL;
1552
1553         DECLARE_WAITQUEUE(wait, current);
1554
1555         /* serialize this to prevent multi-threaded mayhem */
1556         if (file->f_flags & O_NONBLOCK) {
1557                 if (down_trylock(&video->sem))
1558                         return -EAGAIN;
1559         } else {
1560                 if (down_interruptible(&video->sem))
1561                         return -ERESTARTSYS;
1562         }
1563
1564         switch(cmd)
1565         {
1566         case DV1394_IOC_SUBMIT_FRAMES: {
1567                 unsigned int n_submit;
1568
1569                 if ( !video_card_initialized(video) ) {
1570                         ret = do_dv1394_init_default(video);
1571                         if (ret)
1572                                 goto out;
1573                 }
1574
1575                 n_submit = (unsigned int) arg;
1576
1577                 if (n_submit > video->n_frames) {
1578                         ret = -EINVAL;
1579                         goto out;
1580                 }
1581
1582                 while (n_submit > 0) {
1583
1584                         add_wait_queue(&video->waitq, &wait);
1585                         set_current_state(TASK_INTERRUPTIBLE);
1586
1587                         spin_lock_irqsave(&video->spinlock, flags);
1588
1589                         /* wait until video->first_clear_frame is really CLEAR */
1590                         while (video->frames[video->first_clear_frame]->state != FRAME_CLEAR) {
1591
1592                                 spin_unlock_irqrestore(&video->spinlock, flags);
1593
1594                                 if (signal_pending(current)) {
1595                                         remove_wait_queue(&video->waitq, &wait);
1596                                         set_current_state(TASK_RUNNING);
1597                                         ret = -EINTR;
1598                                         goto out;
1599                                 }
1600
1601                                 schedule();
1602                                 set_current_state(TASK_INTERRUPTIBLE);
1603
1604                                 spin_lock_irqsave(&video->spinlock, flags);
1605                         }
1606                         spin_unlock_irqrestore(&video->spinlock, flags);
1607
1608                         remove_wait_queue(&video->waitq, &wait);
1609                         set_current_state(TASK_RUNNING);
1610
1611                         frame_prepare(video, video->first_clear_frame);
1612
1613                         n_submit--;
1614                 }
1615
1616                 ret = 0;
1617                 break;
1618         }
1619
1620         case DV1394_IOC_WAIT_FRAMES: {
1621                 unsigned int n_wait;
1622
1623                 if ( !video_card_initialized(video) ) {
1624                         ret = -EINVAL;
1625                         goto out;
1626                 }
1627
1628                 n_wait = (unsigned int) arg;
1629
1630                 /* since we re-run the last frame on underflow, we will
1631                    never actually have n_frames clear frames; at most only
1632                    n_frames - 1 */
1633
1634                 if (n_wait > (video->n_frames-1) ) {
1635                         ret = -EINVAL;
1636                         goto out;
1637                 }
1638
1639                 add_wait_queue(&video->waitq, &wait);
1640                 set_current_state(TASK_INTERRUPTIBLE);
1641
1642                 spin_lock_irqsave(&video->spinlock, flags);
1643
1644                 while (video->n_clear_frames < n_wait) {
1645
1646                         spin_unlock_irqrestore(&video->spinlock, flags);
1647
1648                         if (signal_pending(current)) {
1649                                 remove_wait_queue(&video->waitq, &wait);
1650                                 set_current_state(TASK_RUNNING);
1651                                 ret = -EINTR;
1652                                 goto out;
1653                         }
1654
1655                         schedule();
1656                         set_current_state(TASK_INTERRUPTIBLE);
1657
1658                         spin_lock_irqsave(&video->spinlock, flags);
1659                 }
1660
1661                 spin_unlock_irqrestore(&video->spinlock, flags);
1662
1663                 remove_wait_queue(&video->waitq, &wait);
1664                 set_current_state(TASK_RUNNING);
1665                 ret = 0;
1666                 break;
1667         }
1668
1669         case DV1394_IOC_RECEIVE_FRAMES: {
1670                 unsigned int n_recv;
1671
1672                 if ( !video_card_initialized(video) ) {
1673                         ret = -EINVAL;
1674                         goto out;
1675                 }
1676
1677                 n_recv = (unsigned int) arg;
1678
1679                 /* at least one frame must be active */
1680                 if (n_recv > (video->n_frames-1) ) {
1681                         ret = -EINVAL;
1682                         goto out;
1683                 }
1684
1685                 spin_lock_irqsave(&video->spinlock, flags);
1686
1687                 /* release the clear frames */
1688                 video->n_clear_frames -= n_recv;
1689
1690                 /* advance the clear frame cursor */
1691                 video->first_clear_frame = (video->first_clear_frame + n_recv) % video->n_frames;
1692
1693                 /* reset dropped_frames */
1694                 video->dropped_frames = 0;
1695
1696                 spin_unlock_irqrestore(&video->spinlock, flags);
1697
1698                 ret = 0;
1699                 break;
1700         }
1701
1702         case DV1394_IOC_START_RECEIVE: {
1703                 if ( !video_card_initialized(video) ) {
1704                         ret = do_dv1394_init_default(video);
1705                         if (ret)
1706                                 goto out;
1707                 }
1708
1709                 video->continuity_counter = -1;
1710
1711                 receive_packets(video);
1712
1713                 start_dma_receive(video);
1714
1715                 ret = 0;
1716                 break;
1717         }
1718
1719         case DV1394_IOC_INIT: {
1720                 struct dv1394_init init;
1721                 if (arg == (unsigned long) NULL) {
1722                         ret = do_dv1394_init_default(video);
1723                 } else {
1724                         if (copy_from_user(&init, (void*)arg, sizeof(init))) {
1725                                 ret = -EFAULT;
1726                                 goto out;
1727                         }
1728                         ret = do_dv1394_init(video, &init);
1729                 }
1730                 break;
1731         }
1732
1733         case DV1394_IOC_SHUTDOWN:
1734                 do_dv1394_shutdown(video, 0);
1735                 ret = 0;
1736                 break;
1737
1738
1739         case DV1394_IOC_GET_STATUS: {
1740                 struct dv1394_status status;
1741
1742                 if ( !video_card_initialized(video) ) {
1743                         ret = -EINVAL;
1744                         goto out;
1745                 }
1746
1747                 status.init.api_version = DV1394_API_VERSION;
1748                 status.init.channel = video->channel;
1749                 status.init.n_frames = video->n_frames;
1750                 status.init.format = video->pal_or_ntsc;
1751                 status.init.cip_n = video->cip_n;
1752                 status.init.cip_d = video->cip_d;
1753                 status.init.syt_offset = video->syt_offset;
1754
1755                 status.first_clear_frame = video->first_clear_frame;
1756
1757                 /* the rest of the fields need to be locked against the interrupt */
1758                 spin_lock_irqsave(&video->spinlock, flags);
1759
1760                 status.active_frame = video->active_frame;
1761                 status.n_clear_frames = video->n_clear_frames;
1762
1763                 status.dropped_frames = video->dropped_frames;
1764
1765                 /* reset dropped_frames */
1766                 video->dropped_frames = 0;
1767
1768                 spin_unlock_irqrestore(&video->spinlock, flags);
1769
1770                 if (copy_to_user((void*)arg, &status, sizeof(status))) {
1771                         ret = -EFAULT;
1772                         goto out;
1773                 }
1774
1775                 ret = 0;
1776                 break;
1777         }
1778
1779         default:
1780                 break;
1781         }
1782
1783  out:
1784         up(&video->sem);
1785         return ret;
1786 }
1787
1788
1789
1790 /*** DEVICE FILE INTERFACE CONTINUED ***************************************/
1791
1792 static int dv1394_open(struct inode *inode, struct file *file)
1793 {
1794         struct video_card *video = NULL;
1795
1796         /* if the device was opened through devfs, then file->private_data
1797            has already been set to video by devfs */
1798         if (file->private_data) {
1799                 video = (struct video_card*) file->private_data;
1800
1801         } else {
1802                 /* look up the card by ID */
1803                 unsigned long flags;
1804
1805                 spin_lock_irqsave(&dv1394_cards_lock, flags);
1806                 if (!list_empty(&dv1394_cards)) {
1807                         struct video_card *p;
1808                         list_for_each_entry(p, &dv1394_cards, list) {
1809                                 if ((p->id) == ieee1394_file_to_instance(file)) {
1810                                         video = p;
1811                                         break;
1812                                 }
1813                         }
1814                 }
1815                 spin_unlock_irqrestore(&dv1394_cards_lock, flags);
1816
1817                 if (!video) {
1818                         debug_printk("dv1394: OHCI card %d not found", ieee1394_file_to_instance(file));
1819                         return -ENODEV;
1820                 }
1821
1822                 file->private_data = (void*) video;
1823         }
1824
1825 #ifndef DV1394_ALLOW_MORE_THAN_ONE_OPEN
1826
1827         if ( test_and_set_bit(0, &video->open) ) {
1828                 /* video is already open by someone else */
1829                 return -EBUSY;
1830         }
1831
1832 #endif
1833
1834         return 0;
1835 }
1836
1837
1838 static int dv1394_release(struct inode *inode, struct file *file)
1839 {
1840         struct video_card *video = file_to_video_card(file);
1841
1842         /* OK to free the DMA buffer, no more mappings can exist */
1843         do_dv1394_shutdown(video, 1);
1844
1845         /* clean up async I/O users */
1846         dv1394_fasync(-1, file, 0);
1847
1848         /* give someone else a turn */
1849         clear_bit(0, &video->open);
1850
1851         return 0;
1852 }
1853
1854
1855 /*** DEVICE DRIVER HANDLERS ************************************************/
1856
1857 static void it_tasklet_func(unsigned long data)
1858 {
1859         int wake = 0;
1860         struct video_card *video = (struct video_card*) data;
1861
1862         spin_lock(&video->spinlock);
1863
1864         if (!video->dma_running)
1865                 goto out;
1866
1867         irq_printk("ContextControl = %08x, CommandPtr = %08x\n",
1868                reg_read(video->ohci, video->ohci_IsoXmitContextControlSet),
1869                reg_read(video->ohci, video->ohci_IsoXmitCommandPtr)
1870                );
1871
1872
1873         if ( (video->ohci_it_ctx != -1) &&
1874             (reg_read(video->ohci, video->ohci_IsoXmitContextControlSet) & (1 << 10)) ) {
1875
1876                 struct frame *f;
1877                 unsigned int frame, i;
1878
1879
1880                 if (video->active_frame == -1)
1881                         frame = 0;
1882                 else
1883                         frame = video->active_frame;
1884
1885                 /* check all the DMA-able frames */
1886                 for (i = 0; i < video->n_frames; i++, frame = (frame+1) % video->n_frames) {
1887
1888                         irq_printk("IRQ checking frame %d...", frame);
1889                         f = video->frames[frame];
1890                         if (f->state != FRAME_READY) {
1891                                 irq_printk("clear, skipping\n");
1892                                 /* we don't own this frame */
1893                                 continue;
1894                         }
1895
1896                         irq_printk("DMA\n");
1897
1898                         /* check the frame begin semaphore to see if we can free the previous frame */
1899                         if ( *(f->frame_begin_timestamp) ) {
1900                                 int prev_frame;
1901                                 struct frame *prev_f;
1902
1903
1904
1905                                 /* don't reset, need this later *(f->frame_begin_timestamp) = 0; */
1906                                 irq_printk("  BEGIN\n");
1907
1908                                 prev_frame = frame - 1;
1909                                 if (prev_frame == -1)
1910                                         prev_frame += video->n_frames;
1911                                 prev_f = video->frames[prev_frame];
1912
1913                                 /* make sure we can actually garbage collect
1914                                    this frame */
1915                                 if ( (prev_f->state == FRAME_READY) &&
1916                                     prev_f->done && (!f->done) )
1917                                 {
1918                                         frame_reset(prev_f);
1919                                         video->n_clear_frames++;
1920                                         wake = 1;
1921                                         video->active_frame = frame;
1922
1923                                         irq_printk("  BEGIN - freeing previous frame %d, new active frame is %d\n", prev_frame, frame);
1924                                 } else {
1925                                         irq_printk("  BEGIN - can't free yet\n");
1926                                 }
1927
1928                                 f->done = 1;
1929                         }
1930
1931
1932                         /* see if we need to set the timestamp for the next frame */
1933                         if ( *(f->mid_frame_timestamp) ) {
1934                                 struct frame *next_frame;
1935                                 u32 begin_ts, ts_cyc, ts_off;
1936
1937                                 *(f->mid_frame_timestamp) = 0;
1938
1939                                 begin_ts = le32_to_cpu(*(f->frame_begin_timestamp));
1940
1941                                 irq_printk("  MIDDLE - first packet was sent at cycle %4u (%2u), assigned timestamp was (%2u) %4u\n",
1942                                            begin_ts & 0x1FFF, begin_ts & 0xF,
1943                                            f->assigned_timestamp >> 12, f->assigned_timestamp & 0xFFF);
1944
1945                                 /* prepare next frame and assign timestamp */
1946                                 next_frame = video->frames[ (frame+1) % video->n_frames ];
1947
1948                                 if (next_frame->state == FRAME_READY) {
1949                                         irq_printk("  MIDDLE - next frame is ready, good\n");
1950                                 } else {
1951                                         debug_printk("dv1394: Underflow! At least one frame has been dropped.\n");
1952                                         next_frame = f;
1953                                 }
1954
1955                                 /* set the timestamp to the timestamp of the last frame sent,
1956                                    plus the length of the last frame sent, plus the syt latency */
1957                                 ts_cyc = begin_ts & 0xF;
1958                                 /* advance one frame, plus syt latency (typically 2-3) */
1959                                 ts_cyc += f->n_packets + video->syt_offset ;
1960
1961                                 ts_off = 0;
1962
1963                                 ts_cyc += ts_off/3072;
1964                                 ts_off %= 3072;
1965
1966                                 next_frame->assigned_timestamp = ((ts_cyc&0xF) << 12) + ts_off;
1967                                 if (next_frame->cip_syt1) {
1968                                         next_frame->cip_syt1->b[6] = next_frame->assigned_timestamp >> 8;
1969                                         next_frame->cip_syt1->b[7] = next_frame->assigned_timestamp & 0xFF;
1970                                 }
1971                                 if (next_frame->cip_syt2) {
1972                                         next_frame->cip_syt2->b[6] = next_frame->assigned_timestamp >> 8;
1973                                         next_frame->cip_syt2->b[7] = next_frame->assigned_timestamp & 0xFF;
1974                                 }
1975
1976                         }
1977
1978                         /* see if the frame looped */
1979                         if ( *(f->frame_end_timestamp) ) {
1980
1981                                 *(f->frame_end_timestamp) = 0;
1982
1983                                 debug_printk("  END - the frame looped at least once\n");
1984
1985                                 video->dropped_frames++;
1986                         }
1987
1988                 } /* for (each frame) */
1989         }
1990
1991         if (wake) {
1992                 kill_fasync(&video->fasync, SIGIO, POLL_OUT);
1993
1994                 /* wake readers/writers/ioctl'ers */
1995                 wake_up_interruptible(&video->waitq);
1996         }
1997
1998 out:
1999         spin_unlock(&video->spinlock);
2000 }
2001
2002 static void ir_tasklet_func(unsigned long data)
2003 {
2004         int wake = 0;
2005         struct video_card *video = (struct video_card*) data;
2006
2007         spin_lock(&video->spinlock);
2008
2009         if (!video->dma_running)
2010                 goto out;
2011
2012         if ( (video->ohci_ir_ctx != -1) &&
2013             (reg_read(video->ohci, video->ohci_IsoRcvContextControlSet) & (1 << 10)) ) {
2014
2015                 int sof=0; /* start-of-frame flag */
2016                 struct frame *f;
2017                 u16 packet_length, packet_time;
2018                 int i, dbc=0;
2019                 struct DMA_descriptor_block *block = NULL;
2020                 u16 xferstatus;
2021
2022                 int next_i, prev_i;
2023                 struct DMA_descriptor_block *next = NULL;
2024                 dma_addr_t next_dma = 0;
2025                 struct DMA_descriptor_block *prev = NULL;
2026
2027                 /* loop over all descriptors in all frames */
2028                 for (i = 0; i < video->n_frames*MAX_PACKETS; i++) {
2029                         struct packet *p = dma_region_i(&video->packet_buf, struct packet, video->current_packet);
2030
2031                         /* make sure we are seeing the latest changes to p */
2032                         dma_region_sync_for_cpu(&video->packet_buf,
2033                                                 (unsigned long) p - (unsigned long) video->packet_buf.kvirt,
2034                                                 sizeof(struct packet));
2035
2036                         packet_length = le16_to_cpu(p->data_length);
2037                         packet_time   = le16_to_cpu(p->timestamp);
2038
2039                         irq_printk("received packet %02d, timestamp=%04x, length=%04x, sof=%02x%02x\n", video->current_packet,
2040                                    packet_time, packet_length,
2041                                    p->data[0], p->data[1]);
2042
2043                         /* get the descriptor based on packet_buffer cursor */
2044                         f = video->frames[video->current_packet / MAX_PACKETS];
2045                         block = &(f->descriptor_pool[video->current_packet % MAX_PACKETS]);
2046                         xferstatus = le32_to_cpu(block->u.in.il.q[3]) >> 16;
2047                         xferstatus &= 0x1F;
2048                         irq_printk("ir_tasklet_func: xferStatus/resCount [%d] = 0x%08x\n", i, le32_to_cpu(block->u.in.il.q[3]) );
2049
2050                         /* get the current frame */
2051                         f = video->frames[video->active_frame];
2052
2053                         /* exclude empty packet */
2054                         if (packet_length > 8 && xferstatus == 0x11) {
2055                                 /* check for start of frame */
2056                                 /* DRD> Changed to check section type ([0]>>5==0)
2057                                    and dif sequence ([1]>>4==0) */
2058                                 sof = ( (p->data[0] >> 5) == 0 && (p->data[1] >> 4) == 0);
2059
2060                                 dbc = (int) (p->cip_h1 >> 24);
2061                                 if ( video->continuity_counter != -1 && dbc > ((video->continuity_counter + 1) % 256) )
2062                                 {
2063                                         printk(KERN_WARNING "dv1394: discontinuity detected, dropping all frames\n" );
2064                                         video->dropped_frames += video->n_clear_frames + 1;
2065                                         video->first_frame = 0;
2066                                         video->n_clear_frames = 0;
2067                                         video->first_clear_frame = -1;
2068                                 }
2069                                 video->continuity_counter = dbc;
2070
2071                                 if (!video->first_frame) {
2072                                         if (sof) {
2073                                                 video->first_frame = 1;
2074                                         }
2075
2076                                 } else if (sof) {
2077                                         /* close current frame */
2078                                         frame_reset(f);  /* f->state = STATE_CLEAR */
2079                                         video->n_clear_frames++;
2080                                         if (video->n_clear_frames > video->n_frames) {
2081                                                 video->dropped_frames++;
2082                                                 printk(KERN_WARNING "dv1394: dropped a frame during reception\n" );
2083                                                 video->n_clear_frames = video->n_frames-1;
2084                                                 video->first_clear_frame = (video->first_clear_frame + 1) % video->n_frames;
2085                                         }
2086                                         if (video->first_clear_frame == -1)
2087                                                 video->first_clear_frame = video->active_frame;
2088
2089                                         /* get the next frame */
2090                                         video->active_frame = (video->active_frame + 1) % video->n_frames;
2091                                         f = video->frames[video->active_frame];
2092                                         irq_printk("   frame received, active_frame = %d, n_clear_frames = %d, first_clear_frame = %d\n",
2093                                                    video->active_frame, video->n_clear_frames, video->first_clear_frame);
2094                                 }
2095                                 if (video->first_frame) {
2096                                         if (sof) {
2097                                                 /* open next frame */
2098                                                 f->state = FRAME_READY;
2099                                         }
2100
2101                                         /* copy to buffer */
2102                                         if (f->n_packets > (video->frame_size / 480)) {
2103                                                 printk(KERN_ERR "frame buffer overflow during receive\n");
2104                                         }
2105
2106                                         frame_put_packet(f, p);
2107
2108                                 } /* first_frame */
2109                         }
2110
2111                         /* stop, end of ready packets */
2112                         else if (xferstatus == 0) {
2113                                 break;
2114                         }
2115
2116                         /* reset xferStatus & resCount */
2117                         block->u.in.il.q[3] = cpu_to_le32(512);
2118
2119                         /* terminate dma chain at this (next) packet */
2120                         next_i = video->current_packet;
2121                         f = video->frames[next_i / MAX_PACKETS];
2122                         next = &(f->descriptor_pool[next_i % MAX_PACKETS]);
2123                         next_dma = ((unsigned long) block - (unsigned long) f->descriptor_pool) + f->descriptor_pool_dma;
2124                         next->u.in.il.q[0] |= 3 << 20; /* enable interrupt */
2125                         next->u.in.il.q[2] = 0; /* disable branch */
2126
2127                         /* link previous to next */
2128                         prev_i = (next_i == 0) ? (MAX_PACKETS * video->n_frames - 1) : (next_i - 1);
2129                         f = video->frames[prev_i / MAX_PACKETS];
2130                         prev = &(f->descriptor_pool[prev_i % MAX_PACKETS]);
2131                         if (prev_i % (MAX_PACKETS/2)) {
2132                                 prev->u.in.il.q[0] &= ~(3 << 20); /* no interrupt */
2133                         } else {
2134                                 prev->u.in.il.q[0] |= 3 << 20; /* enable interrupt */
2135                         }
2136                         prev->u.in.il.q[2] = cpu_to_le32(next_dma | 1); /* set Z=1 */
2137                         wmb();
2138
2139                         /* wake up DMA in case it fell asleep */
2140                         reg_write(video->ohci, video->ohci_IsoRcvContextControlSet, (1 << 12));
2141
2142                         /* advance packet_buffer cursor */
2143                         video->current_packet = (video->current_packet + 1) % (MAX_PACKETS * video->n_frames);
2144
2145                 } /* for all packets */
2146
2147                 wake = 1; /* why the hell not? */
2148
2149         } /* receive interrupt */
2150
2151         if (wake) {
2152                 kill_fasync(&video->fasync, SIGIO, POLL_IN);
2153
2154                 /* wake readers/writers/ioctl'ers */
2155                 wake_up_interruptible(&video->waitq);
2156         }
2157
2158 out:
2159         spin_unlock(&video->spinlock);
2160 }
2161
2162 static struct cdev dv1394_cdev;
2163 static struct file_operations dv1394_fops=
2164 {
2165         .owner =        THIS_MODULE,
2166         .poll =         dv1394_poll,
2167         .ioctl =        dv1394_ioctl,
2168         .mmap =         dv1394_mmap,
2169         .open =         dv1394_open,
2170         .write =        dv1394_write,
2171         .read =         dv1394_read,
2172         .release =      dv1394_release,
2173         .fasync =       dv1394_fasync,
2174 };
2175
2176
2177 /*** HOTPLUG STUFF **********************************************************/
2178 /*
2179  * Export information about protocols/devices supported by this driver.
2180  */
2181 static struct ieee1394_device_id dv1394_id_table[] = {
2182         {
2183                 .match_flags    = IEEE1394_MATCH_SPECIFIER_ID | IEEE1394_MATCH_VERSION,
2184                 .specifier_id   = AVC_UNIT_SPEC_ID_ENTRY & 0xffffff,
2185                 .version        = AVC_SW_VERSION_ENTRY & 0xffffff
2186         },
2187         { }
2188 };
2189
2190 MODULE_DEVICE_TABLE(ieee1394, dv1394_id_table);
2191
2192 static struct hpsb_protocol_driver dv1394_driver = {
2193         .name           = "DV/1394 Driver",
2194         .id_table       = dv1394_id_table,
2195         .driver         = {
2196                 .name   = "dv1394",
2197                 .bus    = &ieee1394_bus_type,
2198         },
2199 };
2200
2201
2202 /*** IEEE1394 HPSB CALLBACKS ***********************************************/
2203
2204 static int dv1394_init(struct ti_ohci *ohci, enum pal_or_ntsc format, enum modes mode)
2205 {
2206         struct video_card *video;
2207         unsigned long flags;
2208         int i;
2209
2210         video = kmalloc(sizeof(struct video_card), GFP_KERNEL);
2211         if (!video) {
2212                 printk(KERN_ERR "dv1394: cannot allocate video_card\n");
2213                 goto err;
2214         }
2215
2216         memset(video, 0, sizeof(struct video_card));
2217
2218         video->ohci = ohci;
2219         /* lower 2 bits of id indicate which of four "plugs"
2220            per host */
2221         video->id = ohci->host->id << 2;
2222         if (format == DV1394_NTSC)
2223                 video->id |= mode;
2224         else
2225                 video->id |= 2 + mode;
2226
2227         video->ohci_it_ctx = -1;
2228         video->ohci_ir_ctx = -1;
2229
2230         video->ohci_IsoXmitContextControlSet = 0;
2231         video->ohci_IsoXmitContextControlClear = 0;
2232         video->ohci_IsoXmitCommandPtr = 0;
2233
2234         video->ohci_IsoRcvContextControlSet = 0;
2235         video->ohci_IsoRcvContextControlClear = 0;
2236         video->ohci_IsoRcvCommandPtr = 0;
2237         video->ohci_IsoRcvContextMatch = 0;
2238
2239         video->n_frames = 0; /* flag that video is not initialized */
2240         video->channel = 63; /* default to broadcast channel */
2241         video->active_frame = -1;
2242
2243         /* initialize the following */
2244         video->pal_or_ntsc = format;
2245         video->cip_n = 0; /* 0 = use builtin default */
2246         video->cip_d = 0;
2247         video->syt_offset = 0;
2248         video->mode = mode;
2249
2250         for (i = 0; i < DV1394_MAX_FRAMES; i++)
2251                 video->frames[i] = NULL;
2252
2253         dma_region_init(&video->dv_buf);
2254         video->dv_buf_size = 0;
2255         dma_region_init(&video->packet_buf);
2256         video->packet_buf_size = 0;
2257
2258         clear_bit(0, &video->open);
2259         spin_lock_init(&video->spinlock);
2260         video->dma_running = 0;
2261         init_MUTEX(&video->sem);
2262         init_waitqueue_head(&video->waitq);
2263         video->fasync = NULL;
2264
2265         spin_lock_irqsave(&dv1394_cards_lock, flags);
2266         INIT_LIST_HEAD(&video->list);
2267         list_add_tail(&video->list, &dv1394_cards);
2268         spin_unlock_irqrestore(&dv1394_cards_lock, flags);
2269
2270         if (devfs_mk_cdev(MKDEV(IEEE1394_MAJOR,
2271                                 IEEE1394_MINOR_BLOCK_DV1394*16 + video->id),
2272                         S_IFCHR|S_IRUGO|S_IWUGO,
2273                          "ieee1394/dv/host%d/%s/%s",
2274                          (video->id>>2),
2275                          (video->pal_or_ntsc == DV1394_NTSC ? "NTSC" : "PAL"),
2276                          (video->mode == MODE_RECEIVE ? "in" : "out")) < 0)
2277                         goto err_free;
2278
2279         debug_printk("dv1394: dv1394_init() OK on ID %d\n", video->id);
2280
2281         return 0;
2282
2283  err_free:
2284         kfree(video);
2285  err:
2286         return -1;
2287 }
2288
2289 static void dv1394_un_init(struct video_card *video)
2290 {
2291         char buf[32];
2292
2293         /* obviously nobody has the driver open at this point */
2294         do_dv1394_shutdown(video, 1);
2295         snprintf(buf, sizeof(buf), "dv/host%d/%s/%s", (video->id >> 2),
2296                 (video->pal_or_ntsc == DV1394_NTSC ? "NTSC" : "PAL"),
2297                 (video->mode == MODE_RECEIVE ? "in" : "out")
2298                 );
2299
2300         devfs_remove("ieee1394/%s", buf);
2301         kfree(video);
2302 }
2303
2304
2305 static void dv1394_remove_host (struct hpsb_host *host)
2306 {
2307         struct video_card *video;
2308         unsigned long flags;
2309         int id = host->id;
2310
2311         /* We only work with the OHCI-1394 driver */
2312         if (strcmp(host->driver->name, OHCI1394_DRIVER_NAME))
2313                 return;
2314
2315         /* find the corresponding video_cards */
2316         do {
2317                 struct video_card *tmp_vid;
2318
2319                 video = NULL;
2320
2321                 spin_lock_irqsave(&dv1394_cards_lock, flags);
2322                 list_for_each_entry(tmp_vid, &dv1394_cards, list) {
2323                         if ((tmp_vid->id >> 2) == id) {
2324                                 list_del(&tmp_vid->list);
2325                                 video = tmp_vid;
2326                                 break;
2327                         }
2328                 }
2329                 spin_unlock_irqrestore(&dv1394_cards_lock, flags);
2330
2331                 if (video)
2332                         dv1394_un_init(video);
2333         } while (video != NULL);
2334
2335         devfs_remove("ieee1394/dv/host%d/NTSC", id);
2336         devfs_remove("ieee1394/dv/host%d/PAL", id);
2337         devfs_remove("ieee1394/dv/host%d", id);
2338 }
2339
2340 static void dv1394_add_host (struct hpsb_host *host)
2341 {
2342         struct ti_ohci *ohci;
2343         int id = host->id;
2344
2345         /* We only work with the OHCI-1394 driver */
2346         if (strcmp(host->driver->name, OHCI1394_DRIVER_NAME))
2347                 return;
2348
2349         ohci = (struct ti_ohci *)host->hostdata;
2350
2351         devfs_mk_dir("ieee1394/dv/host%d", id);
2352         devfs_mk_dir("ieee1394/dv/host%d/NTSC", id);
2353         devfs_mk_dir("ieee1394/dv/host%d/PAL", id);
2354
2355         dv1394_init(ohci, DV1394_NTSC, MODE_RECEIVE);
2356         dv1394_init(ohci, DV1394_NTSC, MODE_TRANSMIT);
2357         dv1394_init(ohci, DV1394_PAL, MODE_RECEIVE);
2358         dv1394_init(ohci, DV1394_PAL, MODE_TRANSMIT);
2359 }
2360
2361
2362 /* Bus reset handler. In the event of a bus reset, we may need to
2363    re-start the DMA contexts - otherwise the user program would
2364    end up waiting forever.
2365 */
2366
2367 static void dv1394_host_reset(struct hpsb_host *host)
2368 {
2369         struct ti_ohci *ohci;
2370         struct video_card *video = NULL, *tmp_vid;
2371         unsigned long flags;
2372
2373         /* We only work with the OHCI-1394 driver */
2374         if (strcmp(host->driver->name, OHCI1394_DRIVER_NAME))
2375                 return;
2376
2377         ohci = (struct ti_ohci *)host->hostdata;
2378
2379
2380         /* find the corresponding video_cards */
2381         spin_lock_irqsave(&dv1394_cards_lock, flags);
2382         list_for_each_entry(tmp_vid, &dv1394_cards, list) {
2383                 if ((tmp_vid->id >> 2) == host->id) {
2384                         video = tmp_vid;
2385                         break;
2386                 }
2387         }
2388         spin_unlock_irqrestore(&dv1394_cards_lock, flags);
2389
2390         if (!video)
2391                 return;
2392
2393
2394         spin_lock_irqsave(&video->spinlock, flags);
2395
2396         if (!video->dma_running)
2397                 goto out;
2398
2399         /* check IT context */
2400         if (video->ohci_it_ctx != -1) {
2401                 u32 ctx;
2402
2403                 ctx = reg_read(video->ohci, video->ohci_IsoXmitContextControlSet);
2404
2405                 /* if (RUN but not ACTIVE) */
2406                 if ( (ctx & (1<<15)) &&
2407                     !(ctx & (1<<10)) ) {
2408
2409                         debug_printk("dv1394: IT context stopped due to bus reset; waking it up\n");
2410
2411                         /* to be safe, assume a frame has been dropped. User-space programs
2412                            should handle this condition like an underflow. */
2413                         video->dropped_frames++;
2414
2415                         /* for some reason you must clear, then re-set the RUN bit to restart DMA */
2416
2417                         /* clear RUN */
2418                         reg_write(video->ohci, video->ohci_IsoXmitContextControlClear, (1 << 15));
2419                         flush_pci_write(video->ohci);
2420
2421                         /* set RUN */
2422                         reg_write(video->ohci, video->ohci_IsoXmitContextControlSet, (1 << 15));
2423                         flush_pci_write(video->ohci);
2424
2425                         /* set the WAKE bit (just in case; this isn't strictly necessary) */
2426                         reg_write(video->ohci, video->ohci_IsoXmitContextControlSet, (1 << 12));
2427                         flush_pci_write(video->ohci);
2428
2429                         irq_printk("dv1394: AFTER IT restart ctx 0x%08x ptr 0x%08x\n",
2430                                    reg_read(video->ohci, video->ohci_IsoXmitContextControlSet),
2431                                    reg_read(video->ohci, video->ohci_IsoXmitCommandPtr));
2432                 }
2433         }
2434
2435         /* check IR context */
2436         if (video->ohci_ir_ctx != -1) {
2437                 u32 ctx;
2438
2439                 ctx = reg_read(video->ohci, video->ohci_IsoRcvContextControlSet);
2440
2441                 /* if (RUN but not ACTIVE) */
2442                 if ( (ctx & (1<<15)) &&
2443                     !(ctx & (1<<10)) ) {
2444
2445                         debug_printk("dv1394: IR context stopped due to bus reset; waking it up\n");
2446
2447                         /* to be safe, assume a frame has been dropped. User-space programs
2448                            should handle this condition like an overflow. */
2449                         video->dropped_frames++;
2450
2451                         /* for some reason you must clear, then re-set the RUN bit to restart DMA */
2452                         /* XXX this doesn't work for me, I can't get IR DMA to restart :[ */
2453
2454                         /* clear RUN */
2455                         reg_write(video->ohci, video->ohci_IsoRcvContextControlClear, (1 << 15));
2456                         flush_pci_write(video->ohci);
2457
2458                         /* set RUN */
2459                         reg_write(video->ohci, video->ohci_IsoRcvContextControlSet, (1 << 15));
2460                         flush_pci_write(video->ohci);
2461
2462                         /* set the WAKE bit (just in case; this isn't strictly necessary) */
2463                         reg_write(video->ohci, video->ohci_IsoRcvContextControlSet, (1 << 12));
2464                         flush_pci_write(video->ohci);
2465
2466                         irq_printk("dv1394: AFTER IR restart ctx 0x%08x ptr 0x%08x\n",
2467                                    reg_read(video->ohci, video->ohci_IsoRcvContextControlSet),
2468                                    reg_read(video->ohci, video->ohci_IsoRcvCommandPtr));
2469                 }
2470         }
2471
2472 out:
2473         spin_unlock_irqrestore(&video->spinlock, flags);
2474
2475         /* wake readers/writers/ioctl'ers */
2476         wake_up_interruptible(&video->waitq);
2477 }
2478
2479 static struct hpsb_highlevel dv1394_highlevel = {
2480         .name =         "dv1394",
2481         .add_host =     dv1394_add_host,
2482         .remove_host =  dv1394_remove_host,
2483         .host_reset =   dv1394_host_reset,
2484 };
2485
2486 #ifdef CONFIG_COMPAT
2487
2488 #define DV1394_IOC32_INIT       _IOW('#', 0x06, struct dv1394_init32)
2489 #define DV1394_IOC32_GET_STATUS _IOR('#', 0x0c, struct dv1394_status32)
2490
2491 struct dv1394_init32 {
2492         u32 api_version;
2493         u32 channel;
2494         u32 n_frames;
2495         u32 format;
2496         u32 cip_n;
2497         u32 cip_d;
2498         u32 syt_offset;
2499 };
2500
2501 struct dv1394_status32 {
2502         struct dv1394_init32 init;
2503         s32 active_frame;
2504         u32 first_clear_frame;
2505         u32 n_clear_frames;
2506         u32 dropped_frames;
2507 };
2508
2509 static int handle_dv1394_init(unsigned int fd, unsigned int cmd, unsigned long arg,
2510                               struct file *file)
2511 {
2512         struct dv1394_init32 dv32;
2513         struct dv1394_init dv;
2514         mm_segment_t old_fs;
2515         int ret;
2516
2517         if (file->f_op->ioctl != dv1394_ioctl)
2518                 return -EFAULT;
2519
2520         if (copy_from_user(&dv32, (void *)arg, sizeof(dv32)))
2521                 return -EFAULT;
2522
2523         dv.api_version = dv32.api_version;
2524         dv.channel = dv32.channel;
2525         dv.n_frames = dv32.n_frames;
2526         dv.format = dv32.format;
2527         dv.cip_n = (unsigned long)dv32.cip_n;
2528         dv.cip_d = (unsigned long)dv32.cip_d;
2529         dv.syt_offset = dv32.syt_offset;
2530
2531         old_fs = get_fs();
2532         set_fs(KERNEL_DS);
2533         ret = dv1394_ioctl(file->f_dentry->d_inode, file,
2534                            DV1394_IOC_INIT, (unsigned long)&dv);
2535         set_fs(old_fs);
2536
2537         return ret;
2538 }
2539
2540 static int handle_dv1394_get_status(unsigned int fd, unsigned int cmd, unsigned long arg,
2541                                     struct file *file)
2542 {
2543         struct dv1394_status32 dv32;
2544         struct dv1394_status dv;
2545         mm_segment_t old_fs;
2546         int ret;
2547
2548         if (file->f_op->ioctl != dv1394_ioctl)
2549                 return -EFAULT;
2550
2551         old_fs = get_fs();
2552         set_fs(KERNEL_DS);
2553         ret = dv1394_ioctl(file->f_dentry->d_inode, file,
2554                            DV1394_IOC_GET_STATUS, (unsigned long)&dv);
2555         set_fs(old_fs);
2556
2557         if (!ret) {
2558                 dv32.init.api_version = dv.init.api_version;
2559                 dv32.init.channel = dv.init.channel;
2560                 dv32.init.n_frames = dv.init.n_frames;
2561                 dv32.init.format = dv.init.format;
2562                 dv32.init.cip_n = (u32)dv.init.cip_n;
2563                 dv32.init.cip_d = (u32)dv.init.cip_d;
2564                 dv32.init.syt_offset = dv.init.syt_offset;
2565                 dv32.active_frame = dv.active_frame;
2566                 dv32.first_clear_frame = dv.first_clear_frame;
2567                 dv32.n_clear_frames = dv.n_clear_frames;
2568                 dv32.dropped_frames = dv.dropped_frames;
2569
2570                 if (copy_to_user((struct dv1394_status32 *)arg, &dv32, sizeof(dv32)))
2571                         ret = -EFAULT;
2572         }
2573
2574         return ret;
2575 }
2576 #endif /* CONFIG_COMPAT */
2577
2578
2579 /*** KERNEL MODULE HANDLERS ************************************************/
2580
2581 MODULE_AUTHOR("Dan Maas <dmaas@dcine.com>, Dan Dennedy <dan@dennedy.org>");
2582 MODULE_DESCRIPTION("driver for DV input/output on OHCI board");
2583 MODULE_SUPPORTED_DEVICE("dv1394");
2584 MODULE_LICENSE("GPL");
2585
2586 static void __exit dv1394_exit_module(void)
2587 {
2588 #ifdef CONFIG_COMPAT
2589         int ret;
2590
2591         ret = unregister_ioctl32_conversion(DV1394_IOC_SHUTDOWN);
2592         ret |= unregister_ioctl32_conversion(DV1394_IOC_SUBMIT_FRAMES);
2593         ret |= unregister_ioctl32_conversion(DV1394_IOC_WAIT_FRAMES);
2594         ret |= unregister_ioctl32_conversion(DV1394_IOC_RECEIVE_FRAMES);
2595         ret |= unregister_ioctl32_conversion(DV1394_IOC_START_RECEIVE);
2596         ret |= unregister_ioctl32_conversion(DV1394_IOC32_INIT);
2597         ret |= unregister_ioctl32_conversion(DV1394_IOC32_GET_STATUS);
2598         if (ret)
2599                 printk(KERN_ERR "dv1394: Error unregistering ioctl32 translations\n");
2600 #endif
2601
2602         hpsb_unregister_protocol(&dv1394_driver);
2603
2604         hpsb_unregister_highlevel(&dv1394_highlevel);
2605         cdev_del(&dv1394_cdev);
2606         devfs_remove("ieee1394/dv");
2607 }
2608
2609 static int __init dv1394_init_module(void)
2610 {
2611         int ret;
2612
2613         cdev_init(&dv1394_cdev, &dv1394_fops);
2614         dv1394_cdev.owner = THIS_MODULE;
2615         kobject_set_name(&dv1394_cdev.kobj, "dv1394");
2616         ret = cdev_add(&dv1394_cdev, IEEE1394_DV1394_DEV, 16);
2617         if (ret) {
2618                 printk(KERN_ERR "dv1394: unable to register character device\n");
2619                 return ret;
2620         }
2621
2622         devfs_mk_dir("ieee1394/dv");
2623
2624         hpsb_register_highlevel(&dv1394_highlevel);
2625
2626         ret = hpsb_register_protocol(&dv1394_driver);
2627         if (ret) {
2628                 printk(KERN_ERR "dv1394: failed to register protocol\n");
2629                 hpsb_unregister_highlevel(&dv1394_highlevel);
2630                 devfs_remove("ieee1394/dv");
2631                 cdev_del(&dv1394_cdev);
2632                 return ret;
2633         }
2634
2635 #ifdef CONFIG_COMPAT
2636         {
2637                 /* First compatible ones */
2638                 ret = register_ioctl32_conversion(DV1394_IOC_SHUTDOWN, NULL);
2639                 ret |= register_ioctl32_conversion(DV1394_IOC_SUBMIT_FRAMES, NULL);
2640                 ret |= register_ioctl32_conversion(DV1394_IOC_WAIT_FRAMES, NULL);
2641                 ret |= register_ioctl32_conversion(DV1394_IOC_RECEIVE_FRAMES, NULL);
2642                 ret |= register_ioctl32_conversion(DV1394_IOC_START_RECEIVE, NULL);
2643
2644                 /* These need to be handled by translation */
2645                 ret |= register_ioctl32_conversion(DV1394_IOC32_INIT, handle_dv1394_init);
2646                 ret |= register_ioctl32_conversion(DV1394_IOC32_GET_STATUS, handle_dv1394_get_status);
2647                 if (ret)
2648                         printk(KERN_ERR "dv1394: Error registering ioctl32 translations\n");
2649         }
2650 #endif
2651
2652         return 0;
2653 }
2654
2655 module_init(dv1394_init_module);
2656 module_exit(dv1394_exit_module);
2657 MODULE_ALIAS_CHARDEV(IEEE1394_MAJOR, IEEE1394_MINOR_BLOCK_DV1394 * 16);