drivers/ieee1394/pcilynx.c

   1 /*
   2  * ti_pcilynx.c - Texas Instruments PCILynx driver
   3  * Copyright (C) 1999,2000 Andreas Bombe <andreas.bombe@munich.netsurf.de>,
   4  *                         Stephan Linz <linz@mazet.de>
   5  *                         Manfred Weihs <weihs@ict.tuwien.ac.at>
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License as published by
   9  * the Free Software Foundation; either version 2 of the License, or
  10  * (at your option) any later version.
  11  *
  12  * This program is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  * GNU General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU General Public License
  18  * along with this program; if not, write to the Free Software Foundation,
  19  * Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  20  */
  21
  22 /*
  23  * Contributions:
  24  *
  25  * Manfred Weihs <weihs@ict.tuwien.ac.at>
  26  *        reading bus info block (containing GUID) from serial
  27  *            eeprom via i2c and storing it in config ROM
  28  *        Reworked code for initiating bus resets
  29  *            (long, short, with or without hold-off)
  30  *        Enhancements in async and iso send code
  31  */
  32
  33 #include <linux/config.h>
  34 #include <linux/kernel.h>
  35 #include <linux/slab.h>
  36 #include <linux/interrupt.h>
  37 #include <linux/wait.h>
  38 #include <linux/errno.h>
  39 #include <linux/module.h>
  40 #include <linux/moduleparam.h>
  41 #include <linux/init.h>
  42 #include <linux/pci.h>
  43 #include <linux/fs.h>
  44 #include <linux/poll.h>
  45 #include <linux/irq.h>
  46 #include <linux/kdev_t.h>
  47 #include <asm/byteorder.h>
  48 #include <asm/atomic.h>
  49 #include <asm/io.h>
  50 #include <asm/uaccess.h>
  51
  52 #include "csr1212.h"
  53 #include "ieee1394.h"
  54 #include "ieee1394_types.h"
  55 #include "hosts.h"
  56 #include "ieee1394_core.h"
  57 #include "highlevel.h"
  58 #include "pcilynx.h"
  59
  60 #include <linux/i2c.h>
  61 #include <linux/i2c-algo-bit.h>
  62
  63 /* print general (card independent) information */
  64 #define PRINT_G(level, fmt, args...) printk(level "pcilynx: " fmt "\n" , ## args)
  65 /* print card specific information */
  66 #define PRINT(level, card, fmt, args...) printk(level "pcilynx%d: " fmt "\n" , card , ## args)
  67
  68 #ifdef CONFIG_IEEE1394_VERBOSEDEBUG
  69 #define PRINT_GD(level, fmt, args...) printk(level "pcilynx: " fmt "\n" , ## args)
  70 #define PRINTD(level, card, fmt, args...) printk(level "pcilynx%d: " fmt "\n" , card , ## args)
  71 #else
  72 #define PRINT_GD(level, fmt, args...) do {} while (0)
  73 #define PRINTD(level, card, fmt, args...) do {} while (0)
  74 #endif
  75
  76
  77 /* Module Parameters */
  78 static int skip_eeprom = 0;
  79 module_param(skip_eeprom, int, 0444);
  80 MODULE_PARM_DESC(skip_eeprom, "Use generic bus info block instead of serial eeprom (default = 0).");
  81
  82
  83 static struct hpsb_host_driver lynx_driver;
  84 static unsigned int card_id;
  85
  86
  87
  88 /*
  89  * I2C stuff
  90  */
  91
  92 /* the i2c stuff was inspired by i2c-philips-par.c */
  93
  94 static void bit_setscl(void *data, int state)
  95 {
  96         if (state) {
  97                   ((struct ti_lynx *) data)->i2c_driven_state |= 0x00000040;
  98         } else {
  99                   ((struct ti_lynx *) data)->i2c_driven_state &= ~0x00000040;
 100         }
 101         reg_write((struct ti_lynx *) data, SERIAL_EEPROM_CONTROL, ((struct ti_lynx *) data)->i2c_driven_state);
 102 }
 103
 104 static void bit_setsda(void *data, int state)
 105 {
 106         if (state) {
 107                   ((struct ti_lynx *) data)->i2c_driven_state |= 0x00000010;
 108         } else {
 109                   ((struct ti_lynx *) data)->i2c_driven_state &= ~0x00000010;
 110         }
 111         reg_write((struct ti_lynx *) data, SERIAL_EEPROM_CONTROL, ((struct ti_lynx *) data)->i2c_driven_state);
 112 }
 113
 114 static int bit_getscl(void *data)
 115 {
 116         return reg_read((struct ti_lynx *) data, SERIAL_EEPROM_CONTROL) & 0x00000040;
 117 }
 118
 119 static int bit_getsda(void *data)
 120 {
 121         return reg_read((struct ti_lynx *) data, SERIAL_EEPROM_CONTROL) & 0x00000010;
 122 }
 123
 124 static int bit_reg(struct i2c_client *client)
 125 {
 126         return 0;
 127 }
 128
 129 static int bit_unreg(struct i2c_client *client)
 130 {
 131         return 0;
 132 }
 133
 134 static struct i2c_algo_bit_data bit_data = {
 135         .setsda                 = bit_setsda,
 136         .setscl                 = bit_setscl,
 137         .getsda                 = bit_getsda,
 138         .getscl                 = bit_getscl,
 139         .udelay                 = 5,
 140         .mdelay                 = 5,
 141         .timeout                = 100,
 142 };
 143
 144 static struct i2c_adapter bit_ops = {
 145         .id                     = 0xAA, //FIXME: probably we should get an id in i2c-id.h
 146         .client_register        = bit_reg,
 147         .client_unregister      = bit_unreg,
 148         .name                   = "PCILynx I2C",
 149 };
 150
 151
 152
 153 /*
 154  * PCL handling functions.
 155  */
 156
 157 static pcl_t alloc_pcl(struct ti_lynx *lynx)
 158 {
 159         u8 m;
 160         int i, j;
 161
 162         spin_lock(&lynx->lock);
 163         /* FIXME - use ffz() to make this readable */
 164         for (i = 0; i < (LOCALRAM_SIZE / 1024); i++) {
 165                 m = lynx->pcl_bmap[i];
 166                 for (j = 0; j < 8; j++) {
 167                         if (m & 1<<j) {
 168                                 continue;
 169                         }
 170                         m |= 1<<j;
 171                         lynx->pcl_bmap[i] = m;
 172                         spin_unlock(&lynx->lock);
 173                         return 8 * i + j;
 174                 }
 175         }
 176         spin_unlock(&lynx->lock);
 177
 178         return -1;
 179 }
 180
 181
 182 #if 0
 183 static void free_pcl(struct ti_lynx *lynx, pcl_t pclid)
 184 {
 185         int off, bit;
 186
 187         off = pclid / 8;
 188         bit = pclid % 8;
 189
 190         if (pclid < 0) {
 191                 return;
 192         }
 193
 194         spin_lock(&lynx->lock);
 195         if (lynx->pcl_bmap[off] & 1<<bit) {
 196                 lynx->pcl_bmap[off] &= ~(1<<bit);
 197         } else {
 198                 PRINT(KERN_ERR, lynx->id,
 199                       "attempted to free unallocated PCL %d", pclid);
 200         }
 201         spin_unlock(&lynx->lock);
 202 }
 203
 204 /* functions useful for debugging */
 205 static void pretty_print_pcl(const struct ti_pcl *pcl)
 206 {
 207         int i;
 208
 209         printk("PCL next %08x, userdata %08x, status %08x, remtrans %08x, nextbuf %08x\n",
 210                pcl->next, pcl->user_data, pcl->pcl_status,
 211                pcl->remaining_transfer_count, pcl->next_data_buffer);
 212
 213         printk("PCL");
 214         for (i=0; i<13; i++) {
 215                 printk(" c%x:%08x d%x:%08x",
 216                        i, pcl->buffer[i].control, i, pcl->buffer[i].pointer);
 217                 if (!(i & 0x3) && (i != 12)) printk("\nPCL");
 218         }
 219         printk("\n");
 220 }
 221
 222 static void print_pcl(const struct ti_lynx *lynx, pcl_t pclid)
 223 {
 224         struct ti_pcl pcl;
 225
 226         get_pcl(lynx, pclid, &pcl);
 227         pretty_print_pcl(&pcl);
 228 }
 229 #endif
 230
 231
 232
 233 /***********************************
 234  * IEEE-1394 functionality section *
 235  ***********************************/
 236
 237
 238 static int get_phy_reg(struct ti_lynx *lynx, int addr)
 239 {
 240         int retval;
 241         int i = 0;
 242
 243         unsigned long flags;
 244
 245         if (addr > 15) {
 246                 PRINT(KERN_ERR, lynx->id,
 247                       "%s: PHY register address %d out of range",
 248                       __FUNCTION__, addr);
 249                 return -1;
 250         }
 251
 252         spin_lock_irqsave(&lynx->phy_reg_lock, flags);
 253
 254         reg_write(lynx, LINK_PHY, LINK_PHY_READ | LINK_PHY_ADDR(addr));
 255         do {
 256                 retval = reg_read(lynx, LINK_PHY);
 257
 258                 if (i > 10000) {
 259                         PRINT(KERN_ERR, lynx->id, "%s: runaway loop, aborting",
 260                               __FUNCTION__);
 261                         retval = -1;
 262                         break;
 263                 }
 264                 i++;
 265         } while ((retval & 0xf00) != LINK_PHY_RADDR(addr));
 266
 267         reg_write(lynx, LINK_INT_STATUS, LINK_INT_PHY_REG_RCVD);
 268         spin_unlock_irqrestore(&lynx->phy_reg_lock, flags);
 269
 270         if (retval != -1) {
 271                 return retval & 0xff;
 272         } else {
 273                 return -1;
 274         }
 275 }
 276
 277 static int set_phy_reg(struct ti_lynx *lynx, int addr, int val)
 278 {
 279         unsigned long flags;
 280
 281         if (addr > 15) {
 282                 PRINT(KERN_ERR, lynx->id,
 283                       "%s: PHY register address %d out of range", __FUNCTION__, addr);
 284                 return -1;
 285         }
 286
 287         if (val > 0xff) {
 288                 PRINT(KERN_ERR, lynx->id,
 289                       "%s: PHY register value %d out of range", __FUNCTION__, val);
 290                 return -1;
 291         }
 292
 293         spin_lock_irqsave(&lynx->phy_reg_lock, flags);
 294
 295         reg_write(lynx, LINK_PHY, LINK_PHY_WRITE | LINK_PHY_ADDR(addr)
 296                   | LINK_PHY_WDATA(val));
 297
 298         spin_unlock_irqrestore(&lynx->phy_reg_lock, flags);
 299
 300         return 0;
 301 }
 302
 303 static int sel_phy_reg_page(struct ti_lynx *lynx, int page)
 304 {
 305         int reg;
 306
 307         if (page > 7) {
 308                 PRINT(KERN_ERR, lynx->id,
 309                       "%s: PHY page %d out of range", __FUNCTION__, page);
 310                 return -1;
 311         }
 312
 313         reg = get_phy_reg(lynx, 7);
 314         if (reg != -1) {
 315                 reg &= 0x1f;
 316                 reg |= (page << 5);
 317                 set_phy_reg(lynx, 7, reg);
 318                 return 0;
 319         } else {
 320                 return -1;
 321         }
 322 }
 323
 324 #if 0 /* not needed at this time */
 325 static int sel_phy_reg_port(struct ti_lynx *lynx, int port)
 326 {
 327         int reg;
 328
 329         if (port > 15) {
 330                 PRINT(KERN_ERR, lynx->id,
 331                       "%s: PHY port %d out of range", __FUNCTION__, port);
 332                 return -1;
 333         }
 334
 335         reg = get_phy_reg(lynx, 7);
 336         if (reg != -1) {
 337                 reg &= 0xf0;
 338                 reg |= port;
 339                 set_phy_reg(lynx, 7, reg);
 340                 return 0;
 341         } else {
 342                 return -1;
 343         }
 344 }
 345 #endif
 346
 347 static u32 get_phy_vendorid(struct ti_lynx *lynx)
 348 {
 349         u32 pvid = 0;
 350         sel_phy_reg_page(lynx, 1);
 351         pvid |= (get_phy_reg(lynx, 10) << 16);
 352         pvid |= (get_phy_reg(lynx, 11) << 8);
 353         pvid |= get_phy_reg(lynx, 12);
 354         PRINT(KERN_INFO, lynx->id, "PHY vendor id 0x%06x", pvid);
 355         return pvid;
 356 }
 357
 358 static u32 get_phy_productid(struct ti_lynx *lynx)
 359 {
 360         u32 id = 0;
 361         sel_phy_reg_page(lynx, 1);
 362         id |= (get_phy_reg(lynx, 13) << 16);
 363         id |= (get_phy_reg(lynx, 14) << 8);
 364         id |= get_phy_reg(lynx, 15);
 365         PRINT(KERN_INFO, lynx->id, "PHY product id 0x%06x", id);
 366         return id;
 367 }
 368
 369 static quadlet_t generate_own_selfid(struct ti_lynx *lynx,
 370                                      struct hpsb_host *host)
 371 {
 372         quadlet_t lsid;
 373         char phyreg[7];
 374         int i;
 375
 376         phyreg[0] = lynx->phy_reg0;
 377         for (i = 1; i < 7; i++) {
 378                 phyreg[i] = get_phy_reg(lynx, i);
 379         }
 380
 381         /* FIXME? We assume a TSB21LV03A phy here.  This code doesn't support
 382            more than 3 ports on the PHY anyway. */
 383
 384         lsid = 0x80400000 | ((phyreg[0] & 0xfc) << 22);
 385         lsid |= (phyreg[1] & 0x3f) << 16; /* gap count */
 386         lsid |= (phyreg[2] & 0xc0) << 8; /* max speed */
 387         lsid |= (phyreg[6] & 0x01) << 11; /* contender (phy dependent) */
 388         /* lsid |= 1 << 11; *//* set contender (hack) */
 389         lsid |= (phyreg[6] & 0x10) >> 3; /* initiated reset */
 390
 391         for (i = 0; i < (phyreg[2] & 0xf); i++) { /* ports */
 392                 if (phyreg[3 + i] & 0x4) {
 393                         lsid |= (((phyreg[3 + i] & 0x8) | 0x10) >> 3)
 394                                 << (6 - i*2);
 395                 } else {
 396                         lsid |= 1 << (6 - i*2);
 397                 }
 398         }
 399
 400         cpu_to_be32s(&lsid);
 401         PRINT(KERN_DEBUG, lynx->id, "generated own selfid 0x%x", lsid);
 402         return lsid;
 403 }
 404
 405 static void handle_selfid(struct ti_lynx *lynx, struct hpsb_host *host)
 406 {
 407         quadlet_t *q = lynx->rcv_page;
 408         int phyid, isroot, size;
 409         quadlet_t lsid = 0;
 410         int i;
 411
 412         if (lynx->phy_reg0 == -1 || lynx->selfid_size == -1) return;
 413
 414         size = lynx->selfid_size;
 415         phyid = lynx->phy_reg0;
 416
 417         i = (size > 16 ? 16 : size) / 4 - 1;
 418         while (i >= 0) {
 419                 cpu_to_be32s(&q[i]);
 420                 i--;
 421         }
 422
 423         if (!lynx->phyic.reg_1394a) {
 424                 lsid = generate_own_selfid(lynx, host);
 425         }
 426
 427         isroot = (phyid & 2) != 0;
 428         phyid >>= 2;
 429         PRINT(KERN_INFO, lynx->id, "SelfID process finished (phyid %d, %s)",
 430               phyid, (isroot ? "root" : "not root"));
 431         reg_write(lynx, LINK_ID, (0xffc0 | phyid) << 16);
 432
 433         if (!lynx->phyic.reg_1394a && !size) {
 434                 hpsb_selfid_received(host, lsid);
 435         }
 436
 437         while (size > 0) {
 438                 struct selfid *sid = (struct selfid *)q;
 439
 440                 if (!lynx->phyic.reg_1394a && !sid->extended
 441                     && (sid->phy_id == (phyid + 1))) {
 442                         hpsb_selfid_received(host, lsid);
 443                 }
 444
 445                 if (q[0] == ~q[1]) {
 446                         PRINT(KERN_DEBUG, lynx->id, "SelfID packet 0x%x rcvd",
 447                               q[0]);
 448                         hpsb_selfid_received(host, q[0]);
 449                 } else {
 450                         PRINT(KERN_INFO, lynx->id,
 451                               "inconsistent selfid 0x%x/0x%x", q[0], q[1]);
 452                 }
 453                 q += 2;
 454                 size -= 8;
 455         }
 456
 457         if (!lynx->phyic.reg_1394a && isroot && phyid != 0) {
 458                 hpsb_selfid_received(host, lsid);
 459         }
 460
 461         hpsb_selfid_complete(host, phyid, isroot);
 462
 463         if (host->in_bus_reset) return; /* in bus reset again */
 464
 465         if (isroot) reg_set_bits(lynx, LINK_CONTROL, LINK_CONTROL_CYCMASTER); //FIXME: I do not think, we need this here
 466         reg_set_bits(lynx, LINK_CONTROL,
 467                      LINK_CONTROL_RCV_CMP_VALID | LINK_CONTROL_TX_ASYNC_EN
 468                      | LINK_CONTROL_RX_ASYNC_EN | LINK_CONTROL_CYCTIMEREN);
 469 }
 470
 471
 472
 473 /* This must be called with the respective queue_lock held. */
 474 static void send_next(struct ti_lynx *lynx, int what)
 475 {
 476         struct ti_pcl pcl;
 477         struct lynx_send_data *d;
 478         struct hpsb_packet *packet;
 479
 480         d = (what == hpsb_iso ? &lynx->iso_send : &lynx->async);
 481         if (!list_empty(&d->pcl_queue)) {
 482                 PRINT(KERN_ERR, lynx->id, "trying to queue a new packet in nonempty fifo");
 483                 BUG();
 484         }
 485
 486         packet = driver_packet(d->queue.next);
 487         list_move_tail(&packet->driver_list, &d->pcl_queue);
 488
 489         d->header_dma = pci_map_single(lynx->dev, packet->header,
 490                                        packet->header_size, PCI_DMA_TODEVICE);
 491         if (packet->data_size) {
 492                 d->data_dma = pci_map_single(lynx->dev, packet->data,
 493                                              packet->data_size,
 494                                              PCI_DMA_TODEVICE);
 495         } else {
 496                 d->data_dma = 0;
 497         }
 498
 499         pcl.next = PCL_NEXT_INVALID;
 500         pcl.async_error_next = PCL_NEXT_INVALID;
 501         pcl.pcl_status = 0;
 502         pcl.buffer[0].control = packet->speed_code << 14 | packet->header_size;
 503 #ifdef __BIG_ENDIAN
 504         pcl.buffer[0].control |= PCL_BIGENDIAN;
 505 #endif
 506         pcl.buffer[0].pointer = d->header_dma;
 507         pcl.buffer[1].control = PCL_LAST_BUFF | packet->data_size;
 508         pcl.buffer[1].pointer = d->data_dma;
 509
 510         switch (packet->type) {
 511         case hpsb_async:
 512                 pcl.buffer[0].control |= PCL_CMD_XMT;
 513                 break;
 514         case hpsb_iso:
 515                 pcl.buffer[0].control |= PCL_CMD_XMT | PCL_ISOMODE;
 516                 break;
 517         case hpsb_raw:
 518                 pcl.buffer[0].control |= PCL_CMD_UNFXMT;
 519                 break;
 520         }
 521
 522         put_pcl(lynx, d->pcl, &pcl);
 523         run_pcl(lynx, d->pcl_start, d->channel);
 524 }
 525
 526
 527 /* called from subsystem core */
 528 static int lynx_transmit(struct hpsb_host *host, struct hpsb_packet *packet)
 529 {
 530         struct ti_lynx *lynx = host->hostdata;
 531         struct lynx_send_data *d;
 532         unsigned long flags;
 533
 534         if (packet->data_size >= 4096) {
 535                 PRINT(KERN_ERR, lynx->id, "transmit packet data too big (%Zd)",
 536                       packet->data_size);
 537                 return -EOVERFLOW;
 538         }
 539
 540         switch (packet->type) {
 541         case hpsb_async:
 542         case hpsb_raw:
 543                 d = &lynx->async;
 544                 break;
 545         case hpsb_iso:
 546                 d = &lynx->iso_send;
 547                 break;
 548         default:
 549                 PRINT(KERN_ERR, lynx->id, "invalid packet type %d",
 550                       packet->type);
 551                 return -EINVAL;
 552         }
 553
 554         if (packet->tcode == TCODE_WRITEQ
 555             || packet->tcode == TCODE_READQ_RESPONSE) {
 556                 cpu_to_be32s(&packet->header[3]);
 557         }
 558
 559         spin_lock_irqsave(&d->queue_lock, flags);
 560
 561         list_add_tail(&packet->driver_list, &d->queue);
 562         if (list_empty(&d->pcl_queue))
 563                 send_next(lynx, packet->type);
 564
 565         spin_unlock_irqrestore(&d->queue_lock, flags);
 566
 567         return 0;
 568 }
 569
 570
 571 /* called from subsystem core */
 572 static int lynx_devctl(struct hpsb_host *host, enum devctl_cmd cmd, int arg)
 573 {
 574         struct ti_lynx *lynx = host->hostdata;
 575         int retval = 0;
 576         struct hpsb_packet *packet;
 577         LIST_HEAD(packet_list);
 578         unsigned long flags;
 579         int phy_reg;
 580
 581         switch (cmd) {
 582         case RESET_BUS:
 583                 if (reg_read(lynx, LINK_INT_STATUS) & LINK_INT_PHY_BUSRESET) {
 584                         retval = 0;
 585                         break;
 586                 }
 587
 588                 switch (arg) {
 589                 case SHORT_RESET:
 590                         if (lynx->phyic.reg_1394a) {
 591                                 phy_reg = get_phy_reg(lynx, 5);
 592                                 if (phy_reg == -1) {
 593                                         PRINT(KERN_ERR, lynx->id, "cannot reset bus, because read phy reg failed");
 594                                         retval = -1;
 595                                         break;
 596                                 }
 597                                 phy_reg |= 0x40;
 598
 599                                 PRINT(KERN_INFO, lynx->id, "resetting bus (short bus reset) on request");
 600
 601                                 lynx->selfid_size = -1;
 602                                 lynx->phy_reg0 = -1;
 603                                 set_phy_reg(lynx, 5, phy_reg); /* set ISBR */
 604                                 break;
 605                         } else {
 606                                 PRINT(KERN_INFO, lynx->id, "cannot do short bus reset, because of old phy");
 607                                 /* fall through to long bus reset */
 608                         }
 609                 case LONG_RESET:
 610                         phy_reg = get_phy_reg(lynx, 1);
 611                         if (phy_reg == -1) {
 612                                 PRINT(KERN_ERR, lynx->id, "cannot reset bus, because read phy reg failed");
 613                                 retval = -1;
 614                                 break;
 615                         }
 616                         phy_reg |= 0x40;
 617
 618                         PRINT(KERN_INFO, lynx->id, "resetting bus (long bus reset) on request");
 619
 620                         lynx->selfid_size = -1;
 621                         lynx->phy_reg0 = -1;
 622                         set_phy_reg(lynx, 1, phy_reg); /* clear RHB, set IBR */
 623                         break;
 624                 case SHORT_RESET_NO_FORCE_ROOT:
 625                         if (lynx->phyic.reg_1394a) {
 626                                 phy_reg = get_phy_reg(lynx, 1);
 627                                 if (phy_reg == -1) {
 628                                         PRINT(KERN_ERR, lynx->id, "cannot reset bus, because read phy reg failed");
 629                                         retval = -1;
 630                                         break;
 631                                 }
 632                                 if (phy_reg & 0x80) {
 633                                         phy_reg &= ~0x80;
 634                                         set_phy_reg(lynx, 1, phy_reg); /* clear RHB */
 635                                 }
 636
 637                                 phy_reg = get_phy_reg(lynx, 5);
 638                                 if (phy_reg == -1) {
 639                                         PRINT(KERN_ERR, lynx->id, "cannot reset bus, because read phy reg failed");
 640                                         retval = -1;
 641                                         break;
 642                                 }
 643                                 phy_reg |= 0x40;
 644
 645                                 PRINT(KERN_INFO, lynx->id, "resetting bus (short bus reset, no force_root) on request");
 646
 647                                 lynx->selfid_size = -1;
 648                                 lynx->phy_reg0 = -1;
 649                                 set_phy_reg(lynx, 5, phy_reg); /* set ISBR */
 650                                 break;
 651                         } else {
 652                                 PRINT(KERN_INFO, lynx->id, "cannot do short bus reset, because of old phy");
 653                                 /* fall through to long bus reset */
 654                         }
 655                 case LONG_RESET_NO_FORCE_ROOT:
 656                         phy_reg = get_phy_reg(lynx, 1);
 657                         if (phy_reg == -1) {
 658                                 PRINT(KERN_ERR, lynx->id, "cannot reset bus, because read phy reg failed");
 659                                 retval = -1;
 660                                 break;
 661                         }
 662                         phy_reg &= ~0x80;
 663                         phy_reg |= 0x40;
 664
 665                         PRINT(KERN_INFO, lynx->id, "resetting bus (long bus reset, no force_root) on request");
 666
 667                         lynx->selfid_size = -1;
 668                         lynx->phy_reg0 = -1;
 669                         set_phy_reg(lynx, 1, phy_reg); /* clear RHB, set IBR */
 670                         break;
 671                 case SHORT_RESET_FORCE_ROOT:
 672                         if (lynx->phyic.reg_1394a) {
 673                                 phy_reg = get_phy_reg(lynx, 1);
 674                                 if (phy_reg == -1) {
 675                                         PRINT(KERN_ERR, lynx->id, "cannot reset bus, because read phy reg failed");
 676                                         retval = -1;
 677                                         break;
 678                                 }
 679                                 if (!(phy_reg & 0x80)) {
 680                                         phy_reg |= 0x80;
 681                                         set_phy_reg(lynx, 1, phy_reg); /* set RHB */
 682                                 }
 683
 684                                 phy_reg = get_phy_reg(lynx, 5);
 685                                 if (phy_reg == -1) {
 686                                         PRINT(KERN_ERR, lynx->id, "cannot reset bus, because read phy reg failed");
 687                                         retval = -1;
 688                                         break;
 689                                 }
 690                                 phy_reg |= 0x40;
 691
 692                                 PRINT(KERN_INFO, lynx->id, "resetting bus (short bus reset, force_root set) on request");
 693
 694                                 lynx->selfid_size = -1;
 695                                 lynx->phy_reg0 = -1;
 696                                 set_phy_reg(lynx, 5, phy_reg); /* set ISBR */
 697                                 break;
 698                         } else {
 699                                 PRINT(KERN_INFO, lynx->id, "cannot do short bus reset, because of old phy");
 700                                 /* fall through to long bus reset */
 701                         }
 702                 case LONG_RESET_FORCE_ROOT:
 703                         phy_reg = get_phy_reg(lynx, 1);
 704                         if (phy_reg == -1) {
 705                                 PRINT(KERN_ERR, lynx->id, "cannot reset bus, because read phy reg failed");
 706                                 retval = -1;
 707                                 break;
 708                         }
 709                         phy_reg |= 0xc0;
 710
 711                         PRINT(KERN_INFO, lynx->id, "resetting bus (long bus reset, force_root set) on request");
 712
 713                         lynx->selfid_size = -1;
 714                         lynx->phy_reg0 = -1;
 715                         set_phy_reg(lynx, 1, phy_reg); /* set IBR and RHB */
 716                         break;
 717                 default:
 718                         PRINT(KERN_ERR, lynx->id, "unknown argument for reset_bus command %d", arg);
 719                         retval = -1;
 720                 }
 721
 722                 break;
 723
 724         case GET_CYCLE_COUNTER:
 725                 retval = reg_read(lynx, CYCLE_TIMER);
 726                 break;
 727
 728         case SET_CYCLE_COUNTER:
 729                 reg_write(lynx, CYCLE_TIMER, arg);
 730                 break;
 731
 732         case SET_BUS_ID:
 733                 reg_write(lynx, LINK_ID,
 734                           (arg << 22) | (reg_read(lynx, LINK_ID) & 0x003f0000));
 735                 break;
 736
 737         case ACT_CYCLE_MASTER:
 738                 if (arg) {
 739                         reg_set_bits(lynx, LINK_CONTROL,
 740                                      LINK_CONTROL_CYCMASTER);
 741                 } else {
 742                         reg_clear_bits(lynx, LINK_CONTROL,
 743                                        LINK_CONTROL_CYCMASTER);
 744                 }
 745                 break;
 746
 747         case CANCEL_REQUESTS:
 748                 spin_lock_irqsave(&lynx->async.queue_lock, flags);
 749
 750                 reg_write(lynx, DMA_CHAN_CTRL(CHANNEL_ASYNC_SEND), 0);
 751                 list_splice(&lynx->async.queue, &packet_list);
 752                 INIT_LIST_HEAD(&lynx->async.queue);
 753
 754                 if (list_empty(&lynx->async.pcl_queue)) {
 755                         spin_unlock_irqrestore(&lynx->async.queue_lock, flags);
 756                         PRINTD(KERN_DEBUG, lynx->id, "no async packet in PCL to cancel");
 757                 } else {
 758                         struct ti_pcl pcl;
 759                         u32 ack;
 760                         struct hpsb_packet *packet;
 761
 762                         PRINT(KERN_INFO, lynx->id, "cancelling async packet, that was already in PCL");
 763
 764                         get_pcl(lynx, lynx->async.pcl, &pcl);
 765
 766                         packet = driver_packet(lynx->async.pcl_queue.next);
 767                         list_del_init(&packet->driver_list);
 768
 769                         pci_unmap_single(lynx->dev, lynx->async.header_dma,
 770                                          packet->header_size, PCI_DMA_TODEVICE);
 771                         if (packet->data_size) {
 772                                 pci_unmap_single(lynx->dev, lynx->async.data_dma,
 773                                                  packet->data_size, PCI_DMA_TODEVICE);
 774                         }
 775
 776                         spin_unlock_irqrestore(&lynx->async.queue_lock, flags);
 777
 778                         if (pcl.pcl_status & DMA_CHAN_STAT_PKTCMPL) {
 779                                 if (pcl.pcl_status & DMA_CHAN_STAT_SPECIALACK) {
 780                                         ack = (pcl.pcl_status >> 15) & 0xf;
 781                                         PRINTD(KERN_INFO, lynx->id, "special ack %d", ack);
 782                                         ack = (ack == 1 ? ACKX_TIMEOUT : ACKX_SEND_ERROR);
 783                                 } else {
 784                                         ack = (pcl.pcl_status >> 15) & 0xf;
 785                                 }
 786                         } else {
 787                                 PRINT(KERN_INFO, lynx->id, "async packet was not completed");
 788                                 ack = ACKX_ABORTED;
 789                         }
 790                         hpsb_packet_sent(host, packet, ack);
 791                 }
 792
 793                 while (!list_empty(&packet_list)) {
 794                         packet = driver_packet(packet_list.next);
 795                         list_del_init(&packet->driver_list);
 796                         hpsb_packet_sent(host, packet, ACKX_ABORTED);
 797                 }
 798
 799                 break;
 800
 801         case ISO_LISTEN_CHANNEL:
 802                 spin_lock_irqsave(&lynx->iso_rcv.lock, flags);
 803
 804                 if (lynx->iso_rcv.chan_count++ == 0) {
 805                         reg_write(lynx, DMA_WORD1_CMP_ENABLE(CHANNEL_ISO_RCV),
 806                                   DMA_WORD1_CMP_ENABLE_MASTER);
 807                 }
 808
 809                 spin_unlock_irqrestore(&lynx->iso_rcv.lock, flags);
 810                 break;
 811
 812         case ISO_UNLISTEN_CHANNEL:
 813                 spin_lock_irqsave(&lynx->iso_rcv.lock, flags);
 814
 815                 if (--lynx->iso_rcv.chan_count == 0) {
 816                         reg_write(lynx, DMA_WORD1_CMP_ENABLE(CHANNEL_ISO_RCV),
 817                                   0);
 818                 }
 819
 820                 spin_unlock_irqrestore(&lynx->iso_rcv.lock, flags);
 821                 break;
 822
 823         default:
 824                 PRINT(KERN_ERR, lynx->id, "unknown devctl command %d", cmd);
 825                 retval = -1;
 826         }
 827
 828         return retval;
 829 }
 830
 831
 832 /***************************************
 833  * IEEE-1394 functionality section END *
 834  ***************************************/
 835
 836 #ifdef CONFIG_IEEE1394_PCILYNX_PORTS
 837 /* VFS functions for local bus / aux device access.  Access to those
 838  * is implemented as a character device instead of block devices
 839  * because buffers are not wanted for this.  Therefore llseek (from
 840  * VFS) can be used for these char devices with obvious effects.
 841  */
 842 static int mem_open(struct inode*, struct file*);
 843 static int mem_release(struct inode*, struct file*);
 844 static unsigned int aux_poll(struct file*, struct poll_table_struct*);
 845 static loff_t mem_llseek(struct file*, loff_t, int);
 846 static ssize_t mem_read (struct file*, char*, size_t, loff_t*);
 847 static ssize_t mem_write(struct file*, const char*, size_t, loff_t*);
 848
 849
 850 static struct file_operations aux_ops = {
 851         .owner =        THIS_MODULE,
 852         .read =         mem_read,
 853         .write =        mem_write,
 854         .poll =         aux_poll,
 855         .llseek =       mem_llseek,
 856         .open =         mem_open,
 857         .release =      mem_release,
 858 };
 859
 860
 861 static void aux_setup_pcls(struct ti_lynx *lynx)
 862 {
 863         struct ti_pcl pcl;
 864
 865         pcl.next = PCL_NEXT_INVALID;
 866         pcl.user_data = pcl_bus(lynx, lynx->dmem_pcl);
 867         put_pcl(lynx, lynx->dmem_pcl, &pcl);
 868 }
 869
 870 static int mem_open(struct inode *inode, struct file *file)
 871 {
 872         int cid = iminor(inode);
 873         enum { t_rom, t_aux, t_ram } type;
 874         struct memdata *md;
 875
 876         if (cid < PCILYNX_MINOR_AUX_START) {
 877                 /* just for completeness */
 878                 return -ENXIO;
 879         } else if (cid < PCILYNX_MINOR_ROM_START) {
 880                 cid -= PCILYNX_MINOR_AUX_START;
 881                 if (cid >= num_of_cards || !cards[cid].aux_port)
 882                         return -ENXIO;
 883                 type = t_aux;
 884         } else if (cid < PCILYNX_MINOR_RAM_START) {
 885                 cid -= PCILYNX_MINOR_ROM_START;
 886                 if (cid >= num_of_cards || !cards[cid].local_rom)
 887                         return -ENXIO;
 888                 type = t_rom;
 889         } else {
 890                 /* WARNING: Know what you are doing when opening RAM.
 891                  * It is currently used inside the driver! */
 892                 cid -= PCILYNX_MINOR_RAM_START;
 893                 if (cid >= num_of_cards || !cards[cid].local_ram)
 894                         return -ENXIO;
 895                 type = t_ram;
 896         }
 897
 898         md = (struct memdata *)kmalloc(sizeof(struct memdata), SLAB_KERNEL);
 899         if (md == NULL)
 900                 return -ENOMEM;
 901
 902         md->lynx = &cards[cid];
 903         md->cid = cid;
 904
 905         switch (type) {
 906         case t_rom:
 907                 md->type = rom;
 908                 break;
 909         case t_ram:
 910                 md->type = ram;
 911                 break;
 912         case t_aux:
 913                 atomic_set(&md->aux_intr_last_seen,
 914                            atomic_read(&cards[cid].aux_intr_seen));
 915                 md->type = aux;
 916                 break;
 917         }
 918
 919         file->private_data = md;
 920
 921         return 0;
 922 }
 923
 924 static int mem_release(struct inode *inode, struct file *file)
 925 {
 926         kfree(file->private_data);
 927         return 0;
 928 }
 929
 930 static unsigned int aux_poll(struct file *file, poll_table *pt)
 931 {
 932         struct memdata *md = (struct memdata *)file->private_data;
 933         int cid = md->cid;
 934         unsigned int mask;
 935
 936         /* reading and writing is always allowed */
 937         mask = POLLIN | POLLRDNORM | POLLOUT | POLLWRNORM;
 938
 939         if (md->type == aux) {
 940                 poll_wait(file, &cards[cid].aux_intr_wait, pt);
 941
 942                 if (atomic_read(&md->aux_intr_last_seen)
 943                     != atomic_read(&cards[cid].aux_intr_seen)) {
 944                         mask |= POLLPRI;
 945                         atomic_inc(&md->aux_intr_last_seen);
 946                 }
 947         }
 948
 949         return mask;
 950 }
 951
 952 loff_t mem_llseek(struct file *file, loff_t offs, int orig)
 953 {
 954         loff_t newoffs;
 955
 956         switch (orig) {
 957         case 0:
 958                 newoffs = offs;
 959                 break;
 960         case 1:
 961                 newoffs = offs + file->f_pos;
 962                 break;
 963         case 2:
 964                 newoffs = PCILYNX_MAX_MEMORY + 1 + offs;
 965                 break;
 966         default:
 967                 return -EINVAL;
 968         }
 969
 970         if (newoffs < 0 || newoffs > PCILYNX_MAX_MEMORY + 1) return -EINVAL;
 971
 972         file->f_pos = newoffs;
 973         return newoffs;
 974 }
 975
 976 /*
 977  * do not DMA if count is too small because this will have a serious impact
 978  * on performance - the value 2400 was found by experiment and may not work
 979  * everywhere as good as here - use mem_mindma option for modules to change
 980  */
 981 static short mem_mindma = 2400;
 982 module_param(mem_mindma, short, 0444);
 983 MODULE_PARM_DESC(mem_mindma, "Minimum amount of data required to use DMA");
 984
 985 static ssize_t mem_dmaread(struct memdata *md, u32 physbuf, ssize_t count,
 986                            int offset)
 987 {
 988         pcltmp_t pcltmp;
 989         struct ti_pcl *pcl;
 990         size_t retval;
 991         int i;
 992         DECLARE_WAITQUEUE(wait, current);
 993
 994         count &= ~3;
 995         count = min(count, 53196);
 996         retval = count;
 997
 998         if (reg_read(md->lynx, DMA_CHAN_CTRL(CHANNEL_LOCALBUS))
 999             & DMA_CHAN_CTRL_BUSY) {
1000                 PRINT(KERN_WARNING, md->lynx->id, "DMA ALREADY ACTIVE!");
1001         }
1002
1003         reg_write(md->lynx, LBUS_ADDR, md->type | offset);
1004
1005         pcl = edit_pcl(md->lynx, md->lynx->dmem_pcl, &pcltmp);
1006         pcl->buffer[0].control = PCL_CMD_LBUS_TO_PCI | min(count, 4092);
1007         pcl->buffer[0].pointer = physbuf;
1008         count -= 4092;
1009
1010         i = 0;
1011         while (count > 0) {
1012                 i++;
1013                 pcl->buffer[i].control = min(count, 4092);
1014                 pcl->buffer[i].pointer = physbuf + i * 4092;
1015                 count -= 4092;
1016         }
1017         pcl->buffer[i].control |= PCL_LAST_BUFF;
1018         commit_pcl(md->lynx, md->lynx->dmem_pcl, &pcltmp);
1019
1020         set_current_state(TASK_INTERRUPTIBLE);
1021         add_wait_queue(&md->lynx->mem_dma_intr_wait, &wait);
1022         run_sub_pcl(md->lynx, md->lynx->dmem_pcl, 2, CHANNEL_LOCALBUS);
1023
1024         schedule();
1025         while (reg_read(md->lynx, DMA_CHAN_CTRL(CHANNEL_LOCALBUS))
1026                & DMA_CHAN_CTRL_BUSY) {
1027                 if (signal_pending(current)) {
1028                         retval = -EINTR;
1029                         break;
1030                 }
1031                 schedule();
1032         }
1033
1034         reg_write(md->lynx, DMA_CHAN_CTRL(CHANNEL_LOCALBUS), 0);
1035         remove_wait_queue(&md->lynx->mem_dma_intr_wait, &wait);
1036
1037         if (reg_read(md->lynx, DMA_CHAN_CTRL(CHANNEL_LOCALBUS))
1038             & DMA_CHAN_CTRL_BUSY) {
1039                 PRINT(KERN_ERR, md->lynx->id, "DMA STILL ACTIVE!");
1040         }
1041
1042         return retval;
1043 }
1044
1045 static ssize_t mem_read(struct file *file, char *buffer, size_t count,
1046                         loff_t *offset)
1047 {
1048         struct memdata *md = (struct memdata *)file->private_data;
1049         ssize_t bcount;
1050         size_t alignfix;
1051         loff_t off = *offset; /* avoid useless 64bit-arithmetic */
1052         ssize_t retval;
1053         void *membase;
1054
1055         if ((off + count) > PCILYNX_MAX_MEMORY+1) {
1056                 count = PCILYNX_MAX_MEMORY+1 - off;
1057         }
1058         if (count == 0 || off > PCILYNX_MAX_MEMORY) {
1059                 return -ENOSPC;
1060         }
1061
1062         switch (md->type) {
1063         case rom:
1064                 membase = md->lynx->local_rom;
1065                 break;
1066         case ram:
1067                 membase = md->lynx->local_ram;
1068                 break;
1069         case aux:
1070                 membase = md->lynx->aux_port;
1071                 break;
1072         default:
1073                 panic("pcilynx%d: unsupported md->type %d in %s",
1074                       md->lynx->id, md->type, __FUNCTION__);
1075         }
1076
1077         down(&md->lynx->mem_dma_mutex);
1078
1079         if (count < mem_mindma) {
1080                 memcpy_fromio(md->lynx->mem_dma_buffer, membase+off, count);
1081                 goto out;
1082         }
1083
1084         bcount = count;
1085         alignfix = 4 - (off % 4);
1086         if (alignfix != 4) {
1087                 if (bcount < alignfix) {
1088                         alignfix = bcount;
1089                 }
1090                 memcpy_fromio(md->lynx->mem_dma_buffer, membase+off,
1091                               alignfix);
1092                 if (bcount == alignfix) {
1093                         goto out;
1094                 }
1095                 bcount -= alignfix;
1096                 off += alignfix;
1097         }
1098
1099         while (bcount >= 4) {
1100                 retval = mem_dmaread(md, md->lynx->mem_dma_buffer_dma
1101                                      + count - bcount, bcount, off);
1102                 if (retval < 0) return retval;
1103
1104                 bcount -= retval;
1105                 off += retval;
1106         }
1107
1108         if (bcount) {
1109                 memcpy_fromio(md->lynx->mem_dma_buffer + count - bcount,
1110                               membase+off, bcount);
1111         }
1112
1113  out:
1114         retval = copy_to_user(buffer, md->lynx->mem_dma_buffer, count);
1115         up(&md->lynx->mem_dma_mutex);
1116
1117         if (retval) return -EFAULT;
1118         *offset += count;
1119         return count;
1120 }
1121
1122
1123 static ssize_t mem_write(struct file *file, const char *buffer, size_t count,
1124                          loff_t *offset)
1125 {
1126         struct memdata *md = (struct memdata *)file->private_data;
1127
1128         if (((*offset) + count) > PCILYNX_MAX_MEMORY+1) {
1129                 count = PCILYNX_MAX_MEMORY+1 - *offset;
1130         }
1131         if (count == 0 || *offset > PCILYNX_MAX_MEMORY) {
1132                 return -ENOSPC;
1133         }
1134
1135         /* FIXME: dereferencing pointers to PCI mem doesn't work everywhere */
1136         switch (md->type) {
1137         case aux:
1138                 if (copy_from_user(md->lynx->aux_port+(*offset), buffer, count))
1139                         return -EFAULT;
1140                 break;
1141         case ram:
1142                 if (copy_from_user(md->lynx->local_ram+(*offset), buffer, count))
1143                         return -EFAULT;
1144                 break;
1145         case rom:
1146                 /* the ROM may be writeable */
1147                 if (copy_from_user(md->lynx->local_rom+(*offset), buffer, count))
1148                         return -EFAULT;
1149                 break;
1150         }
1151
1152         file->f_pos += count;
1153         return count;
1154 }
1155 #endif /* CONFIG_IEEE1394_PCILYNX_PORTS */
1156
1157
1158 /********************************************************
1159  * Global stuff (interrupt handler, init/shutdown code) *
1160  ********************************************************/
1161
1162
1163 static irqreturn_t lynx_irq_handler(int irq, void *dev_id,
1164                              struct pt_regs *regs_are_unused)
1165 {
1166         struct ti_lynx *lynx = (struct ti_lynx *)dev_id;
1167         struct hpsb_host *host = lynx->host;
1168         u32 intmask;
1169         u32 linkint;
1170
1171         linkint = reg_read(lynx, LINK_INT_STATUS);
1172         intmask = reg_read(lynx, PCI_INT_STATUS);
1173
1174         if (!(intmask & PCI_INT_INT_PEND))
1175                 return IRQ_NONE;
1176
1177         PRINTD(KERN_DEBUG, lynx->id, "interrupt: 0x%08x / 0x%08x", intmask,
1178                linkint);
1179
1180         reg_write(lynx, LINK_INT_STATUS, linkint);
1181         reg_write(lynx, PCI_INT_STATUS, intmask);
1182
1183 #ifdef CONFIG_IEEE1394_PCILYNX_PORTS
1184         if (intmask & PCI_INT_AUX_INT) {
1185                 atomic_inc(&lynx->aux_intr_seen);
1186                 wake_up_interruptible(&lynx->aux_intr_wait);
1187         }
1188
1189         if (intmask & PCI_INT_DMA_HLT(CHANNEL_LOCALBUS)) {
1190                 wake_up_interruptible(&lynx->mem_dma_intr_wait);
1191         }
1192 #endif
1193
1194
1195         if (intmask & PCI_INT_1394) {
1196                 if (linkint & LINK_INT_PHY_TIMEOUT) {
1197                         PRINT(KERN_INFO, lynx->id, "PHY timeout occurred");
1198                 }
1199                 if (linkint & LINK_INT_PHY_BUSRESET) {
1200                         PRINT(KERN_INFO, lynx->id, "bus reset interrupt");
1201                         lynx->selfid_size = -1;
1202                         lynx->phy_reg0 = -1;
1203                         if (!host->in_bus_reset)
1204                                 hpsb_bus_reset(host);
1205                 }
1206                 if (linkint & LINK_INT_PHY_REG_RCVD) {
1207                         u32 reg;
1208
1209                         spin_lock(&lynx->phy_reg_lock);
1210                         reg = reg_read(lynx, LINK_PHY);
1211                         spin_unlock(&lynx->phy_reg_lock);
1212
1213                         if (!host->in_bus_reset) {
1214                                 PRINT(KERN_INFO, lynx->id,
1215                                       "phy reg received without reset");
1216                         } else if (reg & 0xf00) {
1217                                 PRINT(KERN_INFO, lynx->id,
1218                                       "unsolicited phy reg %d received",
1219                                       (reg >> 8) & 0xf);
1220                         } else {
1221                                 lynx->phy_reg0 = reg & 0xff;
1222                                 handle_selfid(lynx, host);
1223                         }
1224                 }
1225                 if (linkint & LINK_INT_ISO_STUCK) {
1226                         PRINT(KERN_INFO, lynx->id, "isochronous transmitter stuck");
1227                 }
1228                 if (linkint & LINK_INT_ASYNC_STUCK) {
1229                         PRINT(KERN_INFO, lynx->id, "asynchronous transmitter stuck");
1230                 }
1231                 if (linkint & LINK_INT_SENT_REJECT) {
1232                         PRINT(KERN_INFO, lynx->id, "sent reject");
1233                 }
1234                 if (linkint & LINK_INT_TX_INVALID_TC) {
1235                         PRINT(KERN_INFO, lynx->id, "invalid transaction code");
1236                 }
1237                 if (linkint & LINK_INT_GRF_OVERFLOW) {
1238                         /* flush FIFO if overflow happens during reset */
1239                         if (host->in_bus_reset)
1240                                 reg_write(lynx, FIFO_CONTROL,
1241                                           FIFO_CONTROL_GRF_FLUSH);
1242                         PRINT(KERN_INFO, lynx->id, "GRF overflow");
1243                 }
1244                 if (linkint & LINK_INT_ITF_UNDERFLOW) {
1245                         PRINT(KERN_INFO, lynx->id, "ITF underflow");
1246                 }
1247                 if (linkint & LINK_INT_ATF_UNDERFLOW) {
1248                         PRINT(KERN_INFO, lynx->id, "ATF underflow");
1249                 }
1250         }
1251
1252         if (intmask & PCI_INT_DMA_HLT(CHANNEL_ISO_RCV)) {
1253                 PRINTD(KERN_DEBUG, lynx->id, "iso receive");
1254
1255                 spin_lock(&lynx->iso_rcv.lock);
1256
1257                 lynx->iso_rcv.stat[lynx->iso_rcv.next] =
1258                         reg_read(lynx, DMA_CHAN_STAT(CHANNEL_ISO_RCV));
1259
1260                 lynx->iso_rcv.used++;
1261                 lynx->iso_rcv.next = (lynx->iso_rcv.next + 1) % NUM_ISORCV_PCL;
1262
1263                 if ((lynx->iso_rcv.next == lynx->iso_rcv.last)
1264                     || !lynx->iso_rcv.chan_count) {
1265                         PRINTD(KERN_DEBUG, lynx->id, "stopped");
1266                         reg_write(lynx, DMA_WORD1_CMP_ENABLE(CHANNEL_ISO_RCV), 0);
1267                 }
1268
1269                 run_sub_pcl(lynx, lynx->iso_rcv.pcl_start, lynx->iso_rcv.next,
1270                             CHANNEL_ISO_RCV);
1271
1272                 spin_unlock(&lynx->iso_rcv.lock);
1273
1274                 tasklet_schedule(&lynx->iso_rcv.tq);
1275         }
1276
1277         if (intmask & PCI_INT_DMA_HLT(CHANNEL_ASYNC_SEND)) {
1278                 PRINTD(KERN_DEBUG, lynx->id, "async sent");
1279                 spin_lock(&lynx->async.queue_lock);
1280
1281                 if (list_empty(&lynx->async.pcl_queue)) {
1282                         spin_unlock(&lynx->async.queue_lock);
1283                         PRINT(KERN_WARNING, lynx->id, "async dma halted, but no queued packet (maybe it was cancelled)");
1284                 } else {
1285                         struct ti_pcl pcl;
1286                         u32 ack;
1287                         struct hpsb_packet *packet;
1288
1289                         get_pcl(lynx, lynx->async.pcl, &pcl);
1290
1291                         packet = driver_packet(lynx->async.pcl_queue.next);
1292                         list_del_init(&packet->driver_list);
1293
1294                         pci_unmap_single(lynx->dev, lynx->async.header_dma,
1295                                          packet->header_size, PCI_DMA_TODEVICE);
1296                         if (packet->data_size) {
1297                                 pci_unmap_single(lynx->dev, lynx->async.data_dma,
1298                                                  packet->data_size, PCI_DMA_TODEVICE);
1299                         }
1300
1301                         if (!list_empty(&lynx->async.queue)) {
1302                                 send_next(lynx, hpsb_async);
1303                         }
1304
1305                         spin_unlock(&lynx->async.queue_lock);
1306
1307                         if (pcl.pcl_status & DMA_CHAN_STAT_PKTCMPL) {
1308                                 if (pcl.pcl_status & DMA_CHAN_STAT_SPECIALACK) {
1309                                         ack = (pcl.pcl_status >> 15) & 0xf;
1310                                         PRINTD(KERN_INFO, lynx->id, "special ack %d", ack);
1311                                         ack = (ack == 1 ? ACKX_TIMEOUT : ACKX_SEND_ERROR);
1312                                 } else {
1313                                         ack = (pcl.pcl_status >> 15) & 0xf;
1314                                 }
1315                         } else {
1316                                 PRINT(KERN_INFO, lynx->id, "async packet was not completed");
1317                                 ack = ACKX_SEND_ERROR;
1318                         }
1319                         hpsb_packet_sent(host, packet, ack);
1320                 }
1321         }
1322
1323         if (intmask & PCI_INT_DMA_HLT(CHANNEL_ISO_SEND)) {
1324                 PRINTD(KERN_DEBUG, lynx->id, "iso sent");
1325                 spin_lock(&lynx->iso_send.queue_lock);
1326
1327                 if (list_empty(&lynx->iso_send.pcl_queue)) {
1328                         spin_unlock(&lynx->iso_send.queue_lock);
1329                         PRINT(KERN_ERR, lynx->id, "iso send dma halted, but no queued packet");
1330                 } else {
1331                         struct ti_pcl pcl;
1332                         u32 ack;
1333                         struct hpsb_packet *packet;
1334
1335                         get_pcl(lynx, lynx->iso_send.pcl, &pcl);
1336
1337                         packet = driver_packet(lynx->iso_send.pcl_queue.next);
1338                         list_del_init(&packet->driver_list);
1339
1340                         pci_unmap_single(lynx->dev, lynx->iso_send.header_dma,
1341                                          packet->header_size, PCI_DMA_TODEVICE);
1342                         if (packet->data_size) {
1343                                 pci_unmap_single(lynx->dev, lynx->iso_send.data_dma,
1344                                                  packet->data_size, PCI_DMA_TODEVICE);
1345                         }
1346
1347                         if (!list_empty(&lynx->iso_send.queue)) {
1348                                 send_next(lynx, hpsb_iso);
1349                         }
1350
1351                         spin_unlock(&lynx->iso_send.queue_lock);
1352
1353                         if (pcl.pcl_status & DMA_CHAN_STAT_PKTCMPL) {
1354                                 if (pcl.pcl_status & DMA_CHAN_STAT_SPECIALACK) {
1355                                         ack = (pcl.pcl_status >> 15) & 0xf;
1356                                         PRINTD(KERN_INFO, lynx->id, "special ack %d", ack);
1357                                         ack = (ack == 1 ? ACKX_TIMEOUT : ACKX_SEND_ERROR);
1358                                 } else {
1359                                         ack = (pcl.pcl_status >> 15) & 0xf;
1360                                 }
1361                         } else {
1362                                 PRINT(KERN_INFO, lynx->id, "iso send packet was not completed");
1363                                 ack = ACKX_SEND_ERROR;
1364                         }
1365
1366                         hpsb_packet_sent(host, packet, ack); //FIXME: maybe we should just use ACK_COMPLETE and ACKX_SEND_ERROR
1367                 }
1368         }
1369
1370         if (intmask & PCI_INT_DMA_HLT(CHANNEL_ASYNC_RCV)) {
1371                 /* general receive DMA completed */
1372                 int stat = reg_read(lynx, DMA_CHAN_STAT(CHANNEL_ASYNC_RCV));
1373
1374                 PRINTD(KERN_DEBUG, lynx->id, "received packet size %d",
1375                        stat & 0x1fff);
1376
1377                 if (stat & DMA_CHAN_STAT_SELFID) {
1378                         lynx->selfid_size = stat & 0x1fff;
1379                         handle_selfid(lynx, host);
1380                 } else {
1381                         quadlet_t *q_data = lynx->rcv_page;
1382                         if ((*q_data >> 4 & 0xf) == TCODE_READQ_RESPONSE
1383                             || (*q_data >> 4 & 0xf) == TCODE_WRITEQ) {
1384                                 cpu_to_be32s(q_data + 3);
1385                         }
1386                         hpsb_packet_received(host, q_data, stat & 0x1fff, 0);
1387                 }
1388
1389                 run_pcl(lynx, lynx->rcv_pcl_start, CHANNEL_ASYNC_RCV);
1390         }
1391
1392         return IRQ_HANDLED;
1393 }
1394
1395
1396 static void iso_rcv_bh(struct ti_lynx *lynx)
1397 {
1398         unsigned int idx;
1399         quadlet_t *data;
1400         unsigned long flags;
1401
1402         spin_lock_irqsave(&lynx->iso_rcv.lock, flags);
1403
1404         while (lynx->iso_rcv.used) {
1405                 idx = lynx->iso_rcv.last;
1406                 spin_unlock_irqrestore(&lynx->iso_rcv.lock, flags);
1407
1408                 data = lynx->iso_rcv.page[idx / ISORCV_PER_PAGE]
1409                         + (idx % ISORCV_PER_PAGE) * MAX_ISORCV_SIZE;
1410
1411                 if ((*data >> 16) + 4 != (lynx->iso_rcv.stat[idx] & 0x1fff)) {
1412                         PRINT(KERN_ERR, lynx->id,
1413                               "iso length mismatch 0x%08x/0x%08x", *data,
1414                               lynx->iso_rcv.stat[idx]);
1415                 }
1416
1417                 if (lynx->iso_rcv.stat[idx]
1418                     & (DMA_CHAN_STAT_PCIERR | DMA_CHAN_STAT_PKTERR)) {
1419                         PRINT(KERN_INFO, lynx->id,
1420                               "iso receive error on %d to 0x%p", idx, data);
1421                 } else {
1422                         hpsb_packet_received(lynx->host, data,
1423                                              lynx->iso_rcv.stat[idx] & 0x1fff,
1424                                              0);
1425                 }
1426
1427                 spin_lock_irqsave(&lynx->iso_rcv.lock, flags);
1428                 lynx->iso_rcv.last = (idx + 1) % NUM_ISORCV_PCL;
1429                 lynx->iso_rcv.used--;
1430         }
1431
1432         if (lynx->iso_rcv.chan_count) {
1433                 reg_write(lynx, DMA_WORD1_CMP_ENABLE(CHANNEL_ISO_RCV),
1434                           DMA_WORD1_CMP_ENABLE_MASTER);
1435         }
1436         spin_unlock_irqrestore(&lynx->iso_rcv.lock, flags);
1437 }
1438
1439
1440 static void remove_card(struct pci_dev *dev)
1441 {
1442         struct ti_lynx *lynx;
1443         struct device *lynx_dev;
1444         int i;
1445
1446         lynx = pci_get_drvdata(dev);
1447         if (!lynx) return;
1448         pci_set_drvdata(dev, NULL);
1449
1450         lynx_dev = get_device(&lynx->host->device);
1451
1452         switch (lynx->state) {
1453         case is_host:
1454                 reg_write(lynx, PCI_INT_ENABLE, 0);
1455                 hpsb_remove_host(lynx->host);
1456         case have_intr:
1457                 reg_write(lynx, PCI_INT_ENABLE, 0);
1458                 free_irq(lynx->dev->irq, lynx);
1459
1460                 /* Disable IRM Contender and LCtrl */
1461                 if (lynx->phyic.reg_1394a)
1462                         set_phy_reg(lynx, 4, ~0xc0 & get_phy_reg(lynx, 4));
1463
1464                 /* Let all other nodes know to ignore us */
1465                 lynx_devctl(lynx->host, RESET_BUS, LONG_RESET_NO_FORCE_ROOT);
1466
1467         case have_iomappings:
1468                 reg_set_bits(lynx, MISC_CONTROL, MISC_CONTROL_SWRESET);
1469                 /* Fix buggy cards with autoboot pin not tied low: */
1470                 reg_write(lynx, DMA0_CHAN_CTRL, 0);
1471                 iounmap(lynx->registers);
1472                 iounmap(lynx->local_rom);
1473                 iounmap(lynx->local_ram);
1474                 iounmap(lynx->aux_port);
1475         case have_1394_buffers:
1476                 for (i = 0; i < ISORCV_PAGES; i++) {
1477                         if (lynx->iso_rcv.page[i]) {
1478                                 pci_free_consistent(lynx->dev, PAGE_SIZE,
1479                                                     lynx->iso_rcv.page[i],
1480                                                     lynx->iso_rcv.page_dma[i]);
1481                         }
1482                 }
1483                 pci_free_consistent(lynx->dev, PAGE_SIZE, lynx->rcv_page,
1484                                     lynx->rcv_page_dma);
1485         case have_aux_buf:
1486 #ifdef CONFIG_IEEE1394_PCILYNX_PORTS
1487                 pci_free_consistent(lynx->dev, 65536, lynx->mem_dma_buffer,
1488                                     lynx->mem_dma_buffer_dma);
1489 #endif
1490         case have_pcl_mem:
1491 #ifndef CONFIG_IEEE1394_PCILYNX_LOCALRAM
1492                 pci_free_consistent(lynx->dev, LOCALRAM_SIZE, lynx->pcl_mem,
1493                                     lynx->pcl_mem_dma);
1494 #endif
1495         case clear:
1496                 /* do nothing - already freed */
1497                 ;
1498         }
1499
1500         tasklet_kill(&lynx->iso_rcv.tq);
1501
1502         if (lynx_dev)
1503                 put_device(lynx_dev);
1504 }
1505
1506
1507 static int __devinit add_card(struct pci_dev *dev,
1508                               const struct pci_device_id *devid_is_unused)
1509 {
1510 #define FAIL(fmt, args...) do { \
1511         PRINT_G(KERN_ERR, fmt , ## args); \
1512         remove_card(dev); \
1513         return error; \
1514         } while (0)
1515
1516         char irq_buf[16];
1517         struct hpsb_host *host;
1518         struct ti_lynx *lynx; /* shortcut to currently handled device */
1519         struct ti_pcl pcl;
1520         u32 *pcli;
1521         int i;
1522         int error;
1523
1524         /* needed for i2c communication with serial eeprom */
1525         struct i2c_adapter i2c_adapter;
1526         struct i2c_algo_bit_data i2c_adapter_data;
1527
1528         error = -ENXIO;
1529
1530         if (pci_set_dma_mask(dev, 0xffffffff))
1531                 FAIL("DMA address limits not supported for PCILynx hardware");
1532         if (pci_enable_device(dev))
1533                 FAIL("failed to enable PCILynx hardware");
1534         pci_set_master(dev);
1535
1536         error = -ENOMEM;
1537
1538         host = hpsb_alloc_host(&lynx_driver, sizeof(struct ti_lynx), &dev->dev);
1539         if (!host) FAIL("failed to allocate control structure memory");
1540
1541         lynx = host->hostdata;
1542         lynx->id = card_id++;
1543         lynx->dev = dev;
1544         lynx->state = clear;
1545         lynx->host = host;
1546         host->pdev = dev;
1547         pci_set_drvdata(dev, lynx);
1548
1549         lynx->lock = SPIN_LOCK_UNLOCKED;
1550         lynx->phy_reg_lock = SPIN_LOCK_UNLOCKED;
1551
1552 #ifndef CONFIG_IEEE1394_PCILYNX_LOCALRAM
1553         lynx->pcl_mem = pci_alloc_consistent(dev, LOCALRAM_SIZE,
1554                                              &lynx->pcl_mem_dma);
1555
1556         if (lynx->pcl_mem != NULL) {
1557                 lynx->state = have_pcl_mem;
1558                 PRINT(KERN_INFO, lynx->id,
1559                       "allocated PCL memory %d Bytes @ 0x%p", LOCALRAM_SIZE,
1560                       lynx->pcl_mem);
1561         } else {
1562                 FAIL("failed to allocate PCL memory area");
1563         }
1564 #endif
1565
1566 #ifdef CONFIG_IEEE1394_PCILYNX_PORTS
1567         lynx->mem_dma_buffer = pci_alloc_consistent(dev, 65536,
1568                                                     &lynx->mem_dma_buffer_dma);
1569         if (lynx->mem_dma_buffer == NULL) {
1570                 FAIL("failed to allocate DMA buffer for aux");
1571         }
1572         lynx->state = have_aux_buf;
1573 #endif
1574
1575         lynx->rcv_page = pci_alloc_consistent(dev, PAGE_SIZE,
1576                                               &lynx->rcv_page_dma);
1577         if (lynx->rcv_page == NULL) {
1578                 FAIL("failed to allocate receive buffer");
1579         }
1580         lynx->state = have_1394_buffers;
1581
1582         for (i = 0; i < ISORCV_PAGES; i++) {
1583                 lynx->iso_rcv.page[i] =
1584                         pci_alloc_consistent(dev, PAGE_SIZE,
1585                                              &lynx->iso_rcv.page_dma[i]);
1586                 if (lynx->iso_rcv.page[i] == NULL) {
1587                         FAIL("failed to allocate iso receive buffers");
1588                 }
1589         }
1590
1591         lynx->registers = ioremap_nocache(pci_resource_start(dev,0),
1592                                           PCILYNX_MAX_REGISTER);
1593         lynx->local_ram = ioremap(pci_resource_start(dev,1), PCILYNX_MAX_MEMORY);
1594         lynx->aux_port  = ioremap(pci_resource_start(dev,2), PCILYNX_MAX_MEMORY);
1595         lynx->local_rom = ioremap(pci_resource_start(dev,PCI_ROM_RESOURCE),
1596                                   PCILYNX_MAX_MEMORY);
1597         lynx->state = have_iomappings;
1598
1599         if (lynx->registers == NULL) {
1600                 FAIL("failed to remap registers - card not accessible");
1601         }
1602
1603 #ifdef CONFIG_IEEE1394_PCILYNX_LOCALRAM
1604         if (lynx->local_ram == NULL) {
1605                 FAIL("failed to remap local RAM which is required for "
1606                      "operation");
1607         }
1608 #endif
1609
1610         reg_set_bits(lynx, MISC_CONTROL, MISC_CONTROL_SWRESET);
1611         /* Fix buggy cards with autoboot pin not tied low: */
1612         reg_write(lynx, DMA0_CHAN_CTRL, 0);
1613
1614 #ifndef __sparc__
1615         sprintf (irq_buf, "%d", dev->irq);
1616 #else
1617         sprintf (irq_buf, "%s", __irq_itoa(dev->irq));
1618 #endif
1619
1620         if (!request_irq(dev->irq, lynx_irq_handler, SA_SHIRQ,
1621                          PCILYNX_DRIVER_NAME, lynx)) {
1622                 PRINT(KERN_INFO, lynx->id, "allocated interrupt %s", irq_buf);
1623                 lynx->state = have_intr;
1624         } else {
1625                 FAIL("failed to allocate shared interrupt %s", irq_buf);
1626         }
1627
1628         /* alloc_pcl return values are not checked, it is expected that the
1629          * provided PCL space is sufficient for the initial allocations */
1630 #ifdef CONFIG_IEEE1394_PCILYNX_PORTS
1631         if (lynx->aux_port != NULL) {
1632                 lynx->dmem_pcl = alloc_pcl(lynx);
1633                 aux_setup_pcls(lynx);
1634                 sema_init(&lynx->mem_dma_mutex, 1);
1635         }
1636 #endif
1637         lynx->rcv_pcl = alloc_pcl(lynx);
1638         lynx->rcv_pcl_start = alloc_pcl(lynx);
1639         lynx->async.pcl = alloc_pcl(lynx);
1640         lynx->async.pcl_start = alloc_pcl(lynx);
1641         lynx->iso_send.pcl = alloc_pcl(lynx);
1642         lynx->iso_send.pcl_start = alloc_pcl(lynx);
1643
1644         for (i = 0; i < NUM_ISORCV_PCL; i++) {
1645                 lynx->iso_rcv.pcl[i] = alloc_pcl(lynx);
1646         }
1647         lynx->iso_rcv.pcl_start = alloc_pcl(lynx);
1648
1649         /* all allocations successful - simple init stuff follows */
1650
1651         reg_write(lynx, PCI_INT_ENABLE, PCI_INT_DMA_ALL);
1652
1653 #ifdef CONFIG_IEEE1394_PCILYNX_PORTS
1654         reg_set_bits(lynx, PCI_INT_ENABLE, PCI_INT_AUX_INT);
1655         init_waitqueue_head(&lynx->mem_dma_intr_wait);
1656         init_waitqueue_head(&lynx->aux_intr_wait);
1657 #endif
1658
1659         tasklet_init(&lynx->iso_rcv.tq, (void (*)(unsigned long))iso_rcv_bh,
1660                      (unsigned long)lynx);
1661
1662         lynx->iso_rcv.lock = SPIN_LOCK_UNLOCKED;
1663
1664         lynx->async.queue_lock = SPIN_LOCK_UNLOCKED;
1665         lynx->async.channel = CHANNEL_ASYNC_SEND;
1666         lynx->iso_send.queue_lock = SPIN_LOCK_UNLOCKED;
1667         lynx->iso_send.channel = CHANNEL_ISO_SEND;
1668
1669         PRINT(KERN_INFO, lynx->id, "remapped memory spaces reg 0x%p, rom 0x%p, "
1670               "ram 0x%p, aux 0x%p", lynx->registers, lynx->local_rom,
1671               lynx->local_ram, lynx->aux_port);
1672
1673         /* now, looking for PHY register set */
1674         if ((get_phy_reg(lynx, 2) & 0xe0) == 0xe0) {
1675                 lynx->phyic.reg_1394a = 1;
1676                 PRINT(KERN_INFO, lynx->id,
1677                       "found 1394a conform PHY (using extended register set)");
1678                 lynx->phyic.vendor = get_phy_vendorid(lynx);
1679                 lynx->phyic.product = get_phy_productid(lynx);
1680         } else {
1681                 lynx->phyic.reg_1394a = 0;
1682                 PRINT(KERN_INFO, lynx->id, "found old 1394 PHY");
1683         }
1684
1685         lynx->selfid_size = -1;
1686         lynx->phy_reg0 = -1;
1687
1688         INIT_LIST_HEAD(&lynx->async.queue);
1689         INIT_LIST_HEAD(&lynx->async.pcl_queue);
1690         INIT_LIST_HEAD(&lynx->iso_send.queue);
1691         INIT_LIST_HEAD(&lynx->iso_send.pcl_queue);
1692
1693         pcl.next = pcl_bus(lynx, lynx->rcv_pcl);
1694         put_pcl(lynx, lynx->rcv_pcl_start, &pcl);
1695
1696         pcl.next = PCL_NEXT_INVALID;
1697         pcl.async_error_next = PCL_NEXT_INVALID;
1698
1699         pcl.buffer[0].control = PCL_CMD_RCV | 16;
1700 #ifdef __BIG_ENDIAN
1701         pcl.buffer[0].control |= PCL_BIGENDIAN;
1702 #endif
1703         pcl.buffer[1].control = PCL_LAST_BUFF | 4080;
1704
1705         pcl.buffer[0].pointer = lynx->rcv_page_dma;
1706         pcl.buffer[1].pointer = lynx->rcv_page_dma + 16;
1707         put_pcl(lynx, lynx->rcv_pcl, &pcl);
1708
1709         pcl.next = pcl_bus(lynx, lynx->async.pcl);
1710         pcl.async_error_next = pcl_bus(lynx, lynx->async.pcl);
1711         put_pcl(lynx, lynx->async.pcl_start, &pcl);
1712
1713         pcl.next = pcl_bus(lynx, lynx->iso_send.pcl);
1714         pcl.async_error_next = PCL_NEXT_INVALID;
1715         put_pcl(lynx, lynx->iso_send.pcl_start, &pcl);
1716
1717         pcl.next = PCL_NEXT_INVALID;
1718         pcl.async_error_next = PCL_NEXT_INVALID;
1719         pcl.buffer[0].control = PCL_CMD_RCV | 4;
1720 #ifndef __BIG_ENDIAN
1721         pcl.buffer[0].control |= PCL_BIGENDIAN;
1722 #endif
1723         pcl.buffer[1].control = PCL_LAST_BUFF | 2044;
1724
1725         for (i = 0; i < NUM_ISORCV_PCL; i++) {
1726                 int page = i / ISORCV_PER_PAGE;
1727                 int sec = i % ISORCV_PER_PAGE;
1728
1729                 pcl.buffer[0].pointer = lynx->iso_rcv.page_dma[page]
1730                         + sec * MAX_ISORCV_SIZE;
1731                 pcl.buffer[1].pointer = pcl.buffer[0].pointer + 4;
1732                 put_pcl(lynx, lynx->iso_rcv.pcl[i], &pcl);
1733         }
1734
1735         pcli = (u32 *)&pcl;
1736         for (i = 0; i < NUM_ISORCV_PCL; i++) {
1737                 pcli[i] = pcl_bus(lynx, lynx->iso_rcv.pcl[i]);
1738         }
1739         put_pcl(lynx, lynx->iso_rcv.pcl_start, &pcl);
1740
1741         /* FIFO sizes from left to right: ITF=48 ATF=48 GRF=160 */
1742         reg_write(lynx, FIFO_SIZES, 0x003030a0);
1743         /* 20 byte threshold before triggering PCI transfer */
1744         reg_write(lynx, DMA_GLOBAL_REGISTER, 0x2<<24);
1745         /* threshold on both send FIFOs before transmitting:
1746            FIFO size - cache line size - 1 */
1747         i = reg_read(lynx, PCI_LATENCY_CACHELINE) & 0xff;
1748         i = 0x30 - i - 1;
1749         reg_write(lynx, FIFO_XMIT_THRESHOLD, (i << 8) | i);
1750
1751         reg_set_bits(lynx, PCI_INT_ENABLE, PCI_INT_1394);
1752
1753         reg_write(lynx, LINK_INT_ENABLE, LINK_INT_PHY_TIMEOUT
1754                   | LINK_INT_PHY_REG_RCVD  | LINK_INT_PHY_BUSRESET
1755                   | LINK_INT_ISO_STUCK     | LINK_INT_ASYNC_STUCK
1756                   | LINK_INT_SENT_REJECT   | LINK_INT_TX_INVALID_TC
1757                   | LINK_INT_GRF_OVERFLOW  | LINK_INT_ITF_UNDERFLOW
1758                   | LINK_INT_ATF_UNDERFLOW);
1759
1760         reg_write(lynx, DMA_WORD0_CMP_VALUE(CHANNEL_ASYNC_RCV), 0);
1761         reg_write(lynx, DMA_WORD0_CMP_ENABLE(CHANNEL_ASYNC_RCV), 0xa<<4);
1762         reg_write(lynx, DMA_WORD1_CMP_VALUE(CHANNEL_ASYNC_RCV), 0);
1763         reg_write(lynx, DMA_WORD1_CMP_ENABLE(CHANNEL_ASYNC_RCV),
1764                   DMA_WORD1_CMP_MATCH_LOCAL_NODE | DMA_WORD1_CMP_MATCH_BROADCAST
1765                   | DMA_WORD1_CMP_MATCH_EXACT    | DMA_WORD1_CMP_MATCH_BUS_BCAST
1766                   | DMA_WORD1_CMP_ENABLE_SELF_ID | DMA_WORD1_CMP_ENABLE_MASTER);
1767
1768         run_pcl(lynx, lynx->rcv_pcl_start, CHANNEL_ASYNC_RCV);
1769
1770         reg_write(lynx, DMA_WORD0_CMP_VALUE(CHANNEL_ISO_RCV), 0);
1771         reg_write(lynx, DMA_WORD0_CMP_ENABLE(CHANNEL_ISO_RCV), 0x9<<4);
1772         reg_write(lynx, DMA_WORD1_CMP_VALUE(CHANNEL_ISO_RCV), 0);
1773         reg_write(lynx, DMA_WORD1_CMP_ENABLE(CHANNEL_ISO_RCV), 0);
1774
1775         run_sub_pcl(lynx, lynx->iso_rcv.pcl_start, 0, CHANNEL_ISO_RCV);
1776
1777         reg_write(lynx, LINK_CONTROL, LINK_CONTROL_RCV_CMP_VALID
1778                   | LINK_CONTROL_TX_ISO_EN   | LINK_CONTROL_RX_ISO_EN
1779                   | LINK_CONTROL_TX_ASYNC_EN | LINK_CONTROL_RX_ASYNC_EN
1780                   | LINK_CONTROL_RESET_TX    | LINK_CONTROL_RESET_RX);
1781
1782         if (!lynx->phyic.reg_1394a) {
1783                 /* attempt to enable contender bit -FIXME- would this work
1784                  * elsewhere? */
1785                 reg_set_bits(lynx, GPIO_CTRL_A, 0x1);
1786                 reg_write(lynx, GPIO_DATA_BASE + 0x3c, 0x1);
1787         } else {
1788                 /* set the contender and LCtrl bit in the extended PHY register
1789                  * set. (Should check that bis 0,1,2 (=0xE0) is set
1790                  * in register 2?)
1791                  */
1792                 i = get_phy_reg(lynx, 4);
1793                 if (i != -1) set_phy_reg(lynx, 4, i | 0xc0);
1794         }
1795
1796
1797         if (!skip_eeprom)
1798         {
1799                 i2c_adapter = bit_ops;
1800                 i2c_adapter_data = bit_data;
1801                 i2c_adapter.algo_data = &i2c_adapter_data;
1802                 i2c_adapter_data.data = lynx;
1803
1804                 PRINTD(KERN_DEBUG, lynx->id,"original eeprom control: %d",
1805                        reg_read(lynx, SERIAL_EEPROM_CONTROL));
1806
1807                 /* reset hardware to sane state */
1808                 lynx->i2c_driven_state = 0x00000070;
1809                 reg_write(lynx, SERIAL_EEPROM_CONTROL, lynx->i2c_driven_state);
1810
1811                 if (i2c_bit_add_bus(&i2c_adapter) < 0)
1812                 {
1813                         error = -ENXIO;
1814                         FAIL("unable to register i2c");
1815                 }
1816                 else
1817                 {
1818                         /* do i2c stuff */
1819                         unsigned char i2c_cmd = 0x10;
1820                         struct i2c_msg msg[2] = { { 0x50, 0, 1, &i2c_cmd },
1821                                                   { 0x50, I2C_M_RD, 20, (unsigned char*) lynx->bus_info_block }
1822                                                 };
1823
1824
1825 #ifdef CONFIG_IEEE1394_VERBOSEDEBUG
1826                         union i2c_smbus_data data;
1827
1828                         if (i2c_smbus_xfer(&i2c_adapter, 80, 0, I2C_SMBUS_WRITE, 0, I2C_SMBUS_BYTE,NULL))
1829                                 PRINT(KERN_ERR, lynx->id,"eeprom read start has failed");
1830                         else
1831                         {
1832                                 u16 addr;
1833                                 for (addr=0x00; addr < 0x100; addr++) {
1834                                         if (i2c_smbus_xfer(&i2c_adapter, 80, 0, I2C_SMBUS_READ, 0, I2C_SMBUS_BYTE,& data)) {
1835                                                 PRINT(KERN_ERR, lynx->id, "unable to read i2c %x", addr);
1836                                                 break;
1837                                         }
1838                                         else
1839                                                 PRINT(KERN_DEBUG, lynx->id,"got serial eeprom data at %x: %x",addr, data.byte);
1840                                 }
1841                         }
1842 #endif
1843
1844                         /* we use i2c_transfer, because i2c_smbus_read_block_data does not work properly and we
1845                            do it more efficiently in one transaction rather then using several reads */
1846                         if (i2c_transfer(&i2c_adapter, msg, 2) < 0) {
1847                                 PRINT(KERN_ERR, lynx->id, "unable to read bus info block from i2c");
1848                         } else {
1849                                 int i;
1850
1851                                 PRINT(KERN_INFO, lynx->id, "got bus info block from serial eeprom");
1852                                 /* FIXME: probably we shoud rewrite the max_rec, max_ROM(1394a),
1853                                  * generation(1394a) and link_spd(1394a) field and recalculate
1854                                  * the CRC */
1855
1856                                 for (i = 0; i < 5 ; i++)
1857                                         PRINTD(KERN_DEBUG, lynx->id, "Businfo block quadlet %i: %08x",
1858                                                i, be32_to_cpu(lynx->bus_info_block[i]));
1859
1860                                 /* info_length, crc_length and 1394 magic number to check, if it is really a bus info block */
1861                                 if (((be32_to_cpu(lynx->bus_info_block[0]) & 0xffff0000) == 0x04040000) &&
1862                                     (lynx->bus_info_block[1] == __constant_cpu_to_be32(0x31333934)))
1863                                 {
1864                                         PRINT(KERN_DEBUG, lynx->id, "read a valid bus info block from");
1865                                 } else {
1866                                         error = -ENXIO;
1867                                         FAIL("read something from serial eeprom, but it does not seem to be a valid bus info block");
1868                                 }
1869
1870                         }
1871
1872                         i2c_bit_del_bus(&i2c_adapter);
1873                 }
1874         }
1875
1876         host->csr.guid_hi = be32_to_cpu(lynx->bus_info_block[3]);
1877         host->csr.guid_lo = be32_to_cpu(lynx->bus_info_block[4]);
1878         host->csr.cyc_clk_acc = (be32_to_cpu(lynx->bus_info_block[2]) >> 16) & 0xff;
1879         host->csr.max_rec = (be32_to_cpu(lynx->bus_info_block[2]) >> 12) & 0xf;
1880         if (!lynx->phyic.reg_1394a)
1881                 host->csr.lnk_spd = (get_phy_reg(lynx, 2) & 0xc0) >> 6;
1882         else
1883                 host->csr.lnk_spd = be32_to_cpu(lynx->bus_info_block[2]) & 0x7;
1884
1885         if (hpsb_add_host(host)) {
1886                 error = -ENOMEM;
1887                 FAIL("Failed to register host with highlevel");
1888         }
1889
1890         lynx->state = is_host;
1891
1892         return 0;
1893 #undef FAIL
1894 }
1895
1896
1897 static struct pci_device_id pci_table[] = {
1898         {
1899                 .vendor =    PCI_VENDOR_ID_TI,
1900                 .device =    PCI_DEVICE_ID_TI_PCILYNX,
1901                 .subvendor = PCI_ANY_ID,
1902                 .subdevice = PCI_ANY_ID,
1903         },
1904         { }                     /* Terminating entry */
1905 };
1906
1907 static struct pci_driver lynx_pci_driver = {
1908         .name =     PCILYNX_DRIVER_NAME,
1909         .id_table = pci_table,
1910         .probe =    add_card,
1911         .remove =   remove_card,
1912 };
1913
1914 static struct hpsb_host_driver lynx_driver = {
1915         .owner =           THIS_MODULE,
1916         .name =            PCILYNX_DRIVER_NAME,
1917         .set_hw_config_rom = NULL,
1918         .transmit_packet = lynx_transmit,
1919         .devctl =          lynx_devctl,
1920         .isoctl =          NULL,
1921 };
1922
1923 MODULE_AUTHOR("Andreas E. Bombe <andreas.bombe@munich.netsurf.de>");
1924 MODULE_DESCRIPTION("driver for Texas Instruments PCI Lynx IEEE-1394 controller");
1925 MODULE_LICENSE("GPL");
1926 MODULE_SUPPORTED_DEVICE("pcilynx");
1927 MODULE_DEVICE_TABLE(pci, pci_table);
1928
1929 static int __init pcilynx_init(void)
1930 {
1931         int ret;
1932
1933 #ifdef CONFIG_IEEE1394_PCILYNX_PORTS
1934         if (register_chrdev(PCILYNX_MAJOR, PCILYNX_DRIVER_NAME, &aux_ops)) {
1935                 PRINT_G(KERN_ERR, "allocation of char major number %d failed",
1936                         PCILYNX_MAJOR);
1937                 return -EBUSY;
1938         }
1939 #endif
1940
1941         ret = pci_module_init(&lynx_pci_driver);
1942         if (ret < 0) {
1943                 PRINT_G(KERN_ERR, "PCI module init failed");
1944                 goto free_char_dev;
1945         }
1946
1947         return 0;
1948
1949  free_char_dev:
1950 #ifdef CONFIG_IEEE1394_PCILYNX_PORTS
1951         unregister_chrdev(PCILYNX_MAJOR, PCILYNX_DRIVER_NAME);
1952 #endif
1953
1954         return ret;
1955 }
1956
1957 static void __exit pcilynx_cleanup(void)
1958 {
1959         pci_unregister_driver(&lynx_pci_driver);
1960
1961 #ifdef CONFIG_IEEE1394_PCILYNX_PORTS
1962         unregister_chrdev(PCILYNX_MAJOR, PCILYNX_DRIVER_NAME);
1963 #endif
1964 }
1965
1966
1967 module_init(pcilynx_init);
1968 module_exit(pcilynx_cleanup);