drivers/ieee1394/video1394.c

   1 /*
   2  * video1394.c - video driver for OHCI 1394 boards
   3  * Copyright (C)1999,2000 Sebastien Rougeaux <sebastien.rougeaux@anu.edu.au>
   4  *                        Peter Schlaile <udbz@rz.uni-karlsruhe.de>
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; either version 2 of the License, or
   9  * (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, write to the Free Software Foundation,
  18  * Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  19  */
  20
  21 /* jds -- add private data to file to keep track of iso contexts associated
  22    with each open -- so release won't kill all iso transfers */
  23
  24 /* Damien Douxchamps: Fix failure when the number of DMA pages per frame is
  25    one */
  26
  27 #include <linux/config.h>
  28 #include <linux/kernel.h>
  29 #include <linux/list.h>
  30 #include <linux/slab.h>
  31 #include <linux/interrupt.h>
  32 #include <linux/wait.h>
  33 #include <linux/errno.h>
  34 #include <linux/module.h>
  35 #include <linux/init.h>
  36 #include <linux/pci.h>
  37 #include <linux/fs.h>
  38 #include <linux/poll.h>
  39 #include <linux/smp_lock.h>
  40 #include <linux/delay.h>
  41 #include <linux/devfs_fs_kernel.h>
  42 #include <linux/bitops.h>
  43 #include <linux/types.h>
  44 #include <linux/vmalloc.h>
  45 #include <linux/timex.h>
  46 #include <linux/mm.h>
  47 #include <linux/ioctl32.h>
  48 #include <linux/compat.h>
  49 #include <linux/cdev.h>
  50
  51 #include "ieee1394.h"
  52 #include "ieee1394_types.h"
  53 #include "hosts.h"
  54 #include "ieee1394_core.h"
  55 #include "highlevel.h"
  56 #include "video1394.h"
  57 #include "nodemgr.h"
  58 #include "dma.h"
  59
  60 #include "ohci1394.h"
  61
  62 #define ISO_CHANNELS 64
  63
  64 #ifndef virt_to_page
  65 #define virt_to_page(x) MAP_NR(x)
  66 #endif
  67
  68 #ifndef vmalloc_32
  69 #define vmalloc_32(x) vmalloc(x)
  70 #endif
  71
  72 struct it_dma_prg {
  73         struct dma_cmd begin;
  74         quadlet_t data[4];
  75         struct dma_cmd end;
  76         quadlet_t pad[4]; /* FIXME: quick hack for memory alignment */
  77 };
  78
  79 struct dma_iso_ctx {
  80         struct ti_ohci *ohci;
  81         int type; /* OHCI_ISO_TRANSMIT or OHCI_ISO_RECEIVE */
  82         struct ohci1394_iso_tasklet iso_tasklet;
  83         int channel;
  84         int ctx;
  85         int last_buffer;
  86         int * next_buffer;  /* For ISO Transmit of video packets
  87                                to write the correct SYT field
  88                                into the next block */
  89         unsigned int num_desc;
  90         unsigned int buf_size;
  91         unsigned int frame_size;
  92         unsigned int packet_size;
  93         unsigned int left_size;
  94         unsigned int nb_cmd;
  95
  96         struct dma_region dma;
  97
  98         struct dma_prog_region *prg_reg;
  99
 100         struct dma_cmd **ir_prg;
 101         struct it_dma_prg **it_prg;
 102
 103         unsigned int *buffer_status;
 104         struct timeval *buffer_time; /* time when the buffer was received */
 105         unsigned int *last_used_cmd; /* For ISO Transmit with
 106                                         variable sized packets only ! */
 107         int ctrlClear;
 108         int ctrlSet;
 109         int cmdPtr;
 110         int ctxMatch;
 111         wait_queue_head_t waitq;
 112         spinlock_t lock;
 113         unsigned int syt_offset;
 114         int flags;
 115
 116         struct list_head link;
 117 };
 118
 119
 120 struct file_ctx {
 121         struct ti_ohci *ohci;
 122         struct list_head context_list;
 123         struct dma_iso_ctx *current_ctx;
 124 };
 125
 126 #ifdef CONFIG_IEEE1394_VERBOSEDEBUG
 127 #define VIDEO1394_DEBUG
 128 #endif
 129
 130 #ifdef DBGMSG
 131 #undef DBGMSG
 132 #endif
 133
 134 #ifdef VIDEO1394_DEBUG
 135 #define DBGMSG(card, fmt, args...) \
 136 printk(KERN_INFO "video1394_%d: " fmt "\n" , card , ## args)
 137 #else
 138 #define DBGMSG(card, fmt, args...)
 139 #endif
 140
 141 /* print general (card independent) information */
 142 #define PRINT_G(level, fmt, args...) \
 143 printk(level "video1394: " fmt "\n" , ## args)
 144
 145 /* print card specific information */
 146 #define PRINT(level, card, fmt, args...) \
 147 printk(level "video1394_%d: " fmt "\n" , card , ## args)
 148
 149 void wakeup_dma_ir_ctx(unsigned long l);
 150 void wakeup_dma_it_ctx(unsigned long l);
 151
 152 static struct hpsb_highlevel video1394_highlevel;
 153
 154 static int free_dma_iso_ctx(struct dma_iso_ctx *d)
 155 {
 156         int i;
 157
 158         DBGMSG(d->ohci->host->id, "Freeing dma_iso_ctx %d", d->ctx);
 159
 160         ohci1394_stop_context(d->ohci, d->ctrlClear, NULL);
 161         if (d->iso_tasklet.link.next != NULL)
 162                 ohci1394_unregister_iso_tasklet(d->ohci, &d->iso_tasklet);
 163
 164         dma_region_free(&d->dma);
 165
 166         if (d->prg_reg) {
 167                 for (i = 0; i < d->num_desc; i++)
 168                         dma_prog_region_free(&d->prg_reg[i]);
 169                 kfree(d->prg_reg);
 170         }
 171
 172         if (d->ir_prg)
 173                 kfree(d->ir_prg);
 174
 175         if (d->it_prg)
 176                 kfree(d->it_prg);
 177
 178         if (d->buffer_status)
 179                 kfree(d->buffer_status);
 180         if (d->buffer_time)
 181                 kfree(d->buffer_time);
 182         if (d->last_used_cmd)
 183                 kfree(d->last_used_cmd);
 184         if (d->next_buffer)
 185                 kfree(d->next_buffer);
 186
 187         list_del(&d->link);
 188
 189         kfree(d);
 190
 191         return 0;
 192 }
 193
 194 static struct dma_iso_ctx *
 195 alloc_dma_iso_ctx(struct ti_ohci *ohci, int type, int num_desc,
 196                   int buf_size, int channel, unsigned int packet_size)
 197 {
 198         struct dma_iso_ctx *d;
 199         int i;
 200
 201         d = kmalloc(sizeof(struct dma_iso_ctx), GFP_KERNEL);
 202         if (d == NULL) {
 203                 PRINT(KERN_ERR, ohci->host->id, "Failed to allocate dma_iso_ctx");
 204                 return NULL;
 205         }
 206
 207         memset(d, 0, sizeof *d);
 208
 209         d->ohci = ohci;
 210         d->type = type;
 211         d->channel = channel;
 212         d->num_desc = num_desc;
 213         d->frame_size = buf_size;
 214         d->buf_size = PAGE_ALIGN(buf_size);
 215         d->last_buffer = -1;
 216         INIT_LIST_HEAD(&d->link);
 217         init_waitqueue_head(&d->waitq);
 218
 219         /* Init the regions for easy cleanup */
 220         dma_region_init(&d->dma);
 221
 222         if (dma_region_alloc(&d->dma, d->num_desc * d->buf_size, ohci->dev,
 223                              PCI_DMA_BIDIRECTIONAL)) {
 224                 PRINT(KERN_ERR, ohci->host->id, "Failed to allocate dma buffer");
 225                 free_dma_iso_ctx(d);
 226                 return NULL;
 227         }
 228
 229         if (type == OHCI_ISO_RECEIVE)
 230                 ohci1394_init_iso_tasklet(&d->iso_tasklet, type,
 231                                           wakeup_dma_ir_ctx,
 232                                           (unsigned long) d);
 233         else
 234                 ohci1394_init_iso_tasklet(&d->iso_tasklet, type,
 235                                           wakeup_dma_it_ctx,
 236                                           (unsigned long) d);
 237
 238         if (ohci1394_register_iso_tasklet(ohci, &d->iso_tasklet) < 0) {
 239                 PRINT(KERN_ERR, ohci->host->id, "no free iso %s contexts",
 240                       type == OHCI_ISO_RECEIVE ? "receive" : "transmit");
 241                 free_dma_iso_ctx(d);
 242                 return NULL;
 243         }
 244         d->ctx = d->iso_tasklet.context;
 245
 246         d->prg_reg = kmalloc(d->num_desc * sizeof(struct dma_prog_region),
 247                         GFP_KERNEL);
 248         if (d->prg_reg == NULL) {
 249                 PRINT(KERN_ERR, ohci->host->id, "Failed to allocate ir prg regs");
 250                 free_dma_iso_ctx(d);
 251                 return NULL;
 252         }
 253         /* Makes for easier cleanup */
 254         for (i = 0; i < d->num_desc; i++)
 255                 dma_prog_region_init(&d->prg_reg[i]);
 256
 257         if (type == OHCI_ISO_RECEIVE) {
 258                 d->ctrlSet = OHCI1394_IsoRcvContextControlSet+32*d->ctx;
 259                 d->ctrlClear = OHCI1394_IsoRcvContextControlClear+32*d->ctx;
 260                 d->cmdPtr = OHCI1394_IsoRcvCommandPtr+32*d->ctx;
 261                 d->ctxMatch = OHCI1394_IsoRcvContextMatch+32*d->ctx;
 262
 263                 d->ir_prg = kmalloc(d->num_desc * sizeof(struct dma_cmd *),
 264                                     GFP_KERNEL);
 265
 266                 if (d->ir_prg == NULL) {
 267                         PRINT(KERN_ERR, ohci->host->id, "Failed to allocate dma ir prg");
 268                         free_dma_iso_ctx(d);
 269                         return NULL;
 270                 }
 271                 memset(d->ir_prg, 0, d->num_desc * sizeof(struct dma_cmd *));
 272
 273                 d->nb_cmd = d->buf_size / PAGE_SIZE + 1;
 274                 d->left_size = (d->frame_size % PAGE_SIZE) ?
 275                         d->frame_size % PAGE_SIZE : PAGE_SIZE;
 276
 277                 for (i = 0;i < d->num_desc; i++) {
 278                         if (dma_prog_region_alloc(&d->prg_reg[i], d->nb_cmd *
 279                                                   sizeof(struct dma_cmd), ohci->dev)) {
 280                                 PRINT(KERN_ERR, ohci->host->id, "Failed to allocate dma ir prg");
 281                                 free_dma_iso_ctx(d);
 282                                 return NULL;
 283                         }
 284                         d->ir_prg[i] = (struct dma_cmd *)d->prg_reg[i].kvirt;
 285                 }
 286
 287         } else {  /* OHCI_ISO_TRANSMIT */
 288                 d->ctrlSet = OHCI1394_IsoXmitContextControlSet+16*d->ctx;
 289                 d->ctrlClear = OHCI1394_IsoXmitContextControlClear+16*d->ctx;
 290                 d->cmdPtr = OHCI1394_IsoXmitCommandPtr+16*d->ctx;
 291
 292                 d->it_prg = kmalloc(d->num_desc * sizeof(struct it_dma_prg *),
 293                                     GFP_KERNEL);
 294
 295                 if (d->it_prg == NULL) {
 296                         PRINT(KERN_ERR, ohci->host->id,
 297                               "Failed to allocate dma it prg");
 298                         free_dma_iso_ctx(d);
 299                         return NULL;
 300                 }
 301                 memset(d->it_prg, 0, d->num_desc*sizeof(struct it_dma_prg *));
 302
 303                 d->packet_size = packet_size;
 304
 305                 if (PAGE_SIZE % packet_size || packet_size>4096) {
 306                         PRINT(KERN_ERR, ohci->host->id,
 307                               "Packet size %d (page_size: %ld) "
 308                               "not yet supported\n",
 309                               packet_size, PAGE_SIZE);
 310                         free_dma_iso_ctx(d);
 311                         return NULL;
 312                 }
 313
 314                 d->nb_cmd = d->frame_size / d->packet_size;
 315                 if (d->frame_size % d->packet_size) {
 316                         d->nb_cmd++;
 317                         d->left_size = d->frame_size % d->packet_size;
 318                 } else
 319                         d->left_size = d->packet_size;
 320
 321                 for (i = 0; i < d->num_desc; i++) {
 322                         if (dma_prog_region_alloc(&d->prg_reg[i], d->nb_cmd *
 323                                                 sizeof(struct it_dma_prg), ohci->dev)) {
 324                                 PRINT(KERN_ERR, ohci->host->id, "Failed to allocate dma it prg");
 325                                 free_dma_iso_ctx(d);
 326                                 return NULL;
 327                         }
 328                         d->it_prg[i] = (struct it_dma_prg *)d->prg_reg[i].kvirt;
 329                 }
 330         }
 331
 332         d->buffer_status = kmalloc(d->num_desc * sizeof(unsigned int),
 333                                    GFP_KERNEL);
 334         d->buffer_time = kmalloc(d->num_desc * sizeof(struct timeval),
 335                                    GFP_KERNEL);
 336         d->last_used_cmd = kmalloc(d->num_desc * sizeof(unsigned int),
 337                                    GFP_KERNEL);
 338         d->next_buffer = kmalloc(d->num_desc * sizeof(int),
 339                                  GFP_KERNEL);
 340
 341         if (d->buffer_status == NULL) {
 342                 PRINT(KERN_ERR, ohci->host->id, "Failed to allocate buffer_status");
 343                 free_dma_iso_ctx(d);
 344                 return NULL;
 345         }
 346         if (d->buffer_time == NULL) {
 347                 PRINT(KERN_ERR, ohci->host->id, "Failed to allocate buffer_time");
 348                 free_dma_iso_ctx(d);
 349                 return NULL;
 350         }
 351         if (d->last_used_cmd == NULL) {
 352                 PRINT(KERN_ERR, ohci->host->id, "Failed to allocate last_used_cmd");
 353                 free_dma_iso_ctx(d);
 354                 return NULL;
 355         }
 356         if (d->next_buffer == NULL) {
 357                 PRINT(KERN_ERR, ohci->host->id, "Failed to allocate next_buffer");
 358                 free_dma_iso_ctx(d);
 359                 return NULL;
 360         }
 361         memset(d->buffer_status, 0, d->num_desc * sizeof(unsigned int));
 362         memset(d->buffer_time, 0, d->num_desc * sizeof(struct timeval));
 363         memset(d->last_used_cmd, 0, d->num_desc * sizeof(unsigned int));
 364         memset(d->next_buffer, -1, d->num_desc * sizeof(int));
 365
 366         spin_lock_init(&d->lock);
 367
 368         PRINT(KERN_INFO, ohci->host->id, "Iso %s DMA: %d buffers "
 369               "of size %d allocated for a frame size %d, each with %d prgs",
 370               (type == OHCI_ISO_RECEIVE) ? "receive" : "transmit",
 371               d->num_desc, d->buf_size, d->frame_size, d->nb_cmd);
 372
 373         return d;
 374 }
 375
 376 static void reset_ir_status(struct dma_iso_ctx *d, int n)
 377 {
 378         int i;
 379         d->ir_prg[n][0].status = cpu_to_le32(4);
 380         d->ir_prg[n][1].status = cpu_to_le32(PAGE_SIZE-4);
 381         for (i = 2; i < d->nb_cmd - 1; i++)
 382                 d->ir_prg[n][i].status = cpu_to_le32(PAGE_SIZE);
 383         d->ir_prg[n][i].status = cpu_to_le32(d->left_size);
 384 }
 385
 386 static void initialize_dma_ir_prg(struct dma_iso_ctx *d, int n, int flags)
 387 {
 388         struct dma_cmd *ir_prg = d->ir_prg[n];
 389         struct dma_prog_region *ir_reg = &d->prg_reg[n];
 390         unsigned long buf = (unsigned long)d->dma.kvirt + n * d->buf_size;
 391         int i;
 392
 393         /* the first descriptor will read only 4 bytes */
 394         ir_prg[0].control = cpu_to_le32(DMA_CTL_INPUT_MORE | DMA_CTL_UPDATE |
 395                 DMA_CTL_BRANCH | 4);
 396
 397         /* set the sync flag */
 398         if (flags & VIDEO1394_SYNC_FRAMES)
 399                 ir_prg[0].control |= cpu_to_le32(DMA_CTL_WAIT);
 400
 401         ir_prg[0].address = cpu_to_le32(dma_region_offset_to_bus(&d->dma, buf -
 402                                 (unsigned long)d->dma.kvirt));
 403         ir_prg[0].branchAddress = cpu_to_le32((dma_prog_region_offset_to_bus(ir_reg,
 404                                         1 * sizeof(struct dma_cmd)) & 0xfffffff0) | 0x1);
 405
 406         /* If there is *not* only one DMA page per frame (hence, d->nb_cmd==2) */
 407         if (d->nb_cmd > 2) {
 408                 /* The second descriptor will read PAGE_SIZE-4 bytes */
 409                 ir_prg[1].control = cpu_to_le32(DMA_CTL_INPUT_MORE | DMA_CTL_UPDATE |
 410                                                 DMA_CTL_BRANCH | (PAGE_SIZE-4));
 411                 ir_prg[1].address = cpu_to_le32(dma_region_offset_to_bus(&d->dma, (buf + 4) -
 412                                                 (unsigned long)d->dma.kvirt));
 413                 ir_prg[1].branchAddress = cpu_to_le32((dma_prog_region_offset_to_bus(ir_reg,
 414                                                       2 * sizeof(struct dma_cmd)) & 0xfffffff0) | 0x1);
 415
 416                 for (i = 2; i < d->nb_cmd - 1; i++) {
 417                         ir_prg[i].control = cpu_to_le32(DMA_CTL_INPUT_MORE | DMA_CTL_UPDATE |
 418                                                         DMA_CTL_BRANCH | PAGE_SIZE);
 419                         ir_prg[i].address = cpu_to_le32(dma_region_offset_to_bus(&d->dma,
 420                                                         (buf+(i-1)*PAGE_SIZE) -
 421                                                         (unsigned long)d->dma.kvirt));
 422
 423                         ir_prg[i].branchAddress =
 424                                 cpu_to_le32((dma_prog_region_offset_to_bus(ir_reg,
 425                                             (i + 1) * sizeof(struct dma_cmd)) & 0xfffffff0) | 0x1);
 426                 }
 427
 428                 /* The last descriptor will generate an interrupt */
 429                 ir_prg[i].control = cpu_to_le32(DMA_CTL_INPUT_MORE | DMA_CTL_UPDATE |
 430                                                 DMA_CTL_IRQ | DMA_CTL_BRANCH | d->left_size);
 431                 ir_prg[i].address = cpu_to_le32(dma_region_offset_to_bus(&d->dma,
 432                                                 (buf+(i-1)*PAGE_SIZE) -
 433                                                 (unsigned long)d->dma.kvirt));
 434         } else {
 435                 /* Only one DMA page is used. Read d->left_size immediately and */
 436                 /* generate an interrupt as this is also the last page. */
 437                 ir_prg[1].control = cpu_to_le32(DMA_CTL_INPUT_MORE | DMA_CTL_UPDATE |
 438                                                 DMA_CTL_IRQ | DMA_CTL_BRANCH | (d->left_size-4));
 439                 ir_prg[1].address = cpu_to_le32(dma_region_offset_to_bus(&d->dma,
 440                                                 (buf + 4) - (unsigned long)d->dma.kvirt));
 441         }
 442 }
 443
 444 static void initialize_dma_ir_ctx(struct dma_iso_ctx *d, int tag, int flags)
 445 {
 446         struct ti_ohci *ohci = (struct ti_ohci *)d->ohci;
 447         int i;
 448
 449         d->flags = flags;
 450
 451         ohci1394_stop_context(ohci, d->ctrlClear, NULL);
 452
 453         for (i=0;i<d->num_desc;i++) {
 454                 initialize_dma_ir_prg(d, i, flags);
 455                 reset_ir_status(d, i);
 456         }
 457
 458         /* reset the ctrl register */
 459         reg_write(ohci, d->ctrlClear, 0xf0000000);
 460
 461         /* Set bufferFill */
 462         reg_write(ohci, d->ctrlSet, 0x80000000);
 463
 464         /* Set isoch header */
 465         if (flags & VIDEO1394_INCLUDE_ISO_HEADERS)
 466                 reg_write(ohci, d->ctrlSet, 0x40000000);
 467
 468         /* Set the context match register to match on all tags,
 469            sync for sync tag, and listen to d->channel */
 470         reg_write(ohci, d->ctxMatch, 0xf0000000|((tag&0xf)<<8)|d->channel);
 471
 472         /* Set up isoRecvIntMask to generate interrupts */
 473         reg_write(ohci, OHCI1394_IsoRecvIntMaskSet, 1<<d->ctx);
 474 }
 475
 476 /* find which context is listening to this channel */
 477 static struct dma_iso_ctx *
 478 find_ctx(struct list_head *list, int type, int channel)
 479 {
 480         struct dma_iso_ctx *ctx;
 481
 482         list_for_each_entry(ctx, list, link) {
 483                 if (ctx->type == type && ctx->channel == channel)
 484                         return ctx;
 485         }
 486
 487         return NULL;
 488 }
 489
 490 void wakeup_dma_ir_ctx(unsigned long l)
 491 {
 492         struct dma_iso_ctx *d = (struct dma_iso_ctx *) l;
 493         int i;
 494
 495         spin_lock(&d->lock);
 496
 497         for (i = 0; i < d->num_desc; i++) {
 498                 if (d->ir_prg[i][d->nb_cmd-1].status & cpu_to_le32(0xFFFF0000)) {
 499                         reset_ir_status(d, i);
 500                         d->buffer_status[i] = VIDEO1394_BUFFER_READY;
 501                         do_gettimeofday(&d->buffer_time[i]);
 502                 }
 503         }
 504
 505         spin_unlock(&d->lock);
 506
 507         if (waitqueue_active(&d->waitq))
 508                 wake_up_interruptible(&d->waitq);
 509 }
 510
 511 static inline void put_timestamp(struct ti_ohci *ohci, struct dma_iso_ctx * d,
 512                                  int n)
 513 {
 514         unsigned char* buf = d->dma.kvirt + n * d->buf_size;
 515         u32 cycleTimer;
 516         u32 timeStamp;
 517
 518         if (n == -1) {
 519           return;
 520         }
 521
 522         cycleTimer = reg_read(ohci, OHCI1394_IsochronousCycleTimer);
 523
 524         timeStamp = ((cycleTimer & 0x0fff) + d->syt_offset); /* 11059 = 450 us */
 525         timeStamp = (timeStamp % 3072 + ((timeStamp / 3072) << 12)
 526                 + (cycleTimer & 0xf000)) & 0xffff;
 527
 528         buf[6] = timeStamp >> 8;
 529         buf[7] = timeStamp & 0xff;
 530
 531     /* if first packet is empty packet, then put timestamp into the next full one too */
 532     if ( (le32_to_cpu(d->it_prg[n][0].data[1]) >>16) == 0x008) {
 533             buf += d->packet_size;
 534         buf[6] = timeStamp >> 8;
 535             buf[7] = timeStamp & 0xff;
 536         }
 537
 538     /* do the next buffer frame too in case of irq latency */
 539         n = d->next_buffer[n];
 540         if (n == -1) {
 541           return;
 542         }
 543         buf = d->dma.kvirt + n * d->buf_size;
 544
 545         timeStamp += (d->last_used_cmd[n] << 12) & 0xffff;
 546
 547         buf[6] = timeStamp >> 8;
 548         buf[7] = timeStamp & 0xff;
 549
 550     /* if first packet is empty packet, then put timestamp into the next full one too */
 551     if ( (le32_to_cpu(d->it_prg[n][0].data[1]) >>16) == 0x008) {
 552             buf += d->packet_size;
 553         buf[6] = timeStamp >> 8;
 554             buf[7] = timeStamp & 0xff;
 555         }
 556
 557 #if 0
 558         printk("curr: %d, next: %d, cycleTimer: %08x timeStamp: %08x\n",
 559                curr, n, cycleTimer, timeStamp);
 560 #endif
 561 }
 562
 563 void wakeup_dma_it_ctx(unsigned long l)
 564 {
 565         struct dma_iso_ctx *d = (struct dma_iso_ctx *) l;
 566         struct ti_ohci *ohci = d->ohci;
 567         int i;
 568
 569         spin_lock(&d->lock);
 570
 571         for (i = 0; i < d->num_desc; i++) {
 572                 if (d->it_prg[i][d->last_used_cmd[i]].end.status &
 573                     cpu_to_le32(0xFFFF0000)) {
 574                         int next = d->next_buffer[i];
 575                         put_timestamp(ohci, d, next);
 576                         d->it_prg[i][d->last_used_cmd[i]].end.status = 0;
 577                         d->buffer_status[i] = VIDEO1394_BUFFER_READY;
 578                 }
 579         }
 580
 581         spin_unlock(&d->lock);
 582
 583         if (waitqueue_active(&d->waitq))
 584                 wake_up_interruptible(&d->waitq);
 585 }
 586
 587 static void initialize_dma_it_prg(struct dma_iso_ctx *d, int n, int sync_tag)
 588 {
 589         struct it_dma_prg *it_prg = d->it_prg[n];
 590         struct dma_prog_region *it_reg = &d->prg_reg[n];
 591         unsigned long buf = (unsigned long)d->dma.kvirt + n * d->buf_size;
 592         int i;
 593         d->last_used_cmd[n] = d->nb_cmd - 1;
 594         for (i=0;i<d->nb_cmd;i++) {
 595
 596                 it_prg[i].begin.control = cpu_to_le32(DMA_CTL_OUTPUT_MORE |
 597                         DMA_CTL_IMMEDIATE | 8) ;
 598                 it_prg[i].begin.address = 0;
 599
 600                 it_prg[i].begin.status = 0;
 601
 602                 it_prg[i].data[0] = cpu_to_le32(
 603                         (IEEE1394_SPEED_100 << 16)
 604                         | (/* tag */ 1 << 14)
 605                         | (d->channel << 8)
 606                         | (TCODE_ISO_DATA << 4));
 607                 if (i==0) it_prg[i].data[0] |= cpu_to_le32(sync_tag);
 608                 it_prg[i].data[1] = cpu_to_le32(d->packet_size << 16);
 609                 it_prg[i].data[2] = 0;
 610                 it_prg[i].data[3] = 0;
 611
 612                 it_prg[i].end.control = cpu_to_le32(DMA_CTL_OUTPUT_LAST |
 613                                              DMA_CTL_BRANCH);
 614                 it_prg[i].end.address =
 615                         cpu_to_le32(dma_region_offset_to_bus(&d->dma, (buf+i*d->packet_size) -
 616                                                 (unsigned long)d->dma.kvirt));
 617
 618                 if (i<d->nb_cmd-1) {
 619                         it_prg[i].end.control |= cpu_to_le32(d->packet_size);
 620                         it_prg[i].begin.branchAddress =
 621                                 cpu_to_le32((dma_prog_region_offset_to_bus(it_reg, (i + 1) *
 622                                         sizeof(struct it_dma_prg)) & 0xfffffff0) | 0x3);
 623                         it_prg[i].end.branchAddress =
 624                                 cpu_to_le32((dma_prog_region_offset_to_bus(it_reg, (i + 1) *
 625                                         sizeof(struct it_dma_prg)) & 0xfffffff0) | 0x3);
 626                 } else {
 627                         /* the last prg generates an interrupt */
 628                         it_prg[i].end.control |= cpu_to_le32(DMA_CTL_UPDATE |
 629                                 DMA_CTL_IRQ | d->left_size);
 630                         /* the last prg doesn't branch */
 631                         it_prg[i].begin.branchAddress = 0;
 632                         it_prg[i].end.branchAddress = 0;
 633                 }
 634                 it_prg[i].end.status = 0;
 635         }
 636 }
 637
 638 static void initialize_dma_it_prg_var_packet_queue(
 639         struct dma_iso_ctx *d, int n, unsigned int * packet_sizes,
 640         struct ti_ohci *ohci)
 641 {
 642         struct it_dma_prg *it_prg = d->it_prg[n];
 643         struct dma_prog_region *it_reg = &d->prg_reg[n];
 644         int i;
 645
 646 #if 0
 647         if (n != -1) {
 648                 put_timestamp(ohci, d, n);
 649         }
 650 #endif
 651         d->last_used_cmd[n] = d->nb_cmd - 1;
 652
 653         for (i = 0; i < d->nb_cmd; i++) {
 654                 unsigned int size;
 655                 if (packet_sizes[i] > d->packet_size) {
 656                         size = d->packet_size;
 657                 } else {
 658                         size = packet_sizes[i];
 659                 }
 660                 it_prg[i].data[1] = cpu_to_le32(size << 16);
 661                 it_prg[i].end.control = cpu_to_le32(DMA_CTL_OUTPUT_LAST | DMA_CTL_BRANCH);
 662
 663                 if (i < d->nb_cmd-1 && packet_sizes[i+1] != 0) {
 664                         it_prg[i].end.control |= cpu_to_le32(size);
 665                         it_prg[i].begin.branchAddress =
 666                                 cpu_to_le32((dma_prog_region_offset_to_bus(it_reg, (i + 1) *
 667                                         sizeof(struct it_dma_prg)) & 0xfffffff0) | 0x3);
 668                         it_prg[i].end.branchAddress =
 669                                 cpu_to_le32((dma_prog_region_offset_to_bus(it_reg, (i + 1) *
 670                                         sizeof(struct it_dma_prg)) & 0xfffffff0) | 0x3);
 671                 } else {
 672                         /* the last prg generates an interrupt */
 673                         it_prg[i].end.control |= cpu_to_le32(DMA_CTL_UPDATE |
 674                                 DMA_CTL_IRQ | size);
 675                         /* the last prg doesn't branch */
 676                         it_prg[i].begin.branchAddress = 0;
 677                         it_prg[i].end.branchAddress = 0;
 678                         d->last_used_cmd[n] = i;
 679                         break;
 680                 }
 681         }
 682 }
 683
 684 static void initialize_dma_it_ctx(struct dma_iso_ctx *d, int sync_tag,
 685                                   unsigned int syt_offset, int flags)
 686 {
 687         struct ti_ohci *ohci = (struct ti_ohci *)d->ohci;
 688         int i;
 689
 690         d->flags = flags;
 691         d->syt_offset = (syt_offset == 0 ? 11000 : syt_offset);
 692
 693         ohci1394_stop_context(ohci, d->ctrlClear, NULL);
 694
 695         for (i=0;i<d->num_desc;i++)
 696                 initialize_dma_it_prg(d, i, sync_tag);
 697
 698         /* Set up isoRecvIntMask to generate interrupts */
 699         reg_write(ohci, OHCI1394_IsoXmitIntMaskSet, 1<<d->ctx);
 700 }
 701
 702 static int __video1394_ioctl(struct file *file,
 703                              unsigned int cmd, unsigned long arg)
 704 {
 705         struct file_ctx *ctx = (struct file_ctx *)file->private_data;
 706         struct ti_ohci *ohci = ctx->ohci;
 707         unsigned long flags;
 708         void __user *argp = (void __user *)arg;
 709
 710         switch(cmd)
 711         {
 712         case VIDEO1394_IOC_LISTEN_CHANNEL:
 713         case VIDEO1394_IOC_TALK_CHANNEL:
 714         {
 715                 struct video1394_mmap v;
 716                 u64 mask;
 717                 struct dma_iso_ctx *d;
 718                 int i;
 719
 720                 if (copy_from_user(&v, argp, sizeof(v)))
 721                         return -EFAULT;
 722
 723                 /* if channel < 0, find lowest available one */
 724                 if (v.channel < 0) {
 725                     mask = (u64)0x1;
 726                     for (i=0; i<ISO_CHANNELS; i++) {
 727                         if (!(ohci->ISO_channel_usage & mask)) {
 728                             v.channel = i;
 729                             PRINT(KERN_INFO, ohci->host->id, "Found free channel %d", i);
 730                             break;
 731                         }
 732                         mask = mask << 1;
 733                     }
 734                 }
 735
 736                 if (v.channel<0 || v.channel>(ISO_CHANNELS-1)) {
 737                         PRINT(KERN_ERR, ohci->host->id,
 738                               "Iso channel %d out of bounds", v.channel);
 739                         return -EFAULT;
 740                 }
 741                 mask = (u64)0x1<<v.channel;
 742                 printk("mask: %08X%08X usage: %08X%08X\n",
 743                        (u32)(mask>>32),(u32)(mask&0xffffffff),
 744                        (u32)(ohci->ISO_channel_usage>>32),
 745                        (u32)(ohci->ISO_channel_usage&0xffffffff));
 746                 if (ohci->ISO_channel_usage & mask) {
 747                         PRINT(KERN_ERR, ohci->host->id,
 748                               "Channel %d is already taken", v.channel);
 749                         return -EFAULT;
 750                 }
 751                 ohci->ISO_channel_usage |= mask;
 752
 753                 if (v.buf_size == 0 || v.buf_size > VIDEO1394_MAX_SIZE) {
 754                         PRINT(KERN_ERR, ohci->host->id,
 755                               "Invalid %d length buffer requested",v.buf_size);
 756                         return -EFAULT;
 757                 }
 758
 759                 if (v.nb_buffers == 0 || v.nb_buffers > VIDEO1394_MAX_SIZE) {
 760                         PRINT(KERN_ERR, ohci->host->id,
 761                               "Invalid %d buffers requested",v.nb_buffers);
 762                         return -EFAULT;
 763                 }
 764
 765                 if (v.nb_buffers * v.buf_size > VIDEO1394_MAX_SIZE) {
 766                         PRINT(KERN_ERR, ohci->host->id,
 767                               "%d buffers of size %d bytes is too big",
 768                               v.nb_buffers, v.buf_size);
 769                         return -EFAULT;
 770                 }
 771
 772                 if (cmd == VIDEO1394_IOC_LISTEN_CHANNEL) {
 773                         d = alloc_dma_iso_ctx(ohci, OHCI_ISO_RECEIVE,
 774                                               v.nb_buffers, v.buf_size,
 775                                               v.channel, 0);
 776
 777                         if (d == NULL) {
 778                                 PRINT(KERN_ERR, ohci->host->id,
 779                                       "Couldn't allocate ir context");
 780                                 return -EFAULT;
 781                         }
 782                         initialize_dma_ir_ctx(d, v.sync_tag, v.flags);
 783
 784                         ctx->current_ctx = d;
 785
 786                         v.buf_size = d->buf_size;
 787                         list_add_tail(&d->link, &ctx->context_list);
 788
 789                         PRINT(KERN_INFO, ohci->host->id,
 790                               "iso context %d listen on channel %d",
 791                               d->ctx, v.channel);
 792                 }
 793                 else {
 794                         d = alloc_dma_iso_ctx(ohci, OHCI_ISO_TRANSMIT,
 795                                               v.nb_buffers, v.buf_size,
 796                                               v.channel, v.packet_size);
 797
 798                         if (d == NULL) {
 799                                 PRINT(KERN_ERR, ohci->host->id,
 800                                       "Couldn't allocate it context");
 801                                 return -EFAULT;
 802                         }
 803                         initialize_dma_it_ctx(d, v.sync_tag,
 804                                               v.syt_offset, v.flags);
 805
 806                         ctx->current_ctx = d;
 807
 808                         v.buf_size = d->buf_size;
 809
 810                         list_add_tail(&d->link, &ctx->context_list);
 811
 812                         PRINT(KERN_INFO, ohci->host->id,
 813                               "Iso context %d talk on channel %d", d->ctx,
 814                               v.channel);
 815                 }
 816
 817                 if (copy_to_user(argp, &v, sizeof(v)))
 818                         return -EFAULT;
 819
 820                 return 0;
 821         }
 822         case VIDEO1394_IOC_UNLISTEN_CHANNEL:
 823         case VIDEO1394_IOC_UNTALK_CHANNEL:
 824         {
 825                 int channel;
 826                 u64 mask;
 827                 struct dma_iso_ctx *d;
 828
 829                 if (copy_from_user(&channel, argp, sizeof(int)))
 830                         return -EFAULT;
 831
 832                 if (channel<0 || channel>(ISO_CHANNELS-1)) {
 833                         PRINT(KERN_ERR, ohci->host->id,
 834                               "Iso channel %d out of bound", channel);
 835                         return -EFAULT;
 836                 }
 837                 mask = (u64)0x1<<channel;
 838                 if (!(ohci->ISO_channel_usage & mask)) {
 839                         PRINT(KERN_ERR, ohci->host->id,
 840                               "Channel %d is not being used", channel);
 841                         return -EFAULT;
 842                 }
 843
 844                 /* Mark this channel as unused */
 845                 ohci->ISO_channel_usage &= ~mask;
 846
 847                 if (cmd == VIDEO1394_IOC_UNLISTEN_CHANNEL)
 848                         d = find_ctx(&ctx->context_list, OHCI_ISO_RECEIVE, channel);
 849                 else
 850                         d = find_ctx(&ctx->context_list, OHCI_ISO_TRANSMIT, channel);
 851
 852                 if (d == NULL) return -EFAULT;
 853                 PRINT(KERN_INFO, ohci->host->id, "Iso context %d "
 854                       "stop talking on channel %d", d->ctx, channel);
 855                 free_dma_iso_ctx(d);
 856
 857                 return 0;
 858         }
 859         case VIDEO1394_IOC_LISTEN_QUEUE_BUFFER:
 860         {
 861                 struct video1394_wait v;
 862                 struct dma_iso_ctx *d;
 863
 864                 if (copy_from_user(&v, argp, sizeof(v)))
 865                         return -EFAULT;
 866
 867                 d = find_ctx(&ctx->context_list, OHCI_ISO_RECEIVE, v.channel);
 868                 if (d == NULL) return -EFAULT;
 869
 870                 if ((v.buffer<0) || (v.buffer>d->num_desc)) {
 871                         PRINT(KERN_ERR, ohci->host->id,
 872                               "Buffer %d out of range",v.buffer);
 873                         return -EFAULT;
 874                 }
 875
 876                 spin_lock_irqsave(&d->lock,flags);
 877
 878                 if (d->buffer_status[v.buffer]==VIDEO1394_BUFFER_QUEUED) {
 879                         PRINT(KERN_ERR, ohci->host->id,
 880                               "Buffer %d is already used",v.buffer);
 881                         spin_unlock_irqrestore(&d->lock,flags);
 882                         return -EFAULT;
 883                 }
 884
 885                 d->buffer_status[v.buffer]=VIDEO1394_BUFFER_QUEUED;
 886
 887                 if (d->last_buffer>=0)
 888                         d->ir_prg[d->last_buffer][d->nb_cmd-1].branchAddress =
 889                                 cpu_to_le32((dma_prog_region_offset_to_bus(&d->prg_reg[v.buffer], 0)
 890                                         & 0xfffffff0) | 0x1);
 891
 892                 d->last_buffer = v.buffer;
 893
 894                 d->ir_prg[d->last_buffer][d->nb_cmd-1].branchAddress = 0;
 895
 896                 spin_unlock_irqrestore(&d->lock,flags);
 897
 898                 if (!(reg_read(ohci, d->ctrlSet) & 0x8000))
 899                 {
 900                         DBGMSG(ohci->host->id, "Starting iso DMA ctx=%d",d->ctx);
 901
 902                         /* Tell the controller where the first program is */
 903                         reg_write(ohci, d->cmdPtr,
 904                                 dma_prog_region_offset_to_bus(&d->prg_reg[v.buffer], 0) | 0x1);
 905
 906                         /* Run IR context */
 907                         reg_write(ohci, d->ctrlSet, 0x8000);
 908                 }
 909                 else {
 910                         /* Wake up dma context if necessary */
 911                         if (!(reg_read(ohci, d->ctrlSet) & 0x400)) {
 912                                 PRINT(KERN_INFO, ohci->host->id,
 913                                       "Waking up iso dma ctx=%d", d->ctx);
 914                                 reg_write(ohci, d->ctrlSet, 0x1000);
 915                         }
 916                 }
 917                 return 0;
 918
 919         }
 920         case VIDEO1394_IOC_LISTEN_WAIT_BUFFER:
 921         case VIDEO1394_IOC_LISTEN_POLL_BUFFER:
 922         {
 923                 struct video1394_wait v;
 924                 struct dma_iso_ctx *d;
 925                 int i;
 926
 927                 if (copy_from_user(&v, argp, sizeof(v)))
 928                         return -EFAULT;
 929
 930                 d = find_ctx(&ctx->context_list, OHCI_ISO_RECEIVE, v.channel);
 931                 if (d == NULL) return -EFAULT;
 932
 933                 if ((v.buffer<0) || (v.buffer>d->num_desc)) {
 934                         PRINT(KERN_ERR, ohci->host->id,
 935                               "Buffer %d out of range",v.buffer);
 936                         return -EFAULT;
 937                 }
 938
 939                 /*
 940                  * I change the way it works so that it returns
 941                  * the last received frame.
 942                  */
 943                 spin_lock_irqsave(&d->lock, flags);
 944                 switch(d->buffer_status[v.buffer]) {
 945                 case VIDEO1394_BUFFER_READY:
 946                         d->buffer_status[v.buffer]=VIDEO1394_BUFFER_FREE;
 947                         break;
 948                 case VIDEO1394_BUFFER_QUEUED:
 949                         if (cmd == VIDEO1394_IOC_LISTEN_POLL_BUFFER) {
 950                             /* for polling, return error code EINTR */
 951                             spin_unlock_irqrestore(&d->lock, flags);
 952                             return -EINTR;
 953                         }
 954
 955 #if 1
 956                         while (d->buffer_status[v.buffer]!=
 957                               VIDEO1394_BUFFER_READY) {
 958                                 spin_unlock_irqrestore(&d->lock, flags);
 959                                 interruptible_sleep_on(&d->waitq);
 960                                 spin_lock_irqsave(&d->lock, flags);
 961                                 if (signal_pending(current)) {
 962                                         spin_unlock_irqrestore(&d->lock,flags);
 963                                         return -EINTR;
 964                                 }
 965                         }
 966 #else
 967                         if (wait_event_interruptible(d->waitq,
 968                                                      d->buffer_status[v.buffer]
 969                                                      == VIDEO1394_BUFFER_READY)
 970                             == -ERESTARTSYS)
 971                                 return -EINTR;
 972 #endif
 973                         d->buffer_status[v.buffer]=VIDEO1394_BUFFER_FREE;
 974                         break;
 975                 default:
 976                         PRINT(KERN_ERR, ohci->host->id,
 977                               "Buffer %d is not queued",v.buffer);
 978                         spin_unlock_irqrestore(&d->lock, flags);
 979                         return -EFAULT;
 980                 }
 981
 982                 /* set time of buffer */
 983                 v.filltime = d->buffer_time[v.buffer];
 984 //              printk("Buffer %d time %d\n", v.buffer, (d->buffer_time[v.buffer]).tv_usec);
 985
 986                 /*
 987                  * Look ahead to see how many more buffers have been received
 988                  */
 989                 i=0;
 990                 while (d->buffer_status[(v.buffer+1)%d->num_desc]==
 991                        VIDEO1394_BUFFER_READY) {
 992                         v.buffer=(v.buffer+1)%d->num_desc;
 993                         i++;
 994                 }
 995                 spin_unlock_irqrestore(&d->lock, flags);
 996
 997                 v.buffer=i;
 998                 if (copy_to_user(argp, &v, sizeof(v)))
 999                         return -EFAULT;
1000
1001                 return 0;
1002         }
1003         case VIDEO1394_IOC_TALK_QUEUE_BUFFER:
1004         {
1005                 struct video1394_wait v;
1006                 unsigned int *psizes = NULL;
1007                 struct dma_iso_ctx *d;
1008
1009                 if (copy_from_user(&v, argp, sizeof(v)))
1010                         return -EFAULT;
1011
1012                 d = find_ctx(&ctx->context_list, OHCI_ISO_TRANSMIT, v.channel);
1013                 if (d == NULL) return -EFAULT;
1014
1015                 if ((v.buffer<0) || (v.buffer>d->num_desc)) {
1016                         PRINT(KERN_ERR, ohci->host->id,
1017                               "Buffer %d out of range",v.buffer);
1018                         return -EFAULT;
1019                 }
1020
1021                 if (d->flags & VIDEO1394_VARIABLE_PACKET_SIZE) {
1022                         int buf_size = d->nb_cmd * sizeof(unsigned int);
1023                         struct video1394_queue_variable __user *p = argp;
1024                         unsigned int __user *qv;
1025
1026                         if (get_user(qv, &p->packet_sizes))
1027                                 return -EFAULT;
1028
1029                         psizes = kmalloc(buf_size, GFP_KERNEL);
1030                         if (!psizes)
1031                                 return -ENOMEM;
1032
1033                         if (copy_from_user(psizes, qv, buf_size)) {
1034                                 kfree(psizes);
1035                                 return -EFAULT;
1036                         }
1037                 }
1038
1039                 spin_lock_irqsave(&d->lock,flags);
1040
1041                 if (d->buffer_status[v.buffer]!=VIDEO1394_BUFFER_FREE) {
1042                         PRINT(KERN_ERR, ohci->host->id,
1043                               "Buffer %d is already used",v.buffer);
1044                         spin_unlock_irqrestore(&d->lock,flags);
1045                         if (psizes)
1046                                 kfree(psizes);
1047                         return -EFAULT;
1048                 }
1049
1050                 if (d->flags & VIDEO1394_VARIABLE_PACKET_SIZE) {
1051                         initialize_dma_it_prg_var_packet_queue(
1052                                 d, v.buffer, psizes,
1053                                 ohci);
1054                 }
1055
1056                 d->buffer_status[v.buffer]=VIDEO1394_BUFFER_QUEUED;
1057
1058                 if (d->last_buffer >= 0) {
1059                         d->it_prg[d->last_buffer]
1060                                 [ d->last_used_cmd[d->last_buffer] ].end.branchAddress =
1061                                         cpu_to_le32((dma_prog_region_offset_to_bus(&d->prg_reg[v.buffer],
1062                                                 0) & 0xfffffff0) | 0x3);
1063
1064                         d->it_prg[d->last_buffer]
1065                                 [ d->last_used_cmd[d->last_buffer] ].begin.branchAddress =
1066                                         cpu_to_le32((dma_prog_region_offset_to_bus(&d->prg_reg[v.buffer],
1067                                                 0) & 0xfffffff0) | 0x3);
1068                         d->next_buffer[d->last_buffer] = v.buffer;
1069                 }
1070                 d->last_buffer = v.buffer;
1071                 d->next_buffer[d->last_buffer] = -1;
1072
1073                 d->it_prg[d->last_buffer][d->last_used_cmd[d->last_buffer]].end.branchAddress = 0;
1074
1075                 spin_unlock_irqrestore(&d->lock,flags);
1076
1077                 if (!(reg_read(ohci, d->ctrlSet) & 0x8000))
1078                 {
1079                         DBGMSG(ohci->host->id, "Starting iso transmit DMA ctx=%d",
1080                                d->ctx);
1081                         put_timestamp(ohci, d, d->last_buffer);
1082
1083                         /* Tell the controller where the first program is */
1084                         reg_write(ohci, d->cmdPtr,
1085                                 dma_prog_region_offset_to_bus(&d->prg_reg[v.buffer], 0) | 0x3);
1086
1087                         /* Run IT context */
1088                         reg_write(ohci, d->ctrlSet, 0x8000);
1089                 }
1090                 else {
1091                         /* Wake up dma context if necessary */
1092                         if (!(reg_read(ohci, d->ctrlSet) & 0x400)) {
1093                                 PRINT(KERN_INFO, ohci->host->id,
1094                                       "Waking up iso transmit dma ctx=%d",
1095                                       d->ctx);
1096                                 put_timestamp(ohci, d, d->last_buffer);
1097                                 reg_write(ohci, d->ctrlSet, 0x1000);
1098                         }
1099                 }
1100
1101                 if (psizes)
1102                         kfree(psizes);
1103
1104                 return 0;
1105
1106         }
1107         case VIDEO1394_IOC_TALK_WAIT_BUFFER:
1108         {
1109                 struct video1394_wait v;
1110                 struct dma_iso_ctx *d;
1111
1112                 if (copy_from_user(&v, argp, sizeof(v)))
1113                         return -EFAULT;
1114
1115                 d = find_ctx(&ctx->context_list, OHCI_ISO_TRANSMIT, v.channel);
1116                 if (d == NULL) return -EFAULT;
1117
1118                 if ((v.buffer<0) || (v.buffer>d->num_desc)) {
1119                         PRINT(KERN_ERR, ohci->host->id,
1120                               "Buffer %d out of range",v.buffer);
1121                         return -EFAULT;
1122                 }
1123
1124                 switch(d->buffer_status[v.buffer]) {
1125                 case VIDEO1394_BUFFER_READY:
1126                         d->buffer_status[v.buffer]=VIDEO1394_BUFFER_FREE;
1127                         return 0;
1128                 case VIDEO1394_BUFFER_QUEUED:
1129 #if 1
1130                         while (d->buffer_status[v.buffer]!=
1131                               VIDEO1394_BUFFER_READY) {
1132                                 interruptible_sleep_on(&d->waitq);
1133                                 if (signal_pending(current)) return -EINTR;
1134                         }
1135 #else
1136                         if (wait_event_interruptible(d->waitq,
1137                                                      d->buffer_status[v.buffer]
1138                                                      == VIDEO1394_BUFFER_READY)
1139                             == -ERESTARTSYS)
1140                                 return -EINTR;
1141 #endif
1142                         d->buffer_status[v.buffer]=VIDEO1394_BUFFER_FREE;
1143                         return 0;
1144                 default:
1145                         PRINT(KERN_ERR, ohci->host->id,
1146                               "Buffer %d is not queued",v.buffer);
1147                         return -EFAULT;
1148                 }
1149         }
1150         default:
1151                 return -EINVAL;
1152         }
1153 }
1154
1155 static long video1394_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
1156 {
1157         int err;
1158         lock_kernel();
1159         err = __video1394_ioctl(file, cmd, arg);
1160         unlock_kernel();
1161         return err;
1162 }
1163
1164 /*
1165  *      This maps the vmalloced and reserved buffer to user space.
1166  *
1167  *  FIXME:
1168  *  - PAGE_READONLY should suffice!?
1169  *  - remap_pfn_range is kind of inefficient for page by page remapping.
1170  *    But e.g. pte_alloc() does not work in modules ... :-(
1171  */
1172
1173 int video1394_mmap(struct file *file, struct vm_area_struct *vma)
1174 {
1175         struct file_ctx *ctx = (struct file_ctx *)file->private_data;
1176         int res = -EINVAL;
1177
1178         lock_kernel();
1179         if (ctx->current_ctx == NULL) {
1180                 PRINT(KERN_ERR, ctx->ohci->host->id, "Current iso context not set");
1181         } else
1182                 res = dma_region_mmap(&ctx->current_ctx->dma, file, vma);
1183         unlock_kernel();
1184
1185         return res;
1186 }
1187
1188 static int video1394_open(struct inode *inode, struct file *file)
1189 {
1190         int i = ieee1394_file_to_instance(file);
1191         struct ti_ohci *ohci;
1192         struct file_ctx *ctx;
1193
1194         ohci = hpsb_get_hostinfo_bykey(&video1394_highlevel, i);
1195         if (ohci == NULL)
1196                 return -EIO;
1197
1198         ctx = kmalloc(sizeof(struct file_ctx), GFP_KERNEL);
1199         if (ctx == NULL)  {
1200                 PRINT(KERN_ERR, ohci->host->id, "Cannot malloc file_ctx");
1201                 return -ENOMEM;
1202         }
1203
1204         memset(ctx, 0, sizeof(struct file_ctx));
1205         ctx->ohci = ohci;
1206         INIT_LIST_HEAD(&ctx->context_list);
1207         ctx->current_ctx = NULL;
1208         file->private_data = ctx;
1209
1210         return 0;
1211 }
1212
1213 static int video1394_release(struct inode *inode, struct file *file)
1214 {
1215         struct file_ctx *ctx = (struct file_ctx *)file->private_data;
1216         struct ti_ohci *ohci = ctx->ohci;
1217         struct list_head *lh, *next;
1218         u64 mask;
1219
1220         lock_kernel();
1221         list_for_each_safe(lh, next, &ctx->context_list) {
1222                 struct dma_iso_ctx *d;
1223                 d = list_entry(lh, struct dma_iso_ctx, link);
1224                 mask = (u64) 1 << d->channel;
1225
1226                 if (!(ohci->ISO_channel_usage & mask))
1227                         PRINT(KERN_ERR, ohci->host->id, "On release: Channel %d "
1228                               "is not being used", d->channel);
1229                 else
1230                         ohci->ISO_channel_usage &= ~mask;
1231                 PRINT(KERN_INFO, ohci->host->id, "On release: Iso %s context "
1232                       "%d stop listening on channel %d",
1233                       d->type == OHCI_ISO_RECEIVE ? "receive" : "transmit",
1234                       d->ctx, d->channel);
1235                 free_dma_iso_ctx(d);
1236         }
1237
1238         kfree(ctx);
1239         file->private_data = NULL;
1240
1241         unlock_kernel();
1242         return 0;
1243 }
1244
1245 #ifdef CONFIG_COMPAT
1246 static long video1394_compat_ioctl(struct file *f, unsigned cmd, unsigned long arg);
1247 #endif
1248
1249 static struct cdev video1394_cdev;
1250 static struct file_operations video1394_fops=
1251 {
1252         .owner =        THIS_MODULE,
1253         .unlocked_ioctl = video1394_ioctl,
1254 #ifdef CONFIG_COMPAT
1255         .compat_ioctl = video1394_compat_ioctl,
1256 #endif
1257         .mmap =         video1394_mmap,
1258         .open =         video1394_open,
1259         .release =      video1394_release
1260 };
1261
1262 /*** HOTPLUG STUFF **********************************************************/
1263 /*
1264  * Export information about protocols/devices supported by this driver.
1265  */
1266 static struct ieee1394_device_id video1394_id_table[] = {
1267         {
1268                 .match_flags    = IEEE1394_MATCH_SPECIFIER_ID | IEEE1394_MATCH_VERSION,
1269                 .specifier_id   = CAMERA_UNIT_SPEC_ID_ENTRY & 0xffffff,
1270                 .version        = CAMERA_SW_VERSION_ENTRY & 0xffffff
1271         },
1272         { }
1273 };
1274
1275 MODULE_DEVICE_TABLE(ieee1394, video1394_id_table);
1276
1277 static struct hpsb_protocol_driver video1394_driver = {
1278         .name           = "1394 Digital Camera Driver",
1279         .id_table       = video1394_id_table,
1280         .driver         = {
1281                 .name   = VIDEO1394_DRIVER_NAME,
1282                 .bus    = &ieee1394_bus_type,
1283         },
1284 };
1285
1286
1287 static void video1394_add_host (struct hpsb_host *host)
1288 {
1289         struct ti_ohci *ohci;
1290         int minor;
1291
1292         /* We only work with the OHCI-1394 driver */
1293         if (strcmp(host->driver->name, OHCI1394_DRIVER_NAME))
1294                 return;
1295
1296         ohci = (struct ti_ohci *)host->hostdata;
1297
1298         if (!hpsb_create_hostinfo(&video1394_highlevel, host, 0)) {
1299                 PRINT(KERN_ERR, ohci->host->id, "Cannot allocate hostinfo");
1300                 return;
1301         }
1302
1303         hpsb_set_hostinfo(&video1394_highlevel, host, ohci);
1304         hpsb_set_hostinfo_key(&video1394_highlevel, host, ohci->host->id);
1305
1306         minor = IEEE1394_MINOR_BLOCK_VIDEO1394 * 16 + ohci->host->id;
1307         devfs_mk_cdev(MKDEV(IEEE1394_MAJOR, minor),
1308                        S_IFCHR | S_IRUSR | S_IWUSR,
1309                        "%s/%d", VIDEO1394_DRIVER_NAME, ohci->host->id);
1310 }
1311
1312
1313 static void video1394_remove_host (struct hpsb_host *host)
1314 {
1315         struct ti_ohci *ohci = hpsb_get_hostinfo(&video1394_highlevel, host);
1316
1317         if (ohci)
1318                 devfs_remove("%s/%d", VIDEO1394_DRIVER_NAME, ohci->host->id);
1319
1320         return;
1321 }
1322
1323
1324 static struct hpsb_highlevel video1394_highlevel = {
1325         .name =         VIDEO1394_DRIVER_NAME,
1326         .add_host =     video1394_add_host,
1327         .remove_host =  video1394_remove_host,
1328 };
1329
1330 MODULE_AUTHOR("Sebastien Rougeaux <sebastien.rougeaux@anu.edu.au>");
1331 MODULE_DESCRIPTION("driver for digital video on OHCI board");
1332 MODULE_SUPPORTED_DEVICE(VIDEO1394_DRIVER_NAME);
1333 MODULE_LICENSE("GPL");
1334
1335 #ifdef CONFIG_COMPAT
1336
1337 #define VIDEO1394_IOC32_LISTEN_QUEUE_BUFFER     \
1338         _IOW ('#', 0x12, struct video1394_wait32)
1339 #define VIDEO1394_IOC32_LISTEN_WAIT_BUFFER      \
1340         _IOWR('#', 0x13, struct video1394_wait32)
1341 #define VIDEO1394_IOC32_TALK_WAIT_BUFFER        \
1342         _IOW ('#', 0x17, struct video1394_wait32)
1343 #define VIDEO1394_IOC32_LISTEN_POLL_BUFFER      \
1344         _IOWR('#', 0x18, struct video1394_wait32)
1345
1346 struct video1394_wait32 {
1347         u32 channel;
1348         u32 buffer;
1349         struct compat_timeval filltime;
1350 };
1351
1352 static int video1394_wr_wait32(struct file *file, unsigned int cmd, unsigned long arg)
1353 {
1354         struct video1394_wait32 __user *argp = (void __user *)arg;
1355         struct video1394_wait32 wait32;
1356         struct video1394_wait wait;
1357         mm_segment_t old_fs;
1358         int ret;
1359
1360         if (copy_from_user(&wait32, argp, sizeof(wait32)))
1361                 return -EFAULT;
1362
1363         wait.channel = wait32.channel;
1364         wait.buffer = wait32.buffer;
1365         wait.filltime.tv_sec = (time_t)wait32.filltime.tv_sec;
1366         wait.filltime.tv_usec = (suseconds_t)wait32.filltime.tv_usec;
1367
1368         old_fs = get_fs();
1369         set_fs(KERNEL_DS);
1370         if (cmd == VIDEO1394_IOC32_LISTEN_WAIT_BUFFER)
1371                 ret = video1394_ioctl(file,
1372                                       VIDEO1394_IOC_LISTEN_WAIT_BUFFER,
1373                                       (unsigned long) &wait);
1374         else
1375                 ret = video1394_ioctl(file,
1376                                       VIDEO1394_IOC_LISTEN_POLL_BUFFER,
1377                                       (unsigned long) &wait);
1378         set_fs(old_fs);
1379
1380         if (!ret) {
1381                 wait32.channel = wait.channel;
1382                 wait32.buffer = wait.buffer;
1383                 wait32.filltime.tv_sec = (int)wait.filltime.tv_sec;
1384                 wait32.filltime.tv_usec = (int)wait.filltime.tv_usec;
1385
1386                 if (copy_to_user(argp, &wait32, sizeof(wait32)))
1387                         ret = -EFAULT;
1388         }
1389
1390         return ret;
1391 }
1392
1393 static int video1394_w_wait32(struct file *file, unsigned int cmd, unsigned long arg)
1394 {
1395         struct video1394_wait32 wait32;
1396         struct video1394_wait wait;
1397         mm_segment_t old_fs;
1398         int ret;
1399
1400         if (copy_from_user(&wait32, (void __user *)arg, sizeof(wait32)))
1401                 return -EFAULT;
1402
1403         wait.channel = wait32.channel;
1404         wait.buffer = wait32.buffer;
1405         wait.filltime.tv_sec = (time_t)wait32.filltime.tv_sec;
1406         wait.filltime.tv_usec = (suseconds_t)wait32.filltime.tv_usec;
1407
1408         old_fs = get_fs();
1409         set_fs(KERNEL_DS);
1410         if (cmd == VIDEO1394_IOC32_LISTEN_QUEUE_BUFFER)
1411                 ret = video1394_ioctl(file,
1412                                       VIDEO1394_IOC_LISTEN_QUEUE_BUFFER,
1413                                       (unsigned long) &wait);
1414         else
1415                 ret = video1394_ioctl(file,
1416                                       VIDEO1394_IOC_TALK_WAIT_BUFFER,
1417                                       (unsigned long) &wait);
1418         set_fs(old_fs);
1419
1420         return ret;
1421 }
1422
1423 static int video1394_queue_buf32(struct file *file, unsigned int cmd, unsigned long arg)
1424 {
1425         return -EFAULT;   /* ??? was there before. */
1426
1427         return video1394_ioctl(file,
1428                                 VIDEO1394_IOC_TALK_QUEUE_BUFFER, arg);
1429 }
1430
1431 static long video1394_compat_ioctl(struct file *f, unsigned cmd, unsigned long arg)
1432 {
1433         switch (cmd) {
1434         case VIDEO1394_IOC_LISTEN_CHANNEL:
1435         case VIDEO1394_IOC_UNLISTEN_CHANNEL:
1436         case VIDEO1394_IOC_TALK_CHANNEL:
1437         case VIDEO1394_IOC_UNTALK_CHANNEL:
1438                 return video1394_ioctl(f, cmd, arg);
1439
1440         case VIDEO1394_IOC32_LISTEN_QUEUE_BUFFER:
1441                 return video1394_w_wait32(f, cmd, arg);
1442         case VIDEO1394_IOC32_LISTEN_WAIT_BUFFER:
1443                 return video1394_wr_wait32(f, cmd, arg);
1444         case VIDEO1394_IOC_TALK_QUEUE_BUFFER:
1445                 return video1394_queue_buf32(f, cmd, arg);
1446         case VIDEO1394_IOC32_TALK_WAIT_BUFFER:
1447                 return video1394_w_wait32(f, cmd, arg);
1448         case VIDEO1394_IOC32_LISTEN_POLL_BUFFER:
1449                 return video1394_wr_wait32(f, cmd, arg);
1450         default:
1451                 return -ENOIOCTLCMD;
1452         }
1453 }
1454
1455 #endif /* CONFIG_COMPAT */
1456
1457 static void __exit video1394_exit_module (void)
1458 {
1459         hpsb_unregister_protocol(&video1394_driver);
1460
1461         hpsb_unregister_highlevel(&video1394_highlevel);
1462
1463         devfs_remove(VIDEO1394_DRIVER_NAME);
1464         cdev_del(&video1394_cdev);
1465
1466         PRINT_G(KERN_INFO, "Removed " VIDEO1394_DRIVER_NAME " module");
1467 }
1468
1469 static int __init video1394_init_module (void)
1470 {
1471         int ret;
1472
1473         cdev_init(&video1394_cdev, &video1394_fops);
1474         video1394_cdev.owner = THIS_MODULE;
1475         kobject_set_name(&video1394_cdev.kobj, VIDEO1394_DRIVER_NAME);
1476         ret = cdev_add(&video1394_cdev, IEEE1394_VIDEO1394_DEV, 16);
1477         if (ret) {
1478                 PRINT_G(KERN_ERR, "video1394: unable to get minor device block");
1479                 return ret;
1480         }
1481
1482         devfs_mk_dir(VIDEO1394_DRIVER_NAME);
1483
1484         hpsb_register_highlevel(&video1394_highlevel);
1485
1486         ret = hpsb_register_protocol(&video1394_driver);
1487         if (ret) {
1488                 PRINT_G(KERN_ERR, "video1394: failed to register protocol");
1489                 hpsb_unregister_highlevel(&video1394_highlevel);
1490                 devfs_remove(VIDEO1394_DRIVER_NAME);
1491                 cdev_del(&video1394_cdev);
1492                 return ret;
1493         }
1494
1495         PRINT_G(KERN_INFO, "Installed " VIDEO1394_DRIVER_NAME " module");
1496         return 0;
1497 }
1498
1499
1500 module_init(video1394_init_module);
1501 module_exit(video1394_exit_module);
1502 MODULE_ALIAS_CHARDEV(IEEE1394_MAJOR, IEEE1394_MINOR_BLOCK_VIDEO1394 * 16);